Re: [PATCH v9 03/14] dt-bindings: mediatek: display: split each block to individual yaml - Chun-Kuang Hu

From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
To: "jason-jh.lin" <jason-jh.lin@mediatek.com>
Cc: Rob Herring <robh+dt@kernel.org>,
	Matthias Brugger <matthias.bgg@gmail.com>,
	Chun-Kuang Hu <chunkuang.hu@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Enric Balletbo i Serra <enric.balletbo@collabora.com>,
	Frank Wunderlich <frank-w@public-files.de>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>,
	Fabien Parent <fparent@baylibre.com>,
	Hsin-Yi Wang <hsinyi@chromium.org>,
	fshao@chromium.org, Yongqiang Niu <yongqiang.niu@mediatek.com>,
	Jitao shi <jitao.shi@mediatek.com>,
	Nancy Lin <nancy.lin@mediatek.com>,
	singo.chang@mediatek.com, DTML <devicetree@vger.kernel.org>,
	Linux ARM <linux-arm-kernel@lists.infradead.org>,
	"moderated list:ARM/Mediatek SoC support" 
	<linux-mediatek@lists.infradead.org>,
	linux-kernel <linux-kernel@vger.kernel.org>,
	DRI Development <dri-devel@lists.freedesktop.org>
Subject: Re: [PATCH v9 03/14] dt-bindings: mediatek: display: split each block to individual yaml
Date: Sat, 4 Sep 2021 07:08:52 +0800	[thread overview]
Message-ID: <CAAOTY_-p8m_rGgQ3=Q9WmuC19LJnT2gSTcJopkgYBpgj-h-T1Q@mail.gmail.com> (raw)
In-Reply-To: <20210825144833.7757-4-jason-jh.lin@mediatek.com>

Hi, Jason:

jason-jh.lin <jason-jh.lin@mediatek.com> 於 2021年8月25日 週三 下午10:48寫道：
>
> 1. Remove mediatek,dislpay.txt
> 2. Split each display function block to individual yaml file.
>
> Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
> ---
>  .../display/mediatek/mediatek,aal.yaml        |  75 ++++++
>  .../display/mediatek/mediatek,ccorr.yaml      |  69 ++++++
>  .../display/mediatek/mediatek,color.yaml      |  84 +++++++
>  .../display/mediatek/mediatek,disp.txt        | 219 ------------------
>  .../display/mediatek/mediatek,dither.yaml     |  70 ++++++
>  .../display/mediatek/mediatek,gamma.yaml      |  71 ++++++
>  .../display/mediatek/mediatek,merge.yaml      |  66 ++++++
>  .../display/mediatek/mediatek,mutex.yaml      |  77 ++++++
>  .../display/mediatek/mediatek,od.yaml         |  52 +++++
>  .../display/mediatek/mediatek,ovl-2l.yaml     |  86 +++++++
>  .../display/mediatek/mediatek,ovl.yaml        |  96 ++++++++
>  .../display/mediatek/mediatek,rdma.yaml       | 110 +++++++++
>  .../display/mediatek/mediatek,split.yaml      |  56 +++++
>  .../display/mediatek/mediatek,ufoe.yaml       |  59 +++++
>  .../display/mediatek/mediatek,wdma.yaml       |  86 +++++++
>  15 files changed, 1057 insertions(+), 219 deletions(-)
>  create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,aal.yaml
>  create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ccorr.yaml
>  create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,color.yaml
>  delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
>  create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dither.yaml
>  create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,gamma.yaml
>  create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,merge.yaml
>  create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml

Because mutex does not only control display function block, but also
control mdp function block, so move mutex binding document to the same
folder of mmsys.

>  create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,od.yaml
>  create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ovl-2l.yaml
>  create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ovl.yaml
>  create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,rdma.yaml
>  create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,split.yaml
>  create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml
>  create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,wdma.yaml
>

[snip]

> diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml
> new file mode 100644
> index 000000000000..939dff14d989
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,mutex.yaml
> @@ -0,0 +1,77 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/mediatek/mediatek,mutex.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: mediatek display mutex
> +
> +maintainers:
> +  - Chun-Kuang Hu <chunkuang.hu@kernel.org>
> +  - Philipp Zabel <p.zabel@pengutronix.de>
> +
> +description: |
> +  The mediatek display mutex is used to send the triggers signals called
> +  Start Of Frame (SOF)/ Error Of Frame (EOF) to each sub-modules on the

EOF is End of Frame.

> +  display data path

In some SoC, such as mt2701, MUTEX could be a hardware mutex which
protect the shadow register. Please describe this because this is a
main function and this is why it's called MUTEX.

Regards,
Chun-Kuang.
.
> +  MUTEX device node must be siblings to the central MMSYS_CONFIG node.
> +  For a description of the MMSYS_CONFIG binding, see
> +  Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml for details.
> +
> +properties:
> +  compatible:
> +    oneOf:
> +      - items:
> +          - const: mediatek,mt2701-disp-mutex
> +      - items:
> +          - const: mediatek,mt2712-disp-mutex
> +      - items:
> +          - const: mediatek,mt8167-disp-mutex
> +      - items:
> +          - const: mediatek,mt8173-disp-mutex
> +      - items:
> +          - const: mediatek,mt8183-disp-mutex
> +
> +  reg:
> +    maxItems: 1
> +
> +  interrupts:
> +    maxItems: 1
> +
> +  power-domains:
> +    description: A phandle and PM domain specifier as defined by bindings of
> +      the power controller specified by phandle. See
> +      Documentation/devicetree/bindings/power/power-domain.yaml for details.
> +
> +  clocks:
> +    items:
> +      - description: MUTEX Clock
> +
> +  mediatek,gce-events:
> +    description:
> +      The event id which is mapping to the specific hardware event signal to gce.
> +      The event id is defined in the gce header
> +      include/include/dt-bindings/gce/<chip>-gce.h of each chips.
> +    $ref: /schemas/types.yaml#/definitions/phandle-array
> +
> +required:
> +  - compatible
> +  - reg
> +  - interrupts
> +  - power-domains
> +  - clocks
> +
> +additionalProperties: false
> +
> +examples:
> +  - |
> +
> +    mutex: mutex@14020000 {
> +        compatible = "mediatek,mt8173-disp-mutex";
> +        reg = <0 0x14020000 0 0x1000>;
> +        interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_LOW>;
> +        power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
> +        clocks = <&mmsys CLK_MM_MUTEX_32K>;
> +        mediatek,gce-events = <CMDQ_EVENT_MUTEX0_STREAM_EOF>,
> +                              <CMDQ_EVENT_MUTEX1_STREAM_EOF>;
> +    };