From: Anup Patel <anup@brainfault.org>
To: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Anup Patel <Anup.Patel@wdc.com>,
Palmer Dabbelt <palmer@sifive.com>,
Paolo Bonzini <pbonzini@redhat.com>, Radim K <rkrcmar@redhat.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Alexander Graf <graf@amazon.com>,
Atish Patra <Atish.Patra@wdc.com>,
Alistair Francis <Alistair.Francis@wdc.com>,
Damien Le Moal <Damien.LeMoal@wdc.com>,
Christoph Hellwig <hch@infradead.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v9 00/22] KVM RISC-V Support
Date: Sat, 26 Oct 2019 08:52:16 +0530 [thread overview]
Message-ID: <CAAhSdy1zfL2kPM-Le6TZSqS2TU1RkgC+zTbB4y31t8TXwVjhEg@mail.gmail.com> (raw)
In-Reply-To: <alpine.DEB.2.21.9999.1910251609500.12828@viisi.sifive.com>
On Sat, Oct 26, 2019 at 4:40 AM Paul Walmsley <paul.walmsley@sifive.com> wrote:
>
> Hi Anup,
>
> On Wed, 16 Oct 2019, Anup Patel wrote:
>
> > This series adds initial KVM RISC-V support. Currently, we are able to boot
> > RISC-V 64bit Linux Guests with multiple VCPUs.
> >
> > Few key aspects of KVM RISC-V added by this series are:
> > 1. Minimal possible KVM world-switch which touches only GPRs and few CSRs.
> > 2. Full Guest/VM switch is done via vcpu_get/vcpu_put infrastructure.
> > 3. KVM ONE_REG interface for VCPU register access from user-space.
> > 4. PLIC emulation is done in user-space.
> > 5. Timer and IPI emuation is done in-kernel.
> > 6. MMU notifiers supported.
> > 7. FP lazy save/restore supported.
> > 8. SBI v0.1 emulation for KVM Guest available.
> > 9. Forward unhandled SBI calls to KVM userspace.
> > 10. Hugepage support for Guest/VM
>
> Several patches in this series cause 'checkpatch.pl --strict' to flag
> issues. When you respin this series, could you fix those, please?
I generally run checkpatch.pl every time before sending patches.
I will try checkpatch.pl with --strict parameter as well in v10 series.
Regards,
Anup
>
>
> thanks,
>
> - Paul
WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <anup@brainfault.org>
To: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>,
Palmer Dabbelt <palmer@sifive.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>,
Radim K <rkrcmar@redhat.com>, Anup Patel <Anup.Patel@wdc.com>,
Damien Le Moal <Damien.LeMoal@wdc.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Christoph Hellwig <hch@infradead.org>,
Atish Patra <Atish.Patra@wdc.com>,
Alexander Graf <graf@amazon.com>,
Paolo Bonzini <pbonzini@redhat.com>,
Thomas Gleixner <tglx@linutronix.de>,
"linux-riscv@lists.infradead.org"
<linux-riscv@lists.infradead.org>
Subject: Re: [PATCH v9 00/22] KVM RISC-V Support
Date: Sat, 26 Oct 2019 08:52:16 +0530 [thread overview]
Message-ID: <CAAhSdy1zfL2kPM-Le6TZSqS2TU1RkgC+zTbB4y31t8TXwVjhEg@mail.gmail.com> (raw)
In-Reply-To: <alpine.DEB.2.21.9999.1910251609500.12828@viisi.sifive.com>
On Sat, Oct 26, 2019 at 4:40 AM Paul Walmsley <paul.walmsley@sifive.com> wrote:
>
> Hi Anup,
>
> On Wed, 16 Oct 2019, Anup Patel wrote:
>
> > This series adds initial KVM RISC-V support. Currently, we are able to boot
> > RISC-V 64bit Linux Guests with multiple VCPUs.
> >
> > Few key aspects of KVM RISC-V added by this series are:
> > 1. Minimal possible KVM world-switch which touches only GPRs and few CSRs.
> > 2. Full Guest/VM switch is done via vcpu_get/vcpu_put infrastructure.
> > 3. KVM ONE_REG interface for VCPU register access from user-space.
> > 4. PLIC emulation is done in user-space.
> > 5. Timer and IPI emuation is done in-kernel.
> > 6. MMU notifiers supported.
> > 7. FP lazy save/restore supported.
> > 8. SBI v0.1 emulation for KVM Guest available.
> > 9. Forward unhandled SBI calls to KVM userspace.
> > 10. Hugepage support for Guest/VM
>
> Several patches in this series cause 'checkpatch.pl --strict' to flag
> issues. When you respin this series, could you fix those, please?
I generally run checkpatch.pl every time before sending patches.
I will try checkpatch.pl with --strict parameter as well in v10 series.
Regards,
Anup
>
>
> thanks,
>
> - Paul
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next prev parent reply other threads:[~2019-10-26 3:22 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-10-16 16:08 [PATCH v9 00/22] KVM RISC-V Support Anup Patel
2019-10-16 16:08 ` Anup Patel
2019-10-16 16:08 ` [PATCH v9 01/22] RISC-V: Add bitmap reprensenting ISA features common across CPUs Anup Patel
2019-10-16 16:08 ` Anup Patel
2019-10-17 8:48 ` Anup Patel
2019-10-17 8:48 ` Anup Patel
2019-10-25 23:30 ` Paul Walmsley
2019-10-25 23:30 ` Paul Walmsley
2019-10-16 16:08 ` [PATCH v9 02/22] RISC-V: Add hypervisor extension related CSR defines Anup Patel
2019-10-16 16:08 ` Anup Patel
2019-10-16 16:08 ` [PATCH v9 03/22] RISC-V: Add initial skeletal KVM support Anup Patel
2019-10-16 16:08 ` Anup Patel
2019-11-20 8:04 ` Paul Walmsley
2019-11-20 8:04 ` Paul Walmsley
2019-10-16 16:08 ` [PATCH v9 04/22] RISC-V: KVM: Implement VCPU create, init and destroy functions Anup Patel
2019-10-16 16:08 ` Anup Patel
2019-10-16 16:09 ` [PATCH v9 05/22] RISC-V: KVM: Implement VCPU interrupts and requests handling Anup Patel
2019-10-16 16:09 ` Anup Patel
2019-10-16 16:09 ` [PATCH v9 06/22] RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls Anup Patel
2019-10-16 16:09 ` Anup Patel
2019-10-16 16:09 ` [PATCH v9 07/22] RISC-V: KVM: Implement VCPU world-switch Anup Patel
2019-10-16 16:09 ` Anup Patel
2019-10-16 16:09 ` [PATCH v9 08/22] RISC-V: KVM: Handle MMIO exits for VCPU Anup Patel
2019-10-16 16:09 ` Anup Patel
2019-10-16 16:10 ` [PATCH v9 09/22] RISC-V: KVM: Handle WFI " Anup Patel
2019-10-16 16:10 ` Anup Patel
2019-10-16 16:10 ` [PATCH v9 10/22] RISC-V: KVM: Implement VMID allocator Anup Patel
2019-10-16 16:10 ` Anup Patel
2019-10-16 16:10 ` [PATCH v9 11/22] RISC-V: KVM: Implement stage2 page table programming Anup Patel
2019-10-16 16:10 ` Anup Patel
2019-10-16 16:10 ` [PATCH v9 12/22] RISC-V: KVM: Implement MMU notifiers Anup Patel
2019-10-16 16:10 ` Anup Patel
2019-10-16 16:10 ` [PATCH v9 13/22] RISC-V: KVM: Add timer functionality Anup Patel
2019-10-16 16:10 ` Anup Patel
2019-12-04 16:08 ` Daniel Lezcano
2019-12-04 16:08 ` Daniel Lezcano
2019-10-16 16:10 ` [PATCH v9 14/22] RISC-V: KVM: FP lazy save/restore Anup Patel
2019-10-16 16:10 ` Anup Patel
2019-10-16 16:11 ` [PATCH v9 15/22] RISC-V: KVM: Implement ONE REG interface for FP registers Anup Patel
2019-10-16 16:11 ` Anup Patel
2019-10-16 16:11 ` [PATCH v9 16/22] RISC-V: KVM: Add SBI v0.1 support Anup Patel
2019-10-16 16:11 ` Anup Patel
2019-10-16 16:11 ` [PATCH v9 17/22] RISC-V: KVM: Forward unhandled SBI calls to userspace Anup Patel
2019-10-16 16:11 ` Anup Patel
2019-10-16 16:11 ` [PATCH v9 18/22] RISC-V: KVM: Simplify stage2 page table programming Anup Patel
2019-10-16 16:11 ` Anup Patel
2019-10-21 17:31 ` Paolo Bonzini
2019-10-21 17:31 ` Paolo Bonzini
2019-10-22 5:12 ` Anup Patel
2019-10-22 5:12 ` Anup Patel
2019-10-16 16:12 ` [PATCH v9 19/22] RISC-V: KVM: Remove per-CPU vsip_shadow variable Anup Patel
2019-10-16 16:12 ` Anup Patel
2019-10-21 17:28 ` Paolo Bonzini
2019-10-21 17:28 ` Paolo Bonzini
2019-10-22 5:09 ` Anup Patel
2019-10-22 5:09 ` Anup Patel
2019-10-16 16:12 ` [PATCH v9 20/22] RISC-V: KVM: Fix race-condition in kvm_riscv_vcpu_sync_interrupts() Anup Patel
2019-10-16 16:12 ` Anup Patel
2019-10-21 17:27 ` Paolo Bonzini
2019-10-21 17:27 ` Paolo Bonzini
2019-10-22 5:07 ` Anup Patel
2019-10-22 5:07 ` Anup Patel
2019-10-16 16:12 ` [PATCH v9 21/22] RISC-V: KVM: Document RISC-V specific parts of KVM API Anup Patel
2019-10-16 16:12 ` Anup Patel
2019-10-16 16:12 ` [PATCH v9 22/22] RISC-V: KVM: Add MAINTAINERS entry Anup Patel
2019-10-16 16:12 ` Anup Patel
2019-10-25 23:10 ` [PATCH v9 00/22] KVM RISC-V Support Paul Walmsley
2019-10-25 23:10 ` Paul Walmsley
2019-10-26 3:22 ` Anup Patel [this message]
2019-10-26 3:22 ` Anup Patel
2019-10-26 5:33 ` Christoph Hellwig
2019-10-26 5:33 ` Christoph Hellwig
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