All of lore.kernel.org
 help / color / mirror / Atom feed
From: Doug Anderson <dianders@chromium.org>
To: Marc Zyngier <maz@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, Sumit Garg <sumit.garg@linaro.org>,
	Daniel Thompson <daniel.thompson@linaro.org>,
	"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	kgdb-bugreport@lists.sourceforge.net,
	Lecopzer Chen <lecopzer.chen@mediatek.com>,
	linux-perf-users@vger.kernel.org,
	Masayoshi Mizuma <msys.mizuma@gmail.com>,
	Chen-Yu Tsai <wens@csie.org>,
	linux-arm-kernel@lists.infradead.org, ito-yuichi@fujitsu.com,
	Stephen Boyd <swboyd@chromium.org>,
	Peter Zijlstra <peterz@infradead.org>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v11 1/6] irqchip/gic-v3: Enable support for SGIs to act as NMIs
Date: Mon, 28 Aug 2023 08:35:27 -0700	[thread overview]
Message-ID: <CAD=FV=VaF2ebXX12CY4ZSnj4rSbes9vruBkKf-F6ZdaHBCqkqQ@mail.gmail.com> (raw)
In-Reply-To: <86bkeuf5tm.wl-maz@kernel.org>

Hi,

On Sat, Aug 26, 2023 at 3:37 AM Marc Zyngier <maz@kernel.org> wrote:
>
> On Thu, 24 Aug 2023 16:30:27 +0100,
> Douglas Anderson <dianders@chromium.org> wrote:
> >
> > As of commit 6abbd6988971 ("irqchip/gic, gic-v3: Make SGIs use
> > handle_percpu_devid_irq()") SGIs are treated the same as PPIs/EPPIs
> > and use handle_percpu_devid_irq() by default. Unfortunately,
> > handle_percpu_devid_irq() isn't NMI safe, and so to run in an NMI
> > context those should use handle_percpu_devid_fasteoi_nmi().
> >
> > In order to accomplish this, we just have to make room for SGIs in the
> > array of refcounts that keeps track of which interrupts are set as
> > NMI. We also rename the array and create a new indexing scheme that
> > accounts for SGIs.
> >
> > Also, enable NMI support prior to gic_smp_init() as allocation of SGIs
> > as IRQs/NMIs happen as part of this routine.
> >
> > Co-developed-by: Sumit Garg <sumit.garg@linaro.org>
> > Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
> > Signed-off-by: Douglas Anderson <dianders@chromium.org>
> > ---
> > In v10 I removed the previous Reviewed-by and Tested-by tags since the
> > patch contents changed pretty drastically.
> >
> > I'll also note that this change is a little more black magic to me
> > than others in this series. I don't have a massive amounts of
> > familiarity with all the moving parts of gic-v3, so I mostly just
> > followed Mark Rutland's advice [1]. Please pay extra attention to make
> > sure I didn't do anything too terrible.
> >
> > Mark's advice wasn't a full patch and I ended up doing a bit of work
> > to translate it to reality, so I did not add him as "Co-developed-by"
> > here. Mark: if you would like this tag then please provide it and your
> > Signed-off-by. I certainly won't object.
> >
> > [1] https://lore.kernel.org/r/ZNC-YRQopO0PaIIo@FVFF77S0Q05N.cambridge.arm.com
> >
> > (no changes since v10)
> >
> > Changes in v10:
> > - Rewrite as needed for 5.11+ as per Mark Rutland and Sumit.
> >
> >  drivers/irqchip/irq-gic-v3.c | 54 ++++++++++++++++++++++++------------
> >  1 file changed, 36 insertions(+), 18 deletions(-)
> >
> > diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
> > index eedfa8e9f077..49d18cf3f636 100644
> > --- a/drivers/irqchip/irq-gic-v3.c
> > +++ b/drivers/irqchip/irq-gic-v3.c
> > @@ -78,6 +78,8 @@ static DEFINE_STATIC_KEY_TRUE(supports_deactivate_key);
> >  #define GIC_LINE_NR  min(GICD_TYPER_SPIS(gic_data.rdists.gicd_typer), 1020U)
> >  #define GIC_ESPI_NR  GICD_TYPER_ESPIS(gic_data.rdists.gicd_typer)
> >
> > +#define SGI_NR               16
>
> Why 16? We only allocate 8, as the other 8 are potentially stolen by
> the secure side. We do try and initialise them all so that they have a
> known state if they were actually configured as Group-1NS, but we
> don't use them.
>
> I understand that this simplifies the indexing in the rdist_nmi_refs
> array and I'm not going to cry over 32 wasted bytes, but this
> definitely deserves a comment.

Good point. I'll plan to wait another day or two to see if any other
feedback shows up and then send a v12 with this plus Stephen's nit
fixes on one of the other patches.

-Doug

WARNING: multiple messages have this Message-ID (diff)
From: Doug Anderson <dianders@chromium.org>
To: Marc Zyngier <maz@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	 Will Deacon <will@kernel.org>,
	Sumit Garg <sumit.garg@linaro.org>,
	 Daniel Thompson <daniel.thompson@linaro.org>,
	 "Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
	Ard Biesheuvel <ardb@kernel.org>,
	 Thomas Gleixner <tglx@linutronix.de>,
	kgdb-bugreport@lists.sourceforge.net,
	 Lecopzer Chen <lecopzer.chen@mediatek.com>,
	linux-perf-users@vger.kernel.org,
	 Masayoshi Mizuma <msys.mizuma@gmail.com>,
	Chen-Yu Tsai <wens@csie.org>,
	 linux-arm-kernel@lists.infradead.org, ito-yuichi@fujitsu.com,
	 Stephen Boyd <swboyd@chromium.org>,
	Peter Zijlstra <peterz@infradead.org>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v11 1/6] irqchip/gic-v3: Enable support for SGIs to act as NMIs
Date: Mon, 28 Aug 2023 08:35:27 -0700	[thread overview]
Message-ID: <CAD=FV=VaF2ebXX12CY4ZSnj4rSbes9vruBkKf-F6ZdaHBCqkqQ@mail.gmail.com> (raw)
In-Reply-To: <86bkeuf5tm.wl-maz@kernel.org>

Hi,

On Sat, Aug 26, 2023 at 3:37 AM Marc Zyngier <maz@kernel.org> wrote:
>
> On Thu, 24 Aug 2023 16:30:27 +0100,
> Douglas Anderson <dianders@chromium.org> wrote:
> >
> > As of commit 6abbd6988971 ("irqchip/gic, gic-v3: Make SGIs use
> > handle_percpu_devid_irq()") SGIs are treated the same as PPIs/EPPIs
> > and use handle_percpu_devid_irq() by default. Unfortunately,
> > handle_percpu_devid_irq() isn't NMI safe, and so to run in an NMI
> > context those should use handle_percpu_devid_fasteoi_nmi().
> >
> > In order to accomplish this, we just have to make room for SGIs in the
> > array of refcounts that keeps track of which interrupts are set as
> > NMI. We also rename the array and create a new indexing scheme that
> > accounts for SGIs.
> >
> > Also, enable NMI support prior to gic_smp_init() as allocation of SGIs
> > as IRQs/NMIs happen as part of this routine.
> >
> > Co-developed-by: Sumit Garg <sumit.garg@linaro.org>
> > Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
> > Signed-off-by: Douglas Anderson <dianders@chromium.org>
> > ---
> > In v10 I removed the previous Reviewed-by and Tested-by tags since the
> > patch contents changed pretty drastically.
> >
> > I'll also note that this change is a little more black magic to me
> > than others in this series. I don't have a massive amounts of
> > familiarity with all the moving parts of gic-v3, so I mostly just
> > followed Mark Rutland's advice [1]. Please pay extra attention to make
> > sure I didn't do anything too terrible.
> >
> > Mark's advice wasn't a full patch and I ended up doing a bit of work
> > to translate it to reality, so I did not add him as "Co-developed-by"
> > here. Mark: if you would like this tag then please provide it and your
> > Signed-off-by. I certainly won't object.
> >
> > [1] https://lore.kernel.org/r/ZNC-YRQopO0PaIIo@FVFF77S0Q05N.cambridge.arm.com
> >
> > (no changes since v10)
> >
> > Changes in v10:
> > - Rewrite as needed for 5.11+ as per Mark Rutland and Sumit.
> >
> >  drivers/irqchip/irq-gic-v3.c | 54 ++++++++++++++++++++++++------------
> >  1 file changed, 36 insertions(+), 18 deletions(-)
> >
> > diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
> > index eedfa8e9f077..49d18cf3f636 100644
> > --- a/drivers/irqchip/irq-gic-v3.c
> > +++ b/drivers/irqchip/irq-gic-v3.c
> > @@ -78,6 +78,8 @@ static DEFINE_STATIC_KEY_TRUE(supports_deactivate_key);
> >  #define GIC_LINE_NR  min(GICD_TYPER_SPIS(gic_data.rdists.gicd_typer), 1020U)
> >  #define GIC_ESPI_NR  GICD_TYPER_ESPIS(gic_data.rdists.gicd_typer)
> >
> > +#define SGI_NR               16
>
> Why 16? We only allocate 8, as the other 8 are potentially stolen by
> the secure side. We do try and initialise them all so that they have a
> known state if they were actually configured as Group-1NS, but we
> don't use them.
>
> I understand that this simplifies the indexing in the rdist_nmi_refs
> array and I'm not going to cry over 32 wasted bytes, but this
> definitely deserves a comment.

Good point. I'll plan to wait another day or two to see if any other
feedback shows up and then send a v12 with this plus Stephen's nit
fixes on one of the other patches.

-Doug

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2023-08-28 15:36 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-24 15:30 [PATCH v11 0/6] arm64: Add IPI for backtraces / kgdb; try to use NMI for some IPIs Douglas Anderson
2023-08-24 15:30 ` Douglas Anderson
2023-08-24 15:30 ` [PATCH v11 1/6] irqchip/gic-v3: Enable support for SGIs to act as NMIs Douglas Anderson
2023-08-24 15:30   ` Douglas Anderson
2023-08-26 10:36   ` Marc Zyngier
2023-08-26 10:36     ` Marc Zyngier
2023-08-28 15:35     ` Doug Anderson [this message]
2023-08-28 15:35       ` Doug Anderson
2023-08-29 10:36   ` Sumit Garg
2023-08-29 10:36     ` Sumit Garg
2023-08-24 15:30 ` [PATCH v11 2/6] arm64: idle: Tag the arm64 idle functions as __cpuidle Douglas Anderson
2023-08-24 15:30   ` Douglas Anderson
2023-08-29 10:38   ` Sumit Garg
2023-08-29 10:38     ` Sumit Garg
2023-08-24 15:30 ` [PATCH v11 3/6] arm64: smp: Remove dedicated wakeup IPI Douglas Anderson
2023-08-24 15:30   ` Douglas Anderson
2023-08-25 22:17   ` Stephen Boyd
2023-08-25 22:17     ` Stephen Boyd
2023-08-29 10:41   ` Sumit Garg
2023-08-29 10:41     ` Sumit Garg
2023-08-24 15:30 ` [PATCH v11 4/6] arm64: smp: Add arch support for backtrace using pseudo-NMI Douglas Anderson
2023-08-24 15:30   ` Douglas Anderson
2023-08-25 22:27   ` Stephen Boyd
2023-08-25 22:27     ` Stephen Boyd
2023-08-25 23:02     ` Doug Anderson
2023-08-25 23:02       ` Doug Anderson
2023-08-25 23:23       ` Stephen Boyd
2023-08-25 23:23         ` Stephen Boyd
2023-08-29  5:23   ` Tomohiro Misono (Fujitsu)
2023-08-29  5:23     ` Tomohiro Misono (Fujitsu)
2023-08-29 16:03     ` Doug Anderson
2023-08-29 16:03       ` Doug Anderson
2023-08-24 15:30 ` [PATCH v11 5/6] arm64: smp: IPI_CPU_STOP and IPI_CPU_CRASH_STOP should try for NMI Douglas Anderson
2023-08-24 15:30   ` Douglas Anderson
2023-08-29  5:30   ` Tomohiro Misono (Fujitsu)
2023-08-29  5:30     ` Tomohiro Misono (Fujitsu)
2023-08-29 10:42   ` Sumit Garg
2023-08-29 10:42     ` Sumit Garg
2023-08-24 15:30 ` [PATCH v11 6/6] arm64: kgdb: Implement kgdb_roundup_cpus() to enable pseudo-NMI roundup Douglas Anderson
2023-08-24 15:30   ` Douglas Anderson
2023-08-25 11:20   ` Daniel Thompson
2023-08-25 11:20     ` Daniel Thompson
2023-08-25 22:28   ` Stephen Boyd
2023-08-25 22:28     ` Stephen Boyd

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CAD=FV=VaF2ebXX12CY4ZSnj4rSbes9vruBkKf-F6ZdaHBCqkqQ@mail.gmail.com' \
    --to=dianders@chromium.org \
    --cc=ardb@kernel.org \
    --cc=catalin.marinas@arm.com \
    --cc=daniel.thompson@linaro.org \
    --cc=ito-yuichi@fujitsu.com \
    --cc=kgdb-bugreport@lists.sourceforge.net \
    --cc=lecopzer.chen@mediatek.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-perf-users@vger.kernel.org \
    --cc=mark.rutland@arm.com \
    --cc=maz@kernel.org \
    --cc=msys.mizuma@gmail.com \
    --cc=peterz@infradead.org \
    --cc=rafael.j.wysocki@intel.com \
    --cc=sumit.garg@linaro.org \
    --cc=swboyd@chromium.org \
    --cc=tglx@linutronix.de \
    --cc=wens@csie.org \
    --cc=will@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.