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From: Alex Deucher <alexdeucher@gmail.com>
To: Lee Jones <lee.jones@linaro.org>
Cc: "David Airlie" <airlied@linux.ie>,
	LKML <linux-kernel@vger.kernel.org>,
	"amd-gfx list" <amd-gfx@lists.freedesktop.org>,
	"Maling list - DRI developers" <dri-devel@lists.freedesktop.org>,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Evan Quan" <evan.quan@amd.com>,
	"Christian König" <christian.koenig@amd.com>
Subject: Re: [PATCH 38/40] drm/amd/pm/swsmu/smu11/navi10_ppt: Remove unused 'struct i2c_algorithm navi10_i2c_algo'
Date: Mon, 30 Nov 2020 18:01:30 -0500	[thread overview]
Message-ID: <CADnq5_Ns3Ls=94FyM2LAm__S5iDHvrLNZs6zcN1ySB54mbvc1Q@mail.gmail.com> (raw)
In-Reply-To: <20201124193824.1118741-39-lee.jones@linaro.org>

On Tue, Nov 24, 2020 at 2:45 PM Lee Jones <lee.jones@linaro.org> wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Cc: "Christian König" <christian.koenig@amd.com>
> Cc: David Airlie <airlied@linux.ie>
> Cc: Daniel Vetter <daniel@ffwll.ch>
> Cc: Evan Quan <evan.quan@amd.com>
> Cc: amd-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Signed-off-by: Lee Jones <lee.jones@linaro.org>

Applied.  Thanks!

Alex

> ---
>  .../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c   | 204 ------------------
>  1 file changed, 204 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> index ef1a62e86a0ee..59bd7cd3ca8df 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> @@ -2325,210 +2325,6 @@ static int navi10_run_umc_cdr_workaround(struct smu_context *smu)
>         return 0;
>  }
>
> -static void navi10_fill_i2c_req(SwI2cRequest_t  *req, bool write,
> -                                 uint8_t address, uint32_t numbytes,
> -                                 uint8_t *data)
> -{
> -       int i;
> -
> -       req->I2CcontrollerPort = 0;
> -       req->I2CSpeed = 2;
> -       req->SlaveAddress = address;
> -       req->NumCmds = numbytes;
> -
> -       for (i = 0; i < numbytes; i++) {
> -               SwI2cCmd_t *cmd =  &req->SwI2cCmds[i];
> -
> -               /* First 2 bytes are always write for lower 2b EEPROM address */
> -               if (i < 2)
> -                       cmd->Cmd = 1;
> -               else
> -                       cmd->Cmd = write;
> -
> -
> -               /* Add RESTART for read  after address filled */
> -               cmd->CmdConfig |= (i == 2 && !write) ? CMDCONFIG_RESTART_MASK : 0;
> -
> -               /* Add STOP in the end */
> -               cmd->CmdConfig |= (i == (numbytes - 1)) ? CMDCONFIG_STOP_MASK : 0;
> -
> -               /* Fill with data regardless if read or write to simplify code */
> -               cmd->RegisterAddr = data[i];
> -       }
> -}
> -
> -static int navi10_i2c_read_data(struct i2c_adapter *control,
> -                                              uint8_t address,
> -                                              uint8_t *data,
> -                                              uint32_t numbytes)
> -{
> -       uint32_t  i, ret = 0;
> -       SwI2cRequest_t req;
> -       struct amdgpu_device *adev = to_amdgpu_device(control);
> -       struct smu_table_context *smu_table = &adev->smu.smu_table;
> -       struct smu_table *table = &smu_table->driver_table;
> -
> -       if (numbytes > MAX_SW_I2C_COMMANDS) {
> -               dev_err(adev->dev, "numbytes requested %d is over max allowed %d\n",
> -                       numbytes, MAX_SW_I2C_COMMANDS);
> -               return -EINVAL;
> -       }
> -
> -       memset(&req, 0, sizeof(req));
> -       navi10_fill_i2c_req(&req, false, address, numbytes, data);
> -
> -       mutex_lock(&adev->smu.mutex);
> -       /* Now read data starting with that address */
> -       ret = smu_cmn_update_table(&adev->smu, SMU_TABLE_I2C_COMMANDS, 0, &req,
> -                                  true);
> -       mutex_unlock(&adev->smu.mutex);
> -
> -       if (!ret) {
> -               SwI2cRequest_t *res = (SwI2cRequest_t *)table->cpu_addr;
> -
> -               /* Assume SMU  fills res.SwI2cCmds[i].Data with read bytes */
> -               for (i = 0; i < numbytes; i++)
> -                       data[i] = res->SwI2cCmds[i].Data;
> -
> -               dev_dbg(adev->dev, "navi10_i2c_read_data, address = %x, bytes = %d, data :",
> -                                 (uint16_t)address, numbytes);
> -
> -               print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_NONE,
> -                              8, 1, data, numbytes, false);
> -       } else
> -               dev_err(adev->dev, "navi10_i2c_read_data - error occurred :%x", ret);
> -
> -       return ret;
> -}
> -
> -static int navi10_i2c_write_data(struct i2c_adapter *control,
> -                                               uint8_t address,
> -                                               uint8_t *data,
> -                                               uint32_t numbytes)
> -{
> -       uint32_t ret;
> -       SwI2cRequest_t req;
> -       struct amdgpu_device *adev = to_amdgpu_device(control);
> -
> -       if (numbytes > MAX_SW_I2C_COMMANDS) {
> -               dev_err(adev->dev, "numbytes requested %d is over max allowed %d\n",
> -                       numbytes, MAX_SW_I2C_COMMANDS);
> -               return -EINVAL;
> -       }
> -
> -       memset(&req, 0, sizeof(req));
> -       navi10_fill_i2c_req(&req, true, address, numbytes, data);
> -
> -       mutex_lock(&adev->smu.mutex);
> -       ret = smu_cmn_update_table(&adev->smu, SMU_TABLE_I2C_COMMANDS, 0, &req, true);
> -       mutex_unlock(&adev->smu.mutex);
> -
> -       if (!ret) {
> -               dev_dbg(adev->dev, "navi10_i2c_write(), address = %x, bytes = %d , data: ",
> -                                        (uint16_t)address, numbytes);
> -
> -               print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_NONE,
> -                              8, 1, data, numbytes, false);
> -               /*
> -                * According to EEPROM spec there is a MAX of 10 ms required for
> -                * EEPROM to flush internal RX buffer after STOP was issued at the
> -                * end of write transaction. During this time the EEPROM will not be
> -                * responsive to any more commands - so wait a bit more.
> -                */
> -               msleep(10);
> -
> -       } else
> -               dev_err(adev->dev, "navi10_i2c_write- error occurred :%x", ret);
> -
> -       return ret;
> -}
> -
> -static int navi10_i2c_xfer(struct i2c_adapter *i2c_adap,
> -                             struct i2c_msg *msgs, int num)
> -{
> -       uint32_t  i, j, ret, data_size, data_chunk_size, next_eeprom_addr = 0;
> -       uint8_t *data_ptr, data_chunk[MAX_SW_I2C_COMMANDS] = { 0 };
> -
> -       for (i = 0; i < num; i++) {
> -               /*
> -                * SMU interface allows at most MAX_SW_I2C_COMMANDS bytes of data at
> -                * once and hence the data needs to be spliced into chunks and sent each
> -                * chunk separately
> -                */
> -               data_size = msgs[i].len - 2;
> -               data_chunk_size = MAX_SW_I2C_COMMANDS - 2;
> -               next_eeprom_addr = (msgs[i].buf[0] << 8 & 0xff00) | (msgs[i].buf[1] & 0xff);
> -               data_ptr = msgs[i].buf + 2;
> -
> -               for (j = 0; j < data_size / data_chunk_size; j++) {
> -                       /* Insert the EEPROM dest addess, bits 0-15 */
> -                       data_chunk[0] = ((next_eeprom_addr >> 8) & 0xff);
> -                       data_chunk[1] = (next_eeprom_addr & 0xff);
> -
> -                       if (msgs[i].flags & I2C_M_RD) {
> -                               ret = navi10_i2c_read_data(i2c_adap,
> -                                                            (uint8_t)msgs[i].addr,
> -                                                            data_chunk, MAX_SW_I2C_COMMANDS);
> -
> -                               memcpy(data_ptr, data_chunk + 2, data_chunk_size);
> -                       } else {
> -
> -                               memcpy(data_chunk + 2, data_ptr, data_chunk_size);
> -
> -                               ret = navi10_i2c_write_data(i2c_adap,
> -                                                             (uint8_t)msgs[i].addr,
> -                                                             data_chunk, MAX_SW_I2C_COMMANDS);
> -                       }
> -
> -                       if (ret) {
> -                               num = -EIO;
> -                               goto fail;
> -                       }
> -
> -                       next_eeprom_addr += data_chunk_size;
> -                       data_ptr += data_chunk_size;
> -               }
> -
> -               if (data_size % data_chunk_size) {
> -                       data_chunk[0] = ((next_eeprom_addr >> 8) & 0xff);
> -                       data_chunk[1] = (next_eeprom_addr & 0xff);
> -
> -                       if (msgs[i].flags & I2C_M_RD) {
> -                               ret = navi10_i2c_read_data(i2c_adap,
> -                                                            (uint8_t)msgs[i].addr,
> -                                                            data_chunk, (data_size % data_chunk_size) + 2);
> -
> -                               memcpy(data_ptr, data_chunk + 2, data_size % data_chunk_size);
> -                       } else {
> -                               memcpy(data_chunk + 2, data_ptr, data_size % data_chunk_size);
> -
> -                               ret = navi10_i2c_write_data(i2c_adap,
> -                                                             (uint8_t)msgs[i].addr,
> -                                                             data_chunk, (data_size % data_chunk_size) + 2);
> -                       }
> -
> -                       if (ret) {
> -                               num = -EIO;
> -                               goto fail;
> -                       }
> -               }
> -       }
> -
> -fail:
> -       return num;
> -}
> -
> -static u32 navi10_i2c_func(struct i2c_adapter *adap)
> -{
> -       return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
> -}
> -
> -
> -static const struct i2c_algorithm navi10_i2c_algo = {
> -       .master_xfer = navi10_i2c_xfer,
> -       .functionality = navi10_i2c_func,
> -};
> -
>  static ssize_t navi10_get_gpu_metrics(struct smu_context *smu,
>                                       void **table)
>  {
> --
> 2.25.1
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: Alex Deucher <alexdeucher@gmail.com>
To: Lee Jones <lee.jones@linaro.org>
Cc: "David Airlie" <airlied@linux.ie>,
	LKML <linux-kernel@vger.kernel.org>,
	"Maling list - DRI developers" <dri-devel@lists.freedesktop.org>,
	"amd-gfx list" <amd-gfx@lists.freedesktop.org>,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Evan Quan" <evan.quan@amd.com>,
	"Christian König" <christian.koenig@amd.com>
Subject: Re: [PATCH 38/40] drm/amd/pm/swsmu/smu11/navi10_ppt: Remove unused 'struct i2c_algorithm navi10_i2c_algo'
Date: Mon, 30 Nov 2020 18:01:30 -0500	[thread overview]
Message-ID: <CADnq5_Ns3Ls=94FyM2LAm__S5iDHvrLNZs6zcN1ySB54mbvc1Q@mail.gmail.com> (raw)
In-Reply-To: <20201124193824.1118741-39-lee.jones@linaro.org>

On Tue, Nov 24, 2020 at 2:45 PM Lee Jones <lee.jones@linaro.org> wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Cc: "Christian König" <christian.koenig@amd.com>
> Cc: David Airlie <airlied@linux.ie>
> Cc: Daniel Vetter <daniel@ffwll.ch>
> Cc: Evan Quan <evan.quan@amd.com>
> Cc: amd-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Signed-off-by: Lee Jones <lee.jones@linaro.org>

Applied.  Thanks!

Alex

> ---
>  .../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c   | 204 ------------------
>  1 file changed, 204 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> index ef1a62e86a0ee..59bd7cd3ca8df 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> @@ -2325,210 +2325,6 @@ static int navi10_run_umc_cdr_workaround(struct smu_context *smu)
>         return 0;
>  }
>
> -static void navi10_fill_i2c_req(SwI2cRequest_t  *req, bool write,
> -                                 uint8_t address, uint32_t numbytes,
> -                                 uint8_t *data)
> -{
> -       int i;
> -
> -       req->I2CcontrollerPort = 0;
> -       req->I2CSpeed = 2;
> -       req->SlaveAddress = address;
> -       req->NumCmds = numbytes;
> -
> -       for (i = 0; i < numbytes; i++) {
> -               SwI2cCmd_t *cmd =  &req->SwI2cCmds[i];
> -
> -               /* First 2 bytes are always write for lower 2b EEPROM address */
> -               if (i < 2)
> -                       cmd->Cmd = 1;
> -               else
> -                       cmd->Cmd = write;
> -
> -
> -               /* Add RESTART for read  after address filled */
> -               cmd->CmdConfig |= (i == 2 && !write) ? CMDCONFIG_RESTART_MASK : 0;
> -
> -               /* Add STOP in the end */
> -               cmd->CmdConfig |= (i == (numbytes - 1)) ? CMDCONFIG_STOP_MASK : 0;
> -
> -               /* Fill with data regardless if read or write to simplify code */
> -               cmd->RegisterAddr = data[i];
> -       }
> -}
> -
> -static int navi10_i2c_read_data(struct i2c_adapter *control,
> -                                              uint8_t address,
> -                                              uint8_t *data,
> -                                              uint32_t numbytes)
> -{
> -       uint32_t  i, ret = 0;
> -       SwI2cRequest_t req;
> -       struct amdgpu_device *adev = to_amdgpu_device(control);
> -       struct smu_table_context *smu_table = &adev->smu.smu_table;
> -       struct smu_table *table = &smu_table->driver_table;
> -
> -       if (numbytes > MAX_SW_I2C_COMMANDS) {
> -               dev_err(adev->dev, "numbytes requested %d is over max allowed %d\n",
> -                       numbytes, MAX_SW_I2C_COMMANDS);
> -               return -EINVAL;
> -       }
> -
> -       memset(&req, 0, sizeof(req));
> -       navi10_fill_i2c_req(&req, false, address, numbytes, data);
> -
> -       mutex_lock(&adev->smu.mutex);
> -       /* Now read data starting with that address */
> -       ret = smu_cmn_update_table(&adev->smu, SMU_TABLE_I2C_COMMANDS, 0, &req,
> -                                  true);
> -       mutex_unlock(&adev->smu.mutex);
> -
> -       if (!ret) {
> -               SwI2cRequest_t *res = (SwI2cRequest_t *)table->cpu_addr;
> -
> -               /* Assume SMU  fills res.SwI2cCmds[i].Data with read bytes */
> -               for (i = 0; i < numbytes; i++)
> -                       data[i] = res->SwI2cCmds[i].Data;
> -
> -               dev_dbg(adev->dev, "navi10_i2c_read_data, address = %x, bytes = %d, data :",
> -                                 (uint16_t)address, numbytes);
> -
> -               print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_NONE,
> -                              8, 1, data, numbytes, false);
> -       } else
> -               dev_err(adev->dev, "navi10_i2c_read_data - error occurred :%x", ret);
> -
> -       return ret;
> -}
> -
> -static int navi10_i2c_write_data(struct i2c_adapter *control,
> -                                               uint8_t address,
> -                                               uint8_t *data,
> -                                               uint32_t numbytes)
> -{
> -       uint32_t ret;
> -       SwI2cRequest_t req;
> -       struct amdgpu_device *adev = to_amdgpu_device(control);
> -
> -       if (numbytes > MAX_SW_I2C_COMMANDS) {
> -               dev_err(adev->dev, "numbytes requested %d is over max allowed %d\n",
> -                       numbytes, MAX_SW_I2C_COMMANDS);
> -               return -EINVAL;
> -       }
> -
> -       memset(&req, 0, sizeof(req));
> -       navi10_fill_i2c_req(&req, true, address, numbytes, data);
> -
> -       mutex_lock(&adev->smu.mutex);
> -       ret = smu_cmn_update_table(&adev->smu, SMU_TABLE_I2C_COMMANDS, 0, &req, true);
> -       mutex_unlock(&adev->smu.mutex);
> -
> -       if (!ret) {
> -               dev_dbg(adev->dev, "navi10_i2c_write(), address = %x, bytes = %d , data: ",
> -                                        (uint16_t)address, numbytes);
> -
> -               print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_NONE,
> -                              8, 1, data, numbytes, false);
> -               /*
> -                * According to EEPROM spec there is a MAX of 10 ms required for
> -                * EEPROM to flush internal RX buffer after STOP was issued at the
> -                * end of write transaction. During this time the EEPROM will not be
> -                * responsive to any more commands - so wait a bit more.
> -                */
> -               msleep(10);
> -
> -       } else
> -               dev_err(adev->dev, "navi10_i2c_write- error occurred :%x", ret);
> -
> -       return ret;
> -}
> -
> -static int navi10_i2c_xfer(struct i2c_adapter *i2c_adap,
> -                             struct i2c_msg *msgs, int num)
> -{
> -       uint32_t  i, j, ret, data_size, data_chunk_size, next_eeprom_addr = 0;
> -       uint8_t *data_ptr, data_chunk[MAX_SW_I2C_COMMANDS] = { 0 };
> -
> -       for (i = 0; i < num; i++) {
> -               /*
> -                * SMU interface allows at most MAX_SW_I2C_COMMANDS bytes of data at
> -                * once and hence the data needs to be spliced into chunks and sent each
> -                * chunk separately
> -                */
> -               data_size = msgs[i].len - 2;
> -               data_chunk_size = MAX_SW_I2C_COMMANDS - 2;
> -               next_eeprom_addr = (msgs[i].buf[0] << 8 & 0xff00) | (msgs[i].buf[1] & 0xff);
> -               data_ptr = msgs[i].buf + 2;
> -
> -               for (j = 0; j < data_size / data_chunk_size; j++) {
> -                       /* Insert the EEPROM dest addess, bits 0-15 */
> -                       data_chunk[0] = ((next_eeprom_addr >> 8) & 0xff);
> -                       data_chunk[1] = (next_eeprom_addr & 0xff);
> -
> -                       if (msgs[i].flags & I2C_M_RD) {
> -                               ret = navi10_i2c_read_data(i2c_adap,
> -                                                            (uint8_t)msgs[i].addr,
> -                                                            data_chunk, MAX_SW_I2C_COMMANDS);
> -
> -                               memcpy(data_ptr, data_chunk + 2, data_chunk_size);
> -                       } else {
> -
> -                               memcpy(data_chunk + 2, data_ptr, data_chunk_size);
> -
> -                               ret = navi10_i2c_write_data(i2c_adap,
> -                                                             (uint8_t)msgs[i].addr,
> -                                                             data_chunk, MAX_SW_I2C_COMMANDS);
> -                       }
> -
> -                       if (ret) {
> -                               num = -EIO;
> -                               goto fail;
> -                       }
> -
> -                       next_eeprom_addr += data_chunk_size;
> -                       data_ptr += data_chunk_size;
> -               }
> -
> -               if (data_size % data_chunk_size) {
> -                       data_chunk[0] = ((next_eeprom_addr >> 8) & 0xff);
> -                       data_chunk[1] = (next_eeprom_addr & 0xff);
> -
> -                       if (msgs[i].flags & I2C_M_RD) {
> -                               ret = navi10_i2c_read_data(i2c_adap,
> -                                                            (uint8_t)msgs[i].addr,
> -                                                            data_chunk, (data_size % data_chunk_size) + 2);
> -
> -                               memcpy(data_ptr, data_chunk + 2, data_size % data_chunk_size);
> -                       } else {
> -                               memcpy(data_chunk + 2, data_ptr, data_size % data_chunk_size);
> -
> -                               ret = navi10_i2c_write_data(i2c_adap,
> -                                                             (uint8_t)msgs[i].addr,
> -                                                             data_chunk, (data_size % data_chunk_size) + 2);
> -                       }
> -
> -                       if (ret) {
> -                               num = -EIO;
> -                               goto fail;
> -                       }
> -               }
> -       }
> -
> -fail:
> -       return num;
> -}
> -
> -static u32 navi10_i2c_func(struct i2c_adapter *adap)
> -{
> -       return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
> -}
> -
> -
> -static const struct i2c_algorithm navi10_i2c_algo = {
> -       .master_xfer = navi10_i2c_xfer,
> -       .functionality = navi10_i2c_func,
> -};
> -
>  static ssize_t navi10_get_gpu_metrics(struct smu_context *smu,
>                                       void **table)
>  {
> --
> 2.25.1
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel

WARNING: multiple messages have this Message-ID (diff)
From: Alex Deucher <alexdeucher@gmail.com>
To: Lee Jones <lee.jones@linaro.org>
Cc: "David Airlie" <airlied@linux.ie>,
	LKML <linux-kernel@vger.kernel.org>,
	"Maling list - DRI developers" <dri-devel@lists.freedesktop.org>,
	"amd-gfx list" <amd-gfx@lists.freedesktop.org>,
	"Alex Deucher" <alexander.deucher@amd.com>,
	"Evan Quan" <evan.quan@amd.com>,
	"Christian König" <christian.koenig@amd.com>
Subject: Re: [PATCH 38/40] drm/amd/pm/swsmu/smu11/navi10_ppt: Remove unused 'struct i2c_algorithm navi10_i2c_algo'
Date: Mon, 30 Nov 2020 18:01:30 -0500	[thread overview]
Message-ID: <CADnq5_Ns3Ls=94FyM2LAm__S5iDHvrLNZs6zcN1ySB54mbvc1Q@mail.gmail.com> (raw)
In-Reply-To: <20201124193824.1118741-39-lee.jones@linaro.org>

On Tue, Nov 24, 2020 at 2:45 PM Lee Jones <lee.jones@linaro.org> wrote:
>
> Fixes the following W=1 kernel build warning(s):
>
> Cc: Alex Deucher <alexander.deucher@amd.com>
> Cc: "Christian König" <christian.koenig@amd.com>
> Cc: David Airlie <airlied@linux.ie>
> Cc: Daniel Vetter <daniel@ffwll.ch>
> Cc: Evan Quan <evan.quan@amd.com>
> Cc: amd-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org
> Signed-off-by: Lee Jones <lee.jones@linaro.org>

Applied.  Thanks!

Alex

> ---
>  .../gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c   | 204 ------------------
>  1 file changed, 204 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> index ef1a62e86a0ee..59bd7cd3ca8df 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c
> @@ -2325,210 +2325,6 @@ static int navi10_run_umc_cdr_workaround(struct smu_context *smu)
>         return 0;
>  }
>
> -static void navi10_fill_i2c_req(SwI2cRequest_t  *req, bool write,
> -                                 uint8_t address, uint32_t numbytes,
> -                                 uint8_t *data)
> -{
> -       int i;
> -
> -       req->I2CcontrollerPort = 0;
> -       req->I2CSpeed = 2;
> -       req->SlaveAddress = address;
> -       req->NumCmds = numbytes;
> -
> -       for (i = 0; i < numbytes; i++) {
> -               SwI2cCmd_t *cmd =  &req->SwI2cCmds[i];
> -
> -               /* First 2 bytes are always write for lower 2b EEPROM address */
> -               if (i < 2)
> -                       cmd->Cmd = 1;
> -               else
> -                       cmd->Cmd = write;
> -
> -
> -               /* Add RESTART for read  after address filled */
> -               cmd->CmdConfig |= (i == 2 && !write) ? CMDCONFIG_RESTART_MASK : 0;
> -
> -               /* Add STOP in the end */
> -               cmd->CmdConfig |= (i == (numbytes - 1)) ? CMDCONFIG_STOP_MASK : 0;
> -
> -               /* Fill with data regardless if read or write to simplify code */
> -               cmd->RegisterAddr = data[i];
> -       }
> -}
> -
> -static int navi10_i2c_read_data(struct i2c_adapter *control,
> -                                              uint8_t address,
> -                                              uint8_t *data,
> -                                              uint32_t numbytes)
> -{
> -       uint32_t  i, ret = 0;
> -       SwI2cRequest_t req;
> -       struct amdgpu_device *adev = to_amdgpu_device(control);
> -       struct smu_table_context *smu_table = &adev->smu.smu_table;
> -       struct smu_table *table = &smu_table->driver_table;
> -
> -       if (numbytes > MAX_SW_I2C_COMMANDS) {
> -               dev_err(adev->dev, "numbytes requested %d is over max allowed %d\n",
> -                       numbytes, MAX_SW_I2C_COMMANDS);
> -               return -EINVAL;
> -       }
> -
> -       memset(&req, 0, sizeof(req));
> -       navi10_fill_i2c_req(&req, false, address, numbytes, data);
> -
> -       mutex_lock(&adev->smu.mutex);
> -       /* Now read data starting with that address */
> -       ret = smu_cmn_update_table(&adev->smu, SMU_TABLE_I2C_COMMANDS, 0, &req,
> -                                  true);
> -       mutex_unlock(&adev->smu.mutex);
> -
> -       if (!ret) {
> -               SwI2cRequest_t *res = (SwI2cRequest_t *)table->cpu_addr;
> -
> -               /* Assume SMU  fills res.SwI2cCmds[i].Data with read bytes */
> -               for (i = 0; i < numbytes; i++)
> -                       data[i] = res->SwI2cCmds[i].Data;
> -
> -               dev_dbg(adev->dev, "navi10_i2c_read_data, address = %x, bytes = %d, data :",
> -                                 (uint16_t)address, numbytes);
> -
> -               print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_NONE,
> -                              8, 1, data, numbytes, false);
> -       } else
> -               dev_err(adev->dev, "navi10_i2c_read_data - error occurred :%x", ret);
> -
> -       return ret;
> -}
> -
> -static int navi10_i2c_write_data(struct i2c_adapter *control,
> -                                               uint8_t address,
> -                                               uint8_t *data,
> -                                               uint32_t numbytes)
> -{
> -       uint32_t ret;
> -       SwI2cRequest_t req;
> -       struct amdgpu_device *adev = to_amdgpu_device(control);
> -
> -       if (numbytes > MAX_SW_I2C_COMMANDS) {
> -               dev_err(adev->dev, "numbytes requested %d is over max allowed %d\n",
> -                       numbytes, MAX_SW_I2C_COMMANDS);
> -               return -EINVAL;
> -       }
> -
> -       memset(&req, 0, sizeof(req));
> -       navi10_fill_i2c_req(&req, true, address, numbytes, data);
> -
> -       mutex_lock(&adev->smu.mutex);
> -       ret = smu_cmn_update_table(&adev->smu, SMU_TABLE_I2C_COMMANDS, 0, &req, true);
> -       mutex_unlock(&adev->smu.mutex);
> -
> -       if (!ret) {
> -               dev_dbg(adev->dev, "navi10_i2c_write(), address = %x, bytes = %d , data: ",
> -                                        (uint16_t)address, numbytes);
> -
> -               print_hex_dump(KERN_DEBUG, "data: ", DUMP_PREFIX_NONE,
> -                              8, 1, data, numbytes, false);
> -               /*
> -                * According to EEPROM spec there is a MAX of 10 ms required for
> -                * EEPROM to flush internal RX buffer after STOP was issued at the
> -                * end of write transaction. During this time the EEPROM will not be
> -                * responsive to any more commands - so wait a bit more.
> -                */
> -               msleep(10);
> -
> -       } else
> -               dev_err(adev->dev, "navi10_i2c_write- error occurred :%x", ret);
> -
> -       return ret;
> -}
> -
> -static int navi10_i2c_xfer(struct i2c_adapter *i2c_adap,
> -                             struct i2c_msg *msgs, int num)
> -{
> -       uint32_t  i, j, ret, data_size, data_chunk_size, next_eeprom_addr = 0;
> -       uint8_t *data_ptr, data_chunk[MAX_SW_I2C_COMMANDS] = { 0 };
> -
> -       for (i = 0; i < num; i++) {
> -               /*
> -                * SMU interface allows at most MAX_SW_I2C_COMMANDS bytes of data at
> -                * once and hence the data needs to be spliced into chunks and sent each
> -                * chunk separately
> -                */
> -               data_size = msgs[i].len - 2;
> -               data_chunk_size = MAX_SW_I2C_COMMANDS - 2;
> -               next_eeprom_addr = (msgs[i].buf[0] << 8 & 0xff00) | (msgs[i].buf[1] & 0xff);
> -               data_ptr = msgs[i].buf + 2;
> -
> -               for (j = 0; j < data_size / data_chunk_size; j++) {
> -                       /* Insert the EEPROM dest addess, bits 0-15 */
> -                       data_chunk[0] = ((next_eeprom_addr >> 8) & 0xff);
> -                       data_chunk[1] = (next_eeprom_addr & 0xff);
> -
> -                       if (msgs[i].flags & I2C_M_RD) {
> -                               ret = navi10_i2c_read_data(i2c_adap,
> -                                                            (uint8_t)msgs[i].addr,
> -                                                            data_chunk, MAX_SW_I2C_COMMANDS);
> -
> -                               memcpy(data_ptr, data_chunk + 2, data_chunk_size);
> -                       } else {
> -
> -                               memcpy(data_chunk + 2, data_ptr, data_chunk_size);
> -
> -                               ret = navi10_i2c_write_data(i2c_adap,
> -                                                             (uint8_t)msgs[i].addr,
> -                                                             data_chunk, MAX_SW_I2C_COMMANDS);
> -                       }
> -
> -                       if (ret) {
> -                               num = -EIO;
> -                               goto fail;
> -                       }
> -
> -                       next_eeprom_addr += data_chunk_size;
> -                       data_ptr += data_chunk_size;
> -               }
> -
> -               if (data_size % data_chunk_size) {
> -                       data_chunk[0] = ((next_eeprom_addr >> 8) & 0xff);
> -                       data_chunk[1] = (next_eeprom_addr & 0xff);
> -
> -                       if (msgs[i].flags & I2C_M_RD) {
> -                               ret = navi10_i2c_read_data(i2c_adap,
> -                                                            (uint8_t)msgs[i].addr,
> -                                                            data_chunk, (data_size % data_chunk_size) + 2);
> -
> -                               memcpy(data_ptr, data_chunk + 2, data_size % data_chunk_size);
> -                       } else {
> -                               memcpy(data_chunk + 2, data_ptr, data_size % data_chunk_size);
> -
> -                               ret = navi10_i2c_write_data(i2c_adap,
> -                                                             (uint8_t)msgs[i].addr,
> -                                                             data_chunk, (data_size % data_chunk_size) + 2);
> -                       }
> -
> -                       if (ret) {
> -                               num = -EIO;
> -                               goto fail;
> -                       }
> -               }
> -       }
> -
> -fail:
> -       return num;
> -}
> -
> -static u32 navi10_i2c_func(struct i2c_adapter *adap)
> -{
> -       return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
> -}
> -
> -
> -static const struct i2c_algorithm navi10_i2c_algo = {
> -       .master_xfer = navi10_i2c_xfer,
> -       .functionality = navi10_i2c_func,
> -};
> -
>  static ssize_t navi10_get_gpu_metrics(struct smu_context *smu,
>                                       void **table)
>  {
> --
> 2.25.1
>
> _______________________________________________
> dri-devel mailing list
> dri-devel@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/dri-devel
_______________________________________________
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  reply	other threads:[~2020-11-30 23:02 UTC|newest]

Thread overview: 231+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-11-24 19:37 [PATCH 00/40] [Set 9] Rid W=1 warnings from GPU Lee Jones
2020-11-24 19:37 ` Lee Jones
2020-11-24 19:37 ` Lee Jones
2020-11-24 19:37 ` [PATCH 01/40] drm/msm/msm_gem_shrinker: Fix descriptions for 'drm_device' Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-24 19:37 ` [PATCH 02/40] drm/amd/amdgpu/gmc_v10_0: Suppy some missing function doc descriptions Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-30 22:04   ` Alex Deucher
2020-11-30 22:04     ` Alex Deucher
2020-11-30 22:04     ` Alex Deucher
2020-11-24 19:37 ` [PATCH 03/40] drm/msm/adreno/a6xx_gpu_state: Make some local functions static Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-24 19:37 ` [PATCH 04/40] drm/amd/amdgpu/iceland_ih: Add missing function param descriptions for 'ih' and 'entry' Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-30 22:05   ` Alex Deucher
2020-11-30 22:05     ` Alex Deucher
2020-11-30 22:05     ` Alex Deucher
2020-11-24 19:37 ` [PATCH 05/40] drm/amd/amdgpu/tonga_ih: Provide some missing " Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-30 22:06   ` Alex Deucher
2020-11-30 22:06     ` Alex Deucher
2020-11-30 22:06     ` Alex Deucher
2020-11-24 19:37 ` [PATCH 06/40] drm/amd/amdgpu/cz_ih: Add missing function param " Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-30 22:08   ` Alex Deucher
2020-11-30 22:08     ` Alex Deucher
2020-11-30 22:08     ` Alex Deucher
2020-11-24 19:37 ` [PATCH 07/40] drm/amd/amdgpu/amdgpu_psp: Make local function 'parse_ta_bin_descriptor' static Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-30 22:07   ` Alex Deucher
2020-11-30 22:07     ` Alex Deucher
2020-11-30 22:07     ` Alex Deucher
2020-11-24 19:37 ` [PATCH 08/40] drm/msm/dp/dp_ctrl: Move 'tu' from the stack to the heap Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-24 19:37 ` [PATCH 09/40] drm/amd/amdgpu/vega10_ih: Add descriptions for 'ih' and 'entry' Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-30 22:09   ` Alex Deucher
2020-11-30 22:09     ` Alex Deucher
2020-11-30 22:09     ` Alex Deucher
2020-11-24 19:37 ` [PATCH 10/40] drm/amd/amdgpu/navi10_ih: " Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-30 22:10   ` Alex Deucher
2020-11-30 22:10     ` Alex Deucher
2020-11-30 22:10     ` Alex Deucher
2020-11-24 19:37 ` [PATCH 11/40] drm/amd/amdgpu/psp_v11_0: Make local function 'psp_v11_0_wait_for_bootloader()' static Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-30 22:11   ` Alex Deucher
2020-11-30 22:11     ` Alex Deucher
2020-11-30 22:11     ` Alex Deucher
2020-11-24 19:37 ` [PATCH 12/40] drm/amd/amdgpu/dce_v10_0: Supply description for function param 'async' Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-30 22:12   ` Alex Deucher
2020-11-30 22:12     ` Alex Deucher
2020-11-30 22:12     ` Alex Deucher
2020-11-24 19:37 ` [PATCH 13/40] drm/amd/amdgpu/dce_v11_0: " Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-30 22:12   ` Alex Deucher
2020-11-30 22:12     ` Alex Deucher
2020-11-30 22:12     ` Alex Deucher
2020-11-24 19:37 ` [PATCH 14/40] drm/amd/amdgpu/gfx_v9_0: Make called-by-reference only function static Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-30 22:13   ` Alex Deucher
2020-11-30 22:13     ` Alex Deucher
2020-11-30 22:13     ` Alex Deucher
2020-11-24 19:37 ` [PATCH 15/40] drm/amd/amdgpu/gfx_v8_0: Functions must follow directly after their headers Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-24 19:37   ` Lee Jones
2020-11-30 22:18   ` Alex Deucher
2020-11-30 22:18     ` Alex Deucher
2020-11-30 22:18     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 16/40] drm/amd/amdgpu/gfx_v10_0: Remove a bunch of set but unused variables Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:20   ` Alex Deucher
2020-11-30 22:20     ` Alex Deucher
2020-11-30 22:20     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 17/40] drm/amd/amdgpu/sdma_v2_4: Fix a bunch of kernel-doc function documentation issues Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:23   ` Alex Deucher
2020-11-30 22:23     ` Alex Deucher
2020-11-30 22:23     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 18/40] drm/amd/amdgpu/sdma_v3_0: " Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:24   ` Alex Deucher
2020-11-30 22:24     ` Alex Deucher
2020-11-30 22:24     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 19/40] drm/amd/amdgpu/sdma_v3_0: Fix incorrect param doc-rot issue Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:26   ` Alex Deucher
2020-11-30 22:26     ` Alex Deucher
2020-11-30 22:26     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 20/40] drm/amd/amdgpu/uvd_v5_0: Fix a bunch of kernel-doc function documentation issues Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:27   ` Alex Deucher
2020-11-30 22:27     ` Alex Deucher
2020-11-30 22:27     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 21/40] drm/amd/amdgpu/sdma_v4_0: Repair a bunch of kernel-doc problems Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:29   ` Alex Deucher
2020-11-30 22:29     ` Alex Deucher
2020-11-30 22:29     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 22/40] drm/amd/amdgpu/amdgpu_uvd: Fix some function documentation headers Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:30   ` Alex Deucher
2020-11-30 22:30     ` Alex Deucher
2020-11-30 22:30     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 23/40] drm/amd/amdgpu/sdma_v5_0: Provide some missing and repair other function params Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:48   ` Alex Deucher
2020-11-30 22:48     ` Alex Deucher
2020-11-30 22:48     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 24/40] drm/amd/amdgpu/sdma_v5_2: " Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:33   ` Alex Deucher
2020-11-30 22:33     ` Alex Deucher
2020-11-30 22:33     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 25/40] drm/amd/amdgpu/amdgpu_vce: " Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:36   ` Alex Deucher
2020-11-30 22:36     ` Alex Deucher
2020-11-30 22:36     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 26/40] drm/amd/amdgpu/uvd_v6_0: Fix a bunch of kernel-doc function documentation issues Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:37   ` Alex Deucher
2020-11-30 22:37     ` Alex Deucher
2020-11-30 22:37     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 27/40] drm/amd/amdgpu/uvd_v7_0: " Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:39   ` Alex Deucher
2020-11-30 22:39     ` Alex Deucher
2020-11-30 22:39     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 28/40] drm/amd/amdgpu/gfx_v10_0: Make local function 'gfx_v10_0_rlc_stop()' static Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:40   ` Alex Deucher
2020-11-30 22:40     ` Alex Deucher
2020-11-30 22:40     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 29/40] drm/amd/amdgpu/vcn_v1_0: Fix a few kernel-doc misdemeanours Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:41   ` Alex Deucher
2020-11-30 22:41     ` Alex Deucher
2020-11-30 22:41     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 30/40] drm/amd/amdgpu/jpeg_v1_0: Add some missing function param descriptions Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:43   ` Alex Deucher
2020-11-30 22:43     ` Alex Deucher
2020-11-30 22:43     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 31/40] drm/amd/amdgpu/jpeg_v2_0: Add some missing kernel-doc descriptions Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:44   ` Alex Deucher
2020-11-30 22:44     ` Alex Deucher
2020-11-30 22:44     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 32/40] drm/amd/amdgpu/vcn_v2_0: Fix a few kernel-doc misdemeanours Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:46   ` Alex Deucher
2020-11-30 22:46     ` Alex Deucher
2020-11-30 22:46     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 33/40] drm/amd/amdgpu/vcn_v3_0: Remove unused variable 'direct_poll' from 'vcn_v3_0_start_sriov()' Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:49   ` Alex Deucher
2020-11-30 22:49     ` Alex Deucher
2020-11-30 22:49     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 34/40] drm/amd/amdgpu/amdgpu_acp: Fix doc-rot issues pertaining to a couple of 'handle' params Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:50   ` Alex Deucher
2020-11-30 22:50     ` Alex Deucher
2020-11-30 22:50     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 35/40] drm/amd/pm/swsmu/smu11/vangogh_ppt: Make local function 'vangogh_set_default_dpm_tables()' static Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:58   ` Alex Deucher
2020-11-30 22:58     ` Alex Deucher
2020-11-30 22:58     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 36/40] drm/amd/pm/inc/smu_v11_0: Mark 'smu11_thermal_policy' as __maybe_unused Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 22:59   ` Alex Deucher
2020-11-30 22:59     ` Alex Deucher
2020-11-30 22:59     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 37/40] drm/amd/pm/swsmu/smu12/renoir_ppt: Demote kernel-doc formatting abuse Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 23:00   ` Alex Deucher
2020-11-30 23:00     ` Alex Deucher
2020-11-30 23:00     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 38/40] drm/amd/pm/swsmu/smu11/navi10_ppt: Remove unused 'struct i2c_algorithm navi10_i2c_algo' Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 23:01   ` Alex Deucher [this message]
2020-11-30 23:01     ` Alex Deucher
2020-11-30 23:01     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 39/40] drm/amd/pm/powerplay/smumgr/fiji_smumgr: Remove unused variable 'result' Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 23:03   ` Alex Deucher
2020-11-30 23:03     ` Alex Deucher
2020-11-30 23:03     ` Alex Deucher
2020-11-24 19:38 ` [PATCH 40/40] drm/amd/amdgpu/amdgpu_uvd: Add description for amdgpu_uvd_cs_msg_decode()'s 'buf_sizes' param Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-24 19:38   ` Lee Jones
2020-11-30 23:03   ` Alex Deucher
2020-11-30 23:03     ` Alex Deucher
2020-11-30 23:03     ` Alex Deucher

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