From: Bin Meng <bmeng.cn@gmail.com>
To: Alistair Francis <alistair.francis@wdc.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
"qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
Alistair Francis <alistair23@gmail.com>
Subject: Re: [PATCH v1 1/1] riscv: Pass RISCVHartArrayState by pointer
Date: Sun, 17 Jan 2021 00:30:18 +0800 [thread overview]
Message-ID: <CAEUhbmWC5CDqK3QuuLY9PFAxr=OcePsJqsUQjhw3em5GOH+Ccg@mail.gmail.com> (raw)
In-Reply-To: <f3e04424723e0e222769991896cc82308fd23f76.1610751609.git.alistair.francis@wdc.com>
On Sat, Jan 16, 2021 at 7:00 AM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> We were accidently passing RISCVHartArrayState by value instead of
> pointer. The type is 824 bytes long so let's correct that and pass it by
> pointer instead.
>
> Fixes: Coverity CID 1438099
> Fixes: Coverity CID 1438100
> Fixes: Coverity CID 1438101
Where can I look at the Coverity report for QEMU?
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> include/hw/riscv/boot.h | 6 +++---
> hw/riscv/boot.c | 8 ++++----
> hw/riscv/sifive_u.c | 10 +++++-----
> hw/riscv/spike.c | 8 ++++----
> hw/riscv/virt.c | 8 ++++----
> 5 files changed, 20 insertions(+), 20 deletions(-)
>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
WARNING: multiple messages have this Message-ID (diff)
From: Bin Meng <bmeng.cn@gmail.com>
To: Alistair Francis <alistair.francis@wdc.com>
Cc: "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>,
"open list:RISC-V" <qemu-riscv@nongnu.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Alistair Francis <alistair23@gmail.com>
Subject: Re: [PATCH v1 1/1] riscv: Pass RISCVHartArrayState by pointer
Date: Sun, 17 Jan 2021 00:30:18 +0800 [thread overview]
Message-ID: <CAEUhbmWC5CDqK3QuuLY9PFAxr=OcePsJqsUQjhw3em5GOH+Ccg@mail.gmail.com> (raw)
In-Reply-To: <f3e04424723e0e222769991896cc82308fd23f76.1610751609.git.alistair.francis@wdc.com>
On Sat, Jan 16, 2021 at 7:00 AM Alistair Francis
<alistair.francis@wdc.com> wrote:
>
> We were accidently passing RISCVHartArrayState by value instead of
> pointer. The type is 824 bytes long so let's correct that and pass it by
> pointer instead.
>
> Fixes: Coverity CID 1438099
> Fixes: Coverity CID 1438100
> Fixes: Coverity CID 1438101
Where can I look at the Coverity report for QEMU?
> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
> ---
> include/hw/riscv/boot.h | 6 +++---
> hw/riscv/boot.c | 8 ++++----
> hw/riscv/sifive_u.c | 10 +++++-----
> hw/riscv/spike.c | 8 ++++----
> hw/riscv/virt.c | 8 ++++----
> 5 files changed, 20 insertions(+), 20 deletions(-)
>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
next prev parent reply other threads:[~2021-01-16 16:31 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-01-15 23:00 [PATCH v1 1/1] riscv: Pass RISCVHartArrayState by pointer Alistair Francis
2021-01-15 23:00 ` Alistair Francis
2021-01-15 23:03 ` Palmer Dabbelt
2021-01-15 23:03 ` Palmer Dabbelt
2021-01-16 16:30 ` Bin Meng [this message]
2021-01-16 16:30 ` Bin Meng
2021-01-16 17:50 ` Alistair Francis
2021-01-16 17:50 ` Alistair Francis
2021-01-16 18:55 ` Alistair Francis
2021-01-16 18:55 ` Alistair Francis
2021-01-16 22:32 ` Philippe Mathieu-Daudé
2021-01-16 22:32 ` Philippe Mathieu-Daudé
2021-01-16 22:38 ` Alistair Francis
2021-01-16 22:38 ` Alistair Francis
2021-01-17 16:52 ` Philippe Mathieu-Daudé
2021-01-17 16:52 ` Philippe Mathieu-Daudé
2021-01-19 21:50 ` Eric Blake
2021-01-19 21:50 ` Eric Blake
2021-01-18 17:14 ` Richard Henderson
2021-01-18 17:14 ` Richard Henderson
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