From: Sumit Garg <sumit.garg@linaro.org> To: Marc Zyngier <maz@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, linux-arm-kernel <linux-arm-kernel@lists.infradead.org>, Thomas Gleixner <tglx@linutronix.de>, Jason Cooper <jason@lakedaemon.net>, Mark Rutland <mark.rutland@arm.com>, julien.thierry.kdev@gmail.com, Douglas Anderson <dianders@chromium.org>, Daniel Thompson <daniel.thompson@linaro.org>, Jason Wessel <jason.wessel@windriver.com>, Masayoshi Mizuma <msys.mizuma@gmail.com>, ito-yuichi@fujitsu.com, kgdb-bugreport@lists.sourceforge.net, Linux Kernel Mailing List <linux-kernel@vger.kernel.org> Subject: Re: [PATCH v5 3/5] arm64: smp: Allocate and setup IPI as NMI Date: Tue, 20 Oct 2020 12:46:51 +0530 [thread overview] Message-ID: <CAFA6WYODXzOoH=NiurikiK6wepsdfmnmUd4BzEJnguaSGzW7GQ@mail.gmail.com> (raw) In-Reply-To: <1c68b74251dc72b0cd74706280ea96f7@kernel.org> On Mon, 19 Oct 2020 at 17:29, Marc Zyngier <maz@kernel.org> wrote: > > On 2020-10-14 12:12, Sumit Garg wrote: > > Allocate an unused IPI that can be turned as NMI using ipi_nmi > > framework. > > This doesn't do any allocation, as far as I can see. It relies on > the initial grant from the interrupt controller to be larger than > what the kernel currently uses. > Okay, will update the commit message as s/Allocate/Assign/. -Sumit > > Also, invoke corresponding NMI setup/teardown APIs. > > > > Signed-off-by: Sumit Garg <sumit.garg@linaro.org> > > --- > > arch/arm64/kernel/smp.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c > > index 82e75fc..129ebfb 100644 > > --- a/arch/arm64/kernel/smp.c > > +++ b/arch/arm64/kernel/smp.c > > @@ -43,6 +43,7 @@ > > #include <asm/daifflags.h> > > #include <asm/kvm_mmu.h> > > #include <asm/mmu_context.h> > > +#include <asm/nmi.h> > > #include <asm/numa.h> > > #include <asm/processor.h> > > #include <asm/smp_plat.h> > > @@ -962,6 +963,8 @@ static void ipi_setup(int cpu) > > > > for (i = 0; i < nr_ipi; i++) > > enable_percpu_irq(ipi_irq_base + i, 0); > > + > > + ipi_nmi_setup(cpu); > > } > > > > #ifdef CONFIG_HOTPLUG_CPU > > @@ -974,6 +977,8 @@ static void ipi_teardown(int cpu) > > > > for (i = 0; i < nr_ipi; i++) > > disable_percpu_irq(ipi_irq_base + i); > > + > > + ipi_nmi_teardown(cpu); > > } > > #endif > > > > @@ -995,6 +1000,9 @@ void __init set_smp_ipi_range(int ipi_base, int n) > > irq_set_status_flags(ipi_base + i, IRQ_HIDDEN); > > } > > > > + if (n > nr_ipi) > > + set_smp_ipi_nmi(ipi_base + nr_ipi); > > + > > ipi_irq_base = ipi_base; > > > > /* Setup the boot CPU immediately */ > > Thanks, > > M. > -- > Jazz is not dead. It just smells funny...
WARNING: multiple messages have this Message-ID (diff)
From: Sumit Garg <sumit.garg@linaro.org> To: Marc Zyngier <maz@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com>, Daniel Thompson <daniel.thompson@linaro.org>, Jason Cooper <jason@lakedaemon.net>, Catalin Marinas <catalin.marinas@arm.com>, ito-yuichi@fujitsu.com, Douglas Anderson <dianders@chromium.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, julien.thierry.kdev@gmail.com, Jason Wessel <jason.wessel@windriver.com>, kgdb-bugreport@lists.sourceforge.net, Thomas Gleixner <tglx@linutronix.de>, Masayoshi Mizuma <msys.mizuma@gmail.com>, Will Deacon <will@kernel.org>, linux-arm-kernel <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH v5 3/5] arm64: smp: Allocate and setup IPI as NMI Date: Tue, 20 Oct 2020 12:46:51 +0530 [thread overview] Message-ID: <CAFA6WYODXzOoH=NiurikiK6wepsdfmnmUd4BzEJnguaSGzW7GQ@mail.gmail.com> (raw) In-Reply-To: <1c68b74251dc72b0cd74706280ea96f7@kernel.org> On Mon, 19 Oct 2020 at 17:29, Marc Zyngier <maz@kernel.org> wrote: > > On 2020-10-14 12:12, Sumit Garg wrote: > > Allocate an unused IPI that can be turned as NMI using ipi_nmi > > framework. > > This doesn't do any allocation, as far as I can see. It relies on > the initial grant from the interrupt controller to be larger than > what the kernel currently uses. > Okay, will update the commit message as s/Allocate/Assign/. -Sumit > > Also, invoke corresponding NMI setup/teardown APIs. > > > > Signed-off-by: Sumit Garg <sumit.garg@linaro.org> > > --- > > arch/arm64/kernel/smp.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c > > index 82e75fc..129ebfb 100644 > > --- a/arch/arm64/kernel/smp.c > > +++ b/arch/arm64/kernel/smp.c > > @@ -43,6 +43,7 @@ > > #include <asm/daifflags.h> > > #include <asm/kvm_mmu.h> > > #include <asm/mmu_context.h> > > +#include <asm/nmi.h> > > #include <asm/numa.h> > > #include <asm/processor.h> > > #include <asm/smp_plat.h> > > @@ -962,6 +963,8 @@ static void ipi_setup(int cpu) > > > > for (i = 0; i < nr_ipi; i++) > > enable_percpu_irq(ipi_irq_base + i, 0); > > + > > + ipi_nmi_setup(cpu); > > } > > > > #ifdef CONFIG_HOTPLUG_CPU > > @@ -974,6 +977,8 @@ static void ipi_teardown(int cpu) > > > > for (i = 0; i < nr_ipi; i++) > > disable_percpu_irq(ipi_irq_base + i); > > + > > + ipi_nmi_teardown(cpu); > > } > > #endif > > > > @@ -995,6 +1000,9 @@ void __init set_smp_ipi_range(int ipi_base, int n) > > irq_set_status_flags(ipi_base + i, IRQ_HIDDEN); > > } > > > > + if (n > nr_ipi) > > + set_smp_ipi_nmi(ipi_base + nr_ipi); > > + > > ipi_irq_base = ipi_base; > > > > /* Setup the boot CPU immediately */ > > Thanks, > > M. > -- > Jazz is not dead. It just smells funny... _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-10-20 7:17 UTC|newest] Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-10-14 11:12 [PATCH v5 0/5] arm64: Add framework to turn an IPI as NMI Sumit Garg 2020-10-14 11:12 ` Sumit Garg 2020-10-14 11:12 ` [PATCH v5 1/5] arm64: Add framework to turn " Sumit Garg 2020-10-14 11:12 ` Sumit Garg 2020-10-15 1:15 ` Masayoshi Mizuma 2020-10-15 1:15 ` Masayoshi Mizuma 2020-10-19 11:37 ` Marc Zyngier 2020-10-19 11:37 ` Marc Zyngier 2020-10-20 6:43 ` Sumit Garg 2020-10-20 6:43 ` Sumit Garg 2020-10-20 10:08 ` Marc Zyngier 2020-10-20 10:08 ` Marc Zyngier 2020-10-20 11:22 ` Sumit Garg 2020-10-20 11:22 ` Sumit Garg 2020-10-20 12:25 ` Daniel Thompson 2020-10-20 12:25 ` Daniel Thompson 2020-10-20 12:32 ` Marc Zyngier 2020-10-20 12:32 ` Marc Zyngier 2020-10-21 5:22 ` Sumit Garg 2020-10-21 5:22 ` Sumit Garg 2020-10-21 10:27 ` Marc Zyngier 2020-10-21 10:27 ` Marc Zyngier 2020-10-22 11:52 ` Sumit Garg 2020-10-22 11:52 ` Sumit Garg 2020-10-19 11:56 ` Marc Zyngier 2020-10-19 11:56 ` Marc Zyngier 2020-10-20 7:07 ` Sumit Garg 2020-10-20 7:07 ` Sumit Garg 2020-10-14 11:12 ` [PATCH v5 2/5] irqchip/gic-v3: Enable support for SGIs to act as NMIs Sumit Garg 2020-10-14 11:12 ` Sumit Garg 2020-10-15 1:16 ` Masayoshi Mizuma 2020-10-15 1:16 ` Masayoshi Mizuma 2020-10-19 12:07 ` Marc Zyngier 2020-10-19 12:07 ` Marc Zyngier 2020-10-20 7:24 ` Sumit Garg 2020-10-20 7:24 ` Sumit Garg 2020-10-14 11:12 ` [PATCH v5 3/5] arm64: smp: Allocate and setup IPI as NMI Sumit Garg 2020-10-14 11:12 ` Sumit Garg 2020-10-15 1:16 ` Masayoshi Mizuma 2020-10-15 1:16 ` Masayoshi Mizuma 2020-10-19 11:59 ` Marc Zyngier 2020-10-19 11:59 ` Marc Zyngier 2020-10-20 7:16 ` Sumit Garg [this message] 2020-10-20 7:16 ` Sumit Garg 2020-10-14 11:12 ` [PATCH v5 4/5] arm64: kgdb: Round up cpus using " Sumit Garg 2020-10-14 11:12 ` Sumit Garg 2020-10-19 12:15 ` Marc Zyngier 2020-10-19 12:15 ` Marc Zyngier 2020-10-20 8:51 ` Sumit Garg 2020-10-20 8:51 ` Sumit Garg 2020-10-14 11:12 ` [PATCH v5 5/5] arm64: ipi_nmi: Add support for NMI backtrace Sumit Garg 2020-10-14 11:12 ` Sumit Garg 2020-10-15 1:17 ` Masayoshi Mizuma 2020-10-15 1:17 ` Masayoshi Mizuma 2020-10-19 12:20 ` Marc Zyngier 2020-10-19 12:20 ` Marc Zyngier 2020-10-20 9:13 ` Sumit Garg 2020-10-20 9:13 ` Sumit Garg 2020-10-21 10:32 ` Marc Zyngier 2020-10-21 10:32 ` Marc Zyngier 2020-10-21 11:28 ` Sumit Garg 2020-10-21 11:28 ` Sumit Garg
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