From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: neil.armstrong@linaro.org
Cc: Jerome Brunet <jbrunet@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Philipp Zabel <p.zabel@pengutronix.de>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Sam Ravnborg <sam@ravnborg.org>,
"Lukas F. Hartmann" <lukas@mntre.com>,
Nicolas Belin <nbelin@baylibre.com>,
linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
dri-devel@lists.freedesktop.org, linux-phy@lists.infradead.org
Subject: Re: [PATCH v5 05/17] clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF
Date: Tue, 30 May 2023 21:36:09 +0200 [thread overview]
Message-ID: <CAFBinCD4nZPp4JKpGARBkWL5pKVHJ0GSLTvy3S_q9mF=1d37Kg@mail.gmail.com> (raw)
In-Reply-To: <c24502f9-f717-6ff9-211c-1d129ef02f24@linaro.org>
Hi Neil,
On Tue, May 30, 2023 at 5:57 PM Neil Armstrong
<neil.armstrong@linaro.org> wrote:
[...]
> >> The mipi_dsi_pxclk_div is set as RO in order to use the same GP0
> >> for mipi_dsi_pxclk and vclk2_input.
> >
> > I don't think notifiers is the appropriate approach here.
> > Whenever there is clock change the motifiers would trigger an off/on of
> > the clock, regardless of the clock usage or state.
> > If you have several consummers on this vclk2, this would
> > cause glitches and maybe this is not desirable.
> >
> > I think it would be better to handle the enable and reset with a
> > specific gate driver, in prepare() or enable(), and the give the clock
> > CLK_SET_RATE_GATE flag.
> >
> > This would require the clock to be properly turn off before changing the
> > rate.
>
> Sure, will see how to switch to that, seem Martin did than on Meson8.
You can start here: [0]
It may not be the nicest logic but so far it works (for me).
Please note that I don't mix between CCF and direct register IO clock handling:
For the old SoCs I'm relying only on CCF to manage the clocks.
Best regards,
Martin
[0] https://github.com/xdarklight/linux/blob/meson-mx-integration-6.3-20230410/drivers/gpu/drm/meson/meson_vclk.c#L1177-L1179
WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: neil.armstrong@linaro.org
Cc: Jerome Brunet <jbrunet@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
David Airlie <airlied@gmail.com>,
Daniel Vetter <daniel@ffwll.ch>,
Philipp Zabel <p.zabel@pengutronix.de>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Sam Ravnborg <sam@ravnborg.org>,
"Lukas F. Hartmann" <lukas@mntre.com>,
Nicolas Belin <nbelin@baylibre.com>,
linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
dri-devel@lists.freedesktop.org, linux-phy@lists.infradead.org
Subject: Re: [PATCH v5 05/17] clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF
Date: Tue, 30 May 2023 21:36:09 +0200 [thread overview]
Message-ID: <CAFBinCD4nZPp4JKpGARBkWL5pKVHJ0GSLTvy3S_q9mF=1d37Kg@mail.gmail.com> (raw)
In-Reply-To: <c24502f9-f717-6ff9-211c-1d129ef02f24@linaro.org>
Hi Neil,
On Tue, May 30, 2023 at 5:57 PM Neil Armstrong
<neil.armstrong@linaro.org> wrote:
[...]
> >> The mipi_dsi_pxclk_div is set as RO in order to use the same GP0
> >> for mipi_dsi_pxclk and vclk2_input.
> >
> > I don't think notifiers is the appropriate approach here.
> > Whenever there is clock change the motifiers would trigger an off/on of
> > the clock, regardless of the clock usage or state.
> > If you have several consummers on this vclk2, this would
> > cause glitches and maybe this is not desirable.
> >
> > I think it would be better to handle the enable and reset with a
> > specific gate driver, in prepare() or enable(), and the give the clock
> > CLK_SET_RATE_GATE flag.
> >
> > This would require the clock to be properly turn off before changing the
> > rate.
>
> Sure, will see how to switch to that, seem Martin did than on Meson8.
You can start here: [0]
It may not be the nicest logic but so far it works (for me).
Please note that I don't mix between CCF and direct register IO clock handling:
For the old SoCs I'm relying only on CCF to manage the clocks.
Best regards,
Martin
[0] https://github.com/xdarklight/linux/blob/meson-mx-integration-6.3-20230410/drivers/gpu/drm/meson/meson_vclk.c#L1177-L1179
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: neil.armstrong@linaro.org
Cc: Kishon Vijay Abraham I <kishon@kernel.org>,
devicetree@vger.kernel.org, Conor Dooley <conor+dt@kernel.org>,
Sam Ravnborg <sam@ravnborg.org>, Stephen Boyd <sboyd@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Rob Herring <robh+dt@kernel.org>,
Nicolas Belin <nbelin@baylibre.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
linux-amlogic@lists.infradead.org, linux-phy@lists.infradead.org,
linux-clk@vger.kernel.org, "Lukas F. Hartmann" <lukas@mntre.com>,
Jerome Brunet <jbrunet@baylibre.com>
Subject: Re: [PATCH v5 05/17] clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF
Date: Tue, 30 May 2023 21:36:09 +0200 [thread overview]
Message-ID: <CAFBinCD4nZPp4JKpGARBkWL5pKVHJ0GSLTvy3S_q9mF=1d37Kg@mail.gmail.com> (raw)
In-Reply-To: <c24502f9-f717-6ff9-211c-1d129ef02f24@linaro.org>
Hi Neil,
On Tue, May 30, 2023 at 5:57 PM Neil Armstrong
<neil.armstrong@linaro.org> wrote:
[...]
> >> The mipi_dsi_pxclk_div is set as RO in order to use the same GP0
> >> for mipi_dsi_pxclk and vclk2_input.
> >
> > I don't think notifiers is the appropriate approach here.
> > Whenever there is clock change the motifiers would trigger an off/on of
> > the clock, regardless of the clock usage or state.
> > If you have several consummers on this vclk2, this would
> > cause glitches and maybe this is not desirable.
> >
> > I think it would be better to handle the enable and reset with a
> > specific gate driver, in prepare() or enable(), and the give the clock
> > CLK_SET_RATE_GATE flag.
> >
> > This would require the clock to be properly turn off before changing the
> > rate.
>
> Sure, will see how to switch to that, seem Martin did than on Meson8.
You can start here: [0]
It may not be the nicest logic but so far it works (for me).
Please note that I don't mix between CCF and direct register IO clock handling:
For the old SoCs I'm relying only on CCF to manage the clocks.
Best regards,
Martin
[0] https://github.com/xdarklight/linux/blob/meson-mx-integration-6.3-20230410/drivers/gpu/drm/meson/meson_vclk.c#L1177-L1179
WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: neil.armstrong@linaro.org
Cc: Jerome Brunet <jbrunet@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
David Airlie <airlied@gmail.com>,
Daniel Vetter <daniel@ffwll.ch>,
Philipp Zabel <p.zabel@pengutronix.de>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Sam Ravnborg <sam@ravnborg.org>,
"Lukas F. Hartmann" <lukas@mntre.com>,
Nicolas Belin <nbelin@baylibre.com>,
linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
dri-devel@lists.freedesktop.org, linux-phy@lists.infradead.org
Subject: Re: [PATCH v5 05/17] clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF
Date: Tue, 30 May 2023 21:36:09 +0200 [thread overview]
Message-ID: <CAFBinCD4nZPp4JKpGARBkWL5pKVHJ0GSLTvy3S_q9mF=1d37Kg@mail.gmail.com> (raw)
In-Reply-To: <c24502f9-f717-6ff9-211c-1d129ef02f24@linaro.org>
Hi Neil,
On Tue, May 30, 2023 at 5:57 PM Neil Armstrong
<neil.armstrong@linaro.org> wrote:
[...]
> >> The mipi_dsi_pxclk_div is set as RO in order to use the same GP0
> >> for mipi_dsi_pxclk and vclk2_input.
> >
> > I don't think notifiers is the appropriate approach here.
> > Whenever there is clock change the motifiers would trigger an off/on of
> > the clock, regardless of the clock usage or state.
> > If you have several consummers on this vclk2, this would
> > cause glitches and maybe this is not desirable.
> >
> > I think it would be better to handle the enable and reset with a
> > specific gate driver, in prepare() or enable(), and the give the clock
> > CLK_SET_RATE_GATE flag.
> >
> > This would require the clock to be properly turn off before changing the
> > rate.
>
> Sure, will see how to switch to that, seem Martin did than on Meson8.
You can start here: [0]
It may not be the nicest logic but so far it works (for me).
Please note that I don't mix between CCF and direct register IO clock handling:
For the old SoCs I'm relying only on CCF to manage the clocks.
Best regards,
Martin
[0] https://github.com/xdarklight/linux/blob/meson-mx-integration-6.3-20230410/drivers/gpu/drm/meson/meson_vclk.c#L1177-L1179
_______________________________________________
linux-amlogic mailing list
linux-amlogic@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-amlogic
WARNING: multiple messages have this Message-ID (diff)
From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: neil.armstrong@linaro.org
Cc: Jerome Brunet <jbrunet@baylibre.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Kevin Hilman <khilman@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
David Airlie <airlied@gmail.com>,
Daniel Vetter <daniel@ffwll.ch>,
Philipp Zabel <p.zabel@pengutronix.de>,
Kishon Vijay Abraham I <kishon@kernel.org>,
Sam Ravnborg <sam@ravnborg.org>,
"Lukas F. Hartmann" <lukas@mntre.com>,
Nicolas Belin <nbelin@baylibre.com>,
linux-amlogic@lists.infradead.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
dri-devel@lists.freedesktop.org, linux-phy@lists.infradead.org
Subject: Re: [PATCH v5 05/17] clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF
Date: Tue, 30 May 2023 21:36:09 +0200 [thread overview]
Message-ID: <CAFBinCD4nZPp4JKpGARBkWL5pKVHJ0GSLTvy3S_q9mF=1d37Kg@mail.gmail.com> (raw)
In-Reply-To: <c24502f9-f717-6ff9-211c-1d129ef02f24@linaro.org>
Hi Neil,
On Tue, May 30, 2023 at 5:57 PM Neil Armstrong
<neil.armstrong@linaro.org> wrote:
[...]
> >> The mipi_dsi_pxclk_div is set as RO in order to use the same GP0
> >> for mipi_dsi_pxclk and vclk2_input.
> >
> > I don't think notifiers is the appropriate approach here.
> > Whenever there is clock change the motifiers would trigger an off/on of
> > the clock, regardless of the clock usage or state.
> > If you have several consummers on this vclk2, this would
> > cause glitches and maybe this is not desirable.
> >
> > I think it would be better to handle the enable and reset with a
> > specific gate driver, in prepare() or enable(), and the give the clock
> > CLK_SET_RATE_GATE flag.
> >
> > This would require the clock to be properly turn off before changing the
> > rate.
>
> Sure, will see how to switch to that, seem Martin did than on Meson8.
You can start here: [0]
It may not be the nicest logic but so far it works (for me).
Please note that I don't mix between CCF and direct register IO clock handling:
For the old SoCs I'm relying only on CCF to manage the clocks.
Best regards,
Martin
[0] https://github.com/xdarklight/linux/blob/meson-mx-integration-6.3-20230410/drivers/gpu/drm/meson/meson_vclk.c#L1177-L1179
--
linux-phy mailing list
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https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2023-05-30 19:36 UTC|newest]
Thread overview: 170+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-30 7:38 [PATCH v5 00/17] drm/meson: add support for MIPI DSI Display Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` [PATCH v5 01/17] clk: meson: g12a: prefix private CLK IDs defines with PRIV Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 8:08 ` Jerome Brunet
2023-05-30 8:08 ` Jerome Brunet
2023-05-30 8:08 ` Jerome Brunet
2023-05-30 8:08 ` Jerome Brunet
2023-05-30 8:08 ` Jerome Brunet
2023-05-30 15:56 ` Neil Armstrong
2023-05-30 15:56 ` Neil Armstrong
2023-05-30 15:56 ` Neil Armstrong
2023-05-30 15:56 ` Neil Armstrong
2023-05-30 15:56 ` Neil Armstrong
2023-05-31 16:08 ` Jerome Brunet
2023-05-31 16:08 ` Jerome Brunet
2023-05-31 16:08 ` Jerome Brunet
2023-05-31 16:08 ` Jerome Brunet
2023-05-31 16:08 ` Jerome Brunet
2023-05-30 7:38 ` [PATCH v5 02/17] clk: meson: g12a: add CTS_ENCL & CTS_ENCL_SEL clocks Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` [PATCH v5 03/17] dt-bindings: clk: g12a-clkc: add VCLK2_SEL and CTS_ENCL clock ids Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 17:25 ` Conor Dooley
2023-05-30 17:25 ` Conor Dooley
2023-05-30 17:25 ` Conor Dooley
2023-05-30 17:25 ` Conor Dooley
2023-05-30 17:25 ` Conor Dooley
2023-05-30 7:38 ` [PATCH v5 04/17] clk: meson: g12: use VCLK2_SEL, CTS_ENCL & CTS_ENCL_SEL public CLK IDs Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` [PATCH v5 05/17] clk: meson: g12a: make VCLK2 and ENCL clock path configurable by CCF Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 8:14 ` Jerome Brunet
2023-05-30 8:14 ` Jerome Brunet
2023-05-30 8:14 ` Jerome Brunet
2023-05-30 8:14 ` Jerome Brunet
2023-05-30 8:14 ` Jerome Brunet
2023-05-30 15:57 ` Neil Armstrong
2023-05-30 15:57 ` Neil Armstrong
2023-05-30 15:57 ` Neil Armstrong
2023-05-30 15:57 ` Neil Armstrong
2023-05-30 15:57 ` Neil Armstrong
2023-05-30 19:36 ` Martin Blumenstingl [this message]
2023-05-30 19:36 ` Martin Blumenstingl
2023-05-30 19:36 ` Martin Blumenstingl
2023-05-30 19:36 ` Martin Blumenstingl
2023-05-30 19:36 ` Martin Blumenstingl
2023-05-30 7:38 ` [PATCH v5 06/17] dt-bindings: display: add Amlogic MIPI DSI Host Controller bindings Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 17:28 ` Conor Dooley
2023-05-30 17:28 ` Conor Dooley
2023-05-30 17:28 ` Conor Dooley
2023-05-30 17:28 ` Conor Dooley
2023-05-30 17:28 ` Conor Dooley
2023-05-30 7:38 ` [PATCH v5 07/17] dt-bindings: display: meson-vpu: add third DPI output port Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` [PATCH v5 08/17] drm/meson: fix unbind path if HDMI fails to bind Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-31 9:19 ` Nicolas Belin
2023-05-31 9:19 ` Nicolas Belin
2023-05-31 9:19 ` Nicolas Belin
2023-05-31 9:19 ` Nicolas Belin
2023-05-31 9:19 ` Nicolas Belin
2023-05-30 7:38 ` [PATCH v5 09/17] drm/meson: only use components with dw-hdmi Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-31 9:21 ` Nicolas Belin
2023-05-31 9:21 ` Nicolas Belin
2023-05-31 9:21 ` Nicolas Belin
2023-05-31 9:21 ` Nicolas Belin
2023-05-31 9:21 ` Nicolas Belin
2023-05-30 7:38 ` [PATCH v5 10/17] drm/meson: venc: add ENCL encoder setup for MIPI-DSI output Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-31 9:21 ` Nicolas Belin
2023-05-31 9:21 ` Nicolas Belin
2023-05-31 9:21 ` Nicolas Belin
2023-05-31 9:21 ` Nicolas Belin
2023-05-31 9:21 ` Nicolas Belin
2023-05-30 7:38 ` [PATCH v5 11/17] drm/meson: add DSI encoder Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-31 9:22 ` Nicolas Belin
2023-05-31 9:22 ` Nicolas Belin
2023-05-31 9:22 ` Nicolas Belin
2023-05-31 9:22 ` Nicolas Belin
2023-05-31 9:22 ` Nicolas Belin
2023-05-30 7:38 ` [PATCH v5 12/17] drm/meson: add support for MIPI-DSI transceiver Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-31 9:22 ` Nicolas Belin
2023-05-31 9:22 ` Nicolas Belin
2023-05-31 9:22 ` Nicolas Belin
2023-05-31 9:22 ` Nicolas Belin
2023-05-31 9:22 ` Nicolas Belin
2023-05-30 7:38 ` [PATCH v5 13/17] drm/panel: khadas-ts050: update timings to achieve 60Hz refresh rate Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-31 9:23 ` Nicolas Belin
2023-05-31 9:23 ` Nicolas Belin
2023-05-31 9:23 ` Nicolas Belin
2023-05-31 9:23 ` Nicolas Belin
2023-05-31 9:23 ` Nicolas Belin
2023-05-30 7:38 ` [PATCH v5 14/17] arm64: meson: g12-common: add the MIPI DSI nodes Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` [PATCH v5 15/17] DONOTMERGE: arm64: meson: khadas-vim3l: add DSI panel Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` [PATCH v5 16/17] dt-bindings: arm: amlogic: Document the MNT Reform 2 CM4 adapter with a BPI-CM4 Module Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 17:23 ` Conor Dooley
2023-05-30 17:23 ` Conor Dooley
2023-05-30 17:23 ` Conor Dooley
2023-05-30 17:23 ` Conor Dooley
2023-05-30 17:23 ` Conor Dooley
2023-05-30 7:38 ` [PATCH v5 17/17] arm64: dts: amlogic: meson-g12b-bananapi-cm4: add support for MNT Reform2 with CM4 adaper Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-05-30 7:38 ` Neil Armstrong
2023-06-01 14:12 ` (subset) [PATCH v5 00/17] drm/meson: add support for MIPI DSI Display Neil Armstrong
2023-06-01 14:12 ` Neil Armstrong
2023-06-01 14:12 ` Neil Armstrong
2023-06-01 14:12 ` Neil Armstrong
2023-06-01 14:12 ` Neil Armstrong
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--in-reply-to='CAFBinCD4nZPp4JKpGARBkWL5pKVHJ0GSLTvy3S_q9mF=1d37Kg@mail.gmail.com' \
--to=martin.blumenstingl@googlemail.com \
--cc=airlied@gmail.com \
--cc=conor+dt@kernel.org \
--cc=daniel@ffwll.ch \
--cc=devicetree@vger.kernel.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=jbrunet@baylibre.com \
--cc=khilman@baylibre.com \
--cc=kishon@kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-amlogic@lists.infradead.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=lukas@mntre.com \
--cc=mturquette@baylibre.com \
--cc=nbelin@baylibre.com \
--cc=neil.armstrong@linaro.org \
--cc=p.zabel@pengutronix.de \
--cc=robh+dt@kernel.org \
--cc=sam@ravnborg.org \
--cc=sboyd@kernel.org \
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