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From: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Neil Armstrong <narmstrong@baylibre.com>
Cc: jbrunet@baylibre.com, linux-amlogic@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 2/4] clk: meson-gxbb: Fix HDMI PLL for GXL SoCs
Date: Sun, 18 Nov 2018 13:48:37 +0100	[thread overview]
Message-ID: <CAFBinCDQ0G-yt8a6rwpVDa6FJHr1f=VEkAX3LT95ZR+9bWAekw@mail.gmail.com> (raw)
In-Reply-To: <1541516257-16157-3-git-send-email-narmstrong@baylibre.com>

Hi Neil,

On Tue, Nov 6, 2018 at 3:59 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> In an attempt to better describe the HDMI PLL, a single DCO clock was
> left for GXBB and GXL, but the GXL DCO does not have a pre-multiplier.
>
> This patch adds back a GXL specific HDMI PLL DCO with xtal as parent.
according to the public S905X datasheet (from Khadas)
HHI_HDMI_PLL_CNTL2[31:30] describe the OD_FB
the 32-bit SoCs probably have an OD_FB as well and it seems that the
formula for the PLL with OD_FB is:
  in * m / n >> od << od_fb
(however, I must admit that I'm not sure where od_fb fits in best:
before the PLL DCO - like OD is after the PLL DCO, or part of the PLL
DCO)

so this is more of a question than a suggestion/feedback:
do you know whether the datasheet is correct and there's really a
programmable multiplier (called OD_FB)?
do you have more details on that topic?


Regards
Martin

WARNING: multiple messages have this Message-ID (diff)
From: martin.blumenstingl@googlemail.com (Martin Blumenstingl)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/4] clk: meson-gxbb: Fix HDMI PLL for GXL SoCs
Date: Sun, 18 Nov 2018 13:48:37 +0100	[thread overview]
Message-ID: <CAFBinCDQ0G-yt8a6rwpVDa6FJHr1f=VEkAX3LT95ZR+9bWAekw@mail.gmail.com> (raw)
In-Reply-To: <1541516257-16157-3-git-send-email-narmstrong@baylibre.com>

Hi Neil,

On Tue, Nov 6, 2018 at 3:59 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> In an attempt to better describe the HDMI PLL, a single DCO clock was
> left for GXBB and GXL, but the GXL DCO does not have a pre-multiplier.
>
> This patch adds back a GXL specific HDMI PLL DCO with xtal as parent.
according to the public S905X datasheet (from Khadas)
HHI_HDMI_PLL_CNTL2[31:30] describe the OD_FB
the 32-bit SoCs probably have an OD_FB as well and it seems that the
formula for the PLL with OD_FB is:
  in * m / n >> od << od_fb
(however, I must admit that I'm not sure where od_fb fits in best:
before the PLL DCO - like OD is after the PLL DCO, or part of the PLL
DCO)

so this is more of a question than a suggestion/feedback:
do you know whether the datasheet is correct and there's really a
programmable multiplier (called OD_FB)?
do you have more details on that topic?


Regards
Martin

WARNING: multiple messages have this Message-ID (diff)
From: martin.blumenstingl@googlemail.com (Martin Blumenstingl)
To: linus-amlogic@lists.infradead.org
Subject: [PATCH v2 2/4] clk: meson-gxbb: Fix HDMI PLL for GXL SoCs
Date: Sun, 18 Nov 2018 13:48:37 +0100	[thread overview]
Message-ID: <CAFBinCDQ0G-yt8a6rwpVDa6FJHr1f=VEkAX3LT95ZR+9bWAekw@mail.gmail.com> (raw)
In-Reply-To: <1541516257-16157-3-git-send-email-narmstrong@baylibre.com>

Hi Neil,

On Tue, Nov 6, 2018 at 3:59 PM Neil Armstrong <narmstrong@baylibre.com> wrote:
>
> In an attempt to better describe the HDMI PLL, a single DCO clock was
> left for GXBB and GXL, but the GXL DCO does not have a pre-multiplier.
>
> This patch adds back a GXL specific HDMI PLL DCO with xtal as parent.
according to the public S905X datasheet (from Khadas)
HHI_HDMI_PLL_CNTL2[31:30] describe the OD_FB
the 32-bit SoCs probably have an OD_FB as well and it seems that the
formula for the PLL with OD_FB is:
  in * m / n >> od << od_fb
(however, I must admit that I'm not sure where od_fb fits in best:
before the PLL DCO - like OD is after the PLL DCO, or part of the PLL
DCO)

so this is more of a question than a suggestion/feedback:
do you know whether the datasheet is correct and there's really a
programmable multiplier (called OD_FB)?
do you have more details on that topic?


Regards
Martin

  reply	other threads:[~2018-11-18 12:48 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-06 14:57 [PATCH v2 0/4] clk: meson: Add video clocks path Neil Armstrong
2018-11-06 14:57 ` Neil Armstrong
2018-11-06 14:57 ` Neil Armstrong
2018-11-06 14:57 ` [PATCH v2 1/4] clk: meson: Add vid_pll divider driver Neil Armstrong
2018-11-06 14:57   ` Neil Armstrong
2018-11-06 14:57   ` Neil Armstrong
2018-11-06 14:57 ` [PATCH v2 2/4] clk: meson-gxbb: Fix HDMI PLL for GXL SoCs Neil Armstrong
2018-11-06 14:57   ` Neil Armstrong
2018-11-06 14:57   ` Neil Armstrong
2018-11-18 12:48   ` Martin Blumenstingl [this message]
2018-11-18 12:48     ` Martin Blumenstingl
2018-11-18 12:48     ` Martin Blumenstingl
2018-11-06 14:57 ` [PATCH v2 3/4] dt-bindings: clk: meson-gxbb: Add Video clock bindings Neil Armstrong
2018-11-06 14:57   ` Neil Armstrong
2018-11-06 14:57   ` Neil Armstrong
2018-11-06 14:57 ` [PATCH v2 4/4] clk: meson-gxbb: Add video clocks Neil Armstrong
2018-11-06 14:57   ` Neil Armstrong
2018-11-06 14:57   ` Neil Armstrong
2018-11-17 21:09   ` Martin Blumenstingl
2018-11-17 21:09     ` Martin Blumenstingl
2018-11-17 21:09     ` Martin Blumenstingl
2018-11-13 14:18 ` [PATCH v2 0/4] clk: meson: Add video clocks path jbrunet
2018-11-13 14:18   ` jbrunet at baylibre.com
2018-11-13 14:18   ` jbrunet at baylibre.com
2018-11-14  9:11   ` Neil Armstrong
2018-11-14  9:11     ` Neil Armstrong
2018-11-14  9:11     ` Neil Armstrong

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