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From: Peter Maydell <peter.maydell@linaro.org>
To: Alexander Graf <agraf@csgraf.de>
Cc: "Eduardo Habkost" <ehabkost@redhat.com>,
	"Sergio Lopez" <slp@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"Cameron Esfahani" <dirty@apple.com>,
	"Roman Bolshakov" <r.bolshakov@yadro.com>,
	qemu-arm <qemu-arm@nongnu.org>, "Frank Yang" <lfy@google.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Peter Collingbourne" <pcc@google.com>,
	"Ard Biesheuvel" <ardb@kernel.org>
Subject: Re: [PATCH v11 06/10] hvf: arm: Implement -cpu host
Date: Thu, 16 Sep 2021 16:55:34 +0100	[thread overview]
Message-ID: <CAFEAcA8xs3x5WCqT+FnPYip=nbQx6=UEH90Dkjq48YLboV9qAw@mail.gmail.com> (raw)
In-Reply-To: <8e219cb0-8b65-faf8-f636-5c1d24471f84@csgraf.de>

On Thu, 16 Sept 2021 at 16:30, Alexander Graf <agraf@csgraf.de> wrote:
>
>
> On 16.09.21 14:24, Peter Maydell wrote:
> > On Wed, 15 Sept 2021 at 19:10, Alexander Graf <agraf@csgraf.de> wrote:
> >> Now that we have working system register sync, we push more target CPU
> >> properties into the virtual machine. That might be useful in some
> >> situations, but is not the typical case that users want.
> >>
> >> So let's add a -cpu host option that allows them to explicitly pass all
> >> CPU capabilities of their host CPU into the guest.
> >>
> >> Signed-off-by: Alexander Graf <agraf@csgraf.de>
> >> Acked-by: Roman Bolshakov <r.bolshakov@yadro.com>
> >> Reviewed-by: Sergio Lopez <slp@redhat.com>
> >>
> >> +    /*
> >> +     * A scratch vCPU returns SCTLR 0, so let's fill our default with the M1
> >> +     * boot SCTLR from https://github.com/AsahiLinux/m1n1/issues/97

Side note: SCTLR_EL1 is a 64-bit register, do you have anything that
prints the full 64-bits to confirm that [63:32] are indeed all 0?

> >> +     */
> >> +    ahcf->reset_sctlr = 0x30100180;
> >> +    /* OVMF chokes on boot if SPAN is not set, so default it to on */
> >> +    ahcf->reset_sctlr |= 0x00800000;
> > Isn't that just an OVMF bug ? If you want this then you need to
> > convince me why this isn't just a workaround for a buggy guest.
>
>
> I couldn't find anything in the ARMv8 spec that explicitly says "If you
> support PAN, SCTLR.SPAN should be 1 by default". It is RES1 for CPUs
> that do not implement PAN. Beware that for SPAN, "1" means disabled and
> "0" means enabled.

It's UNKNOWN on reset. So unless OVMF is relying on whatever
is launching it to set SCTLR correctly (ie there is some part of
the "firmware-to-OVMF" contract it is relying on) then it seems to
me that it's OVMF's job to initialize it to what it needs. (Lots of
SCTLR is like that.)

Linux does this here:
 https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/kernel/head.S?h=v5.15-rc1#n485
 https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/include/asm/sysreg.h?h=v5.15-rc1#n695
because the INIT_SCTLR_EL1_MMU_OFF constant includes forcing
all "this kernel expects these to be RES0/RES1 because that's all
the architectural features we know about at this time" bits to
their RESn values.

But we can probably construct an argument for why having it set
makes sense, yes.

-- PMM


  reply	other threads:[~2021-09-16 16:34 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-15 18:10 [PATCH v11 00/10] hvf: Implement Apple Silicon Support Alexander Graf
2021-09-15 18:10 ` [PATCH v11 01/10] arm: Move PMC register definitions to cpu.h Alexander Graf
2021-09-16 10:38   ` Peter Maydell
2021-09-15 18:10 ` [PATCH v11 02/10] hvf: Add execute to dirty log permission bitmap Alexander Graf
2021-09-16 11:59   ` Peter Maydell
2021-09-16 14:04     ` Alexander Graf
2021-09-16 14:05       ` Peter Maydell
2021-09-15 18:10 ` [PATCH v11 03/10] hvf: Introduce hvf_arch_init() callback Alexander Graf
2021-09-16 10:45   ` Peter Maydell
2021-09-15 18:10 ` [PATCH v11 04/10] hvf: Add Apple Silicon support Alexander Graf
2021-09-16 12:16   ` Peter Maydell
2021-09-15 18:10 ` [PATCH v11 05/10] arm/hvf: Add a WFI handler Alexander Graf
2021-09-16  4:49   ` Philippe Mathieu-Daudé
2021-09-16 15:02     ` Alexander Graf
2021-09-16 12:18   ` Peter Maydell
2021-09-15 18:10 ` [PATCH v11 06/10] hvf: arm: Implement -cpu host Alexander Graf
2021-09-16 12:24   ` Peter Maydell
2021-09-16 15:30     ` Alexander Graf
2021-09-16 15:55       ` Peter Maydell [this message]
2021-09-16 16:05         ` Ard Biesheuvel
2021-09-16 16:16           ` Peter Maydell
2021-09-22 11:41             ` Ard Biesheuvel
2021-09-22 12:44               ` Peter Maydell
2021-09-22 16:10                 ` Ard Biesheuvel
2021-09-16 17:47         ` Alexander Graf
2021-09-15 18:10 ` [PATCH v11 07/10] hvf: arm: Implement PSCI handling Alexander Graf
2021-09-16 12:27   ` Peter Maydell
2021-09-15 18:10 ` [PATCH v11 08/10] arm: Add Hypervisor.framework build target Alexander Graf
2021-09-15 18:10 ` [PATCH v11 09/10] hvf: arm: Add rudimentary PMC support Alexander Graf
2021-09-16 12:32   ` Peter Maydell
2021-09-15 18:10 ` [PATCH v11 10/10] arm: tcg: Adhere to SMCCC 1.3 section 5.2 Alexander Graf
2021-09-16 12:29   ` Peter Maydell

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