From: Enric Balletbo Serra <eballetbo@gmail.com>
To: Elaine Zhang <zhangqing@rock-chips.com>
Cc: "Rob Herring" <robh+dt@kernel.org>,
"Heiko Stübner" <heiko@sntech.de>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"Linux ARM" <linux-arm-kernel@lists.infradead.org>,
"open list:ARM/Rockchip SoC..."
<linux-rockchip@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
cl@rock-chips.com, huangtao@rock-chips.com,
kever.yang@rock-chips.com, tony.xie@rock-chips.com,
finley.xiao@rock-chips.com
Subject: Re: [PATCH v5 06/11] arm64: dts: rockchip: Fix power-controller node names for rk3399
Date: Fri, 26 Mar 2021 10:42:07 +0100 [thread overview]
Message-ID: <CAFqH_51sGjbyVLoPxTRby50uvWinX=2TVX3hK8KB_t71F-RyjA@mail.gmail.com> (raw)
In-Reply-To: <20210326091726.12531-1-zhangqing@rock-chips.com>
Missatge de Elaine Zhang <zhangqing@rock-chips.com> del dia dv., 26 de
març 2021 a les 10:18:
>
> Use more generic names (as recommended in the device tree specification
> or the binding documentation)
>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> ---
> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 40 ++++++++++++------------
> 1 file changed, 20 insertions(+), 20 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index edbbf35fe19e..142f5593d48b 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -971,26 +971,26 @@
> #size-cells = <0>;
>
> /* These power domains are grouped by VD_CENTER */
> - pd_iep@RK3399_PD_IEP {
> + power-domain@RK3399_PD_IEP {
> reg = <RK3399_PD_IEP>;
> clocks = <&cru ACLK_IEP>,
> <&cru HCLK_IEP>;
> pm_qos = <&qos_iep>;
> };
> - pd_rga@RK3399_PD_RGA {
> + power-domain@RK3399_PD_RGA {
> reg = <RK3399_PD_RGA>;
> clocks = <&cru ACLK_RGA>,
> <&cru HCLK_RGA>;
> pm_qos = <&qos_rga_r>,
> <&qos_rga_w>;
> };
> - pd_vcodec@RK3399_PD_VCODEC {
> + power-domain@RK3399_PD_VCODEC {
> reg = <RK3399_PD_VCODEC>;
> clocks = <&cru ACLK_VCODEC>,
> <&cru HCLK_VCODEC>;
> pm_qos = <&qos_video_m0>;
> };
> - pd_vdu@RK3399_PD_VDU {
> + power-domain@RK3399_PD_VDU {
> reg = <RK3399_PD_VDU>;
> clocks = <&cru ACLK_VDU>,
> <&cru HCLK_VDU>;
> @@ -999,94 +999,94 @@
> };
>
> /* These power domains are grouped by VD_GPU */
> - pd_gpu@RK3399_PD_GPU {
> + power-domain@RK3399_PD_GPU {
> reg = <RK3399_PD_GPU>;
> clocks = <&cru ACLK_GPU>;
> pm_qos = <&qos_gpu>;
> };
>
> /* These power domains are grouped by VD_LOGIC */
> - pd_edp@RK3399_PD_EDP {
> + power-domain@RK3399_PD_EDP {
> reg = <RK3399_PD_EDP>;
> clocks = <&cru PCLK_EDP_CTRL>;
> };
> - pd_emmc@RK3399_PD_EMMC {
> + power-domain@RK3399_PD_EMMC {
> reg = <RK3399_PD_EMMC>;
> clocks = <&cru ACLK_EMMC>;
> pm_qos = <&qos_emmc>;
> };
> - pd_gmac@RK3399_PD_GMAC {
> + power-domain@RK3399_PD_GMAC {
> reg = <RK3399_PD_GMAC>;
> clocks = <&cru ACLK_GMAC>,
> <&cru PCLK_GMAC>;
> pm_qos = <&qos_gmac>;
> };
> - pd_sd@RK3399_PD_SD {
> + power-domain@RK3399_PD_SD {
> reg = <RK3399_PD_SD>;
> clocks = <&cru HCLK_SDMMC>,
> <&cru SCLK_SDMMC>;
> pm_qos = <&qos_sd>;
> };
> - pd_sdioaudio@RK3399_PD_SDIOAUDIO {
> + power-domain@RK3399_PD_SDIOAUDIO {
> reg = <RK3399_PD_SDIOAUDIO>;
> clocks = <&cru HCLK_SDIO>;
> pm_qos = <&qos_sdioaudio>;
> };
> - pd_tcpc0@RK3399_PD_TCPD0 {
> + power-domain@RK3399_PD_TCPD0 {
> reg = <RK3399_PD_TCPD0>;
> clocks = <&cru SCLK_UPHY0_TCPDCORE>,
> <&cru SCLK_UPHY0_TCPDPHY_REF>;
> };
> - pd_tcpc1@RK3399_PD_TCPD1 {
> + power-domain@RK3399_PD_TCPD1 {
> reg = <RK3399_PD_TCPD1>;
> clocks = <&cru SCLK_UPHY1_TCPDCORE>,
> <&cru SCLK_UPHY1_TCPDPHY_REF>;
> };
> - pd_usb3@RK3399_PD_USB3 {
> + power-domain@RK3399_PD_USB3 {
> reg = <RK3399_PD_USB3>;
> clocks = <&cru ACLK_USB3>;
> pm_qos = <&qos_usb_otg0>,
> <&qos_usb_otg1>;
> };
> - pd_vio@RK3399_PD_VIO {
> + power-domain@RK3399_PD_VIO {
> reg = <RK3399_PD_VIO>;
> #address-cells = <1>;
> #size-cells = <0>;
>
> - pd_hdcp@RK3399_PD_HDCP {
> + power-domain@RK3399_PD_HDCP {
> reg = <RK3399_PD_HDCP>;
> clocks = <&cru ACLK_HDCP>,
> <&cru HCLK_HDCP>,
> <&cru PCLK_HDCP>;
> pm_qos = <&qos_hdcp>;
> };
> - pd_isp0@RK3399_PD_ISP0 {
> + power-domain@RK3399_PD_ISP0 {
> reg = <RK3399_PD_ISP0>;
> clocks = <&cru ACLK_ISP0>,
> <&cru HCLK_ISP0>;
> pm_qos = <&qos_isp0_m0>,
> <&qos_isp0_m1>;
> };
> - pd_isp1@RK3399_PD_ISP1 {
> + power-domain@RK3399_PD_ISP1 {
> reg = <RK3399_PD_ISP1>;
> clocks = <&cru ACLK_ISP1>,
> <&cru HCLK_ISP1>;
> pm_qos = <&qos_isp1_m0>,
> <&qos_isp1_m1>;
> };
> - pd_vo@RK3399_PD_VO {
> + power-domain@RK3399_PD_VO {
> reg = <RK3399_PD_VO>;
> #address-cells = <1>;
> #size-cells = <0>;
>
> - pd_vopb@RK3399_PD_VOPB {
> + power-domain@RK3399_PD_VOPB {
> reg = <RK3399_PD_VOPB>;
> clocks = <&cru ACLK_VOP0>,
> <&cru HCLK_VOP0>;
> pm_qos = <&qos_vop_big_r>,
> <&qos_vop_big_w>;
> };
> - pd_vopl@RK3399_PD_VOPL {
> + power-domain@RK3399_PD_VOPL {
> reg = <RK3399_PD_VOPL>;
> clocks = <&cru ACLK_VOP1>,
> <&cru HCLK_VOP1>;
> --
> 2.17.1
>
>
>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Enric Balletbo Serra <eballetbo@gmail.com>
To: Elaine Zhang <zhangqing@rock-chips.com>
Cc: "Rob Herring" <robh+dt@kernel.org>,
"Heiko Stübner" <heiko@sntech.de>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"Linux ARM" <linux-arm-kernel@lists.infradead.org>,
"open list:ARM/Rockchip SoC..."
<linux-rockchip@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
cl@rock-chips.com, huangtao@rock-chips.com,
kever.yang@rock-chips.com, tony.xie@rock-chips.com,
finley.xiao@rock-chips.com
Subject: Re: [PATCH v5 06/11] arm64: dts: rockchip: Fix power-controller node names for rk3399
Date: Fri, 26 Mar 2021 10:42:07 +0100 [thread overview]
Message-ID: <CAFqH_51sGjbyVLoPxTRby50uvWinX=2TVX3hK8KB_t71F-RyjA@mail.gmail.com> (raw)
In-Reply-To: <20210326091726.12531-1-zhangqing@rock-chips.com>
Missatge de Elaine Zhang <zhangqing@rock-chips.com> del dia dv., 26 de
març 2021 a les 10:18:
>
> Use more generic names (as recommended in the device tree specification
> or the binding documentation)
>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> ---
> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 40 ++++++++++++------------
> 1 file changed, 20 insertions(+), 20 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index edbbf35fe19e..142f5593d48b 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -971,26 +971,26 @@
> #size-cells = <0>;
>
> /* These power domains are grouped by VD_CENTER */
> - pd_iep@RK3399_PD_IEP {
> + power-domain@RK3399_PD_IEP {
> reg = <RK3399_PD_IEP>;
> clocks = <&cru ACLK_IEP>,
> <&cru HCLK_IEP>;
> pm_qos = <&qos_iep>;
> };
> - pd_rga@RK3399_PD_RGA {
> + power-domain@RK3399_PD_RGA {
> reg = <RK3399_PD_RGA>;
> clocks = <&cru ACLK_RGA>,
> <&cru HCLK_RGA>;
> pm_qos = <&qos_rga_r>,
> <&qos_rga_w>;
> };
> - pd_vcodec@RK3399_PD_VCODEC {
> + power-domain@RK3399_PD_VCODEC {
> reg = <RK3399_PD_VCODEC>;
> clocks = <&cru ACLK_VCODEC>,
> <&cru HCLK_VCODEC>;
> pm_qos = <&qos_video_m0>;
> };
> - pd_vdu@RK3399_PD_VDU {
> + power-domain@RK3399_PD_VDU {
> reg = <RK3399_PD_VDU>;
> clocks = <&cru ACLK_VDU>,
> <&cru HCLK_VDU>;
> @@ -999,94 +999,94 @@
> };
>
> /* These power domains are grouped by VD_GPU */
> - pd_gpu@RK3399_PD_GPU {
> + power-domain@RK3399_PD_GPU {
> reg = <RK3399_PD_GPU>;
> clocks = <&cru ACLK_GPU>;
> pm_qos = <&qos_gpu>;
> };
>
> /* These power domains are grouped by VD_LOGIC */
> - pd_edp@RK3399_PD_EDP {
> + power-domain@RK3399_PD_EDP {
> reg = <RK3399_PD_EDP>;
> clocks = <&cru PCLK_EDP_CTRL>;
> };
> - pd_emmc@RK3399_PD_EMMC {
> + power-domain@RK3399_PD_EMMC {
> reg = <RK3399_PD_EMMC>;
> clocks = <&cru ACLK_EMMC>;
> pm_qos = <&qos_emmc>;
> };
> - pd_gmac@RK3399_PD_GMAC {
> + power-domain@RK3399_PD_GMAC {
> reg = <RK3399_PD_GMAC>;
> clocks = <&cru ACLK_GMAC>,
> <&cru PCLK_GMAC>;
> pm_qos = <&qos_gmac>;
> };
> - pd_sd@RK3399_PD_SD {
> + power-domain@RK3399_PD_SD {
> reg = <RK3399_PD_SD>;
> clocks = <&cru HCLK_SDMMC>,
> <&cru SCLK_SDMMC>;
> pm_qos = <&qos_sd>;
> };
> - pd_sdioaudio@RK3399_PD_SDIOAUDIO {
> + power-domain@RK3399_PD_SDIOAUDIO {
> reg = <RK3399_PD_SDIOAUDIO>;
> clocks = <&cru HCLK_SDIO>;
> pm_qos = <&qos_sdioaudio>;
> };
> - pd_tcpc0@RK3399_PD_TCPD0 {
> + power-domain@RK3399_PD_TCPD0 {
> reg = <RK3399_PD_TCPD0>;
> clocks = <&cru SCLK_UPHY0_TCPDCORE>,
> <&cru SCLK_UPHY0_TCPDPHY_REF>;
> };
> - pd_tcpc1@RK3399_PD_TCPD1 {
> + power-domain@RK3399_PD_TCPD1 {
> reg = <RK3399_PD_TCPD1>;
> clocks = <&cru SCLK_UPHY1_TCPDCORE>,
> <&cru SCLK_UPHY1_TCPDPHY_REF>;
> };
> - pd_usb3@RK3399_PD_USB3 {
> + power-domain@RK3399_PD_USB3 {
> reg = <RK3399_PD_USB3>;
> clocks = <&cru ACLK_USB3>;
> pm_qos = <&qos_usb_otg0>,
> <&qos_usb_otg1>;
> };
> - pd_vio@RK3399_PD_VIO {
> + power-domain@RK3399_PD_VIO {
> reg = <RK3399_PD_VIO>;
> #address-cells = <1>;
> #size-cells = <0>;
>
> - pd_hdcp@RK3399_PD_HDCP {
> + power-domain@RK3399_PD_HDCP {
> reg = <RK3399_PD_HDCP>;
> clocks = <&cru ACLK_HDCP>,
> <&cru HCLK_HDCP>,
> <&cru PCLK_HDCP>;
> pm_qos = <&qos_hdcp>;
> };
> - pd_isp0@RK3399_PD_ISP0 {
> + power-domain@RK3399_PD_ISP0 {
> reg = <RK3399_PD_ISP0>;
> clocks = <&cru ACLK_ISP0>,
> <&cru HCLK_ISP0>;
> pm_qos = <&qos_isp0_m0>,
> <&qos_isp0_m1>;
> };
> - pd_isp1@RK3399_PD_ISP1 {
> + power-domain@RK3399_PD_ISP1 {
> reg = <RK3399_PD_ISP1>;
> clocks = <&cru ACLK_ISP1>,
> <&cru HCLK_ISP1>;
> pm_qos = <&qos_isp1_m0>,
> <&qos_isp1_m1>;
> };
> - pd_vo@RK3399_PD_VO {
> + power-domain@RK3399_PD_VO {
> reg = <RK3399_PD_VO>;
> #address-cells = <1>;
> #size-cells = <0>;
>
> - pd_vopb@RK3399_PD_VOPB {
> + power-domain@RK3399_PD_VOPB {
> reg = <RK3399_PD_VOPB>;
> clocks = <&cru ACLK_VOP0>,
> <&cru HCLK_VOP0>;
> pm_qos = <&qos_vop_big_r>,
> <&qos_vop_big_w>;
> };
> - pd_vopl@RK3399_PD_VOPL {
> + power-domain@RK3399_PD_VOPL {
> reg = <RK3399_PD_VOPL>;
> clocks = <&cru ACLK_VOP1>,
> <&cru HCLK_VOP1>;
> --
> 2.17.1
>
>
>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Enric Balletbo Serra <eballetbo@gmail.com>
To: Elaine Zhang <zhangqing@rock-chips.com>
Cc: "Rob Herring" <robh+dt@kernel.org>,
"Heiko Stübner" <heiko@sntech.de>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"Linux ARM" <linux-arm-kernel@lists.infradead.org>,
"open list:ARM/Rockchip SoC..."
<linux-rockchip@lists.infradead.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
cl@rock-chips.com, huangtao@rock-chips.com,
kever.yang@rock-chips.com, tony.xie@rock-chips.com,
finley.xiao@rock-chips.com
Subject: Re: [PATCH v5 06/11] arm64: dts: rockchip: Fix power-controller node names for rk3399
Date: Fri, 26 Mar 2021 10:42:07 +0100 [thread overview]
Message-ID: <CAFqH_51sGjbyVLoPxTRby50uvWinX=2TVX3hK8KB_t71F-RyjA@mail.gmail.com> (raw)
In-Reply-To: <20210326091726.12531-1-zhangqing@rock-chips.com>
Missatge de Elaine Zhang <zhangqing@rock-chips.com> del dia dv., 26 de
març 2021 a les 10:18:
>
> Use more generic names (as recommended in the device tree specification
> or the binding documentation)
>
> Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
> ---
> arch/arm64/boot/dts/rockchip/rk3399.dtsi | 40 ++++++++++++------------
> 1 file changed, 20 insertions(+), 20 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> index edbbf35fe19e..142f5593d48b 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
> @@ -971,26 +971,26 @@
> #size-cells = <0>;
>
> /* These power domains are grouped by VD_CENTER */
> - pd_iep@RK3399_PD_IEP {
> + power-domain@RK3399_PD_IEP {
> reg = <RK3399_PD_IEP>;
> clocks = <&cru ACLK_IEP>,
> <&cru HCLK_IEP>;
> pm_qos = <&qos_iep>;
> };
> - pd_rga@RK3399_PD_RGA {
> + power-domain@RK3399_PD_RGA {
> reg = <RK3399_PD_RGA>;
> clocks = <&cru ACLK_RGA>,
> <&cru HCLK_RGA>;
> pm_qos = <&qos_rga_r>,
> <&qos_rga_w>;
> };
> - pd_vcodec@RK3399_PD_VCODEC {
> + power-domain@RK3399_PD_VCODEC {
> reg = <RK3399_PD_VCODEC>;
> clocks = <&cru ACLK_VCODEC>,
> <&cru HCLK_VCODEC>;
> pm_qos = <&qos_video_m0>;
> };
> - pd_vdu@RK3399_PD_VDU {
> + power-domain@RK3399_PD_VDU {
> reg = <RK3399_PD_VDU>;
> clocks = <&cru ACLK_VDU>,
> <&cru HCLK_VDU>;
> @@ -999,94 +999,94 @@
> };
>
> /* These power domains are grouped by VD_GPU */
> - pd_gpu@RK3399_PD_GPU {
> + power-domain@RK3399_PD_GPU {
> reg = <RK3399_PD_GPU>;
> clocks = <&cru ACLK_GPU>;
> pm_qos = <&qos_gpu>;
> };
>
> /* These power domains are grouped by VD_LOGIC */
> - pd_edp@RK3399_PD_EDP {
> + power-domain@RK3399_PD_EDP {
> reg = <RK3399_PD_EDP>;
> clocks = <&cru PCLK_EDP_CTRL>;
> };
> - pd_emmc@RK3399_PD_EMMC {
> + power-domain@RK3399_PD_EMMC {
> reg = <RK3399_PD_EMMC>;
> clocks = <&cru ACLK_EMMC>;
> pm_qos = <&qos_emmc>;
> };
> - pd_gmac@RK3399_PD_GMAC {
> + power-domain@RK3399_PD_GMAC {
> reg = <RK3399_PD_GMAC>;
> clocks = <&cru ACLK_GMAC>,
> <&cru PCLK_GMAC>;
> pm_qos = <&qos_gmac>;
> };
> - pd_sd@RK3399_PD_SD {
> + power-domain@RK3399_PD_SD {
> reg = <RK3399_PD_SD>;
> clocks = <&cru HCLK_SDMMC>,
> <&cru SCLK_SDMMC>;
> pm_qos = <&qos_sd>;
> };
> - pd_sdioaudio@RK3399_PD_SDIOAUDIO {
> + power-domain@RK3399_PD_SDIOAUDIO {
> reg = <RK3399_PD_SDIOAUDIO>;
> clocks = <&cru HCLK_SDIO>;
> pm_qos = <&qos_sdioaudio>;
> };
> - pd_tcpc0@RK3399_PD_TCPD0 {
> + power-domain@RK3399_PD_TCPD0 {
> reg = <RK3399_PD_TCPD0>;
> clocks = <&cru SCLK_UPHY0_TCPDCORE>,
> <&cru SCLK_UPHY0_TCPDPHY_REF>;
> };
> - pd_tcpc1@RK3399_PD_TCPD1 {
> + power-domain@RK3399_PD_TCPD1 {
> reg = <RK3399_PD_TCPD1>;
> clocks = <&cru SCLK_UPHY1_TCPDCORE>,
> <&cru SCLK_UPHY1_TCPDPHY_REF>;
> };
> - pd_usb3@RK3399_PD_USB3 {
> + power-domain@RK3399_PD_USB3 {
> reg = <RK3399_PD_USB3>;
> clocks = <&cru ACLK_USB3>;
> pm_qos = <&qos_usb_otg0>,
> <&qos_usb_otg1>;
> };
> - pd_vio@RK3399_PD_VIO {
> + power-domain@RK3399_PD_VIO {
> reg = <RK3399_PD_VIO>;
> #address-cells = <1>;
> #size-cells = <0>;
>
> - pd_hdcp@RK3399_PD_HDCP {
> + power-domain@RK3399_PD_HDCP {
> reg = <RK3399_PD_HDCP>;
> clocks = <&cru ACLK_HDCP>,
> <&cru HCLK_HDCP>,
> <&cru PCLK_HDCP>;
> pm_qos = <&qos_hdcp>;
> };
> - pd_isp0@RK3399_PD_ISP0 {
> + power-domain@RK3399_PD_ISP0 {
> reg = <RK3399_PD_ISP0>;
> clocks = <&cru ACLK_ISP0>,
> <&cru HCLK_ISP0>;
> pm_qos = <&qos_isp0_m0>,
> <&qos_isp0_m1>;
> };
> - pd_isp1@RK3399_PD_ISP1 {
> + power-domain@RK3399_PD_ISP1 {
> reg = <RK3399_PD_ISP1>;
> clocks = <&cru ACLK_ISP1>,
> <&cru HCLK_ISP1>;
> pm_qos = <&qos_isp1_m0>,
> <&qos_isp1_m1>;
> };
> - pd_vo@RK3399_PD_VO {
> + power-domain@RK3399_PD_VO {
> reg = <RK3399_PD_VO>;
> #address-cells = <1>;
> #size-cells = <0>;
>
> - pd_vopb@RK3399_PD_VOPB {
> + power-domain@RK3399_PD_VOPB {
> reg = <RK3399_PD_VOPB>;
> clocks = <&cru ACLK_VOP0>,
> <&cru HCLK_VOP0>;
> pm_qos = <&qos_vop_big_r>,
> <&qos_vop_big_w>;
> };
> - pd_vopl@RK3399_PD_VOPL {
> + power-domain@RK3399_PD_VOPL {
> reg = <RK3399_PD_VOPL>;
> clocks = <&cru ACLK_VOP1>,
> <&cru HCLK_VOP1>;
> --
> 2.17.1
>
>
>
>
> _______________________________________________
> Linux-rockchip mailing list
> Linux-rockchip@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-rockchip
_______________________________________________
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next prev parent reply other threads:[~2021-03-26 9:43 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-03-26 9:15 [PATCH v5 00/11] soc: rockchip: power-domain: add rk3568 powerdomains Elaine Zhang
2021-03-26 9:15 ` Elaine Zhang
2021-03-26 9:15 ` Elaine Zhang
2021-03-26 9:15 ` [PATCH v5 01/11] arm: dts: rockchip: Fix power-controller node names for rk3066a Elaine Zhang
2021-03-26 9:15 ` Elaine Zhang
2021-03-26 9:15 ` Elaine Zhang
2021-03-26 9:40 ` Enric Balletbo Serra
2021-03-26 9:40 ` Enric Balletbo Serra
2021-03-26 9:40 ` Enric Balletbo Serra
2021-03-26 9:15 ` [PATCH v5 02/11] arm: dts: rockchip: Fix power-controller node names for rk3188 Elaine Zhang
2021-03-26 9:15 ` Elaine Zhang
2021-03-26 9:15 ` Elaine Zhang
2021-03-26 9:40 ` Enric Balletbo Serra
2021-03-26 9:40 ` Enric Balletbo Serra
2021-03-26 9:40 ` Enric Balletbo Serra
2021-03-26 9:15 ` [PATCH v5 03/11] arm: dts: rockchip: Fix power-controller node names for rk3288 Elaine Zhang
2021-03-26 9:15 ` Elaine Zhang
2021-03-26 9:15 ` Elaine Zhang
2021-03-26 9:40 ` Enric Balletbo Serra
2021-03-26 9:40 ` Enric Balletbo Serra
2021-03-26 9:40 ` Enric Balletbo Serra
2021-03-26 9:15 ` [PATCH v5 04/11] arm64: dts: rockchip: Fix power-controller node names for px30 Elaine Zhang
2021-03-26 9:15 ` Elaine Zhang
2021-03-26 9:15 ` Elaine Zhang
2021-03-26 9:41 ` Enric Balletbo Serra
2021-03-26 9:41 ` Enric Balletbo Serra
2021-03-26 9:41 ` Enric Balletbo Serra
2021-03-26 9:17 ` [PATCH v5 05/11] arm64: dts: rockchip: Fix power-controller node names for rk3328 Elaine Zhang
2021-03-26 9:17 ` Elaine Zhang
2021-03-26 9:17 ` Elaine Zhang
2021-03-26 9:41 ` Enric Balletbo Serra
2021-03-26 9:41 ` Enric Balletbo Serra
2021-03-26 9:41 ` Enric Balletbo Serra
2021-03-26 9:17 ` [PATCH v5 06/11] arm64: dts: rockchip: Fix power-controller node names for rk3399 Elaine Zhang
2021-03-26 9:17 ` Elaine Zhang
2021-03-26 9:17 ` Elaine Zhang
2021-03-26 9:42 ` Enric Balletbo Serra [this message]
2021-03-26 9:42 ` Enric Balletbo Serra
2021-03-26 9:42 ` Enric Balletbo Serra
2021-03-26 9:17 ` [PATCH v5 07/11] soc: rockchip: pm-domains: Add a meaningful power domain name Elaine Zhang
2021-03-26 9:17 ` Elaine Zhang
2021-03-26 9:17 ` Elaine Zhang
2021-03-26 9:49 ` Heiko Stübner
2021-03-26 9:49 ` Heiko Stübner
2021-03-26 9:49 ` Heiko Stübner
2021-03-26 9:17 ` [PATCH v5 08/11] dt-bindings: add power-domain header for RK3568 SoCs Elaine Zhang
2021-03-26 9:17 ` Elaine Zhang
2021-03-26 9:17 ` Elaine Zhang
2021-03-26 9:52 ` Enric Balletbo Serra
2021-03-26 9:52 ` Enric Balletbo Serra
2021-03-26 9:52 ` Enric Balletbo Serra
2021-03-26 9:18 ` [PATCH v5 09/11] dt-bindings: power: rockchip: Convert to json-schema Elaine Zhang
2021-03-26 9:18 ` Elaine Zhang
2021-03-26 9:18 ` Elaine Zhang
2021-03-26 9:51 ` Heiko Stübner
2021-03-26 9:51 ` Heiko Stübner
2021-03-26 9:51 ` Heiko Stübner
2021-03-26 9:18 ` [PATCH v5 10/11] dt-bindings: power: rockchip: Add bindings for RK3568 Soc Elaine Zhang
2021-03-26 9:18 ` Elaine Zhang
2021-03-26 9:18 ` Elaine Zhang
2021-03-26 9:51 ` Enric Balletbo Serra
2021-03-26 9:51 ` Enric Balletbo Serra
2021-03-26 9:51 ` Enric Balletbo Serra
2021-03-26 9:18 ` [PATCH v5 11/11] soc: rockchip: power-domain: add rk3568 powerdomains Elaine Zhang
2021-03-26 9:18 ` Elaine Zhang
2021-03-26 9:18 ` Elaine Zhang
2021-03-26 9:37 ` [RESEND PATCH v5 07/11] soc: rockchip: pm-domains: Add a meaningful power domain name Elaine Zhang
2021-03-26 9:37 ` Elaine Zhang
2021-03-26 9:37 ` Elaine Zhang
2021-03-26 9:52 ` Heiko Stübner
2021-03-26 9:52 ` Heiko Stübner
2021-03-26 9:52 ` Heiko Stübner
2021-03-26 10:02 ` Heiko Stübner
2021-03-26 10:02 ` Heiko Stübner
2021-03-26 10:02 ` Heiko Stübner
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