From: Alim Akhtar <alim.akhtar@gmail.com> To: Shaik Ameer Basha <shaik.ameer@samsung.com> Cc: "linux-samsung-soc@vger.kernel.org" <linux-samsung-soc@vger.kernel.org>, devicetree@vger.kernel.org, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, Kukjin Kim <kgene.kim@samsung.com>, Ameer Basha Shaik <shaik.samsung@gmail.com>, Mike Turquette <mturquette@linaro.org>, Tomasz Figa <tomasz.figa@gmail.com>, sunil joshi <joshi@samsung.com>, Rahul Sharma <r.sh.open@gmail.com>, Rahul Sharma <rahul.sharma@samsung.com> Subject: Re: [PATCH v3 05/16] clk: exynos5420: update clocks for G2D block Date: Mon, 28 Apr 2014 11:48:49 +0530 [thread overview] Message-ID: <CAGOxZ50rLg-0ebkcgDUMzWENrZiVUjYFEy-T6OxjO8imXbiTCQ@mail.gmail.com> (raw) In-Reply-To: <1398344632-18623-6-git-send-email-shaik.ameer@samsung.com> Hi Shaik, On Thu, Apr 24, 2014 at 6:33 PM, Shaik Ameer Basha <shaik.ameer@samsung.com> wrote: > Addign more G2D block clocks. > > Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com> > Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> > --- > drivers/clk/samsung/clk-exynos5420.c | 10 ++++++++++ > include/dt-bindings/clock/exynos5420.h | 3 +++ > 2 files changed, 13 insertions(+) > mode change 100644 => 100755 include/dt-bindings/clock/exynos5420.h > > diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c > index 9da85ac..ab07299 100755 > --- a/drivers/clk/samsung/clk-exynos5420.c > +++ b/drivers/clk/samsung/clk-exynos5420.c > @@ -815,6 +815,10 @@ static struct samsung_gate_clock exynos5420_gate_clks[] __initdata = { > GATE(CLK_ROTATOR, "rotator", "aclk266", GATE_IP_GEN, 1, 0, 0), > GATE(CLK_JPEG, "jpeg", "aclk300_jpeg", GATE_IP_GEN, 2, 0, 0), > GATE(CLK_JPEG2, "jpeg2", "aclk300_jpeg", GATE_IP_GEN, 3, 0, 0), > + GATE(CLK_MDMA0, "mdma0", "aclk266_g2d", > + GATE_IP_G2D, 1, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_SMMU_MDMA0, "smmu_mdma0", "aclk266_g2d", > + GATE_IP_G2D, 5, CLK_IGNORE_UNUSED, 0), > GATE(CLK_MDMA1, "mdma1", "aclk266", GATE_IP_GEN, 4, 0, 0), > GATE(CLK_SMMU_ROTATOR, "smmu_rotator", "aclk266", GATE_IP_GEN, 6, 0, 0), > GATE(CLK_SMMU_JPEG, "smmu_jpeg", "aclk300_jpeg", GATE_IP_GEN, 7, 0, 0), > @@ -842,6 +846,11 @@ static struct samsung_gate_clock exynos5420_gate_clks[] __initdata = { > "mout_user_aclk333_432_isp0", GATE_BUS_TOP, 5, 0, 0), > GATE(0, "aclk333_432_isp", > "mout_user_aclk333_432_isp", GATE_BUS_TOP, 8, 0, 0), > + /* G2D */ > + GATE(CLK_G2D, "g2d", "aclk333_g2d", > + GATE_IP_G2D, 3, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_SMMU_G2D, "smmu_g2d", "aclk333_g2d", > + GATE_IP_G2D, 7, CLK_IGNORE_UNUSED, 0), > /* ISP */ > GATE(0, "sclk_pwm_isp", "dout_pwm_isp", GATE_TOP_SCLK_ISP, 3, 0, 0), > GATE(0, "sclk_uart_isp", "dout_uart_isp", GATE_TOP_SCLK_ISP, 0, 0, 0), > @@ -858,6 +867,7 @@ static struct samsung_gate_clock exynos5420_gate_clks[] __initdata = { > > /* SSS */ > GATE(CLK_SSS, "sss", "aclk266_g2d", GATE_IP_G2D, 2, 0, 0), > + GATE(CLK_SMMU_SSS, "smmu_sss", "aclk266_g2d", GATE_IP_G2D, 6, 0, 0), Probably couple of G2D block clocks are still missing, can you please take a look? > }; > > static struct samsung_pll_clock exynos5420_plls[nr_plls] __initdata = { > diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h > old mode 100644 > new mode 100755 > index 223925f..6631dc1 > --- a/include/dt-bindings/clock/exynos5420.h > +++ b/include/dt-bindings/clock/exynos5420.h > @@ -175,6 +175,9 @@ > #define CLK_ACLK_G3D 500 > #define CLK_G3D 501 > #define CLK_SMMU_MIXER 502 > +#define CLK_SMMU_G2D 503 > +#define CLK_SMMU_MDMA0 504 > +#define CLK_SMMU_SSS 505 > > /* mux clocks */ > #define CLK_MOUT_HDMI 640 > -- > 1.7.9.5 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- Regards, Alim
WARNING: multiple messages have this Message-ID (diff)
From: alim.akhtar@gmail.com (Alim Akhtar) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v3 05/16] clk: exynos5420: update clocks for G2D block Date: Mon, 28 Apr 2014 11:48:49 +0530 [thread overview] Message-ID: <CAGOxZ50rLg-0ebkcgDUMzWENrZiVUjYFEy-T6OxjO8imXbiTCQ@mail.gmail.com> (raw) In-Reply-To: <1398344632-18623-6-git-send-email-shaik.ameer@samsung.com> Hi Shaik, On Thu, Apr 24, 2014 at 6:33 PM, Shaik Ameer Basha <shaik.ameer@samsung.com> wrote: > Addign more G2D block clocks. > > Signed-off-by: Rahul Sharma <rahul.sharma@samsung.com> > Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> > --- > drivers/clk/samsung/clk-exynos5420.c | 10 ++++++++++ > include/dt-bindings/clock/exynos5420.h | 3 +++ > 2 files changed, 13 insertions(+) > mode change 100644 => 100755 include/dt-bindings/clock/exynos5420.h > > diff --git a/drivers/clk/samsung/clk-exynos5420.c b/drivers/clk/samsung/clk-exynos5420.c > index 9da85ac..ab07299 100755 > --- a/drivers/clk/samsung/clk-exynos5420.c > +++ b/drivers/clk/samsung/clk-exynos5420.c > @@ -815,6 +815,10 @@ static struct samsung_gate_clock exynos5420_gate_clks[] __initdata = { > GATE(CLK_ROTATOR, "rotator", "aclk266", GATE_IP_GEN, 1, 0, 0), > GATE(CLK_JPEG, "jpeg", "aclk300_jpeg", GATE_IP_GEN, 2, 0, 0), > GATE(CLK_JPEG2, "jpeg2", "aclk300_jpeg", GATE_IP_GEN, 3, 0, 0), > + GATE(CLK_MDMA0, "mdma0", "aclk266_g2d", > + GATE_IP_G2D, 1, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_SMMU_MDMA0, "smmu_mdma0", "aclk266_g2d", > + GATE_IP_G2D, 5, CLK_IGNORE_UNUSED, 0), > GATE(CLK_MDMA1, "mdma1", "aclk266", GATE_IP_GEN, 4, 0, 0), > GATE(CLK_SMMU_ROTATOR, "smmu_rotator", "aclk266", GATE_IP_GEN, 6, 0, 0), > GATE(CLK_SMMU_JPEG, "smmu_jpeg", "aclk300_jpeg", GATE_IP_GEN, 7, 0, 0), > @@ -842,6 +846,11 @@ static struct samsung_gate_clock exynos5420_gate_clks[] __initdata = { > "mout_user_aclk333_432_isp0", GATE_BUS_TOP, 5, 0, 0), > GATE(0, "aclk333_432_isp", > "mout_user_aclk333_432_isp", GATE_BUS_TOP, 8, 0, 0), > + /* G2D */ > + GATE(CLK_G2D, "g2d", "aclk333_g2d", > + GATE_IP_G2D, 3, CLK_IGNORE_UNUSED, 0), > + GATE(CLK_SMMU_G2D, "smmu_g2d", "aclk333_g2d", > + GATE_IP_G2D, 7, CLK_IGNORE_UNUSED, 0), > /* ISP */ > GATE(0, "sclk_pwm_isp", "dout_pwm_isp", GATE_TOP_SCLK_ISP, 3, 0, 0), > GATE(0, "sclk_uart_isp", "dout_uart_isp", GATE_TOP_SCLK_ISP, 0, 0, 0), > @@ -858,6 +867,7 @@ static struct samsung_gate_clock exynos5420_gate_clks[] __initdata = { > > /* SSS */ > GATE(CLK_SSS, "sss", "aclk266_g2d", GATE_IP_G2D, 2, 0, 0), > + GATE(CLK_SMMU_SSS, "smmu_sss", "aclk266_g2d", GATE_IP_G2D, 6, 0, 0), Probably couple of G2D block clocks are still missing, can you please take a look? > }; > > static struct samsung_pll_clock exynos5420_plls[nr_plls] __initdata = { > diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h > old mode 100644 > new mode 100755 > index 223925f..6631dc1 > --- a/include/dt-bindings/clock/exynos5420.h > +++ b/include/dt-bindings/clock/exynos5420.h > @@ -175,6 +175,9 @@ > #define CLK_ACLK_G3D 500 > #define CLK_G3D 501 > #define CLK_SMMU_MIXER 502 > +#define CLK_SMMU_G2D 503 > +#define CLK_SMMU_MDMA0 504 > +#define CLK_SMMU_SSS 505 > > /* mux clocks */ > #define CLK_MOUT_HDMI 640 > -- > 1.7.9.5 > > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel at lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- Regards, Alim
next prev parent reply other threads:[~2014-04-28 6:18 UTC|newest] Thread overview: 90+ messages / expand[flat|nested] mbox.gz Atom feed top 2014-04-24 13:03 [PATCH v3 00/16] exynos5420: clock file cleanup Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha 2014-04-24 13:03 ` [PATCH v3 01/16] clk: exynos5420: rename parent clocks Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha 2014-04-30 11:08 ` Alim Akhtar 2014-04-30 11:08 ` Alim Akhtar 2014-05-01 7:15 ` Tushar Behera 2014-05-01 7:15 ` Tushar Behera 2014-05-01 17:39 ` Tomasz Figa 2014-05-01 17:39 ` Tomasz Figa [not found] ` <536286CE.2070609-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2014-05-05 5:28 ` Shaik Ameer Basha 2014-05-05 5:28 ` Shaik Ameer Basha 2014-05-05 5:53 ` Shaik Ameer Basha 2014-05-05 5:53 ` Shaik Ameer Basha 2014-04-24 13:03 ` [PATCH v3 02/16] clk: exynos5420: add clocks for ISP block Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha 2014-04-25 4:44 ` Alim Akhtar 2014-04-25 4:44 ` Alim Akhtar 2014-04-28 7:41 ` Shaik Ameer Basha 2014-04-28 7:41 ` Shaik Ameer Basha 2014-05-01 21:09 ` Tomasz Figa 2014-05-01 21:09 ` Tomasz Figa 2014-05-01 21:25 ` Tomasz Figa 2014-05-01 21:25 ` Tomasz Figa [not found] ` <5362BBC7.1080405-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2014-05-05 3:56 ` Shaik Ameer Basha 2014-05-05 3:56 ` Shaik Ameer Basha 2014-05-01 21:33 ` Tomasz Figa 2014-05-01 21:33 ` Tomasz Figa 2014-05-05 4:14 ` Shaik Ameer Basha 2014-05-05 4:14 ` Shaik Ameer Basha 2014-04-24 13:03 ` [PATCH v3 03/16] clk: exynos5420: update clocks for GSCL and MSCL blocks Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha 2014-04-28 6:01 ` Alim Akhtar 2014-04-28 6:01 ` Alim Akhtar 2014-04-24 13:03 ` [PATCH v3 04/16] clk: exynos5420: correct clock parents for mscl sysmmu Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha 2014-04-28 6:07 ` Alim Akhtar 2014-04-28 6:07 ` Alim Akhtar 2014-04-24 13:03 ` [PATCH v3 05/16] clk: exynos5420: update clocks for G2D block Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha 2014-04-28 6:18 ` Alim Akhtar [this message] 2014-04-28 6:18 ` Alim Akhtar 2014-04-24 13:03 ` [PATCH v3 06/16] clk: exynos5420: update clocks for DISP1 block Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha 2014-04-24 13:03 ` [PATCH v3 07/16] clk: exynos5420: update clocks for PERIC block Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha [not found] ` <1398344632-18623-8-git-send-email-shaik.ameer-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> 2014-04-30 11:15 ` Alim Akhtar 2014-04-30 11:15 ` Alim Akhtar 2014-04-24 13:03 ` [PATCH v3 08/16] clk: exynos5420: update clocks for PERIS and GEN blocks Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha 2014-04-30 11:26 ` Alim Akhtar 2014-04-30 11:26 ` Alim Akhtar 2014-04-30 15:41 ` Sachin Kamat 2014-04-30 15:41 ` Sachin Kamat 2014-04-24 13:03 ` [PATCH v3 09/16] clk: exynos5420: update clocks for WCORE block Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha 2014-04-30 11:45 ` Alim Akhtar 2014-04-30 11:45 ` Alim Akhtar 2014-04-24 13:03 ` [PATCH v3 10/16] clk: exynos5420: update clocks for FSYS and FSYS2 blocks Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha 2014-04-24 13:03 ` [PATCH v3 11/16] clk: exynos5420: correct sysmmu-mfc parent clocks Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha 2014-04-30 13:38 ` Alim Akhtar 2014-04-30 13:38 ` Alim Akhtar 2014-04-24 13:03 ` [PATCH v3 12/16] clk: exynos5420: fix register offset for sclk_bpll Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha 2014-04-30 13:46 ` Alim Akhtar 2014-04-30 13:46 ` Alim Akhtar 2014-04-30 15:37 ` Sachin Kamat 2014-04-30 15:37 ` Sachin Kamat 2014-04-24 13:03 ` [PATCH v3 13/16] clk: exynos5420: cleanup core and misc clocks Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha 2014-04-24 13:03 ` [PATCH v3 14/16] clk: exynos5420: correct g3d parent clock Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha 2014-04-24 13:03 ` [PATCH v3 15/16] clk: exynos5420: create clock ID for mout_sclk_vpll Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha 2014-04-30 13:54 ` Alim Akhtar 2014-04-30 13:54 ` Alim Akhtar 2014-04-24 13:03 ` [PATCH v3 16/16] clk: exynos5420: add more registers to restore list Shaik Ameer Basha 2014-04-24 13:03 ` Shaik Ameer Basha [not found] ` <1398344632-18623-17-git-send-email-shaik.ameer-Sze3O3UU22JBDgjK7y7TUQ@public.gmane.org> 2014-04-30 13:56 ` Alim Akhtar 2014-04-30 13:56 ` Alim Akhtar 2014-04-25 5:53 ` [PATCH v3 00/16] exynos5420: clock file cleanup Shaik Ameer Basha 2014-04-25 5:53 ` Shaik Ameer Basha 2014-05-01 21:11 ` Tomasz Figa 2014-05-01 21:11 ` Tomasz Figa 2014-05-01 21:28 ` Tomasz Figa 2014-05-01 21:28 ` Tomasz Figa [not found] ` <5362BC8A.6020609-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> 2014-05-05 4:40 ` Shaik Ameer Basha 2014-05-05 4:40 ` Shaik Ameer Basha
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