Re: [PATCH 3/8] drm/radeon: move IB pool to 1MB offset

From: Jerome Glisse <j.glisse@gmail.com>
To: "Christian König" <deathsimple@vodafone.de>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 3/8] drm/radeon: move IB pool to 1MB offset
Date: Tue, 11 Sep 2012 12:15:45 -0400	[thread overview]
Message-ID: <CAH3drwb79Gqw35WSkGCLjvUVi1tBjgbQC5FX9BGie1uZ2UtLMg@mail.gmail.com> (raw)
In-Reply-To: <1347372604-26557-3-git-send-email-deathsimple@vodafone.de>

On Tue, Sep 11, 2012 at 10:09 AM, Christian König
<deathsimple@vodafone.de> wrote:
> Even GPUs can have a null pointer dereference, so move
> the IB pool to another offset to catch those.

Reviewed-by: Jerome Glisse <jglisse@redhat.com>

>
> Signed-off-by: Christian König <deathsimple@vodafone.de>
> ---
>  drivers/gpu/drm/radeon/radeon.h      |    1 +
>  drivers/gpu/drm/radeon/radeon_gart.c |    2 +-
>  drivers/gpu/drm/radeon/radeon_ring.c |    6 +++---
>  3 files changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
> index d48bd30..55f17f9 100644
> --- a/drivers/gpu/drm/radeon/radeon.h
> +++ b/drivers/gpu/drm/radeon/radeon.h
> @@ -123,6 +123,7 @@ extern int radeon_lockup_timeout;
>  #define CAYMAN_RING_TYPE_CP2_INDEX             2
>
>  /* hardcode those limit for now */
> +#define RADEON_VA_IB_OFFSET                    (1 << 20)
>  #define RADEON_VA_RESERVED_SIZE                        (8 << 20)
>  #define RADEON_IB_VM_MAX_SIZE                  (64 << 10)
>
> diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c
> index 5694421..1b1c001 100644
> --- a/drivers/gpu/drm/radeon/radeon_gart.c
> +++ b/drivers/gpu/drm/radeon/radeon_gart.c
> @@ -980,7 +980,7 @@ int radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm)
>         /* map the ib pool buffer at 0 in virtual address space, set
>          * read only
>          */
> -       r = radeon_vm_bo_add(rdev, vm, rdev->ring_tmp_bo.bo, 0,
> +       r = radeon_vm_bo_add(rdev, vm, rdev->ring_tmp_bo.bo, RADEON_VA_IB_OFFSET,
>                              RADEON_VM_PAGE_READABLE | RADEON_VM_PAGE_SNOOPED);
>         return r;
>  }
> diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c
> index 993cf71..d90b0bc 100644
> --- a/drivers/gpu/drm/radeon/radeon_ring.c
> +++ b/drivers/gpu/drm/radeon/radeon_ring.c
> @@ -79,10 +79,10 @@ int radeon_ib_get(struct radeon_device *rdev, int ring,
>         ib->ptr = radeon_sa_bo_cpu_addr(ib->sa_bo);
>         ib->vm = vm;
>         if (vm) {
> -               /* ib pool is bind at 0 in virtual address space,
> -                * so gpu_addr is the offset inside the pool bo
> +               /* ib pool is bound at RADEON_VA_IB_OFFSET in virtual address
> +                * space and soffset is the offset inside the pool bo
>                  */
> -               ib->gpu_addr = ib->sa_bo->soffset;
> +               ib->gpu_addr = ib->sa_bo->soffset + RADEON_VA_IB_OFFSET;
>         } else {
>                 ib->gpu_addr = radeon_sa_bo_gpu_addr(ib->sa_bo);
>         }
> --
> 1.7.9.5
>
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