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From: Adam Ford <aford173@gmail.com>
To: Rob Herring <robh@kernel.org>
Cc: linux-media <linux-media@vger.kernel.org>,
	Abel Vesa <abel.vesa@nxp.com>,
	 Adam Ford-BE <aford@beaconembedded.com>,
	 Benjamin Gaignard <benjamin.gaignard@collabora.com>,
	Hans Verkuil <hverkuil-cisco@xs4all.nl>,
	 Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	 Mauro Carvalho Chehab <mchehab@kernel.org>,
	Shawn Guo <shawnguo@kernel.org>,
	 Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	 Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	 Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Lucas Stach <l.stach@pengutronix.de>,
	 "open list:HANTRO VPU CODEC DRIVER"
	<linux-rockchip@lists.infradead.org>,
	 devicetree <devicetree@vger.kernel.org>,
	arm-soc <linux-arm-kernel@lists.infradead.org>,
	 Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	 "open list:STAGING SUBSYSTEM" <linux-staging@lists.linux.dev>
Subject: Re: [PATCH V2 08/10] dt-bindings: media: nxp,imx8mq-vpu: Add support for G1 and G2 on imx8mm
Date: Thu, 16 Dec 2021 15:21:18 -0600	[thread overview]
Message-ID: <CAHCN7xLGeu4=CwqCv8BBowuQQ5t9iFDQV0adPNmy9dufW8soAg@mail.gmail.com> (raw)
In-Reply-To: <YbuqpayfYVPp1dTe@robh.at.kernel.org>

On Thu, Dec 16, 2021 at 3:07 PM Rob Herring <robh@kernel.org> wrote:
>
> On Thu, Dec 16, 2021 at 05:12:53AM -0600, Adam Ford wrote:
> > The i.MX8M mini appears to have a similar G1 and G2 decoder but the
> > post-procesing isn't present, so different compatible flags are requred.
>
> post-processing
>
> > Since all the other parameters are the same with imx8mq, just add
> > the new compatible flags to nxp,imx8mq-vpu.yaml.
> >
> > Signed-off-by: Adam Ford <aford173@gmail.com>
> >
> > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> > index c1e157251de7..b1f24c48c73b 100644
> > --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> > +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> > @@ -5,7 +5,7 @@
> >  $id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#"
> >  $schema: "http://devicetree.org/meta-schemas/core.yaml#"
> >
> > -title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ SoCs
> > +title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ/i.MX8MM SoCs
>
> Just 'i.MX8' so we don't have to change this everytime?

Are you OK with i.MX8M?  8MQ, 8MM, and 8MP all appear to have G1 and
G2 decoders.  The i.MX8 is different.
>
> >
> >  maintainers:
> >    - Philipp Zabel <p.zabel@pengutronix.de>
> > @@ -20,6 +20,8 @@ properties:
> >          deprecated: true
> >        - const: nxp,imx8mq-vpu-g1
> >        - const: nxp,imx8mq-vpu-g2
> > +      - const: nxp,imx8mm-vpu-g1
> > +      - const: nxp,imx8mm-vpu-g2
>
> Not compatible with the imx8mq variants?

No, the structures associated with these compatible flags telling the
driver what features are available have options for the post-processor
in the 8MQ which are not present in the 8MM.

>
> >
> >    reg:
> >      maxItems: 1
> > @@ -66,3 +68,27 @@ examples:
> >                  clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
> >                  power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
> >          };
> > +  - |
> > +        #include <dt-bindings/clock/imx8mm-clock.h>
> > +        #include <dt-bindings/power/imx8mm-power.h>
> > +        #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +        vpu_g1: video-codec@38300000 {
> > +                compatible = "nxp,imx8mm-vpu-g1";
> > +                reg = <0x38300000 0x10000>;
> > +                interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> > +                clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>;
> > +                power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G1>;
> > +        };
> > +  - |
> > +        #include <dt-bindings/clock/imx8mm-clock.h>
> > +        #include <dt-bindings/power/imx8mm-power.h>
> > +        #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +        vpu_g2: video-codec@38300000 {
> > +                compatible = "nxp,imx8mm-vpu-g2";
> > +                reg = <0x38310000 0x10000>;
> > +                interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > +                clocks = <&clk IMX8MM_CLK_VPU_G2_ROOT>;
> > +                power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G2>;
> > +        };
>
> No point in more examples just for a different compatible.

No problem.
>
> > --
> > 2.32.0
> >
> >

WARNING: multiple messages have this Message-ID (diff)
From: Adam Ford <aford173@gmail.com>
To: Rob Herring <robh@kernel.org>
Cc: linux-media <linux-media@vger.kernel.org>,
	Abel Vesa <abel.vesa@nxp.com>,
	 Adam Ford-BE <aford@beaconembedded.com>,
	 Benjamin Gaignard <benjamin.gaignard@collabora.com>,
	Hans Verkuil <hverkuil-cisco@xs4all.nl>,
	 Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	 Mauro Carvalho Chehab <mchehab@kernel.org>,
	Shawn Guo <shawnguo@kernel.org>,
	 Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	 Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	 Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Lucas Stach <l.stach@pengutronix.de>,
	 "open list:HANTRO VPU CODEC DRIVER"
	<linux-rockchip@lists.infradead.org>,
	 devicetree <devicetree@vger.kernel.org>,
	arm-soc <linux-arm-kernel@lists.infradead.org>,
	 Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	 "open list:STAGING SUBSYSTEM" <linux-staging@lists.linux.dev>
Subject: Re: [PATCH V2 08/10] dt-bindings: media: nxp, imx8mq-vpu: Add support for G1 and G2 on imx8mm
Date: Thu, 16 Dec 2021 15:21:18 -0600	[thread overview]
Message-ID: <CAHCN7xLGeu4=CwqCv8BBowuQQ5t9iFDQV0adPNmy9dufW8soAg@mail.gmail.com> (raw)
In-Reply-To: <YbuqpayfYVPp1dTe@robh.at.kernel.org>

On Thu, Dec 16, 2021 at 3:07 PM Rob Herring <robh@kernel.org> wrote:
>
> On Thu, Dec 16, 2021 at 05:12:53AM -0600, Adam Ford wrote:
> > The i.MX8M mini appears to have a similar G1 and G2 decoder but the
> > post-procesing isn't present, so different compatible flags are requred.
>
> post-processing
>
> > Since all the other parameters are the same with imx8mq, just add
> > the new compatible flags to nxp,imx8mq-vpu.yaml.
> >
> > Signed-off-by: Adam Ford <aford173@gmail.com>
> >
> > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> > index c1e157251de7..b1f24c48c73b 100644
> > --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> > +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> > @@ -5,7 +5,7 @@
> >  $id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#"
> >  $schema: "http://devicetree.org/meta-schemas/core.yaml#"
> >
> > -title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ SoCs
> > +title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ/i.MX8MM SoCs
>
> Just 'i.MX8' so we don't have to change this everytime?

Are you OK with i.MX8M?  8MQ, 8MM, and 8MP all appear to have G1 and
G2 decoders.  The i.MX8 is different.
>
> >
> >  maintainers:
> >    - Philipp Zabel <p.zabel@pengutronix.de>
> > @@ -20,6 +20,8 @@ properties:
> >          deprecated: true
> >        - const: nxp,imx8mq-vpu-g1
> >        - const: nxp,imx8mq-vpu-g2
> > +      - const: nxp,imx8mm-vpu-g1
> > +      - const: nxp,imx8mm-vpu-g2
>
> Not compatible with the imx8mq variants?

No, the structures associated with these compatible flags telling the
driver what features are available have options for the post-processor
in the 8MQ which are not present in the 8MM.

>
> >
> >    reg:
> >      maxItems: 1
> > @@ -66,3 +68,27 @@ examples:
> >                  clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
> >                  power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
> >          };
> > +  - |
> > +        #include <dt-bindings/clock/imx8mm-clock.h>
> > +        #include <dt-bindings/power/imx8mm-power.h>
> > +        #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +        vpu_g1: video-codec@38300000 {
> > +                compatible = "nxp,imx8mm-vpu-g1";
> > +                reg = <0x38300000 0x10000>;
> > +                interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> > +                clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>;
> > +                power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G1>;
> > +        };
> > +  - |
> > +        #include <dt-bindings/clock/imx8mm-clock.h>
> > +        #include <dt-bindings/power/imx8mm-power.h>
> > +        #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +        vpu_g2: video-codec@38300000 {
> > +                compatible = "nxp,imx8mm-vpu-g2";
> > +                reg = <0x38310000 0x10000>;
> > +                interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > +                clocks = <&clk IMX8MM_CLK_VPU_G2_ROOT>;
> > +                power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G2>;
> > +        };
>
> No point in more examples just for a different compatible.

No problem.
>
> > --
> > 2.32.0
> >
> >

_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)
From: Adam Ford <aford173@gmail.com>
To: Rob Herring <robh@kernel.org>
Cc: linux-media <linux-media@vger.kernel.org>,
	Abel Vesa <abel.vesa@nxp.com>,
	 Adam Ford-BE <aford@beaconembedded.com>,
	 Benjamin Gaignard <benjamin.gaignard@collabora.com>,
	Hans Verkuil <hverkuil-cisco@xs4all.nl>,
	 Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	 Mauro Carvalho Chehab <mchehab@kernel.org>,
	Shawn Guo <shawnguo@kernel.org>,
	 Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	 Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	 Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Lucas Stach <l.stach@pengutronix.de>,
	 "open list:HANTRO VPU CODEC DRIVER"
	<linux-rockchip@lists.infradead.org>,
	 devicetree <devicetree@vger.kernel.org>,
	arm-soc <linux-arm-kernel@lists.infradead.org>,
	 Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	 "open list:STAGING SUBSYSTEM" <linux-staging@lists.linux.dev>
Subject: Re: [PATCH V2 08/10] dt-bindings: media: nxp, imx8mq-vpu: Add support for G1 and G2 on imx8mm
Date: Thu, 16 Dec 2021 15:21:18 -0600	[thread overview]
Message-ID: <CAHCN7xLGeu4=CwqCv8BBowuQQ5t9iFDQV0adPNmy9dufW8soAg@mail.gmail.com> (raw)
In-Reply-To: <YbuqpayfYVPp1dTe@robh.at.kernel.org>

On Thu, Dec 16, 2021 at 3:07 PM Rob Herring <robh@kernel.org> wrote:
>
> On Thu, Dec 16, 2021 at 05:12:53AM -0600, Adam Ford wrote:
> > The i.MX8M mini appears to have a similar G1 and G2 decoder but the
> > post-procesing isn't present, so different compatible flags are requred.
>
> post-processing
>
> > Since all the other parameters are the same with imx8mq, just add
> > the new compatible flags to nxp,imx8mq-vpu.yaml.
> >
> > Signed-off-by: Adam Ford <aford173@gmail.com>
> >
> > diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> > index c1e157251de7..b1f24c48c73b 100644
> > --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> > +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml
> > @@ -5,7 +5,7 @@
> >  $id: "http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#"
> >  $schema: "http://devicetree.org/meta-schemas/core.yaml#"
> >
> > -title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ SoCs
> > +title: Hantro G1/G2 VPU codecs implemented on i.MX8MQ/i.MX8MM SoCs
>
> Just 'i.MX8' so we don't have to change this everytime?

Are you OK with i.MX8M?  8MQ, 8MM, and 8MP all appear to have G1 and
G2 decoders.  The i.MX8 is different.
>
> >
> >  maintainers:
> >    - Philipp Zabel <p.zabel@pengutronix.de>
> > @@ -20,6 +20,8 @@ properties:
> >          deprecated: true
> >        - const: nxp,imx8mq-vpu-g1
> >        - const: nxp,imx8mq-vpu-g2
> > +      - const: nxp,imx8mm-vpu-g1
> > +      - const: nxp,imx8mm-vpu-g2
>
> Not compatible with the imx8mq variants?

No, the structures associated with these compatible flags telling the
driver what features are available have options for the post-processor
in the 8MQ which are not present in the 8MM.

>
> >
> >    reg:
> >      maxItems: 1
> > @@ -66,3 +68,27 @@ examples:
> >                  clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
> >                  power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
> >          };
> > +  - |
> > +        #include <dt-bindings/clock/imx8mm-clock.h>
> > +        #include <dt-bindings/power/imx8mm-power.h>
> > +        #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +        vpu_g1: video-codec@38300000 {
> > +                compatible = "nxp,imx8mm-vpu-g1";
> > +                reg = <0x38300000 0x10000>;
> > +                interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
> > +                clocks = <&clk IMX8MM_CLK_VPU_G1_ROOT>;
> > +                power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G1>;
> > +        };
> > +  - |
> > +        #include <dt-bindings/clock/imx8mm-clock.h>
> > +        #include <dt-bindings/power/imx8mm-power.h>
> > +        #include <dt-bindings/interrupt-controller/arm-gic.h>
> > +
> > +        vpu_g2: video-codec@38300000 {
> > +                compatible = "nxp,imx8mm-vpu-g2";
> > +                reg = <0x38310000 0x10000>;
> > +                interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
> > +                clocks = <&clk IMX8MM_CLK_VPU_G2_ROOT>;
> > +                power-domains = <&vpu_blk_ctrl IMX8MM_VPUBLK_PD_G2>;
> > +        };
>
> No point in more examples just for a different compatible.

No problem.
>
> > --
> > 2.32.0
> >
> >

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-12-16 21:21 UTC|newest]

Thread overview: 66+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-16 11:12 [PATCH V2 00/10] media: hantro: imx8mq/imx8mm: Let VPU decoders get controlled by vpu-blk-ctrl Adam Ford
2021-12-16 11:12 ` Adam Ford
2021-12-16 11:12 ` Adam Ford
2021-12-16 11:12 ` [PATCH V2 01/10] dt-bindings: power: imx8mq: add defines for VPU blk-ctrl domains Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 21:04   ` Rob Herring
2021-12-16 21:04     ` Rob Herring
2021-12-16 21:04     ` Rob Herring
2021-12-16 11:12 ` [PATCH V2 02/10] dt-bindings: soc: add binding for i.MX8MQ VPU blk-ctrl Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 21:05   ` Rob Herring
2021-12-16 21:05     ` Rob Herring
2021-12-16 21:05     ` Rob Herring
2021-12-16 11:12 ` [PATCH V2 03/10] soc: imx: imx8m-blk-ctrl: add " Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 11:12 ` [PATCH V2 04/10] dt-bindings: media: nxp,imx8mq-vpu: Split G1 and G2 nodes Adam Ford
2021-12-16 11:12   ` [PATCH V2 04/10] dt-bindings: media: nxp, imx8mq-vpu: " Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 13:53   ` [PATCH V2 04/10] dt-bindings: media: nxp,imx8mq-vpu: " Rob Herring
2021-12-16 13:53     ` [PATCH V2 04/10] dt-bindings: media: nxp, imx8mq-vpu: " Rob Herring
2021-12-16 13:53     ` Rob Herring
2021-12-16 17:29   ` [PATCH V2 04/10] dt-bindings: media: nxp,imx8mq-vpu: " Rob Herring
2021-12-16 17:29     ` Rob Herring
2021-12-16 17:29     ` Rob Herring
2021-12-16 11:12 ` [PATCH V2 05/10] media: hantro: Allow i.MX8MQ G1 and G2 to run independently Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 12:09   ` Ezequiel Garcia
2021-12-16 12:09     ` Ezequiel Garcia
2021-12-16 12:09     ` Ezequiel Garcia
2021-12-16 11:12 ` [PATCH V2 06/10] arm64: dts: imx8mq: Enable both G1 and G2 VPU's with vpu-blk-ctrl Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 11:12 ` [PATCH V2 07/10] arm64: dts: imx8mm: Fix VPU Hanging Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 11:12 ` [PATCH V2 08/10] dt-bindings: media: nxp,imx8mq-vpu: Add support for G1 and G2 on imx8mm Adam Ford
2021-12-16 11:12   ` [PATCH V2 08/10] dt-bindings: media: nxp, imx8mq-vpu: " Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 21:07   ` [PATCH V2 08/10] dt-bindings: media: nxp,imx8mq-vpu: " Rob Herring
2021-12-16 21:07     ` [PATCH V2 08/10] dt-bindings: media: nxp, imx8mq-vpu: " Rob Herring
2021-12-16 21:07     ` Rob Herring
2021-12-16 21:21     ` Adam Ford [this message]
2021-12-16 21:21       ` Adam Ford
2021-12-16 21:21       ` Adam Ford
2021-12-16 23:03       ` [PATCH V2 08/10] dt-bindings: media: nxp,imx8mq-vpu: " Ezequiel Garcia
2021-12-16 23:03         ` [PATCH V2 08/10] dt-bindings: media: nxp, imx8mq-vpu: " Ezequiel Garcia
2021-12-16 23:03         ` Ezequiel Garcia
2021-12-16 11:12 ` [PATCH V2 09/10] media: hantro: Add support for i.MX8MM Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 11:12 ` [PATCH V2 10/10] arm64: dts: imx8mm: Enable Hantro G1 and G2 video decoders Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 11:12   ` Adam Ford
2021-12-16 12:35 ` [PATCH V2 00/10] media: hantro: imx8mq/imx8mm: Let VPU decoders get controlled by vpu-blk-ctrl Ezequiel Garcia
2021-12-16 12:35   ` Ezequiel Garcia
2021-12-16 12:35   ` Ezequiel Garcia
2021-12-16 13:09   ` Adam Ford
2021-12-16 13:09     ` Adam Ford
2021-12-16 13:09     ` Adam Ford
2021-12-16 14:58 ` Benjamin Gaignard
2021-12-16 14:58   ` Benjamin Gaignard
2021-12-16 14:58   ` Benjamin Gaignard

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