From: Andy Shevchenko <andy.shevchenko@gmail.com> To: Brad Larson <blarson@amd.com> Cc: adrian.hunter@intel.com, alcooperx@gmail.com, arnd@arndb.de, brendan.higgins@linux.dev, briannorris@chromium.org, broonie@kernel.org, catalin.marinas@arm.com, conor+dt@kernel.org, davidgow@google.com, devicetree@vger.kernel.org, fancer.lancer@gmail.com, gerg@linux-m68k.org, gsomlo@gmail.com, hal.feng@starfivetech.com, hasegawa-hitomi@fujitsu.com, j.neuschaefer@gmx.net, joel@jms.id.au, kernel@esmil.dk, krzk@kernel.org, krzysztof.kozlowski+dt@linaro.org, lee.jones@linaro.org, lee@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-spi@vger.kernel.org, p.zabel@pengutronix.de, rdunlap@infradead.org, robh+dt@kernel.org, samuel@sholland.org, skhan@linuxfoundation.org, suravee.suthikulpanit@amd.com, thomas.lendacky@amd.com, tonyhuang.sunplus@gmail.com, ulf.hansson@linaro.org, vaishnav.a@ti.com, walker.chen@starfivetech.com, will@kernel.org, zhuyinbo@loongson.cn Subject: Re: [PATCH v16 6/6] soc: amd: Add support for AMD Pensando SoC Controller Date: Wed, 27 Sep 2023 15:59:00 +0300 [thread overview] Message-ID: <CAHp75Vd3Jj_giyWKhA2OyPrY5xKhyQ6We3qkz9-yDs15F+SFRg@mail.gmail.com> (raw) In-Reply-To: <20230926200541.35787-1-blarson@amd.com> On Tue, Sep 26, 2023 at 11:05 PM Brad Larson <blarson@amd.com> wrote: > On Thu, Sep 21, 2023 at 18:19:57 +0300 Andy Shevchenko <andy.shevchenko@gmail.com> wrote: > > On Thu, Sep 14, 2023 at 12:52 AM Brad Larson <blarson@amd.com> wrote: ... > >> + u8 tx_buf[PENCTRL_MAX_MSG_LEN]; > >> + u8 rx_buf[PENCTRL_MAX_MSG_LEN]; > > > > These are not DMA-safe, is this a problem? > > It's not a problem, the peripheral is PIO FIFO driven only. The question was about the SPI controller itself. Also, depending on the driver it may or may not require DMA-safe pointers. I believe with the new pump queue used in the SPI core all drivers that are using it are DMA-safe and the caller needs no additional care. ... > >> + msg = memdup_user((struct penctrl_spi_xfer *)arg, size); > >> + if (IS_ERR(msg)) { > >> + ret = PTR_ERR(msg); > >> + goto out_unlock; > >> + } > > > > Wondering if you can start using cleanup.h. > > Perhaps if recommended, I don't see DEFINE_(FREE,UNLOCK,...) being used. It's guard()() and scoped_guard() for locks and __free() for the allocations. Plenty of uses in a few modules already (talking about Linux Next snapshot). ... > >> + spi->chip_select = current_cs; > > > > spi_set_chipselect() > > Yes, I'll change to inline function spi_set_chipselect(spi, 0, current_cs). The > second arg must be legacy as its unused. Actually, it's a placeholder for the future support of indexed CS'. ... > >> + u8 txbuf[3]; > >> + u8 rxbuf[1]; > > > > Not DMA-safe. Is it a problem? > > Not a problem, the peripheral is PIO only using FIFOs. Same as somewhere above. -- With Best Regards, Andy Shevchenko
WARNING: multiple messages have this Message-ID (diff)
From: Andy Shevchenko <andy.shevchenko@gmail.com> To: Brad Larson <blarson@amd.com> Cc: adrian.hunter@intel.com, alcooperx@gmail.com, arnd@arndb.de, brendan.higgins@linux.dev, briannorris@chromium.org, broonie@kernel.org, catalin.marinas@arm.com, conor+dt@kernel.org, davidgow@google.com, devicetree@vger.kernel.org, fancer.lancer@gmail.com, gerg@linux-m68k.org, gsomlo@gmail.com, hal.feng@starfivetech.com, hasegawa-hitomi@fujitsu.com, j.neuschaefer@gmx.net, joel@jms.id.au, kernel@esmil.dk, krzk@kernel.org, krzysztof.kozlowski+dt@linaro.org, lee.jones@linaro.org, lee@kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-spi@vger.kernel.org, p.zabel@pengutronix.de, rdunlap@infradead.org, robh+dt@kernel.org, samuel@sholland.org, skhan@linuxfoundation.org, suravee.suthikulpanit@amd.com, thomas.lendacky@amd.com, tonyhuang.sunplus@gmail.com, ulf.hansson@linaro.org, vaishnav.a@ti.com, walker.chen@starfivetech.com, will@kernel.org, zhuyinbo@loongson.cn Subject: Re: [PATCH v16 6/6] soc: amd: Add support for AMD Pensando SoC Controller Date: Wed, 27 Sep 2023 15:59:00 +0300 [thread overview] Message-ID: <CAHp75Vd3Jj_giyWKhA2OyPrY5xKhyQ6We3qkz9-yDs15F+SFRg@mail.gmail.com> (raw) In-Reply-To: <20230926200541.35787-1-blarson@amd.com> On Tue, Sep 26, 2023 at 11:05 PM Brad Larson <blarson@amd.com> wrote: > On Thu, Sep 21, 2023 at 18:19:57 +0300 Andy Shevchenko <andy.shevchenko@gmail.com> wrote: > > On Thu, Sep 14, 2023 at 12:52 AM Brad Larson <blarson@amd.com> wrote: ... > >> + u8 tx_buf[PENCTRL_MAX_MSG_LEN]; > >> + u8 rx_buf[PENCTRL_MAX_MSG_LEN]; > > > > These are not DMA-safe, is this a problem? > > It's not a problem, the peripheral is PIO FIFO driven only. The question was about the SPI controller itself. Also, depending on the driver it may or may not require DMA-safe pointers. I believe with the new pump queue used in the SPI core all drivers that are using it are DMA-safe and the caller needs no additional care. ... > >> + msg = memdup_user((struct penctrl_spi_xfer *)arg, size); > >> + if (IS_ERR(msg)) { > >> + ret = PTR_ERR(msg); > >> + goto out_unlock; > >> + } > > > > Wondering if you can start using cleanup.h. > > Perhaps if recommended, I don't see DEFINE_(FREE,UNLOCK,...) being used. It's guard()() and scoped_guard() for locks and __free() for the allocations. Plenty of uses in a few modules already (talking about Linux Next snapshot). ... > >> + spi->chip_select = current_cs; > > > > spi_set_chipselect() > > Yes, I'll change to inline function spi_set_chipselect(spi, 0, current_cs). The > second arg must be legacy as its unused. Actually, it's a placeholder for the future support of indexed CS'. ... > >> + u8 txbuf[3]; > >> + u8 rxbuf[1]; > > > > Not DMA-safe. Is it a problem? > > Not a problem, the peripheral is PIO only using FIFOs. Same as somewhere above. -- With Best Regards, Andy Shevchenko _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-09-27 12:59 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-09-13 21:49 [PATCH v16 0/6] Support AMD Pensando Elba SoC Brad Larson 2023-09-13 21:49 ` Brad Larson 2023-09-13 21:49 ` [PATCH v16 1/6] dt-bindings: arm: add AMD Pensando boards Brad Larson 2023-09-13 21:49 ` Brad Larson 2023-09-13 21:49 ` [PATCH v16 2/6] dt-bindings: soc: amd: amd,pensando-elba-ctrl: Add Pensando SoC Controller Brad Larson 2023-09-13 21:49 ` Brad Larson 2023-09-13 21:49 ` [PATCH v16 3/6] MAINTAINERS: Add entry for AMD PENSANDO Brad Larson 2023-09-13 21:49 ` Brad Larson 2023-09-13 21:49 ` [PATCH v16 4/6] arm64: Add config for AMD Pensando SoC platforms Brad Larson 2023-09-13 21:49 ` Brad Larson 2023-09-13 21:49 ` [PATCH v16 5/6] arm64: dts: Add AMD Pensando Elba SoC support Brad Larson 2023-09-13 21:49 ` Brad Larson 2023-09-14 18:52 ` Rob Gardner 2023-09-14 18:52 ` Rob Gardner 2023-09-13 21:49 ` [PATCH v16 6/6] soc: amd: Add support for AMD Pensando SoC Controller Brad Larson 2023-09-13 21:49 ` Brad Larson 2023-09-21 15:19 ` Andy Shevchenko 2023-09-21 15:19 ` Andy Shevchenko 2023-09-26 20:05 ` Brad Larson 2023-09-26 20:05 ` Brad Larson 2023-09-27 12:59 ` Andy Shevchenko [this message] 2023-09-27 12:59 ` Andy Shevchenko 2023-09-22 10:24 ` Arnd Bergmann 2023-09-22 10:24 ` Arnd Bergmann 2023-09-25 8:51 ` Andy Shevchenko 2023-09-25 8:51 ` Andy Shevchenko 2023-09-26 17:47 ` Brad Larson 2023-09-26 17:47 ` Brad Larson 2023-09-26 17:51 ` Arnd Bergmann 2023-09-26 17:51 ` Arnd Bergmann
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