From: Andy Shevchenko <andy.shevchenko@gmail.com> To: Brad Larson <blarson@amd.com> Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-spi@vger.kernel.org, adrian.hunter@intel.com, alcooperx@gmail.com, arnd@arndb.de, brendan.higgins@linux.dev, briannorris@chromium.org, catalin.marinas@arm.com, conor+dt@kernel.org, davidgow@google.com, gsomlo@gmail.com, gerg@linux-m68k.org, hal.feng@starfivetech.com, hasegawa-hitomi@fujitsu.com, j.neuschaefer@gmx.net, joel@jms.id.au, kernel@esmil.dk, krzk@kernel.org, krzysztof.kozlowski+dt@linaro.org, lee@kernel.org, lee.jones@linaro.org, broonie@kernel.org, p.zabel@pengutronix.de, rdunlap@infradead.org, robh+dt@kernel.org, samuel@sholland.org, fancer.lancer@gmail.com, skhan@linuxfoundation.org, suravee.suthikulpanit@amd.com, thomas.lendacky@amd.com, tonyhuang.sunplus@gmail.com, ulf.hansson@linaro.org, vaishnav.a@ti.com, walker.chen@starfivetech.com, will@kernel.org, zhuyinbo@loongson.cn, devicetree@vger.kernel.org Subject: Re: [PATCH v14 8/8] soc: amd: Add support for AMD Pensando SoC Controller Date: Tue, 16 May 2023 00:05:32 +0300 [thread overview] Message-ID: <CAHp75VdsfcHOOUHuAVA38kdUyq+vwMKFYCNxScogGAJDM8ywBQ@mail.gmail.com> (raw) In-Reply-To: <20230515181606.65953-9-blarson@amd.com> On Mon, May 15, 2023 at 9:18 PM Brad Larson <blarson@amd.com> wrote: > > The Pensando SoC controller is a SPI connected companion device > that is present in all Pensando SoC board designs. The essential > board management registers are accessed on chip select 0 with > board mgmt IO support accessed using additional chip selects. ... > +#include <linux/cdev.h> > +#include <linux/device.h> > +#include <linux/err.h> > +#include <linux/init.h> > +#include <linux/mod_devicetable.h> > +#include <linux/module.h> > +#include <linux/mutex.h> > +#include <linux/of.h> Unneeded inclusion. > +#include <linux/reset-controller.h> > +#include <linux/spi/spi.h> ... > + u8 tx_buf[PENCTRL_MAX_MSG_LEN]; > + u8 rx_buf[PENCTRL_MAX_MSG_LEN]; Does it need to be DMA-capable? ... > + spi->chip_select = current_cs; > + spi->cs_gpiod = spi->controller->cs_gpiods[current_cs]; Nowadays these require API calls instead of direct assignments. ... > +static int penctrl_release(struct inode *inode, struct file *filp) > +{ > + filp->private_data = NULL; > + return 0; > +} Is it possible to unload the module without releasing the device node? ... > + u8 txbuf[3]; > + u8 rxbuf[1]; Same question about DMA. ... > + ret = spi_sync(spi, &m); > + if (ret == 0) > + *val = rxbuf[0]; > + > + return ret; Can also be written in more usual way: if (ret) return ret; ... return 0; ... > + u8 txbuf[4]; DMA? ... > + spi->chip_select = 0; > + spi->cs_gpiod = spi->controller->cs_gpiods[0]; Setter APIs. ... > + spi->chip_select = 0; > + spi->cs_gpiod = spi->controller->cs_gpiods[0]; Ditto. > + ret = device_property_read_u32(spi->dev.parent, "num-cs", &num_cs); > + if (ret) > + return dev_err_probe(&spi->dev, ret, > + "number of chip-selects not defined\n"); Hmm... Shouldn't SPI core take care of this in a generic way? Yes, I understand that you need the number for the allocation, but I would expect something like spi_fw_get_num_cs() to exist (seems not?). ... > + penctrl->rcdev.of_node = spi->dev.of_node; Use device_set_node(). It helps to modify the data types beneath. -- With Best Regards, Andy Shevchenko
WARNING: multiple messages have this Message-ID (diff)
From: Andy Shevchenko <andy.shevchenko@gmail.com> To: Brad Larson <blarson@amd.com> Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org, linux-spi@vger.kernel.org, adrian.hunter@intel.com, alcooperx@gmail.com, arnd@arndb.de, brendan.higgins@linux.dev, briannorris@chromium.org, catalin.marinas@arm.com, conor+dt@kernel.org, davidgow@google.com, gsomlo@gmail.com, gerg@linux-m68k.org, hal.feng@starfivetech.com, hasegawa-hitomi@fujitsu.com, j.neuschaefer@gmx.net, joel@jms.id.au, kernel@esmil.dk, krzk@kernel.org, krzysztof.kozlowski+dt@linaro.org, lee@kernel.org, lee.jones@linaro.org, broonie@kernel.org, p.zabel@pengutronix.de, rdunlap@infradead.org, robh+dt@kernel.org, samuel@sholland.org, fancer.lancer@gmail.com, skhan@linuxfoundation.org, suravee.suthikulpanit@amd.com, thomas.lendacky@amd.com, tonyhuang.sunplus@gmail.com, ulf.hansson@linaro.org, vaishnav.a@ti.com, walker.chen@starfivetech.com, will@kernel.org, zhuyinbo@loongson.cn, devicetree@vger.kernel.org Subject: Re: [PATCH v14 8/8] soc: amd: Add support for AMD Pensando SoC Controller Date: Tue, 16 May 2023 00:05:32 +0300 [thread overview] Message-ID: <CAHp75VdsfcHOOUHuAVA38kdUyq+vwMKFYCNxScogGAJDM8ywBQ@mail.gmail.com> (raw) In-Reply-To: <20230515181606.65953-9-blarson@amd.com> On Mon, May 15, 2023 at 9:18 PM Brad Larson <blarson@amd.com> wrote: > > The Pensando SoC controller is a SPI connected companion device > that is present in all Pensando SoC board designs. The essential > board management registers are accessed on chip select 0 with > board mgmt IO support accessed using additional chip selects. ... > +#include <linux/cdev.h> > +#include <linux/device.h> > +#include <linux/err.h> > +#include <linux/init.h> > +#include <linux/mod_devicetable.h> > +#include <linux/module.h> > +#include <linux/mutex.h> > +#include <linux/of.h> Unneeded inclusion. > +#include <linux/reset-controller.h> > +#include <linux/spi/spi.h> ... > + u8 tx_buf[PENCTRL_MAX_MSG_LEN]; > + u8 rx_buf[PENCTRL_MAX_MSG_LEN]; Does it need to be DMA-capable? ... > + spi->chip_select = current_cs; > + spi->cs_gpiod = spi->controller->cs_gpiods[current_cs]; Nowadays these require API calls instead of direct assignments. ... > +static int penctrl_release(struct inode *inode, struct file *filp) > +{ > + filp->private_data = NULL; > + return 0; > +} Is it possible to unload the module without releasing the device node? ... > + u8 txbuf[3]; > + u8 rxbuf[1]; Same question about DMA. ... > + ret = spi_sync(spi, &m); > + if (ret == 0) > + *val = rxbuf[0]; > + > + return ret; Can also be written in more usual way: if (ret) return ret; ... return 0; ... > + u8 txbuf[4]; DMA? ... > + spi->chip_select = 0; > + spi->cs_gpiod = spi->controller->cs_gpiods[0]; Setter APIs. ... > + spi->chip_select = 0; > + spi->cs_gpiod = spi->controller->cs_gpiods[0]; Ditto. > + ret = device_property_read_u32(spi->dev.parent, "num-cs", &num_cs); > + if (ret) > + return dev_err_probe(&spi->dev, ret, > + "number of chip-selects not defined\n"); Hmm... Shouldn't SPI core take care of this in a generic way? Yes, I understand that you need the number for the allocation, but I would expect something like spi_fw_get_num_cs() to exist (seems not?). ... > + penctrl->rcdev.of_node = spi->dev.of_node; Use device_set_node(). It helps to modify the data types beneath. -- With Best Regards, Andy Shevchenko _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-05-15 21:06 UTC|newest] Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-05-15 18:15 [PATCH v14 0/8] Support AMD Pensando Elba SoC Brad Larson 2023-05-15 18:15 ` Brad Larson 2023-05-15 18:15 ` [PATCH v14 1/8] dt-bindings: arm: add AMD Pensando boards Brad Larson 2023-05-15 18:15 ` Brad Larson 2023-05-15 18:16 ` [PATCH v14 2/8] dt-bindings: spi: cdns: Add compatible for AMD Pensando Elba SoC Brad Larson 2023-05-15 18:16 ` Brad Larson 2023-05-16 15:18 ` Mark Brown 2023-05-16 15:18 ` Mark Brown 2023-05-15 18:16 ` [PATCH v14 3/8] dt-bindings: soc: amd: amd,pensando-elba-ctrl: Add Pensando SoC Controller Brad Larson 2023-05-15 18:16 ` Brad Larson 2023-05-15 18:16 ` [PATCH v14 4/8] MAINTAINERS: Add entry for AMD PENSANDO Brad Larson 2023-05-15 18:16 ` Brad Larson 2023-05-15 18:16 ` [PATCH v14 5/8] arm64: Add config for AMD Pensando SoC platforms Brad Larson 2023-05-15 18:16 ` Brad Larson 2023-05-15 18:16 ` [PATCH v14 6/8] arm64: dts: Add AMD Pensando Elba SoC support Brad Larson 2023-05-15 18:16 ` Brad Larson 2023-05-16 7:17 ` Krzysztof Kozlowski 2023-05-16 7:17 ` Krzysztof Kozlowski 2023-05-16 7:54 ` Michal Simek 2023-05-16 7:54 ` Michal Simek 2023-05-23 19:28 ` Brad Larson 2023-05-23 19:28 ` Brad Larson 2023-05-24 11:52 ` Geert Uytterhoeven 2023-05-24 11:52 ` Geert Uytterhoeven 2023-05-30 22:03 ` Brad Larson 2023-05-30 22:03 ` Brad Larson 2023-05-31 13:09 ` Geert Uytterhoeven 2023-05-31 13:09 ` Geert Uytterhoeven 2023-06-05 23:52 ` Brad Larson 2023-06-05 23:52 ` Brad Larson 2023-05-15 18:16 ` [PATCH v14 7/8] spi: cadence-quadspi: Add compatible for AMD Pensando Elba SoC Brad Larson 2023-05-15 18:16 ` Brad Larson 2023-05-15 18:16 ` [PATCH v14 8/8] soc: amd: Add support for AMD Pensando SoC Controller Brad Larson 2023-05-15 18:16 ` Brad Larson 2023-05-15 21:05 ` Andy Shevchenko [this message] 2023-05-15 21:05 ` Andy Shevchenko 2023-05-23 2:12 ` Brad Larson 2023-05-23 2:12 ` Brad Larson 2023-05-16 5:19 ` Mahapatra, Amit Kumar 2023-05-16 5:19 ` Mahapatra, Amit Kumar 2023-05-16 7:36 ` Michal Simek 2023-05-16 7:36 ` Michal Simek 2023-05-17 11:14 ` Geert Uytterhoeven 2023-05-17 11:14 ` Geert Uytterhoeven 2023-05-16 8:45 ` kernel test robot 2023-05-16 8:45 ` kernel test robot 2023-05-16 11:03 ` Arnd Bergmann 2023-05-16 11:03 ` Arnd Bergmann 2023-05-23 22:11 ` Brad Larson 2023-05-23 22:11 ` Brad Larson 2023-05-24 12:41 ` Arnd Bergmann 2023-05-24 12:41 ` Arnd Bergmann 2023-08-07 22:17 ` Brad Larson 2023-08-07 22:17 ` Brad Larson 2023-05-16 7:14 ` [PATCH v14 0/8] Support AMD Pensando Elba SoC Krzysztof Kozlowski 2023-05-16 7:14 ` Krzysztof Kozlowski 2023-05-17 14:43 ` (subset) " Mark Brown 2023-05-17 14:43 ` Mark Brown
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