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From: Lucas De Marchi <lucas.de.marchi@gmail.com>
To: Rodrigo Vivi <rodrigo.vivi@intel.com>
Cc: Intel Graphics <intel-gfx@lists.freedesktop.org>,
	Lucas De Marchi <lucas.demarchi@intel.com>
Subject: Re: [CI 3/6] drm/i915/ehl: Add dpll mgr
Date: Fri, 15 Mar 2019 17:18:42 -0700	[thread overview]
Message-ID: <CAKi4VA+2Kr=PWCwHkcp9SUe-WUXS3_LUD0pNyXD1SP6UocDPhw@mail.gmail.com> (raw)
In-Reply-To: <20190315175711.13713-3-rodrigo.vivi@intel.com>

On Fri, Mar 15, 2019 at 10:57 AM Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
>
> From: Lucas De Marchi <lucas.demarchi@intel.com>
>
> Elkhart Lake has a different set of PLLs as compared to Ice Lake,
> although programming them is very similar.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Link: https://patchwork.freedesktop.org/patch/msgid/20190313211144.4842-4-rodrigo.vivi@intel.com
> ---
>  drivers/gpu/drm/i915/intel_dpll_mgr.c | 16 +++++++++++++++-
>  1 file changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index b3fb221c2532..a9feb119c19f 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -3246,6 +3246,18 @@ static const struct intel_dpll_mgr icl_pll_mgr = {
>         .dump_hw_state = icl_dump_hw_state,
>  };
>
> +static const struct dpll_info ehl_plls[] = {
> +       { "DPLL 0", &icl_pll_funcs, DPLL_ID_ICL_DPLL0,      0 },
> +       { "DPLL 1", &icl_pll_funcs, DPLL_ID_ICL_DPLL1,      0 },

Sorry, I merged a patch earlier today and icl_pll_funcs is gone. It
should be combo_pll_funcs here.

Lucas De Marchi

> +       { },
> +};
> +
> +static const struct intel_dpll_mgr ehl_pll_mgr = {
> +       .dpll_info = ehl_plls,
> +       .get_dpll = icl_get_dpll,
> +       .dump_hw_state = icl_dump_hw_state,
> +};
> +
>  /**
>   * intel_shared_dpll_init - Initialize shared DPLLs
>   * @dev: drm device
> @@ -3259,7 +3271,9 @@ void intel_shared_dpll_init(struct drm_device *dev)
>         const struct dpll_info *dpll_info;
>         int i;
>
> -       if (INTEL_GEN(dev_priv) >= 11)
> +       if (IS_ELKHARTLAKE(dev_priv))
> +               dpll_mgr = &ehl_pll_mgr;
> +       else if (INTEL_GEN(dev_priv) >= 11)
>                 dpll_mgr = &icl_pll_mgr;
>         else if (IS_CANNONLAKE(dev_priv))
>                 dpll_mgr = &cnl_pll_mgr;
> --
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx



-- 
Lucas De Marchi
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2019-03-16  0:18 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-15 17:57 [CI 1/6] drm/i915/ehl: Add EHL platform info and PCI IDs Rodrigo Vivi
2019-03-15 17:57 ` [CI 2/6] drm/i915/ehl: Add ElkhartLake platform Rodrigo Vivi
2019-03-15 17:57 ` [CI 3/6] drm/i915/ehl: Add dpll mgr Rodrigo Vivi
2019-03-16  0:18   ` Lucas De Marchi [this message]
2019-03-15 17:57 ` [CI 4/6] drm/i915/ehl: EHL outputs are different from ICL Rodrigo Vivi
2019-03-15 17:57 ` [CI 5/6] drm/i915/ehl: Set proper eu slice/subslice parameters for EHL Rodrigo Vivi
2019-03-15 17:57 ` [CI 6/6] drm/i915/ehl: Add Support for DMC on EHL Rodrigo Vivi
2019-03-18 16:17   ` Bob Paauwe
2019-03-15 18:50 ` ✓ Fi.CI.BAT: success for series starting with [CI,1/6] drm/i915/ehl: Add EHL platform info and PCI IDs Patchwork
2019-03-15 21:58 ` ✓ Fi.CI.IGT: " Patchwork
2019-03-22  0:03 [CI 1/6] " Rodrigo Vivi
2019-03-22  0:03 ` [CI 3/6] drm/i915/ehl: Add dpll mgr Rodrigo Vivi
2019-03-22 17:58 [CI 1/6] drm/i915/ehl: Add EHL platform info and PCI IDs Rodrigo Vivi
2019-03-22 17:58 ` [CI 3/6] drm/i915/ehl: Add dpll mgr Rodrigo Vivi

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