From: Alistair Francis <alistair23@gmail.com> To: Anup Patel <anup.patel@wdc.com> Cc: Peter Maydell <peter.maydell@linaro.org>, "open list:RISC-V" <qemu-riscv@nongnu.org>, Sagar Karandikar <sagark@eecs.berkeley.edu>, Anup Patel <anup@brainfault.org>, "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>, Atish Patra <atish.patra@wdc.com>, Alistair Francis <Alistair.Francis@wdc.com>, Palmer Dabbelt <palmer@dabbelt.com> Subject: Re: [PATCH 4/4] hw/riscv: virt: Use AIA INTC compatible string when available Date: Fri, 11 Jun 2021 09:20:28 +1000 [thread overview] Message-ID: <CAKmqyKOWwsv69EpRqJ_sjLmfq2fzjCHnLe+VU4ASVNK7Oj133g@mail.gmail.com> (raw) In-Reply-To: <20210514143242.377645-5-anup.patel@wdc.com> On Sat, May 15, 2021 at 12:36 AM Anup Patel <anup.patel@wdc.com> wrote: > > We should use the AIA INTC compatible string in the CPU INTC > DT nodes when the CPUs support AIA feature. This will allow > Linux INTC driver to use AIA local interrupt CSRs. > > Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > hw/riscv/virt.c | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index c0dc69ff33..981a3a06d5 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -262,8 +262,15 @@ static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap, > qemu_fdt_add_subnode(fdt, intc_name); > intc_phandle = phandle++; > qemu_fdt_setprop_cell(fdt, intc_name, "phandle", intc_phandle); > - qemu_fdt_setprop_string(fdt, intc_name, "compatible", > - "riscv,cpu-intc"); > + if (riscv_feature(&s->soc[socket].harts[cpu].env, > + RISCV_FEATURE_AIA)) { > + const char intcomp[] = "riscv,cpu-intc-aia\0riscv,cpu-intc"; > + qemu_fdt_setprop(fdt, name, "compatible", > + intcomp, sizeof(intcomp)); > + } else { > + qemu_fdt_setprop_string(fdt, intc_name, "compatible", > + "riscv,cpu-intc"); > + } > qemu_fdt_setprop(fdt, intc_name, "interrupt-controller", NULL, 0); > qemu_fdt_setprop_cell(fdt, intc_name, "#interrupt-cells", 1); > > -- > 2.25.1 > >
WARNING: multiple messages have this Message-ID (diff)
From: Alistair Francis <alistair23@gmail.com> To: Anup Patel <anup.patel@wdc.com> Cc: Peter Maydell <peter.maydell@linaro.org>, Palmer Dabbelt <palmer@dabbelt.com>, Alistair Francis <Alistair.Francis@wdc.com>, Sagar Karandikar <sagark@eecs.berkeley.edu>, Atish Patra <atish.patra@wdc.com>, "open list:RISC-V" <qemu-riscv@nongnu.org>, "qemu-devel@nongnu.org Developers" <qemu-devel@nongnu.org>, Anup Patel <anup@brainfault.org> Subject: Re: [PATCH 4/4] hw/riscv: virt: Use AIA INTC compatible string when available Date: Fri, 11 Jun 2021 09:20:28 +1000 [thread overview] Message-ID: <CAKmqyKOWwsv69EpRqJ_sjLmfq2fzjCHnLe+VU4ASVNK7Oj133g@mail.gmail.com> (raw) In-Reply-To: <20210514143242.377645-5-anup.patel@wdc.com> On Sat, May 15, 2021 at 12:36 AM Anup Patel <anup.patel@wdc.com> wrote: > > We should use the AIA INTC compatible string in the CPU INTC > DT nodes when the CPUs support AIA feature. This will allow > Linux INTC driver to use AIA local interrupt CSRs. > > Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > hw/riscv/virt.c | 11 +++++++++-- > 1 file changed, 9 insertions(+), 2 deletions(-) > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index c0dc69ff33..981a3a06d5 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -262,8 +262,15 @@ static void create_fdt(RISCVVirtState *s, const MemMapEntry *memmap, > qemu_fdt_add_subnode(fdt, intc_name); > intc_phandle = phandle++; > qemu_fdt_setprop_cell(fdt, intc_name, "phandle", intc_phandle); > - qemu_fdt_setprop_string(fdt, intc_name, "compatible", > - "riscv,cpu-intc"); > + if (riscv_feature(&s->soc[socket].harts[cpu].env, > + RISCV_FEATURE_AIA)) { > + const char intcomp[] = "riscv,cpu-intc-aia\0riscv,cpu-intc"; > + qemu_fdt_setprop(fdt, name, "compatible", > + intcomp, sizeof(intcomp)); > + } else { > + qemu_fdt_setprop_string(fdt, intc_name, "compatible", > + "riscv,cpu-intc"); > + } > qemu_fdt_setprop(fdt, intc_name, "interrupt-controller", NULL, 0); > qemu_fdt_setprop_cell(fdt, intc_name, "#interrupt-cells", 1); > > -- > 2.25.1 > >
next prev parent reply other threads:[~2021-06-10 23:21 UTC|newest] Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-05-14 14:32 [PATCH 0/4] AIA local interrupt CSR support Anup Patel 2021-05-14 14:32 ` Anup Patel 2021-05-14 14:32 ` [PATCH 1/4] target/riscv: Add defines for AIA local interrupt CSRs Anup Patel 2021-05-14 14:32 ` Anup Patel 2021-06-10 22:26 ` Alistair Francis 2021-06-10 22:26 ` Alistair Francis 2021-05-14 14:32 ` [PATCH 2/4] target/riscv: Add CPU feature for AIA CSRs Anup Patel 2021-05-14 14:32 ` Anup Patel 2021-06-10 23:15 ` Alistair Francis 2021-06-10 23:15 ` Alistair Francis 2021-06-11 4:58 ` Anup Patel 2021-06-11 4:58 ` Anup Patel 2021-05-14 14:32 ` [PATCH 3/4] target/riscv: Implement AIA local interrupt CSRs Anup Patel 2021-05-14 14:32 ` Anup Patel 2021-06-10 23:19 ` Alistair Francis 2021-06-10 23:19 ` Alistair Francis 2021-06-11 5:04 ` Anup Patel 2021-06-11 5:04 ` Anup Patel 2021-06-11 8:45 ` Alistair Francis 2021-06-11 8:45 ` Alistair Francis 2021-06-11 14:04 ` Anup Patel 2021-06-11 14:04 ` Anup Patel 2021-06-15 8:11 ` Alistair Francis 2021-06-15 8:11 ` Alistair Francis 2021-06-15 12:48 ` Anup Patel 2021-06-15 12:48 ` Anup Patel 2021-05-14 14:32 ` [PATCH 4/4] hw/riscv: virt: Use AIA INTC compatible string when available Anup Patel 2021-05-14 14:32 ` Anup Patel 2021-06-10 23:20 ` Alistair Francis [this message] 2021-06-10 23:20 ` Alistair Francis 2021-06-11 6:47 ` [PATCH 0/4] AIA local interrupt CSR support Anup Patel 2021-06-11 6:47 ` Anup Patel 2021-06-11 8:40 ` Alistair Francis 2021-06-11 8:40 ` Alistair Francis
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