All of lore.kernel.org
 help / color / mirror / Atom feed
From: Nick Desaulniers <ndesaulniers@google.com>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>,
	Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: "linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
	llvm@lists.linux.dev,  Nathan Chancellor <nathan@kernel.org>,
	Huacai Chen <chenhuacai@kernel.org>,
	kernel@xen0n.name,  loongarch@lists.linux.dev
Subject: Re: [PATCH v2 6/7] MIPS: Fallback CPU -march CFLAG to ISA level if unsupported
Date: Thu, 20 Apr 2023 09:32:36 -0700	[thread overview]
Message-ID: <CAKwvOdkZA6DVCbgF=P1xZcHiyGFTnYvGReJZTzVnmeZdsH0L3w@mail.gmail.com> (raw)
In-Reply-To: <20230419221500.GA17797@alpha.franken.de>

On Wed, Apr 19, 2023 at 3:15 PM Thomas Bogendoerfer
<tsbogend@alpha.franken.de> wrote:
>
> On Wed, Apr 19, 2023 at 02:35:02PM -0700, Nick Desaulniers wrote:
> > On Wed, Apr 19, 2023 at 9:50 AM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote:
> > >
> > >
> > >
> > > > 2023年4月18日 21:07,Nick Desaulniers <ndesaulniers@google.com> 写道:
> > > >
> > > > On Fri, Apr 14, 2023 at 1:07 AM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote:
> > > >>
> > > >> LLVM does not implement some of -march options. However those options
> > > >> are not mandatory for kernel to build for those CPUs.
> > > >>
> > > >> Fallback -march CFLAG to ISA level if unsupported by toolchain so
> > > >> we can get those kernel to build with LLVM.
> > > >>
> > > >> Link: https://github.com/ClangBuiltLinux/linux/issues/1544
> > > >> Reported-by: Nathan Chancellor <nathan@kernel.org>
> > > >> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
> > > >
> > > > Thanks for the patch! Maybe it's more obvious to folks who work on
> > > > mips, but how did you determine that say `p5600` is `mips32r5` or
> > > > `r10000` is `mips4`?
> > >
> > > Wikipedia [1] should fit the purpose.
> > >
> > > [1]: https://en.wikipedia.org/wiki/List_of_MIPS_architecture_processors
> >
> > Mostly! Though I was not able to verify:
> > - p5600
>
> mips32r5
>
> > - r5500
>
> mips4
>
> > - rm5200
>
> mips4
>
> > - sb1
>
> mips64r1

Thomas, thanks for reviewing datasheets to verify this.

Jiaxun, for SB1, you have cc-option fall back to -march=mips4, does
that need to be -march=mips64r1?

(With that last question resolved, I'm happy to sign off on this patch)

>
> all information taken from datasheets.
>
> > - loongson*
>
> probably depends on the exact type, but as I don't have datasheets
> I can't say what it is exactly, probaly mips32r2/mips64r2.

Oh look Jiaxun, you are the maintainer for
"MIPS/LOONGSON64 ARCHITECTURE"
ok then I will trust your knowledge of this architecture!

---
Separate question to Huacai, Wang, and the loongarch list; I know LLVM
landed the Loongarch backend recently; any idea what's the status of
building arch=loongarch with LLVM=1 (linux kernel)?

-- 
Thanks,
~Nick Desaulniers

  parent reply	other threads:[~2023-04-20 16:32 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-14  8:06 [PATCH v2 0/7] MIPS: LLVM toolchain support for more CPUs Jiaxun Yang
2023-04-14  8:06 ` [PATCH v2 1/7] MIPS: Move various toolchain ASE check to Kconfig Jiaxun Yang
2023-04-14  8:06 ` [PATCH v2 2/7] MIPS: Add toolchain feature dependency for microMIPS smartMIPS Jiaxun Yang
2023-04-18 13:08   ` Thomas Bogendoerfer
2023-04-19 23:01     ` Nick Desaulniers
2023-04-20 19:41       ` Jiaxun Yang
2023-04-24 17:03         ` Nathan Chancellor
2023-04-14  8:06 ` [PATCH v2 3/7] MIPS: Detect toolchain support of workarounds in Kconfig Jiaxun Yang
2023-04-18 13:09   ` Thomas Bogendoerfer
2023-04-18 17:14     ` Jiaxun Yang
2023-04-14  8:06 ` [PATCH v2 4/7] MIPS: Detect toolchain support of o32 ABI with 64 bit CPU Jiaxun Yang
2023-04-14  8:06 ` [PATCH v2 5/7] MIPS: Remove cc-option checks for -march=octeon Jiaxun Yang
2023-04-14  8:07 ` [PATCH v2 6/7] MIPS: Fallback CPU -march CFLAG to ISA level if unsupported Jiaxun Yang
2023-04-18 20:07   ` Nick Desaulniers
2023-04-19 16:50     ` Jiaxun Yang
2023-04-19 21:35       ` Nick Desaulniers
2023-04-19 22:15         ` Thomas Bogendoerfer
2023-04-19 23:36           ` Jiaxun Yang
2023-04-20  8:06             ` Thomas Bogendoerfer
2023-04-20 16:32           ` Nick Desaulniers [this message]
2023-04-20 18:42             ` Xi Ruoyao
2023-04-20 18:50               ` Xi Ruoyao
2023-04-20 19:16             ` Jiaxun Yang
2023-04-14  8:07 ` [PATCH v2 7/7] MIPS: Limit MIPS_MT_SMP support by ISA reversion Jiaxun Yang

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to='CAKwvOdkZA6DVCbgF=P1xZcHiyGFTnYvGReJZTzVnmeZdsH0L3w@mail.gmail.com' \
    --to=ndesaulniers@google.com \
    --cc=chenhuacai@kernel.org \
    --cc=jiaxun.yang@flygoat.com \
    --cc=kernel@xen0n.name \
    --cc=linux-mips@vger.kernel.org \
    --cc=llvm@lists.linux.dev \
    --cc=loongarch@lists.linux.dev \
    --cc=nathan@kernel.org \
    --cc=tsbogend@alpha.franken.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.