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From: Nick Desaulniers <ndesaulniers@google.com>
To: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-mips@vger.kernel.org, llvm@lists.linux.dev,
	 tsbogend@alpha.franken.de, nathan@kernel.org
Subject: Re: [PATCH v2 6/7] MIPS: Fallback CPU -march CFLAG to ISA level if unsupported
Date: Tue, 18 Apr 2023 13:07:17 -0700	[thread overview]
Message-ID: <CAKwvOdkttvdZQyxrP60hAziaRQ4HWRBBSuA-vN25_USg-zEJqg@mail.gmail.com> (raw)
In-Reply-To: <20230414080701.15503-7-jiaxun.yang@flygoat.com>

On Fri, Apr 14, 2023 at 1:07 AM Jiaxun Yang <jiaxun.yang@flygoat.com> wrote:
>
> LLVM does not implement some of -march options. However those options
> are not mandatory for kernel to build for those CPUs.
>
> Fallback -march CFLAG to ISA level if unsupported by toolchain so
> we can get those kernel to build with LLVM.
>
> Link: https://github.com/ClangBuiltLinux/linux/issues/1544
> Reported-by: Nathan Chancellor <nathan@kernel.org>
> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>

Thanks for the patch! Maybe it's more obvious to folks who work on
mips, but how did you determine that say `p5600` is `mips32r5` or
`r10000` is `mips4`?

Is there a table somewhere you used as a reference? Including such
info in the commit message would help reviewers such as myself verify
the patch.

Also, in v1, you mentioned that -mtune is not a substitute. It would
be good to record that info in the commit message as well.

> ---
> v2: Reword commit message
> ---
>  arch/mips/Makefile | 30 +++++++++++++++++-------------
>  1 file changed, 17 insertions(+), 13 deletions(-)
>
> diff --git a/arch/mips/Makefile b/arch/mips/Makefile
> index af3d17ec35d3..0fa84fc395c9 100644
> --- a/arch/mips/Makefile
> +++ b/arch/mips/Makefile
> @@ -148,10 +148,10 @@ cflags-y += $(call cc-option,-Wa$(comma)-mno-fix-loongson3-llsc,)
>  #
>  # CPU-dependent compiler/assembler options for optimization.
>  #
> -cflags-$(CONFIG_CPU_R3000)     += -march=r3000
> -cflags-$(CONFIG_CPU_R4300)     += -march=r4300 -Wa,--trap
> -cflags-$(CONFIG_CPU_R4X00)     += -march=r4600 -Wa,--trap
> -cflags-$(CONFIG_CPU_TX49XX)    += -march=r4600 -Wa,--trap
> +cflags-$(CONFIG_CPU_R3000)     += $(call cc-option,-march=r3000,-march=mips1)
> +cflags-$(CONFIG_CPU_R4300)     += $(call cc-option,-march=r4300,-march=mips3) -Wa,--trap
> +cflags-$(CONFIG_CPU_R4X00)     += $(call cc-option,-march=r4600,-march=mips3) -Wa,--trap
> +cflags-$(CONFIG_CPU_TX49XX)    += $(call cc-option,-march=r4600,-march=mips3) -Wa,--trap
>  cflags-$(CONFIG_CPU_MIPS32_R1) += -march=mips32 -Wa,--trap
>  cflags-$(CONFIG_CPU_MIPS32_R2) += -march=mips32r2 -Wa,--trap
>  cflags-$(CONFIG_CPU_MIPS32_R5) += -march=mips32r5 -Wa,--trap -modd-spreg
> @@ -160,26 +160,30 @@ cflags-$(CONFIG_CPU_MIPS64_R1)    += -march=mips64 -Wa,--trap
>  cflags-$(CONFIG_CPU_MIPS64_R2) += -march=mips64r2 -Wa,--trap
>  cflags-$(CONFIG_CPU_MIPS64_R5) += -march=mips64r5 -Wa,--trap
>  cflags-$(CONFIG_CPU_MIPS64_R6) += -march=mips64r6 -Wa,--trap
> -cflags-$(CONFIG_CPU_P5600)     += -march=p5600 -Wa,--trap -modd-spreg
> -cflags-$(CONFIG_CPU_R5000)     += -march=r5000 -Wa,--trap
> -cflags-$(CONFIG_CPU_R5500)     += $(call cc-option,-march=r5500,-march=r5000) \
> +cflags-$(CONFIG_CPU_P5600)     += $(call cc-option,-march=p5600,-march=mips32r5) \
> +                       -Wa,--trap -modd-spreg
> +cflags-$(CONFIG_CPU_R5000)     += $(call cc-option,-march=r5000,-march=mips4) \
>                         -Wa,--trap
> -cflags-$(CONFIG_CPU_NEVADA)    += $(call cc-option,-march=rm5200,-march=r5000) \
> +cflags-$(CONFIG_CPU_R5500)     += $(call cc-option,-march=r5500,-march=mips4) \
>                         -Wa,--trap
> -cflags-$(CONFIG_CPU_RM7000)    += $(call cc-option,-march=rm7000,-march=r5000) \
> +cflags-$(CONFIG_CPU_NEVADA)    += $(call cc-option,-march=rm5200,-march=mips4) \
>                         -Wa,--trap
> -cflags-$(CONFIG_CPU_SB1)       += $(call cc-option,-march=sb1,-march=r5000) \
> +cflags-$(CONFIG_CPU_RM7000)    += $(call cc-option,-march=rm7000,-march=mips4) \
> +                       -Wa,--trap
> +cflags-$(CONFIG_CPU_SB1)       += $(call cc-option,-march=sb1,-march=mips4) \
>                         -Wa,--trap
>  cflags-$(CONFIG_CPU_SB1)       += $(call cc-option,-mno-mdmx)
>  cflags-$(CONFIG_CPU_SB1)       += $(call cc-option,-mno-mips3d)
> -cflags-$(CONFIG_CPU_R10000)    += $(call cc-option,-march=r10000,-march=r8000) \
> +cflags-$(CONFIG_CPU_R10000)    += $(call cc-option,-march=r10000,-march=mips4) \
>                         -Wa,--trap
>  cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += -march=octeon -Wa,--trap
>  cflags-$(CONFIG_CAVIUM_CN63XXP1) += -Wa,-mfix-cn63xxp1
>  cflags-$(CONFIG_CPU_BMIPS)     += -march=mips32 -Wa,-mips32 -Wa,--trap
>
> -cflags-$(CONFIG_CPU_LOONGSON2E) += -march=loongson2e -Wa,--trap
> -cflags-$(CONFIG_CPU_LOONGSON2F) += -march=loongson2f -Wa,--trap
> +cflags-$(CONFIG_CPU_LOONGSON2E) += \
> +                       $(call cc-option,-march=loongson2e,-march=mips3) -Wa,--trap
> +cflags-$(CONFIG_CPU_LOONGSON2F) += \
> +                       $(call cc-option,-march=loongson2f,-march=mips3) -Wa,--trap
>  # Some -march= flags enable MMI instructions, and GCC complains about that
>  # support being enabled alongside -msoft-float. Thus explicitly disable MMI.
>  cflags-$(CONFIG_CPU_LOONGSON2EF) += $(call cc-option,-mno-loongson-mmi)
> --
> 2.39.2 (Apple Git-143)
>


-- 
Thanks,
~Nick Desaulniers

  reply	other threads:[~2023-04-18 20:07 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-04-14  8:06 [PATCH v2 0/7] MIPS: LLVM toolchain support for more CPUs Jiaxun Yang
2023-04-14  8:06 ` [PATCH v2 1/7] MIPS: Move various toolchain ASE check to Kconfig Jiaxun Yang
2023-04-14  8:06 ` [PATCH v2 2/7] MIPS: Add toolchain feature dependency for microMIPS smartMIPS Jiaxun Yang
2023-04-18 13:08   ` Thomas Bogendoerfer
2023-04-19 23:01     ` Nick Desaulniers
2023-04-20 19:41       ` Jiaxun Yang
2023-04-24 17:03         ` Nathan Chancellor
2023-04-14  8:06 ` [PATCH v2 3/7] MIPS: Detect toolchain support of workarounds in Kconfig Jiaxun Yang
2023-04-18 13:09   ` Thomas Bogendoerfer
2023-04-18 17:14     ` Jiaxun Yang
2023-04-14  8:06 ` [PATCH v2 4/7] MIPS: Detect toolchain support of o32 ABI with 64 bit CPU Jiaxun Yang
2023-04-14  8:06 ` [PATCH v2 5/7] MIPS: Remove cc-option checks for -march=octeon Jiaxun Yang
2023-04-14  8:07 ` [PATCH v2 6/7] MIPS: Fallback CPU -march CFLAG to ISA level if unsupported Jiaxun Yang
2023-04-18 20:07   ` Nick Desaulniers [this message]
2023-04-19 16:50     ` Jiaxun Yang
2023-04-19 21:35       ` Nick Desaulniers
2023-04-19 22:15         ` Thomas Bogendoerfer
2023-04-19 23:36           ` Jiaxun Yang
2023-04-20  8:06             ` Thomas Bogendoerfer
2023-04-20 16:32           ` Nick Desaulniers
2023-04-20 18:42             ` Xi Ruoyao
2023-04-20 18:50               ` Xi Ruoyao
2023-04-20 19:16             ` Jiaxun Yang
2023-04-14  8:07 ` [PATCH v2 7/7] MIPS: Limit MIPS_MT_SMP support by ISA reversion Jiaxun Yang

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