From: Matthew Auld <matthew.william.auld@gmail.com>
To: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 01/22] drm/i915/gem: Mark the buffer pool as active for the cmdparser
Date: Thu, 4 Jun 2020 13:49:06 +0100 [thread overview]
Message-ID: <CAM0jSHNe5ssL2tzyg6b7g0zdeypPSy_krYY3bPdRRP6O7-OQRg@mail.gmail.com> (raw)
In-Reply-To: <20200604103751.18816-1-chris@chris-wilson.co.uk>
On Thu, 4 Jun 2020 at 11:38, Chris Wilson <chris@chris-wilson.co.uk> wrote:
>
> If the execbuf is interrupted after building the cmdparser pipeline, and
> before we commit to submitting the request to HW, we would attempt to
> clean up the cmdparser early. While we held active references to the vma
> being parsed and constructed, we did not hold an active reference for
> the buffer pool itself. The result was that an interrupted execbuf could
> still have run the cmdparser pipeline, but since the buffer pool was
> idle, its target vma could have been recycled.
>
> Note this problem only occurs if the cmdparser is running async due to
> pipelined waits on busy fences, and the execbuf is interrupted.
>
> Fixes: 686c7c35abc2 ("drm/i915/gem: Asynchronous cmdparser")
> Fixes: 16e87459673a ("drm/i915/gt: Move the batch buffer pool from the engine to the gt")
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
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prev parent reply other threads:[~2020-06-04 12:49 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-04 10:37 [Intel-gfx] [PATCH 01/22] drm/i915/gem: Mark the buffer pool as active for the cmdparser Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 02/22] drm/i915: Trim set_timer_ms() intervals Chris Wilson
2020-06-04 12:54 ` Matthew Auld
2020-06-04 10:37 ` [Intel-gfx] [PATCH 03/22] drm/i915/gt: Set timeslicing priority from queue Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 04/22] drm/i915/gt: Always check to enable timeslicing if not submitting Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 05/22] Restore "drm/i915: drop engine_pin/unpin_breadcrumbs_irq" Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 06/22] drm/i915/gt: Couple tasklet scheduling for all CS interrupts Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 07/22] drm/i915/gt: Support creation of 'internal' rings Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 08/22] drm/i915/gt: Use client timeline address for seqno writes Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 09/22] drm/i915/gt: Infrastructure for ring scheduling Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 10/22] drm/i915/gt: Enable busy-stats for ring-scheduler Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 11/22] drm/i915/gt: Track if an engine requires forcewake w/a Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 12/22] drm/i915/gt: Implement ring scheduler for gen6/7 Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 13/22] drm/i915/gt: Enable ring scheduling " Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 14/22] drm/i915/gem: Async GPU relocations only Chris Wilson
2020-06-04 13:37 ` Matthew Auld
2020-06-04 13:44 ` Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 15/22] drm/i915: Add list_for_each_entry_safe_continue_reverse Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 16/22] drm/i915/gem: Separate reloc validation into an earlier step Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 17/22] drm/i915/gem: Lift GPU relocation allocation Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 18/22] drm/i915/gem: Build the reloc request first Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 19/22] drm/i915/gem: Add all GPU reloc awaits/signals en masse Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 20/22] dma-buf: Proxy fence, an unsignaled fence placeholder Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 21/22] drm/i915: Unpeel awaits on a proxy fence Chris Wilson
2020-06-04 10:37 ` [Intel-gfx] [PATCH 22/22] drm/i915/gem: Make relocations atomic within execbuf Chris Wilson
2020-06-04 11:36 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/22] drm/i915/gem: Mark the buffer pool as active for the cmdparser Patchwork
2020-06-04 11:37 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-06-04 12:06 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2020-06-04 12:49 ` Matthew Auld [this message]
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