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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Wolfram Sang <wsa+renesas@sang-engineering.com>
Cc: Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	Linh Phung <linh.phung.jy@renesas.com>,
	Magnus Damm <magnus.damm@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH 1/6] arm64: dts: renesas: r8a779a0: add & update SCIF nodes
Date: Tue, 5 Jan 2021 19:06:31 +0100	[thread overview]
Message-ID: <CAMuHMdUDPaaaHsDP11qZJzWzd+tss97iZXXATCHdVQZE1vLHSg@mail.gmail.com> (raw)
In-Reply-To: <20201228112715.14947-2-wsa+renesas@sang-engineering.com>

Hi Wolfram,

On Mon, Dec 28, 2020 at 12:27 PM Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:

Missing "From: Linh Phung <linh.phung.jy@renesas.com>"?

> This is the result of multiple patches taken from the BSP, combined,
> rebased, and properly sorted. SCIF0 gets DMA properties, other SCIFs are
> entirely new.
>
> Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>

> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi
> @@ -656,11 +656,61 @@ scif0: serial@e6e60000 {
>                                  <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
>                                  <&scif_clk>;
>                         clock-names = "fck", "brg_int", "scif_clk";
> +                       dmas = <&dmac1 0x51>, <&dmac1 0x50>;
> +                       dma-names = "tx", "rx";

It may be prudent to leave out the DMA properties until we can
validate DMA operation.

>                         power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
>                         resets = <&cpg 702>;
>                         status = "disabled";
>                 };
>
> +               scif1: serial@e6e68000 {
> +                       compatible = "renesas,scif-r8a779a0",
> +                                    "renesas,rcar-gen3-scif", "renesas,scif";
> +                       reg = <0 0xe6e68000 0 64>;
> +                       interrupts = <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&cpg CPG_MOD 703>,
> +                                <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
> +                                <&scif_clk>;
> +                       clock-names = "fck", "brg_int", "scif_clk";
> +                       dmas = <&dmac1 0x53>, <&dmac1 0x52>;
> +                       dma-names = "tx", "rx";
> +                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> +                       resets = <&cpg 703>;
> +                       status = "disabled";
> +               };
> +
> +               scif4: serial@e6c40000 {
> +                       compatible = "renesas,scif-r8a779a0",
> +                                    "renesas,rcar-gen3-scif", "renesas,scif";
> +                       reg = <0 0xe6c40000 0 64>;
> +                       interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&cpg CPG_MOD 705>,
> +                                <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
> +                                <&scif_clk>;
> +                       clock-names = "fck", "brg_int", "scif_clk";
> +                       dmas = <&dmac1 0x59>, <&dmac1 0x58>;
> +                       dma-names = "tx", "rx";
> +                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> +                       resets = <&cpg 705>;
> +                       status = "disabled";
> +               };
> +
> +               scif3: serial@e6c50000 {

Please move scif3 before scif4.

> +                       compatible = "renesas,scif-r8a779a0",
> +                                    "renesas,rcar-gen3-scif", "renesas,scif";
> +                       reg = <0 0xe6c50000 0 64>;
> +                       interrupts = <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&cpg CPG_MOD 704>,
> +                                <&cpg CPG_CORE R8A779A0_CLK_S1D2>,
> +                                <&scif_clk>;
> +                       clock-names = "fck", "brg_int", "scif_clk";
> +                       dmas = <&dmac1 0x57>, <&dmac1 0x56>;
> +                       dma-names = "tx", "rx";
> +                       power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>;
> +                       resets = <&cpg 704>;
> +                       status = "disabled";
> +               };
> +

With the above fixed:
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

  reply	other threads:[~2021-01-05 18:07 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-28 11:27 [PATCH 0/6] v3u: add & update (H)SCIF nodes Wolfram Sang
2020-12-28 11:27 ` [PATCH 1/6] arm64: dts: renesas: r8a779a0: add & update SCIF nodes Wolfram Sang
2021-01-05 18:06   ` Geert Uytterhoeven [this message]
2021-01-14 20:57     ` Wolfram Sang
2021-01-15  8:00       ` Geert Uytterhoeven
2020-12-28 11:27 ` [PATCH 2/6] arm64: dts: renesas: falcon: add SCIF0 nodes Wolfram Sang
2021-01-05 18:12   ` Geert Uytterhoeven
2021-01-12 11:42     ` Geert Uytterhoeven
2020-12-28 11:27 ` [PATCH 3/6] dt-bindings: serial: renesas,hscif: Add r8a779a0 support Wolfram Sang
2021-01-05 18:19   ` Geert Uytterhoeven
2021-01-08  3:41   ` Rob Herring
2021-01-19 22:16   ` Wolfram Sang
2021-01-20  8:00     ` Greg Kroah-Hartman
2021-01-20  8:02       ` Geert Uytterhoeven
2021-01-20 17:47         ` Greg Kroah-Hartman
2020-12-28 11:27 ` [PATCH 4/6] clk: renesas: r8a779a0: add HSCIF support Wolfram Sang
2021-01-05 18:23   ` Geert Uytterhoeven
2020-12-28 11:27 ` [PATCH 5/6] arm64: dts: renesas: r8a779a0: Add " Wolfram Sang
2021-01-05 18:22   ` Geert Uytterhoeven
2020-12-28 11:27 ` [PATCH 6/6] WIP: arm64: dts: renesas: falcon: switch to from SCIF0 to HSCIF0 Wolfram Sang
2021-01-05 16:24   ` Geert Uytterhoeven

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