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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: biju.das.jz@bp.renesas.com
Cc: Philipp Zabel <p.zabel@pengutronix.de>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Chris Paterson <chris.paterson2@renesas.com>,
	Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>,
	linux-renesas-soc@vger.kernel.org, Lee Jones <lee@kernel.org>
Subject: Re: [PATCH v5 2/5] clocksource/drivers: Add RZ/G2L MTU3 core driver
Date: Mon, 7 Nov 2022 15:16:27 +0100	[thread overview]
Message-ID: <CAMuHMdVghus=mN0PajCsY5CAO+sT-NQPL9NJ5e=3wtqMOcahSQ@mail.gmail.com> (raw)
In-Reply-To: <20221027144844.85149-3-biju.das.jz@bp.renesas.com>

Hi Biju,

On Thu, Oct 27, 2022 at 4:49 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> Add RZ/G2L MTU3 core driver for the Multi-Function Timer Pulse
> Unit 3 (MTU3a) hardware available on SoCs from Renesas. The core
> driver allow to share the clk and channel between the other
> drivers like PWM, Clock Source, Clock event and Counter.
>
> Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
> ---
> v4->v5:

Thanks for the update!

>  * Moved core driver from MFD to timer
>  * Child devices instatiated using mfd_add_devices()

> --- a/drivers/clocksource/Kconfig
> +++ b/drivers/clocksource/Kconfig
> @@ -524,6 +524,16 @@ config SH_TIMER_MTU2
>           Timer Pulse Unit 2 (MTU2) hardware available on SoCs from Renesas.
>           This hardware comes with 16-bit timer registers.
>
> +config RZ_MTU3
> +       bool "Renesas RZ/G2L MTU3 core driver"
> +       depends on (ARCH_RZG2L && OF) || COMPILE_TEST

As you are calling mfd_add_devices(), this driver needs (a very small
part of) the functionality provided by MFD.

If CONFIG_MFD_CORE is not set:

    aarch64-linux-gnu-ld: drivers/clocksource/rz-mtu3.o: in function
`rz_mtu3_reset_assert':
    rz-mtu3.c:(.text+0x38): undefined reference to `mfd_remove_devices'
    aarch64-linux-gnu-ld: drivers/clocksource/rz-mtu3.o: in function
`rz_mtu3_probe':
    rz-mtu3.c:(.text+0x180): undefined reference to `mfd_add_devices'

So either you should make this depend on MFD_CORE, or move to
another mechanism for registering the sub devices (e.g. calling
platform_device_{alloc,add}(), cfr. rpcif_probe()).

> +       help
> +         Select this option to enable Renesas RZ/G2L MTU3 core driver for
> +         the Multi-Function Timer Pulse Unit 3 (MTU3a) hardware available on
> +         SoCs from Renesas. The core driver allow to share the clk and channel
> +         between the others drivers like PWM, Clock Source, Clock event and
> +         Counter.
> +

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

  reply	other threads:[~2022-11-07 14:16 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-10-27 14:48 [PATCH v5 0/5] Add RZ/G2L MTU3 Core, Counter and pwm driver Biju Das
2022-10-27 14:48 ` [PATCH v5 1/5] dt-bindings: timer: Document RZ/G2L MTU3a bindings Biju Das
2022-10-27 22:12   ` Krzysztof Kozlowski
2022-10-30 13:30   ` Rob Herring
2022-10-27 14:48 ` [PATCH v5 2/5] clocksource/drivers: Add RZ/G2L MTU3 core driver Biju Das
2022-11-07 14:16   ` Geert Uytterhoeven [this message]
2022-11-07 14:27     ` Biju Das
2022-11-11  6:53       ` Biju Das
2022-10-27 14:48 ` [PATCH v5 3/5] Documentation: ABI: sysfs-bus-counter: add external_input_phase_clock_select & long_word_access_ctrl_mode items Biju Das
2022-10-27 14:48 ` [PATCH v5 4/5] counter: Add RZ/G2L MTU3 counter driver Biju Das
2022-10-27 14:48 ` [PATCH v5 5/5] pwm: Add support for RZ/G2L MTU3 PWM driver Biju Das
2022-11-07  6:55 ` [PATCH v5 0/5] Add RZ/G2L MTU3 Core, Counter and pwm driver Biju Das

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