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From: Pintu Kumar <pintu.ping@gmail.com>
To: Lucas Stach <l.stach@pengutronix.de>
Cc: Russell King - ARM Linux <linux@armlinux.org.uk>,
	open list <linux-kernel@vger.kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	kernelnewbies@kernelnewbies.org
Subject: Re: Delivery Status Notification (Failure)
Date: Mon, 14 May 2018 19:58:42 +0530	[thread overview]
Message-ID: <CAOuPNLiZJrDveOHWwvJQ+JLg+j6FOk74oQBKaEq0oqY6w0ko=A@mail.gmail.com> (raw)
In-Reply-To: <1526303498.3494.11.camel@pengutronix.de>

On Mon, May 14, 2018 at 6:41 PM, Lucas Stach <l.stach@pengutronix.de> wrote:
> Am Montag, den 14.05.2018, 17:42 +0530 schrieb Pintu Kumar:
>> Hi,
>>
>> Is there any work around possible to set IRQ affinity for some GPIO
>> interrupt ?
>> How to avoid CPU0 to receive the current GPIO interrupt ?
>> How do we assign GPIO interrupts to any CPU other than CPU0 ?
>> Is it possible to isolate CPU0 for a sometime, from my GPIO driver so
>> that GPIO interrupt can be served by another CPU ?
>>
>> Need your inputs to decide whether it is still possible to set
>> affinity for GPIO interrupt, or its impossible ?
>
> This is not possible. The GPIO IRQs are aggregated into one GPC/GIC IRQ
> line per GPIO bank, so it is not possible to change affinity of a
> single GPIO interrupt to another CPU.

OK. Thanks for your confirmation.

> Best we could do is change the
> affinity of the whole bank,

OK. How can we do this on the fly from my driver code.
If you have any reference please let me know.
This is required only for experimental purpose to prove the point to be mgmt.
My idea is, from the driver, change the affinity of the whole bank.
So, the GPIO interrupt can be delivered on to this specific CPU bank.
Once I am done, I will revert back to the old bank.
Please give me some hint on how to do this from my kernel module....


> but given the limited usefulness of
> something like that, nobody bothered to implement such a thing.
>
> Regards,
> Lucas
>
>>
>>
>> On Fri, May 11, 2018 at 8:07 PM, Pintu Kumar <pintu.ping@gmail.com>
>> wrote:
>> > On Fri, May 11, 2018 at 6:34 PM, Lucas Stach <l.stach@pengutronix.d
>> > e> wrote:
>> > > Am Freitag, den 11.05.2018, 13:39 +0100 schrieb Russell King -
>> > > ARM Linux:
>> > > > On Fri, May 11, 2018 at 05:07:37PM +0530, Pintu Kumar wrote:
>> > > > > Hi,
>> > > > >
>> > > > > I need one help.
>> > > > > I am using i.MX7 Sabre board with kernel version 4.1.15
>> > > > >
>> > > > > Let's say I am interested in GPIO number: 21
>> > > > > I wanted to set CPU affinity for particular GPIO->IRQ number,
>> > > > > so I
>> > > > > tried the below steps:
>> > > > > root@10:~# echo 21 > /sys/class/gpio/export
>> > > > > root@10:~# echo "rising" > /sys/class/gpio/gpio21/edge
>> > > > > root@10:~# cat /proc/interrupts | grep 21
>> > > > >   47: 0 0 gpio-mxc 21 Edge gpiolib
>> > > > > root@10:~# cat /sys/class/gpio/gpio21/direction
>> > > > > in
>> > > > > root@10:~# cat /proc/irq/47/smp_affinity
>> > > > > 3
>> > > > > root@10:~# echo 2 > /proc/irq/47/smp_affinity
>> > > > > -bash: echo: write error: Input/output error
>> > > > >
>> > > > > But I get input/output error.
>> > > > > When I debug further, found that irq_can_set_affinity is
>> > > > > returning 0:
>> > > > > [    0.000000] genirq: irq_can_set_affinity (0): balance: 1,
>> > > > > irq_data.chip: a81b7e48, irq_set_affinity:   (null)
>> > > > > [    0.000000] write_irq_affinity: FAIL
>> > > > >
>> > > > > I also tried first setting /proc/irq/default_smp_affinity to
>> > > > > 2 (from 3).
>> > > > > This change is working, but the smp_affinity setting for the
>> > > > > new IRQ
>> > > > > is not working.
>> > > > >
>> > > > > When I try to set smp_affinity for mmc0, then it works.
>> > > > > # cat /proc/interrupts | grep mmc
>> > > > > 295:         55          0     GPCV2  22 Edge      mmc0
>> > > > > 296:          0          0     GPCV2  23 Edge      mmc1
>> > > > > 297:         52          0     GPCV2  24 Edge      mmc2
>> > > > >
>> > > > > root@10:~# echo 2 > /proc/irq/295/smp_affinity
>> > > > > root@10:~#
>> > > > >
>> > > > >
>> > > > > So, I wanted to know what are the conditions for which
>> > > > > setting
>> > > > > smp_affinity for an IRQ will work ?
>> > > > >
>> > > > > Is there any way by which I can set CPU affinity to a GPIO ->
>> > > > > IRQ ?
>> > > > > Whether, irq_set_affinity_hint() will work in this case ?
>> > > >
>> > > > IRQ affinity is only supported where interrupts are _directly_
>> > > > wired to
>> > > > the GIC.  It's the GIC which does the interrupt steering to the
>> > > > CPU
>> > > > cores.
>> > > >
>> > > > Interrupts on downstream interrupt controllers (such as GPCV2)
>> > > > have no
>> > > > ability to be directed independently to other CPUs - the only
>> > > > possible
>> > > > way to change the mapping is to move _all_ interrupts on that
>> > > > controller,
>> > > > and any downstream chained interrupts at GIC level.
>> > > >
>> > > > Hence why Interrupt 295 has no irq_set_affinity function: there
>> > > > is no way
>> > > > for the interrupt controller itself to change the affinity of
>> > > > the input
>> > > > interrupt.
>> > >
>> > > The GPCv2 though is a secondary IRQ controller which has a 1:1
>> > > mapping
>> > > of its input IRQs to the upstream GIC IRQ lines. Affinity can
>> > > thus be
>> > > handled by forwarding the request to the GIC by
>> > > irq_chip_set_affinity_parent().
>> > >
>> > > As this is handled correctly in the upstream kernel since the
>> > > first
>> > > commit introducing support for the GPCv2, it seems the issue is
>> > > only
>> > > present in some downstream kernel.
>> > >
>> >
>> > OK. Thanks so much for your reply.
>> >
>> > I saw some of the drivers using irq_set_affinity_hint() to force
>> > the
>> > IRQ affinity to a particular CPU.
>> > This is the sample:
>> > {
>> > cpumask_clear(mask);
>> > cpumask_set_cpu(cpu, mask);
>> > irq_set_affinity_hint(irq, mask);
>> > }
>> >
>> > Whether this logic will work for a particular GPIO pin ?
>> >
>> >
>> > > Regards,
>> > > Lucas

WARNING: multiple messages have this Message-ID (diff)
From: pintu.ping@gmail.com (Pintu Kumar)
To: linux-arm-kernel@lists.infradead.org
Subject: Delivery Status Notification (Failure)
Date: Mon, 14 May 2018 19:58:42 +0530	[thread overview]
Message-ID: <CAOuPNLiZJrDveOHWwvJQ+JLg+j6FOk74oQBKaEq0oqY6w0ko=A@mail.gmail.com> (raw)
In-Reply-To: <1526303498.3494.11.camel@pengutronix.de>

On Mon, May 14, 2018 at 6:41 PM, Lucas Stach <l.stach@pengutronix.de> wrote:
> Am Montag, den 14.05.2018, 17:42 +0530 schrieb Pintu Kumar:
>> Hi,
>>
>> Is there any work around possible to set IRQ affinity for some GPIO
>> interrupt ?
>> How to avoid CPU0 to receive the current GPIO interrupt ?
>> How do we assign GPIO interrupts to any CPU other than CPU0 ?
>> Is it possible to isolate CPU0 for a sometime, from my GPIO driver so
>> that GPIO interrupt can be served by another CPU ?
>>
>> Need your inputs to decide whether it is still possible to set
>> affinity for GPIO interrupt, or its impossible ?
>
> This is not possible. The GPIO IRQs are aggregated into one GPC/GIC IRQ
> line per GPIO bank, so it is not possible to change affinity of a
> single GPIO interrupt to another CPU.

OK. Thanks for your confirmation.

> Best we could do is change the
> affinity of the whole bank,

OK. How can we do this on the fly from my driver code.
If you have any reference please let me know.
This is required only for experimental purpose to prove the point to be mgmt.
My idea is, from the driver, change the affinity of the whole bank.
So, the GPIO interrupt can be delivered on to this specific CPU bank.
Once I am done, I will revert back to the old bank.
Please give me some hint on how to do this from my kernel module....


> but given the limited usefulness of
> something like that, nobody bothered to implement such a thing.
>
> Regards,
> Lucas
>
>>
>>
>> On Fri, May 11, 2018 at 8:07 PM, Pintu Kumar <pintu.ping@gmail.com>
>> wrote:
>> > On Fri, May 11, 2018 at 6:34 PM, Lucas Stach <l.stach@pengutronix.d
>> > e> wrote:
>> > > Am Freitag, den 11.05.2018, 13:39 +0100 schrieb Russell King -
>> > > ARM Linux:
>> > > > On Fri, May 11, 2018 at 05:07:37PM +0530, Pintu Kumar wrote:
>> > > > > Hi,
>> > > > >
>> > > > > I need one help.
>> > > > > I am using i.MX7 Sabre board with kernel version 4.1.15
>> > > > >
>> > > > > Let's say I am interested in GPIO number: 21
>> > > > > I wanted to set CPU affinity for particular GPIO->IRQ number,
>> > > > > so I
>> > > > > tried the below steps:
>> > > > > root at 10:~# echo 21 > /sys/class/gpio/export
>> > > > > root at 10:~# echo "rising" > /sys/class/gpio/gpio21/edge
>> > > > > root at 10:~# cat /proc/interrupts | grep 21
>> > > > >   47: 0 0 gpio-mxc 21 Edge gpiolib
>> > > > > root at 10:~# cat /sys/class/gpio/gpio21/direction
>> > > > > in
>> > > > > root at 10:~# cat /proc/irq/47/smp_affinity
>> > > > > 3
>> > > > > root at 10:~# echo 2 > /proc/irq/47/smp_affinity
>> > > > > -bash: echo: write error: Input/output error
>> > > > >
>> > > > > But I get input/output error.
>> > > > > When I debug further, found that irq_can_set_affinity is
>> > > > > returning 0:
>> > > > > [    0.000000] genirq: irq_can_set_affinity (0): balance: 1,
>> > > > > irq_data.chip: a81b7e48, irq_set_affinity:   (null)
>> > > > > [    0.000000] write_irq_affinity: FAIL
>> > > > >
>> > > > > I also tried first setting /proc/irq/default_smp_affinity to
>> > > > > 2 (from 3).
>> > > > > This change is working, but the smp_affinity setting for the
>> > > > > new IRQ
>> > > > > is not working.
>> > > > >
>> > > > > When I try to set smp_affinity for mmc0, then it works.
>> > > > > # cat /proc/interrupts | grep mmc
>> > > > > 295:         55          0     GPCV2  22 Edge      mmc0
>> > > > > 296:          0          0     GPCV2  23 Edge      mmc1
>> > > > > 297:         52          0     GPCV2  24 Edge      mmc2
>> > > > >
>> > > > > root at 10:~# echo 2 > /proc/irq/295/smp_affinity
>> > > > > root at 10:~#
>> > > > >
>> > > > >
>> > > > > So, I wanted to know what are the conditions for which
>> > > > > setting
>> > > > > smp_affinity for an IRQ will work ?
>> > > > >
>> > > > > Is there any way by which I can set CPU affinity to a GPIO ->
>> > > > > IRQ ?
>> > > > > Whether, irq_set_affinity_hint() will work in this case ?
>> > > >
>> > > > IRQ affinity is only supported where interrupts are _directly_
>> > > > wired to
>> > > > the GIC.  It's the GIC which does the interrupt steering to the
>> > > > CPU
>> > > > cores.
>> > > >
>> > > > Interrupts on downstream interrupt controllers (such as GPCV2)
>> > > > have no
>> > > > ability to be directed independently to other CPUs - the only
>> > > > possible
>> > > > way to change the mapping is to move _all_ interrupts on that
>> > > > controller,
>> > > > and any downstream chained interrupts at GIC level.
>> > > >
>> > > > Hence why Interrupt 295 has no irq_set_affinity function: there
>> > > > is no way
>> > > > for the interrupt controller itself to change the affinity of
>> > > > the input
>> > > > interrupt.
>> > >
>> > > The GPCv2 though is a secondary IRQ controller which has a 1:1
>> > > mapping
>> > > of its input IRQs to the upstream GIC IRQ lines. Affinity can
>> > > thus be
>> > > handled by forwarding the request to the GIC by
>> > > irq_chip_set_affinity_parent().
>> > >
>> > > As this is handled correctly in the upstream kernel since the
>> > > first
>> > > commit introducing support for the GPCv2, it seems the issue is
>> > > only
>> > > present in some downstream kernel.
>> > >
>> >
>> > OK. Thanks so much for your reply.
>> >
>> > I saw some of the drivers using irq_set_affinity_hint() to force
>> > the
>> > IRQ affinity to a particular CPU.
>> > This is the sample:
>> > {
>> > cpumask_clear(mask);
>> > cpumask_set_cpu(cpu, mask);
>> > irq_set_affinity_hint(irq, mask);
>> > }
>> >
>> > Whether this logic will work for a particular GPIO pin ?
>> >
>> >
>> > > Regards,
>> > > Lucas

WARNING: multiple messages have this Message-ID (diff)
From: pintu.ping@gmail.com (Pintu Kumar)
To: kernelnewbies@lists.kernelnewbies.org
Subject: Delivery Status Notification (Failure)
Date: Mon, 14 May 2018 19:58:42 +0530	[thread overview]
Message-ID: <CAOuPNLiZJrDveOHWwvJQ+JLg+j6FOk74oQBKaEq0oqY6w0ko=A@mail.gmail.com> (raw)
In-Reply-To: <1526303498.3494.11.camel@pengutronix.de>

On Mon, May 14, 2018 at 6:41 PM, Lucas Stach <l.stach@pengutronix.de> wrote:
> Am Montag, den 14.05.2018, 17:42 +0530 schrieb Pintu Kumar:
>> Hi,
>>
>> Is there any work around possible to set IRQ affinity for some GPIO
>> interrupt ?
>> How to avoid CPU0 to receive the current GPIO interrupt ?
>> How do we assign GPIO interrupts to any CPU other than CPU0 ?
>> Is it possible to isolate CPU0 for a sometime, from my GPIO driver so
>> that GPIO interrupt can be served by another CPU ?
>>
>> Need your inputs to decide whether it is still possible to set
>> affinity for GPIO interrupt, or its impossible ?
>
> This is not possible. The GPIO IRQs are aggregated into one GPC/GIC IRQ
> line per GPIO bank, so it is not possible to change affinity of a
> single GPIO interrupt to another CPU.

OK. Thanks for your confirmation.

> Best we could do is change the
> affinity of the whole bank,

OK. How can we do this on the fly from my driver code.
If you have any reference please let me know.
This is required only for experimental purpose to prove the point to be mgmt.
My idea is, from the driver, change the affinity of the whole bank.
So, the GPIO interrupt can be delivered on to this specific CPU bank.
Once I am done, I will revert back to the old bank.
Please give me some hint on how to do this from my kernel module....


> but given the limited usefulness of
> something like that, nobody bothered to implement such a thing.
>
> Regards,
> Lucas
>
>>
>>
>> On Fri, May 11, 2018 at 8:07 PM, Pintu Kumar <pintu.ping@gmail.com>
>> wrote:
>> > On Fri, May 11, 2018 at 6:34 PM, Lucas Stach <l.stach@pengutronix.d
>> > e> wrote:
>> > > Am Freitag, den 11.05.2018, 13:39 +0100 schrieb Russell King -
>> > > ARM Linux:
>> > > > On Fri, May 11, 2018 at 05:07:37PM +0530, Pintu Kumar wrote:
>> > > > > Hi,
>> > > > >
>> > > > > I need one help.
>> > > > > I am using i.MX7 Sabre board with kernel version 4.1.15
>> > > > >
>> > > > > Let's say I am interested in GPIO number: 21
>> > > > > I wanted to set CPU affinity for particular GPIO->IRQ number,
>> > > > > so I
>> > > > > tried the below steps:
>> > > > > root at 10:~# echo 21 > /sys/class/gpio/export
>> > > > > root at 10:~# echo "rising" > /sys/class/gpio/gpio21/edge
>> > > > > root at 10:~# cat /proc/interrupts | grep 21
>> > > > >   47: 0 0 gpio-mxc 21 Edge gpiolib
>> > > > > root at 10:~# cat /sys/class/gpio/gpio21/direction
>> > > > > in
>> > > > > root at 10:~# cat /proc/irq/47/smp_affinity
>> > > > > 3
>> > > > > root at 10:~# echo 2 > /proc/irq/47/smp_affinity
>> > > > > -bash: echo: write error: Input/output error
>> > > > >
>> > > > > But I get input/output error.
>> > > > > When I debug further, found that irq_can_set_affinity is
>> > > > > returning 0:
>> > > > > [    0.000000] genirq: irq_can_set_affinity (0): balance: 1,
>> > > > > irq_data.chip: a81b7e48, irq_set_affinity:   (null)
>> > > > > [    0.000000] write_irq_affinity: FAIL
>> > > > >
>> > > > > I also tried first setting /proc/irq/default_smp_affinity to
>> > > > > 2 (from 3).
>> > > > > This change is working, but the smp_affinity setting for the
>> > > > > new IRQ
>> > > > > is not working.
>> > > > >
>> > > > > When I try to set smp_affinity for mmc0, then it works.
>> > > > > # cat /proc/interrupts | grep mmc
>> > > > > 295:         55          0     GPCV2  22 Edge      mmc0
>> > > > > 296:          0          0     GPCV2  23 Edge      mmc1
>> > > > > 297:         52          0     GPCV2  24 Edge      mmc2
>> > > > >
>> > > > > root at 10:~# echo 2 > /proc/irq/295/smp_affinity
>> > > > > root at 10:~#
>> > > > >
>> > > > >
>> > > > > So, I wanted to know what are the conditions for which
>> > > > > setting
>> > > > > smp_affinity for an IRQ will work ?
>> > > > >
>> > > > > Is there any way by which I can set CPU affinity to a GPIO ->
>> > > > > IRQ ?
>> > > > > Whether, irq_set_affinity_hint() will work in this case ?
>> > > >
>> > > > IRQ affinity is only supported where interrupts are _directly_
>> > > > wired to
>> > > > the GIC.  It's the GIC which does the interrupt steering to the
>> > > > CPU
>> > > > cores.
>> > > >
>> > > > Interrupts on downstream interrupt controllers (such as GPCV2)
>> > > > have no
>> > > > ability to be directed independently to other CPUs - the only
>> > > > possible
>> > > > way to change the mapping is to move _all_ interrupts on that
>> > > > controller,
>> > > > and any downstream chained interrupts at GIC level.
>> > > >
>> > > > Hence why Interrupt 295 has no irq_set_affinity function: there
>> > > > is no way
>> > > > for the interrupt controller itself to change the affinity of
>> > > > the input
>> > > > interrupt.
>> > >
>> > > The GPCv2 though is a secondary IRQ controller which has a 1:1
>> > > mapping
>> > > of its input IRQs to the upstream GIC IRQ lines. Affinity can
>> > > thus be
>> > > handled by forwarding the request to the GIC by
>> > > irq_chip_set_affinity_parent().
>> > >
>> > > As this is handled correctly in the upstream kernel since the
>> > > first
>> > > commit introducing support for the GPCv2, it seems the issue is
>> > > only
>> > > present in some downstream kernel.
>> > >
>> >
>> > OK. Thanks so much for your reply.
>> >
>> > I saw some of the drivers using irq_set_affinity_hint() to force
>> > the
>> > IRQ affinity to a particular CPU.
>> > This is the sample:
>> > {
>> > cpumask_clear(mask);
>> > cpumask_set_cpu(cpu, mask);
>> > irq_set_affinity_hint(irq, mask);
>> > }
>> >
>> > Whether this logic will work for a particular GPIO pin ?
>> >
>> >
>> > > Regards,
>> > > Lucas

  reply	other threads:[~2018-05-14 14:28 UTC|newest]

Thread overview: 183+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-11 11:34 Not able to set smp_affinity for an IRQ on i.MX7 Pintu Kumar
2018-05-11 11:34 ` Pintu Kumar
     [not found] ` <5af57fea.1c69fb81.885f0.2377.GMRIR@mx.google.com>
2018-05-11 11:37   ` Delivery Status Notification (Failure) Pintu Kumar
2018-05-11 11:37     ` Pintu Kumar
2018-05-11 11:37     ` Pintu Kumar
2018-05-11 12:39     ` Russell King - ARM Linux
2018-05-11 12:39       ` Russell King - ARM Linux
2018-05-11 13:04       ` Lucas Stach
2018-05-11 13:04         ` Lucas Stach
2018-05-11 13:04         ` Lucas Stach
2018-05-11 14:37         ` Pintu Kumar
2018-05-11 14:37           ` Pintu Kumar
2018-05-11 14:37           ` Pintu Kumar
2018-05-14 12:12           ` Pintu Kumar
2018-05-14 12:12             ` Pintu Kumar
2018-05-14 12:12             ` Pintu Kumar
2018-05-14 13:11             ` Lucas Stach
2018-05-14 13:11               ` Lucas Stach
2018-05-14 13:11               ` Lucas Stach
2018-05-14 14:28               ` Pintu Kumar [this message]
2018-05-14 14:28                 ` Pintu Kumar
2018-05-14 14:28                 ` Pintu Kumar
2018-05-17 13:28                 ` Pintu Kumar
2018-05-17 13:28                   ` Pintu Kumar
2018-05-17 13:28                   ` Pintu Kumar
2018-05-21 18:51                   ` Pintu Kumar
2018-05-21 18:51                     ` Pintu Kumar
2018-05-21 18:51                     ` Pintu Kumar
  -- strict thread matches above, loose matches on Subject: below --
2022-06-09 21:08 postmaster
     [not found] <CAFF4x5LfJ7qY73JE-=mah5vx9PdeNhc0i0X6kQohPpvDTCd3Sw@mail.gmail.com>
     [not found] ` <5cff8197.1c69fb81.4940.6de6.GMR@mx.google.com>
2019-06-11 10:29   ` Xeno Amess
     [not found] <5c62b41d.1c69fb81.fe791.877b@mx.google.com>
     [not found] ` <CAFacdQ-soWD176VHgd+raHaV=VPpzKXrDrLFavPcNEoewZwBYA@mail.gmail.com>
     [not found]   ` <5c657002.1c69fb81.d433c.32ce.GMR@mx.google.com>
2019-02-18 10:46     ` Senol Yazici
2019-02-18 16:12       ` Randall S. Becker
2019-02-18 20:59       ` Johannes Schindelin
2019-02-19  1:08         ` Jason Pyeron
2018-10-29 16:50 [PATCH] fstest: CrashMonkey tests ported to xfstest Jayashree Mohan
2018-11-04 16:38 ` Eryu Guan
2018-11-04 20:21   ` Jayashree Mohan
2018-11-05  5:22     ` Dave Chinner
2018-11-05 20:16       ` Jayashree Mohan
2018-11-06 23:15         ` Theodore Y. Ts'o
2018-11-06 23:39           ` Dave Chinner
     [not found]             ` <CA+EzBbDwdi26MCswz0iQ8hUTcGixATUXayxMOmEw5gekYvmMuw@mail.gmail.com>
     [not found]               ` <5be228d2.1c69fb81.3ad08.5e76.GMR@mx.google.com>
2018-11-06 23:54                 ` Delivery Status Notification (Failure) Jayashree Mohan
2017-11-23 18:51 Problem installing Git Phil Martel
2017-11-23 21:30 ` Igor Djordjevic
     [not found]   ` <001a1148fe243ade02055ead2599@google.com>
2017-11-23 21:41     ` Delivery Status Notification (Failure) Igor Djordjevic
2017-10-06 10:25 "BTRFS error (device vda1): couldn't get super buffer head for bytenr x" Nick Gilmour
2017-10-07  0:08 ` Liu Bo
2017-10-08 15:39   ` Nick Gilmour
2017-10-08 21:03     ` Chris Murphy
     [not found]       ` <CAH-drozNA1N6xO2dAknLD-JQu75BAEi+GpiEibA-R-Zk1U7xmA@mail.gmail.com>
2017-10-09  9:28         ` Chris Murphy
     [not found]           ` <CAH-drozVaiXMoXqs8hiHvd5n8qDvbGLnp=1OPndsibhxjGkNxw@mail.gmail.com>
     [not found]             ` <59df4db2.8508370a.40c79.2c64.GMRIR@mx.google.com>
2017-10-12 11:12               ` Delivery Status Notification (Failure) Nick Gilmour
2017-06-10 23:36 f4da1594
2017-06-09  8:26 f4da1594
2017-06-09  8:25 f4da1594
2017-06-09  8:16 f4da1594
2017-05-16 23:22 [Bug] git branch -v has problems with carriage returns Animi Vulpis
     [not found] ` <CA+izobutP-JY84RGG-JbPA5twbckL1uVwxknBRLVTuGG0MEJcg@mail.gmail.com>
     [not found]   ` <CA+izobuSKtoQzNJuvuisjh7h3FF=nbt8u-hOHfdeFp8ZjgZF+Q@mail.gmail.com>
     [not found]     ` <591f6844.82dcca0a.451e5.8f76.GMRIR@mx.google.com>
2017-05-19 21:51       ` Delivery Status Notification (Failure) Atousa Duprat
2017-01-19 14:04 [meta-rockchip][PATCH 0/7] introduce rockchip offical linux support to meta-rockchip Jacob Chen
2017-01-19 14:04 ` [meta-rockchip][PATCH 2/7] machine: Add machine file for the rk3288 linux Boards Jacob Chen
2017-01-27 14:37   ` Romain Perier
2017-01-27 19:41     ` Trevor Woerner
     [not found]       ` <588ba270.4c18370a.3b01f.9247.GMRIR@mx.google.com>
2017-01-27 19:46         ` Delivery Status Notification (Failure) Trevor Woerner
     [not found] <CAP1NbjmewVTQ6KbY7fkgdhJ6iMSg0tO9g1P6Usymi3EmfmVA8w@mail.gmail.com>
     [not found] ` <089e010d935cc850e4052a580ec2@google.com>
2016-01-27 22:25   ` André Vitor
     [not found] <047d7b5dbb76a0065405207cfe24@google.com>
2015-09-24 12:03 ` Fwd: " Naveen
2015-09-24 13:09   ` Jiri Benc
2015-06-19  4:39 Mail Delivery Subsystem
2015-03-23  5:27 Sysfs requirement for running generic_buffer.c application - IIO sensors s.rawat
     [not found] ` <001a114904d6cd775e0511edee6f@google.com>
2015-03-23  5:44   ` Delivery Status Notification (Failure) s.rawat
     [not found] <CAFAMDXb-_8WAMw7qOdAyJQKuLwtg+kAYOJO7xivCq7OTMyB26Q@mail.gmail.com>
     [not found] ` <047d7b2ed8ab924fe60510bc0ea0@google.com>
2015-03-08  0:36   ` Amate Yolande
2015-03-01  9:46 Mail Delivery System
2015-02-28  4:14 Mail Delivery System
2015-01-29  6:34 Mail Delivery Subsystem
     [not found] <CACsJT9OOBcYNhNG6=+Q2EE4VHEvJ8_rJ3fr6gb9_3P4KpPPX3g@mail.gmail.com>
     [not found] ` <f46d043c061e8dd5c9050cb5990c@google.com>
2015-01-15 19:34   ` Mike Purvis
2015-01-15 20:39     ` Pat Erley
2015-01-15 21:00       ` Mike Purvis
2015-01-15 21:07         ` Pat Erley
2015-01-15 21:13       ` Johannes Berg
2015-01-16 14:30         ` Mike Purvis
2014-11-04 20:01 postmaster-PkbjNfxxIARBDgjK7y7TUQ
2014-10-01  5:41 postmaster-fYpdDop0OZA0n/F98K4Iww
2014-09-30 18:12 postmaster-q/cFvQ9GnvMKy9bYqjDATw
     [not found] <CAPDOMVhGTywBdA9W6cfE6bNb3CiM6Ei5rUi0OySO4dM3DbKX-w@mail.gmail.com>
     [not found] ` <20cf307f30f822dc1504fffa98ec@google.com>
2014-08-06 19:07   ` Nick Krause
2014-08-06 19:29     ` Valdis.Kletnieks at vt.edu
2014-08-07  6:45       ` priyaranjan
2014-08-07 12:29         ` Pramod Gurav
2014-08-07 17:14           ` Nick Krause
2014-08-07 20:11             ` Valdis.Kletnieks at vt.edu
2014-08-07 20:33               ` Nick Krause
2014-08-05 15:03 postmaster-+dl5rZIG5bfiBhKkSJXxiPXRex20P6io
2014-08-05  6:47 Mail Delivery Subsystem
2014-07-22  7:02 postmaster-EunbckgpuBjP01IbtRslpbpzq4S04n8Q
     [not found] <CAOAoqGuLffRn8SgkB0967U0Qvg8HWnxvL5Uq4EZk7Vxw1jiSJw@mail.gmail.com>
     [not found] ` <001a11c2fcca7727e504f3e8d518@google.com>
2014-03-06  5:03   ` Jagdish Gedia
2014-03-06 15:25     ` Alan Stern
2014-02-21  8:31 Mail Delivery System
     [not found] <CAFJTrDsaq-NjLhcwHBuN1Q_zu-Q-yJkWLMUER1zVzc1=AFNM=Q@mail.gmail.com>
     [not found] ` <047d7b86e7727b700204ea828c1d@google.com>
2013-11-06 14:06   ` Matthew Minter
     [not found] <CAOna0f2V=Aw8isLVkQy9RUKT60JOq0prsXuEVQke=QRjbRWUSg@mail.gmail.com>
     [not found] ` <047d7b86daaa49592f04e3146f9d@google.com>
2013-08-04  0:51   ` Jesper Utoft
2013-06-11 18:09 postmaster-2WHbO6Ght55OhR2lhbcafA
2013-03-27  9:54 postmaster-ohsCnglPHPkmHH771XGohA
2013-03-26 23:07 postmaster-ERNa7u4uiwD/PTVKMIaDyQ
     [not found] <CAN_hzmqrrue8jif3AJv4pZwmyMpQ6u558HaRX6dQKZCF0c_H1w@mail.gmail.com>
     [not found] ` <bcaec5396b50ba47be04d7e99955@google.com>
2013-03-14 22:01   ` Harring Figueiredo
2013-03-14 22:12     ` Junio C Hamano
2013-03-14 23:36       ` Harring Figueiredo
2012-10-29  7:02 Mail Delivery Subsystem
2012-10-24  4:28 postmaster-xqsl9BtirPbEI5Av7rMDOw
     [not found] <CAGfy=6=se6CXExQyyA7TrAjUVkGqRwGL=E1wqo4h4_6ORzS-MA@mail.gmail.com>
     [not found] ` <f46d0438909985742c04cc3f658c@google.com>
2012-10-18 11:19   ` hemant surale
2012-10-29  9:27     ` hemant surale
2012-10-29 20:19       ` Dan Mick
     [not found] <CANQmPXicmUAVwHHs0VrbRd3MU_41wnv-Ant2r7c3FOuvEOuROQ@mail.gmail.com>
     [not found] ` <e89a8f235453a906b704c472eacd@google.com>
2012-07-17 11:09   ` Chen
2012-04-11 13:24 postmaster-dK7EesNU6FY
2012-04-11 13:08 postmaster-86/RSF40sML81It4hiB8CFo/9dUJfHaYQQ4Iyu8u01E
2012-04-11 13:04 postmaster-86/RSF40sMJNBHnkq6ukOFo/9dUJfHaYQQ4Iyu8u01E
2012-04-09  7:38 Mail Delivery System
2012-04-09  7:38 Mail Delivery System
2012-04-09  7:38 Mail Delivery System
2012-04-09  7:38 Mail Delivery System
2012-04-09  7:38 Mail Delivery System
2012-04-05 14:16 IBS11
2012-04-02 21:56 IBS11
2012-03-29 14:36 postmaster-Y8CQj97R1LIkmLvzuZlaBw
2012-03-29 11:20 postmaster-pEPTqz2WXgqNj9Bq2fkWzw
2012-03-28  3:36 Mail Delivery System
2012-03-22 13:47 postmaster-qMKci2gRNKhcMntx7duxhRL4W9x8LtSr
2012-03-22 13:47 postmaster-qMKci2gRNKhcMntx7duxhRL4W9x8LtSr
2012-03-22 13:47 postmaster-qMKci2gRNKhcMntx7duxhRL4W9x8LtSr
2012-03-22 13:47 postmaster-qMKci2gRNKhcMntx7duxhRL4W9x8LtSr
2012-03-22 13:47 postmaster-qMKci2gRNKhcMntx7duxhRL4W9x8LtSr
2012-03-08 14:41 Mail Delivery System
2012-03-08  6:18 Mail Delivery System
2012-03-07 22:52 Mail Delivery System
2012-03-01 19:42 Mail Delivery Subsystem
2012-03-01 12:30 postmaster-wGBAL9bNL4J2HSIiUldxkQdIgGIafgBh
     [not found] <CAAymXMrufs69Vg=O3Kt7Ot3kYERP=55TMFiHGkV75mUFkzr74A@mail.gmail.com>
     [not found] ` <001636c927b40af7cb04ba0aca6e@google.com>
2012-02-28 19:02   ` Rajat Khanduja
2012-02-28 19:48     ` Jeff King
2012-02-28  9:22 postmaster-Oy8cep8j1bSEVqv0pETR8A
2012-02-21  2:37 postmaster-ORiaYrpEo8U
2012-01-25 16:36 postmaster-Y8CQj97R1LIkmLvzuZlaBw
2012-01-25 16:36 postmaster-Y8CQj97R1LIkmLvzuZlaBw
2011-12-21 15:44 Mail Delivery System
2011-12-21 15:44 Mail Delivery System
2011-12-21 15:44 Mail Delivery System
2011-12-21 15:44 Mail Delivery System
2011-12-21 15:44 Mail Delivery System
2011-11-30  5:20 Mail Delivery System
2011-11-18 20:10 Mail Delivery System
2011-11-18 20:10 Mail Delivery System
2011-11-18 20:10 Mail Delivery System
2011-11-18 20:10 Mail Delivery System
2011-11-17  4:47 postmaster-EsMd/MeLYiF8uUxBSJOaYoYkZiVZrdSR2LY78lusg7I
2011-11-15 18:46 postmaster-DMvgxKAs6cU
2011-11-15 14:13 postmaster-mTV6ATcrTWY
2011-11-15 13:05 postmaster-DeuEFqYn60tmR6Xm/wNWPw
2011-11-15  9:13 postmaster-SJlmH/QgL93GjfRZg6uqBA
2011-11-15  5:29 postmaster-cK1r3kULcUuEVqv0pETR8A
2011-07-11  8:13 Mail Delivery Subsystem
     [not found] <BANLkTim5MekMVbzZE34g_V6v0QJVj7c9xA@mail.gmail.com>
     [not found] ` <000e0ce00a58298def04a6fca5b9@google.com>
2011-07-01  7:06   ` Eponymous -
2011-06-09 11:05 postmaster-pwEU/PgbHn2CsG0aXnmMvw
     [not found] <BANLkTin+Qn9FzvTJauOPVCJnk8v4ajVnSw@mail.gmail.com>
     [not found] ` <000e0cd5cff499795e04a05dc387@google.com>
2011-04-08  2:41   ` David Xu
     [not found] <AANLkTin2ZjkkFOrwo++EZw0arQnsMrqzy0drUF6WrqDm@mail.gmail.com>
     [not found] ` <20cf30564493a84040049c39612f@google.com>
2011-02-14  8:08   ` wu meng
2011-02-14  9:15     ` Jens Axboe
2010-12-09 17:01 Mail Delivery Subsystem
     [not found] <AANLkTi=+0BOUaTs73jRMnJ=9qyNkqnBvMuKVTG4od9_+@mail.gmail.com>
     [not found] ` <0022152d6729673f6a0494b1f2e6@google.com>
2010-11-10 12:25   ` miloofr
     [not found] <001636833518b9ca2e049488651a@google.com>
2010-11-08 10:52 ` J Webster
     [not found] <AANLkTine9j=PsfsOPmEWmDLUDrHCJF0MQ6X+6XJkQD0d@mail.gmail.com>
     [not found] ` <0015174c437c389602048ce7f16c@google.com>
2010-08-03  9:31   ` Simon Grönlund
     [not found] <AANLkTilb4hhy3BYp6OvpyGAe7vCQQjaPEmi12NxDdP9i@mail.gmail.com>
     [not found] ` <001485f795f4535fdd048790ecd6@google.com>
2010-05-27 12:10   ` Daniele Madama
2010-05-27 21:00     ` Luca Berra
     [not found] <1ca41c0f1003031952u7a9ea0w5adf4f0438b8fe0c@mail.gmail.com>
     [not found] ` <0016e646086875cfde0480f186a0@google.com>
2010-03-04  3:53   ` Karthik Singaram Lakshmanan
     [not found] <237044a41001312327i4ccb159aj641abc62b138fc1f@mail.gmail.com>
     [not found] ` <0016e6480ebeedd980047e84e9cc@google.com>
2010-02-01  8:14   ` tingwei liu
2010-01-29 14:17 Implement --password option for git svn perl script Laszlo Papp
     [not found] ` <001636ed7681994278047e4e4a6f@google.com>
2010-01-29 14:18   ` Fwd: Delivery Status Notification (Failure) Laszlo Papp
2010-01-29 15:04     ` Frank Li
2010-02-01 16:16       ` Laszlo Papp
2010-02-02  4:15       ` Tay Ray Chuan
2010-02-02  4:30         ` Frank Li
2010-02-02  6:37           ` Laszlo Papp
     [not found] <2cc9eb1b0910191004q1f9541d3od3163c2d80f5c835@mail.gmail.com>
     [not found] ` <0015175d06406e924104764cbc50@googlemail.com>
2009-10-19 17:08   ` fabio
2008-11-14 15:38 For review: pthread_setaffinity_np.3 Michael Kerrisk
     [not found] ` <001636c5b6831e5a44045ba80779@googlemail.com>
     [not found]   ` <001636c5b6831e5a44045ba80779-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
2008-11-14 15:45     ` Delivery Status Notification (Failure) Michael Kerrisk
     [not found]       ` <cfd18e0f0811140745k69075aend9686e463c9c1a4d-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2008-11-14 15:56         ` Bert Wesarg
     [not found]           ` <36ca99e90811140756q7c445d5ei7c31c5b59df7c7a7-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2008-11-14 16:02             ` Michael Kerrisk
     [not found]               ` <cfd18e0f0811140802i2c06e0am164648735fa7dda3-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2008-11-14 16:26                 ` Christoph Lameter
     [not found]                   ` <Pine.LNX.4.64.0811141026080.24886-dRBSpnHQED8AvxtiuMwx3w@public.gmane.org>
2008-11-14 16:39                     ` Christoph Lameter
     [not found]                       ` <Pine.LNX.4.64.0811141038510.25195-dRBSpnHQED8AvxtiuMwx3w@public.gmane.org>
2008-11-14 16:43                         ` Michael Kerrisk
     [not found]                           ` <cfd18e0f0811140843q42971316wfade996b67aa2a6-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2008-11-14 20:45                             ` David Rientjes
     [not found] <00c09f923a4c04465d1a677fdd7aaa@googlemail.com>
2008-02-17 16:30 ` Sisir Koppaka
     [not found] <000e0cd299d8043b9fc15979843eaf@googlemail.com>
2007-10-04  0:23 ` Robert Pajak
2007-08-03  6:22 Mail Delivery System
2007-05-31 21:26 postmaster
2007-05-18 17:46 Mail Delivery System
2006-12-05  7:09 Mail Delivery System
2005-12-05 23:50 postmaster
2005-11-23 20:37 postmaster
2005-02-13 17:37 postmaster
2004-11-30 11:17 postmaster
2004-08-03 14:02 Test Person2
2004-07-11  6:06 adsadnbs
2004-05-12 12:56 postmaster
2004-05-12  9:46 postmaster
2004-04-27 14:35 postmaster
2004-04-08  4:10 postmaster
2004-03-29 10:33 postmaster
2004-03-15 19:16 postmaster
2003-09-01 21:42 postmaster-a6Zz2GAMxShWk0Htik3J/w
2003-09-01 21:31 postmaster
2003-08-31  1:33 postmaster-GvrGQ0sgSj//MRS1mQlstNa2gSz7necR9FMPySWZwLkb1SvskN2V4Q
2003-08-27 22:58 postmaster
2003-08-21 20:59 postmaster-YNHfkfoICe87lZ9V/NTDHw
2003-07-01 14:47 postmaster

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