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From: Peng Fan <peng.fan@nxp.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	"Peng Fan (OSS)" <peng.fan@oss.nxp.com>,
	Abel Vesa <abelvesa@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>
Cc: "linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
	"imx@lists.linux.dev" <imx@lists.linux.dev>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v4 5/6] dt-bindindgs: clock: nxp: support i.MX95 Display CSR module
Date: Mon, 18 Mar 2024 12:37:34 +0000	[thread overview]
Message-ID: <DU0PR04MB94170C3364CF2F522C515D00882D2@DU0PR04MB9417.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <b4fe2ffa-bd36-404a-9441-8781f0a81d26@linaro.org>

> Subject: Re: [PATCH v4 5/6] dt-bindindgs: clock: nxp: support i.MX95 Display
> CSR module
> 
> On 14/03/2024 14:25, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > The DISPLAY_CSR provides control and status of the following:
> >  Clock selection for the Display Engines  Pixel Interleaver mode
> > selection  Pixel Link enables  QoS settings for the display controller
> > ArCache and AwCache signals  Display Engine plane association
> >
> > This patch is to add the clock features for this module
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  .../bindings/clock/nxp,imx95-display-csr.yaml      | 50
> ++++++++++++++++++++++
> >  include/dt-bindings/clock/nxp,imx95-clock.h        |  4 ++
> >  2 files changed, 54 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/clock/nxp,imx95-display-csr.yaml
> > b/Documentation/devicetree/bindings/clock/nxp,imx95-display-csr.yaml
> > new file mode 100644
> > index 000000000000..9a5e21346b0d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-display-csr.ya
> > +++ ml
> > @@ -0,0 +1,50 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > +cetree.org%2Fschemas%2Fclock%2Fnxp%2Cimx95-display-
> csr.yaml%23&data=0
> >
> +5%7C02%7Cpeng.fan%40nxp.com%7C479f8c47bd4d421a669708dc45316f1
> 2%7C686e
> >
> +a1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638461325839625184%7
> CUnknown%7
> >
> +CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haW
> wiLCJX
> >
> +VCI6Mn0%3D%7C0%7C%7C%7C&sdata=rntSlDs8ASXSb3L%2F9ZCzgW%2Bzo
> v2LU9vcTD7
> > +SvjE37Nw%3D&reserved=0
> > +$schema:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > +cetree.org%2Fmeta-
> schemas%2Fcore.yaml%23&data=05%7C02%7Cpeng.fan%40nx
> >
> +p.com%7C479f8c47bd4d421a669708dc45316f12%7C686ea1d3bc2b4c6fa9
> 2cd99c5c
> >
> +301635%7C0%7C0%7C638461325839637072%7CUnknown%7CTWFpbGZs
> b3d8eyJWIjoiM
> >
> +C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7
> C%7C%7
> >
> +C&sdata=%2BjYpR8p7IDjRzV39hJhtv8FozALx9HqqLhoFgwBJCm4%3D&reserv
> ed=0
> > +
> > +title: NXP i.MX95 Display Block Control
> > +
> > +maintainers:
> > +  - Peng Fan <peng.fan@nxp.com>
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - const: nxp,imx95-display-csr
> > +      - const: syscon
> 
> Why do you create five different bindings with almost the same contents?
> Do you plan to grow on them, like add more compatibles here? Otherwise all
> this could be in one binding.

The blk ctrls are for different functions.

We may expand the bindings to add more properties for the blk ctrls, but I
am not sure as of now. I could merge them into one binding except
the one with mux-controller if you prefer. Or leave them as is, still
separate binding files.

Thanks,
Peng.

> 
> Best regards,
> Krzysztof


WARNING: multiple messages have this Message-ID (diff)
From: Peng Fan <peng.fan@nxp.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	"Peng Fan (OSS)" <peng.fan@oss.nxp.com>,
	Abel Vesa <abelvesa@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Shawn Guo <shawnguo@kernel.org>,
	Sascha Hauer <s.hauer@pengutronix.de>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>
Cc: "linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
	"imx@lists.linux.dev" <imx@lists.linux.dev>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH v4 5/6] dt-bindindgs: clock: nxp: support i.MX95 Display CSR module
Date: Mon, 18 Mar 2024 12:37:34 +0000	[thread overview]
Message-ID: <DU0PR04MB94170C3364CF2F522C515D00882D2@DU0PR04MB9417.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <b4fe2ffa-bd36-404a-9441-8781f0a81d26@linaro.org>

> Subject: Re: [PATCH v4 5/6] dt-bindindgs: clock: nxp: support i.MX95 Display
> CSR module
> 
> On 14/03/2024 14:25, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > The DISPLAY_CSR provides control and status of the following:
> >  Clock selection for the Display Engines  Pixel Interleaver mode
> > selection  Pixel Link enables  QoS settings for the display controller
> > ArCache and AwCache signals  Display Engine plane association
> >
> > This patch is to add the clock features for this module
> >
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  .../bindings/clock/nxp,imx95-display-csr.yaml      | 50
> ++++++++++++++++++++++
> >  include/dt-bindings/clock/nxp,imx95-clock.h        |  4 ++
> >  2 files changed, 54 insertions(+)
> >
> > diff --git
> > a/Documentation/devicetree/bindings/clock/nxp,imx95-display-csr.yaml
> > b/Documentation/devicetree/bindings/clock/nxp,imx95-display-csr.yaml
> > new file mode 100644
> > index 000000000000..9a5e21346b0d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/clock/nxp,imx95-display-csr.ya
> > +++ ml
> > @@ -0,0 +1,50 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2
> > +---
> > +$id:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > +cetree.org%2Fschemas%2Fclock%2Fnxp%2Cimx95-display-
> csr.yaml%23&data=0
> >
> +5%7C02%7Cpeng.fan%40nxp.com%7C479f8c47bd4d421a669708dc45316f1
> 2%7C686e
> >
> +a1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638461325839625184%7
> CUnknown%7
> >
> +CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haW
> wiLCJX
> >
> +VCI6Mn0%3D%7C0%7C%7C%7C&sdata=rntSlDs8ASXSb3L%2F9ZCzgW%2Bzo
> v2LU9vcTD7
> > +SvjE37Nw%3D&reserved=0
> > +$schema:
> > +https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevi
> > +cetree.org%2Fmeta-
> schemas%2Fcore.yaml%23&data=05%7C02%7Cpeng.fan%40nx
> >
> +p.com%7C479f8c47bd4d421a669708dc45316f12%7C686ea1d3bc2b4c6fa9
> 2cd99c5c
> >
> +301635%7C0%7C0%7C638461325839637072%7CUnknown%7CTWFpbGZs
> b3d8eyJWIjoiM
> >
> +C4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C0%7
> C%7C%7
> >
> +C&sdata=%2BjYpR8p7IDjRzV39hJhtv8FozALx9HqqLhoFgwBJCm4%3D&reserv
> ed=0
> > +
> > +title: NXP i.MX95 Display Block Control
> > +
> > +maintainers:
> > +  - Peng Fan <peng.fan@nxp.com>
> > +
> > +properties:
> > +  compatible:
> > +    items:
> > +      - const: nxp,imx95-display-csr
> > +      - const: syscon
> 
> Why do you create five different bindings with almost the same contents?
> Do you plan to grow on them, like add more compatibles here? Otherwise all
> this could be in one binding.

The blk ctrls are for different functions.

We may expand the bindings to add more properties for the blk ctrls, but I
am not sure as of now. I could merge them into one binding except
the one with mux-controller if you prefer. Or leave them as is, still
separate binding files.

Thanks,
Peng.

> 
> Best regards,
> Krzysztof


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2024-03-18 12:37 UTC|newest]

Thread overview: 46+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-03-14 13:25 [PATCH v4 0/6] Add support i.MX95 BLK CTL module clock features Peng Fan (OSS)
2024-03-14 13:25 ` Peng Fan (OSS)
2024-03-14 13:25 ` [PATCH v4 1/6] dt-bindindgs: clock: nxp: support i.MX95 VPU CSR module Peng Fan (OSS)
2024-03-14 13:25   ` Peng Fan (OSS)
2024-03-15 16:54   ` Rob Herring
2024-03-15 16:54     ` Rob Herring
2024-03-15 20:47   ` Krzysztof Kozlowski
2024-03-15 20:47     ` Krzysztof Kozlowski
2024-03-18  7:15     ` Peng Fan
2024-03-18  7:15       ` Peng Fan
2024-03-14 13:25 ` [PATCH v4 2/6] dt-bindindgs: clock: nxp: support i.MX95 Camera " Peng Fan (OSS)
2024-03-14 13:25   ` Peng Fan (OSS)
2024-03-15 17:24   ` Rob Herring
2024-03-15 17:24     ` Rob Herring
2024-03-14 13:25 ` [PATCH v4 3/6] dt-bindindgs: clock: nxp: support i.MX95 Display Master " Peng Fan (OSS)
2024-03-14 13:25   ` Peng Fan (OSS)
2024-03-15 17:26   ` Rob Herring
2024-03-15 17:26     ` Rob Herring
2024-03-14 13:25 ` [PATCH v4 4/6] dt-bindindgs: clock: nxp: support i.MX95 LVDS " Peng Fan (OSS)
2024-03-14 13:25   ` Peng Fan (OSS)
2024-03-15 17:27   ` Rob Herring
2024-03-15 17:27     ` Rob Herring
2024-03-14 13:25 ` [PATCH v4 5/6] dt-bindindgs: clock: nxp: support i.MX95 Display " Peng Fan (OSS)
2024-03-14 13:25   ` Peng Fan (OSS)
2024-03-15 20:49   ` Krzysztof Kozlowski
2024-03-15 20:49     ` Krzysztof Kozlowski
2024-03-18 12:37     ` Peng Fan [this message]
2024-03-18 12:37       ` Peng Fan
2024-03-18 15:44       ` Krzysztof Kozlowski
2024-03-18 15:44         ` Krzysztof Kozlowski
2024-03-14 13:25 ` [PATCH v4 6/6] clk: imx: add i.MX95 BLK CTL clk driver Peng Fan (OSS)
2024-03-14 13:25   ` Peng Fan (OSS)
2024-03-17 15:59 ` [PATCH v4 0/6] Add support i.MX95 BLK CTL module clock features Marco Felsch
2024-03-17 15:59   ` Marco Felsch
2024-03-18  1:22   ` Peng Fan
2024-03-18  1:22     ` Peng Fan
2024-03-18  9:59     ` Marco Felsch
2024-03-18  9:59       ` Marco Felsch
2024-03-18 11:01       ` Peng Fan
2024-03-18 11:01         ` Peng Fan
2024-03-18 14:07         ` Marco Felsch
2024-03-18 14:07           ` Marco Felsch
2024-03-18 23:11           ` Peng Fan
2024-03-18 23:11             ` Peng Fan
2024-03-19  7:17             ` Marco Felsch
2024-03-19  7:17               ` Marco Felsch

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