From: Biju Das <biju.das.jz@bp.renesas.com>
To: Wolfram Sang <wsa+renesas@sang-engineering.com>
Cc: "linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>,
"linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Ulf Hansson <ulf.hansson@linaro.org>
Subject: RE: [PATCH v3] dt-bindings: mmc: renesas,sdhi: add optional SDnH clock
Date: Mon, 15 Nov 2021 20:24:54 +0000 [thread overview]
Message-ID: <OS0PR01MB592241C04F5CDDB94D850FFA86989@OS0PR01MB5922.jpnprd01.prod.outlook.com> (raw)
In-Reply-To: <YZKz/ptgPfzqGfeq@kunai>
Hi Wolfram,
> Subject: Re: [PATCH v3] dt-bindings: mmc: renesas,sdhi: add optional SDnH
> clock
>
>
> > > + if:
> > > + properties:
> > > + compatible:
> > > + contains:
> > > + enum:
> > > + - renesas,rcar-gen2-sdhi
> > > + - renesas,rcar-gen3-sdhi
> >
> > What about RZ/G2L, as it has 4 clocks?
>
> They are a few lines above this in a seperate block if I am not confusing
> the SoC numbering.
Ah ok, I thought, since RZ/G2L using generic rcar-gen3-sdhi compatible, We need to move that
Separate block inside this if block. With in gen3 compatible, if RZG2L then
Max 4 clocks else Max 3 Clocks. I may be completely wrong.
Regards,
Biju
next prev parent reply other threads:[~2021-11-15 21:19 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-15 16:06 [PATCH v3] dt-bindings: mmc: renesas,sdhi: add optional SDnH clock Wolfram Sang
2021-11-15 16:31 ` Biju Das
2021-11-15 19:24 ` Wolfram Sang
2021-11-15 20:24 ` Biju Das [this message]
2021-11-16 10:26 ` Geert Uytterhoeven
2021-11-16 11:26 ` Biju Das
2021-11-16 13:22 ` Geert Uytterhoeven
2021-11-16 16:09 ` Biju Das
2021-11-16 19:41 ` Biju Das
2021-11-16 20:29 ` Wolfram Sang
2021-11-17 14:00 ` Biju Das
2021-11-17 10:31 ` Wolfram Sang
2021-11-17 11:43 ` Biju Das
2021-11-19 10:12 ` Geert Uytterhoeven
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