From: Wolfram Sang <wsa+renesas@sang-engineering.com>
To: Biju Das <biju.das.jz@bp.renesas.com>
Cc: "linux-renesas-soc@vger.kernel.org"
<linux-renesas-soc@vger.kernel.org>,
"linux-mmc@vger.kernel.org" <linux-mmc@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Ulf Hansson <ulf.hansson@linaro.org>
Subject: Re: [PATCH v3] dt-bindings: mmc: renesas,sdhi: add optional SDnH clock
Date: Mon, 15 Nov 2021 20:24:46 +0100 [thread overview]
Message-ID: <YZKz/ptgPfzqGfeq@kunai> (raw)
In-Reply-To: <OS0PR01MB59220D97CD59F44918DE4FA586989@OS0PR01MB5922.jpnprd01.prod.outlook.com>
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> > + if:
> > + properties:
> > + compatible:
> > + contains:
> > + enum:
> > + - renesas,rcar-gen2-sdhi
> > + - renesas,rcar-gen3-sdhi
>
> What about RZ/G2L, as it has 4 clocks?
They are a few lines above this in a seperate block if I am not
confusing the SoC numbering.
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next prev parent reply other threads:[~2021-11-16 0:32 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-11-15 16:06 [PATCH v3] dt-bindings: mmc: renesas,sdhi: add optional SDnH clock Wolfram Sang
2021-11-15 16:31 ` Biju Das
2021-11-15 19:24 ` Wolfram Sang [this message]
2021-11-15 20:24 ` Biju Das
2021-11-16 10:26 ` Geert Uytterhoeven
2021-11-16 11:26 ` Biju Das
2021-11-16 13:22 ` Geert Uytterhoeven
2021-11-16 16:09 ` Biju Das
2021-11-16 19:41 ` Biju Das
2021-11-16 20:29 ` Wolfram Sang
2021-11-17 14:00 ` Biju Das
2021-11-17 10:31 ` Wolfram Sang
2021-11-17 11:43 ` Biju Das
2021-11-19 10:12 ` Geert Uytterhoeven
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