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From: "Jonas Mark (BT-FIR/ENG1-Grb)" <Mark.Jonas@de.bosch.com>
To: Philipp Zabel <p.zabel@pengutronix.de>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: "Jonas Mark \(BT-FIR/ENG1-Grb\)" <Mark.Jonas@de.bosch.com>,
	"RUAN Tingquan \(BT-FIR/ENG1-Zhu\)" <Tingquan.Ruan@cn.bosch.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>
Subject: AW: [PATCH] gpu: ipu-v3: Fix dev_dbg frequency output
Date: Fri, 25 Mar 2022 18:01:50 +0000	[thread overview]
Message-ID: <PAXPR10MB54052ECFB1CDADEDD073CF0AAD1A9@PAXPR10MB5405.EURPRD10.PROD.OUTLOOK.COM> (raw)
In-Reply-To: <89a08ce1cdb1cf0b4d46b916e7107eca0796ca9d.camel@pengutronix.de>

Hi,

> > This commit corrects the printing of the IPU clock error percentage if
> > it is between -0.1% to -0.9%. For example, if the pixel clock
> > requested is 27.2 MHz but only 27.0 MHz can be achieved the deviation is -
> 0.8%.
> > But the fixed point math had a flaw and calculated error of 0.2%.
> >
> > Before:
> >   Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
> >   IPU clock can give 27000000 with divider 10, error 0.2%
> >   Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU,
> 27000000Hz
> >
> > After:
> >   Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
> >   IPU clock can give 27000000 with divider 10, error -0.8%
> >   Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU,
> 27000000Hz
> >
> > Signed-off-by: Leo Ruan <tingquan.ruan@cn.bosch.com>
> > Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
> > ---
> >  drivers/gpu/ipu-v3/ipu-di.c | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/ipu-v3/ipu-di.c b/drivers/gpu/ipu-v3/ipu-di.c
> > index b4a31d506fcc..74eca68891ad 100644
> > --- a/drivers/gpu/ipu-v3/ipu-di.c
> > +++ b/drivers/gpu/ipu-v3/ipu-di.c
> > @@ -451,8 +451,9 @@ static void ipu_di_config_clock(struct ipu_di *di,
> >
> >                 error = rate / (sig->mode.pixelclock / 1000);
> >
> > -               dev_dbg(di->ipu->dev, "  IPU clock can give %lu with
> > divider %u, error %d.%u%%\n",
> > -                       rate, div, (signed)(error - 1000) / 10, error
> > % 10);
> > +               dev_dbg(di->ipu->dev, "  IPU clock can give %lu with
> > +divider %u, error %c%d.%d%%\n",
> > +                       rate, div, error < 1000 ? '-' : '+',
> > +                       abs(error - 1000) / 10, abs(error - 1000) %
> > +10);
> >
> >                 /* Allow a 1% error */
> >                 if (error < 1010 && error >= 990) {
> 
> Rounding (always down) is still a bit unintuitive, but this certainly improves
> things.
> 
> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>

What are the chances of getting this patch into 5.18?

Can I do something to support the process?

Cheers,
Mark

WARNING: multiple messages have this Message-ID (diff)
From: "Jonas Mark (BT-FIR/ENG1-Grb)" <Mark.Jonas@de.bosch.com>
To: Philipp Zabel <p.zabel@pengutronix.de>,
	David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: "dri-devel@lists.freedesktop.org"
	<dri-devel@lists.freedesktop.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"RUAN Tingquan (BT-FIR/ENG1-Zhu)" <Tingquan.Ruan@cn.bosch.com>,
	"Jonas Mark (BT-FIR/ENG1-Grb)" <Mark.Jonas@de.bosch.com>
Subject: AW: [PATCH] gpu: ipu-v3: Fix dev_dbg frequency output
Date: Fri, 25 Mar 2022 18:01:50 +0000	[thread overview]
Message-ID: <PAXPR10MB54052ECFB1CDADEDD073CF0AAD1A9@PAXPR10MB5405.EURPRD10.PROD.OUTLOOK.COM> (raw)
In-Reply-To: <89a08ce1cdb1cf0b4d46b916e7107eca0796ca9d.camel@pengutronix.de>

Hi,

> > This commit corrects the printing of the IPU clock error percentage if
> > it is between -0.1% to -0.9%. For example, if the pixel clock
> > requested is 27.2 MHz but only 27.0 MHz can be achieved the deviation is -
> 0.8%.
> > But the fixed point math had a flaw and calculated error of 0.2%.
> >
> > Before:
> >   Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
> >   IPU clock can give 27000000 with divider 10, error 0.2%
> >   Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU,
> 27000000Hz
> >
> > After:
> >   Clocks: IPU 270000000Hz DI 24716667Hz Needed 27200000Hz
> >   IPU clock can give 27000000 with divider 10, error -0.8%
> >   Want 27200000Hz IPU 270000000Hz DI 24716667Hz using IPU,
> 27000000Hz
> >
> > Signed-off-by: Leo Ruan <tingquan.ruan@cn.bosch.com>
> > Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
> > ---
> >  drivers/gpu/ipu-v3/ipu-di.c | 5 +++--
> >  1 file changed, 3 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/ipu-v3/ipu-di.c b/drivers/gpu/ipu-v3/ipu-di.c
> > index b4a31d506fcc..74eca68891ad 100644
> > --- a/drivers/gpu/ipu-v3/ipu-di.c
> > +++ b/drivers/gpu/ipu-v3/ipu-di.c
> > @@ -451,8 +451,9 @@ static void ipu_di_config_clock(struct ipu_di *di,
> >
> >                 error = rate / (sig->mode.pixelclock / 1000);
> >
> > -               dev_dbg(di->ipu->dev, "  IPU clock can give %lu with
> > divider %u, error %d.%u%%\n",
> > -                       rate, div, (signed)(error - 1000) / 10, error
> > % 10);
> > +               dev_dbg(di->ipu->dev, "  IPU clock can give %lu with
> > +divider %u, error %c%d.%d%%\n",
> > +                       rate, div, error < 1000 ? '-' : '+',
> > +                       abs(error - 1000) / 10, abs(error - 1000) %
> > +10);
> >
> >                 /* Allow a 1% error */
> >                 if (error < 1010 && error >= 990) {
> 
> Rounding (always down) is still a bit unintuitive, but this certainly improves
> things.
> 
> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>

What are the chances of getting this patch into 5.18?

Can I do something to support the process?

Cheers,
Mark

  reply	other threads:[~2022-03-25 18:01 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-07 15:14 [PATCH] gpu: ipu-v3: Fix dev_dbg frequency output Mark Jonas
2022-02-07 15:14 ` Mark Jonas
2022-02-14 16:44 ` AW: " Jonas Mark (BT-FIR/ENG1-Grb)
2022-02-14 16:44   ` Jonas Mark (BT-FIR/ENG1-Grb)
2022-02-14 17:24   ` Lucas Stach
2022-02-14 17:24     ` Lucas Stach
2022-02-16 16:09 ` Philipp Zabel
2022-02-16 16:09   ` Philipp Zabel
2022-03-25 18:01   ` Jonas Mark (BT-FIR/ENG1-Grb) [this message]
2022-03-25 18:01     ` AW: " Jonas Mark (BT-FIR/ENG1-Grb)
2022-03-29 16:42 ` Philipp Zabel
2022-03-29 16:42   ` Philipp Zabel

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