From: "Z.q. Hou" <zhiqiang.hou-3arQi8VN3Tc@public.gmane.org>
To: Shawn Guo <shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
Cc: "mark.rutland-5wv7dgnIgG8@public.gmane.org"
<mark.rutland-5wv7dgnIgG8@public.gmane.org>,
"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"catalin.marinas-5wv7dgnIgG8@public.gmane.org"
<catalin.marinas-5wv7dgnIgG8@public.gmane.org>,
Prabhakar Kushwaha
<prabhakar.kushwaha-3arQi8VN3Tc@public.gmane.org>,
"will.deacon-5wv7dgnIgG8@public.gmane.org"
<will.deacon-5wv7dgnIgG8@public.gmane.org>,
"robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org"
<robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: RE: [PATCH 1/3] dts: ls2088a: add pcie support
Date: Thu, 13 Jul 2017 08:34:23 +0000 [thread overview]
Message-ID: <VI1PR0402MB2782D24973612C1C0BCD24B184AC0@VI1PR0402MB2782.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20170713083121.GR3172@dragon>
> -----Original Message-----
> From: Shawn Guo [mailto:shawnguo@kernel.org]
> Sent: 2017年7月13日 16:31
> To: Z.q. Hou <zhiqiang.hou@nxp.com>
> Cc: mark.rutland@arm.com; devicetree@vger.kernel.org;
> catalin.marinas@arm.com; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>; will.deacon@arm.com;
> robh+dt@kernel.org; linux-arm-kernel@lists.infradead.org
> Subject: Re: [PATCH 1/3] dts: ls2088a: add pcie support
>
> On Thu, Jul 13, 2017 at 08:27:47AM +0000, Z.q. Hou wrote:
> > Hi Shawn,
> >
> > Thanks for your comments!
> >
> > > -----Original Message-----
> > > From: Shawn Guo [mailto:shawnguo@kernel.org]
> > > Sent: 2017年7月13日 16:18
> > > To: Z.q. Hou <zhiqiang.hou@nxp.com>
> > > Cc: linux-arm-kernel@lists.infradead.org;
> > > devicetree@vger.kernel.org;
> > > robh+dt@kernel.org; mark.rutland@arm.com; catalin.marinas@arm.com;
> > > will.deacon@arm.com; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>
> > > Subject: Re: [PATCH 1/3] dts: ls2088a: add pcie support
> > >
> > > On Thu, Jul 06, 2017 at 04:55:28PM +0800, Zhiqiang Hou wrote:
> > > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > > >
> > > > The physical memory map address and CCSR registers map address are
> > > > different between LS2088A and other LS2080A series SoCs.
> > > >
> > > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > > > ---
> > > > arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 4 ++++
> > > > 1 file changed, 4 insertions(+)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
> > > > b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
> > > > index 5c695c6..7d26531 100644
> > > > --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
> > > > +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
> > > > @@ -134,6 +134,7 @@
> > > > };
> > > >
> > > > &pcie1 {
> > > > + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
> > >
> > > I do not see "fsl,ls2088a-pcie" in either bindings doc or kernel driver.
> > >
> >
> > I submitted the DT node patch and driver code patch separately, see the
> driver patch:
> > https://patchwork.kernel.org/patch/9827915/
>
> Send me the dts changes after bindings and driver patch land on mainline.
Sure, thanks a lot!
- Zhiqiang
WARNING: multiple messages have this Message-ID (diff)
From: zhiqiang.hou@nxp.com (Z.q. Hou)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/3] dts: ls2088a: add pcie support
Date: Thu, 13 Jul 2017 08:34:23 +0000 [thread overview]
Message-ID: <VI1PR0402MB2782D24973612C1C0BCD24B184AC0@VI1PR0402MB2782.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <20170713083121.GR3172@dragon>
> -----Original Message-----
> From: Shawn Guo [mailto:shawnguo at kernel.org]
> Sent: 2017?7?13? 16:31
> To: Z.q. Hou <zhiqiang.hou@nxp.com>
> Cc: mark.rutland at arm.com; devicetree at vger.kernel.org;
> catalin.marinas at arm.com; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>; will.deacon at arm.com;
> robh+dt at kernel.org; linux-arm-kernel at lists.infradead.org
> Subject: Re: [PATCH 1/3] dts: ls2088a: add pcie support
>
> On Thu, Jul 13, 2017 at 08:27:47AM +0000, Z.q. Hou wrote:
> > Hi Shawn,
> >
> > Thanks for your comments!
> >
> > > -----Original Message-----
> > > From: Shawn Guo [mailto:shawnguo at kernel.org]
> > > Sent: 2017?7?13? 16:18
> > > To: Z.q. Hou <zhiqiang.hou@nxp.com>
> > > Cc: linux-arm-kernel at lists.infradead.org;
> > > devicetree at vger.kernel.org;
> > > robh+dt at kernel.org; mark.rutland at arm.com; catalin.marinas at arm.com;
> > > will.deacon at arm.com; Prabhakar Kushwaha
> <prabhakar.kushwaha@nxp.com>
> > > Subject: Re: [PATCH 1/3] dts: ls2088a: add pcie support
> > >
> > > On Thu, Jul 06, 2017 at 04:55:28PM +0800, Zhiqiang Hou wrote:
> > > > From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > > >
> > > > The physical memory map address and CCSR registers map address are
> > > > different between LS2088A and other LS2080A series SoCs.
> > > >
> > > > Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
> > > > ---
> > > > arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 4 ++++
> > > > 1 file changed, 4 insertions(+)
> > > >
> > > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
> > > > b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
> > > > index 5c695c6..7d26531 100644
> > > > --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
> > > > +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi
> > > > @@ -134,6 +134,7 @@
> > > > };
> > > >
> > > > &pcie1 {
> > > > + compatible = "fsl,ls2088a-pcie", "snps,dw-pcie";
> > >
> > > I do not see "fsl,ls2088a-pcie" in either bindings doc or kernel driver.
> > >
> >
> > I submitted the DT node patch and driver code patch separately, see the
> driver patch:
> > https://patchwork.kernel.org/patch/9827915/
>
> Send me the dts changes after bindings and driver patch land on mainline.
Sure, thanks a lot!
- Zhiqiang
next prev parent reply other threads:[~2017-07-13 8:34 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-07-06 8:55 [PATCH 1/3] dts: ls2088a: add pcie support Zhiqiang Hou
2017-07-06 8:55 ` Zhiqiang Hou
[not found] ` <1499331330-38362-1-git-send-email-Zhiqiang.Hou-3arQi8VN3Tc@public.gmane.org>
2017-07-06 8:55 ` [PATCH 2/3] dts: ls1088a: add gicv3 ITS DT node Zhiqiang Hou
2017-07-06 8:55 ` Zhiqiang Hou
2017-07-06 8:55 ` [PATCH 3/3] dts: ls1088a: add PCIe controller DT nodes Zhiqiang Hou
2017-07-06 8:55 ` Zhiqiang Hou
2017-07-13 8:17 ` [PATCH 1/3] dts: ls2088a: add pcie support Shawn Guo
2017-07-13 8:17 ` Shawn Guo
2017-07-13 8:27 ` Z.q. Hou
2017-07-13 8:27 ` Z.q. Hou
[not found] ` <VI1PR0402MB2782E2EB4B0E36EFF55CD5E684AC0-9IDQY6o3qQhW5Nc2rBmepo3W/0Ik+aLCnBOFsp37pqbUKgpGm//BTAC/G2K4zDHf@public.gmane.org>
2017-07-13 8:31 ` Shawn Guo
2017-07-13 8:31 ` Shawn Guo
2017-07-13 8:34 ` Z.q. Hou [this message]
2017-07-13 8:34 ` Z.q. Hou
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=VI1PR0402MB2782D24973612C1C0BCD24B184AC0@VI1PR0402MB2782.eurprd04.prod.outlook.com \
--to=zhiqiang.hou-3arqi8vn3tc@public.gmane.org \
--cc=catalin.marinas-5wv7dgnIgG8@public.gmane.org \
--cc=devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org \
--cc=linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org \
--cc=mark.rutland-5wv7dgnIgG8@public.gmane.org \
--cc=prabhakar.kushwaha-3arQi8VN3Tc@public.gmane.org \
--cc=robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org \
--cc=shawnguo-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org \
--cc=will.deacon-5wv7dgnIgG8@public.gmane.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.