From: Daniel Vetter <daniel@ffwll.ch>
To: Jason Ekstrand <jason@jlekstrand.net>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [PATCH 20/29] drm/i915/gem: Make an alignment check more sensible
Date: Thu, 27 May 2021 20:31:20 +0200 [thread overview]
Message-ID: <YK/leG45kvVHayN7@phenom.ffwll.local> (raw)
In-Reply-To: <20210527162650.1182544-21-jason@jlekstrand.net>
On Thu, May 27, 2021 at 11:26:41AM -0500, Jason Ekstrand wrote:
> What we really want to check is that size of the engines array, i.e.
> args->size - sizeof(*user) is divisible by the element size, i.e.
> sizeof(*user->engines) because that's what's required for computing the
> array length right below the check. However, we're currently not doing
> this and instead doing a compile-time check that sizeof(*user) is
> divisible by sizeof(*user->engines) and avoiding the subtraction. As
> far as I can tell, the only reason for the more confusing pair of checks
> is to avoid a single subtraction of a constant.
>
> The other thing the BUILD_BUG_ON might be trying to implicitly check is
> that offsetof(user->engines) == sizeof(*user) and we don't have any
> weird padding throwing us off. However, that's not the check it's doing
> and it's not even a reliable way to do that check.
>
> Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Yeah a non-dense compiler should be able to figure this out, plus
set_engines isn't a hotpath.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 12a148ba421b6..cf7c281977a3e 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -1758,9 +1758,8 @@ set_engines(struct i915_gem_context *ctx,
> goto replace;
> }
>
> - BUILD_BUG_ON(!IS_ALIGNED(sizeof(*user), sizeof(*user->engines)));
> if (args->size < sizeof(*user) ||
> - !IS_ALIGNED(args->size, sizeof(*user->engines))) {
> + !IS_ALIGNED(args->size - sizeof(*user), sizeof(*user->engines))) {
> drm_dbg(&i915->drm, "Invalid size for engine array: %d\n",
> args->size);
> return -EINVAL;
> --
> 2.31.1
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
WARNING: multiple messages have this Message-ID (diff)
From: Daniel Vetter <daniel@ffwll.ch>
To: Jason Ekstrand <jason@jlekstrand.net>
Cc: intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 20/29] drm/i915/gem: Make an alignment check more sensible
Date: Thu, 27 May 2021 20:31:20 +0200 [thread overview]
Message-ID: <YK/leG45kvVHayN7@phenom.ffwll.local> (raw)
In-Reply-To: <20210527162650.1182544-21-jason@jlekstrand.net>
On Thu, May 27, 2021 at 11:26:41AM -0500, Jason Ekstrand wrote:
> What we really want to check is that size of the engines array, i.e.
> args->size - sizeof(*user) is divisible by the element size, i.e.
> sizeof(*user->engines) because that's what's required for computing the
> array length right below the check. However, we're currently not doing
> this and instead doing a compile-time check that sizeof(*user) is
> divisible by sizeof(*user->engines) and avoiding the subtraction. As
> far as I can tell, the only reason for the more confusing pair of checks
> is to avoid a single subtraction of a constant.
>
> The other thing the BUILD_BUG_ON might be trying to implicitly check is
> that offsetof(user->engines) == sizeof(*user) and we don't have any
> weird padding throwing us off. However, that's not the check it's doing
> and it's not even a reliable way to do that check.
>
> Signed-off-by: Jason Ekstrand <jason@jlekstrand.net>
Yeah a non-dense compiler should be able to figure this out, plus
set_engines isn't a hotpath.
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
> ---
> drivers/gpu/drm/i915/gem/i915_gem_context.c | 3 +--
> 1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> index 12a148ba421b6..cf7c281977a3e 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c
> @@ -1758,9 +1758,8 @@ set_engines(struct i915_gem_context *ctx,
> goto replace;
> }
>
> - BUILD_BUG_ON(!IS_ALIGNED(sizeof(*user), sizeof(*user->engines)));
> if (args->size < sizeof(*user) ||
> - !IS_ALIGNED(args->size, sizeof(*user->engines))) {
> + !IS_ALIGNED(args->size - sizeof(*user), sizeof(*user->engines))) {
> drm_dbg(&i915->drm, "Invalid size for engine array: %d\n",
> args->size);
> return -EINVAL;
> --
> 2.31.1
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-05-27 18:31 UTC|newest]
Thread overview: 95+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-27 16:26 [PATCH 00/29] drm/i915/gem: ioctl clean-ups (v6) Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 01/29] drm/i915: Drop I915_CONTEXT_PARAM_RINGSIZE Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 02/29] drm/i915: Stop storing the ring size in the ring pointer (v2) Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 03/29] drm/i915: Drop I915_CONTEXT_PARAM_NO_ZEROMAP Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 04/29] drm/i915/gem: Set the watchdog timeout directly in intel_context_set_gem (v2) Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 05/29] drm/i915/gem: Return void from context_apply_all Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 06/29] drm/i915: Drop the CONTEXT_CLONE API (v2) Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 07/29] drm/i915: Implement SINGLE_TIMELINE with a syncobj (v4) Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 08/29] drm/i915: Drop getparam support for I915_CONTEXT_PARAM_ENGINES Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 09/29] drm/i915/gem: Disallow bonding of virtual engines (v3) Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 10/29] drm/i915/gem: Remove engine auto-magic with FENCE_SUBMIT (v2) Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 11/29] drm/i915/request: Remove the hook from await_execution Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 12/29] drm/i915/gem: Disallow creating contexts with too many engines Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 13/29] drm/i915: Stop manually RCU banging in reset_stats_ioctl (v2) Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 14/29] drm/i915/gem: Add a separate validate_priority helper Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 15/29] drm/i915: Add gem/i915_gem_context.h to the docs Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 16/29] drm/i915/gem: Add an intermediate proto_context struct Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-31 8:47 ` Daniel Vetter
2021-05-31 8:47 ` Daniel Vetter
2021-06-02 21:24 ` Jason Ekstrand
2021-06-02 21:24 ` Jason Ekstrand
2021-06-03 7:09 ` Daniel Vetter
2021-06-03 7:09 ` Daniel Vetter
2021-05-27 16:26 ` [PATCH 17/29] drm/i915/gem: Rework error handling in default_engines Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 18/29] drm/i915/gem: Optionally set SSEU in intel_context_set_gem Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-31 8:48 ` Daniel Vetter
2021-05-31 8:48 ` [Intel-gfx] " Daniel Vetter
2021-06-02 22:05 ` Jason Ekstrand
2021-06-02 22:05 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 19/29] drm/i915: Add an i915_gem_vm_lookup helper Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 18:30 ` Daniel Vetter
2021-05-27 18:30 ` [Intel-gfx] " Daniel Vetter
2021-05-27 16:26 ` [PATCH 20/29] drm/i915/gem: Make an alignment check more sensible Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 18:31 ` Daniel Vetter [this message]
2021-05-27 18:31 ` Daniel Vetter
2021-05-27 16:26 ` [PATCH 21/29] drm/i915/gem: Use the proto-context to handle create parameters (v2) Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-31 9:11 ` Daniel Vetter
2021-05-31 9:11 ` [Intel-gfx] " Daniel Vetter
2021-06-02 22:23 ` Jason Ekstrand
2021-06-02 22:23 ` [Intel-gfx] " Jason Ekstrand
2021-06-03 7:32 ` Daniel Vetter
2021-06-03 7:32 ` [Intel-gfx] " Daniel Vetter
2021-06-03 16:29 ` Jason Ekstrand
2021-06-03 16:29 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 22/29] drm/i915/gem: Return an error ptr from context_lookup Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 23/29] drm/i915/gt: Drop i915_address_space::file (v2) Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 24/29] drm/i915/gem: Delay context creation Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-31 9:50 ` Daniel Vetter
2021-05-31 9:50 ` [Intel-gfx] " Daniel Vetter
2021-06-02 22:55 ` Jason Ekstrand
2021-06-02 22:55 ` [Intel-gfx] " Jason Ekstrand
2021-06-03 7:26 ` Daniel Vetter
2021-06-03 7:26 ` [Intel-gfx] " Daniel Vetter
2021-05-27 16:26 ` [PATCH 25/29] drm/i915/gem: Don't allow changing the VM on running contexts (v2) Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-31 14:08 ` Daniel Vetter
2021-05-31 14:08 ` [Intel-gfx] " Daniel Vetter
2021-05-27 16:26 ` [PATCH 26/29] drm/i915/gem: Don't allow changing the engine set " Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-31 13:58 ` Daniel Vetter
2021-05-31 13:58 ` Daniel Vetter
2021-05-27 16:26 ` [PATCH 27/29] drm/i915/selftests: Take a VM in kernel_context() Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 28/29] i915/gem/selftests: Assign the VM at context creation in igt_shared_ctx_exec Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-27 16:26 ` [PATCH 29/29] drm/i915/gem: Roll all of context creation together Jason Ekstrand
2021-05-27 16:26 ` [Intel-gfx] " Jason Ekstrand
2021-05-31 14:18 ` Daniel Vetter
2021-05-31 14:18 ` Daniel Vetter
2021-05-27 21:17 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/gem: ioctl clean-ups (rev5) Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=YK/leG45kvVHayN7@phenom.ffwll.local \
--to=daniel@ffwll.ch \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jason@jlekstrand.net \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.