From: Mark Brown <broonie@kernel.org>
To: Jon Lin <jon.lin@rock-chips.com>
Cc: heiko@sntech.de, linux-spi@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v10 5/6] spi: rockchip: Support cs-gpio
Date: Fri, 11 Feb 2022 11:48:26 +0000 [thread overview]
Message-ID: <YgZNCoYeArYTECYC@sirena.org.uk> (raw)
In-Reply-To: <20220211034344.4130-5-jon.lin@rock-chips.com>
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On Fri, Feb 11, 2022 at 11:43:41AM +0800, Jon Lin wrote:
> 1.Add standard cs-gpio support
> 2.Refer to spi-controller.yaml for details
>
> Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
> ---
>
> Changes in v10: None
> Changes in v9: None
> Changes in v8: None
> Changes in v7: None
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
Why is this the one patch in the series with any versioning information?
> - ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER,
> - BIT(spi->chip_select));
> + if (spi->cs_gpiod)
> + ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, 1);
> + else
> + ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, BIT(spi->chip_select));
This appears to be making the device control chip select 0 if a GPIO
chip select is used - that's going to work poorly if there's a device
using that chip select. It should be fine to prohibit that
configuration if the hardware requires that a GPIO be controlled,
especially if the native chip select can be pinmuxed to a GPIO, but it
ought to be at least documented that this won't work and ideally
detected.
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WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: Jon Lin <jon.lin@rock-chips.com>
Cc: heiko@sntech.de, linux-spi@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v10 5/6] spi: rockchip: Support cs-gpio
Date: Fri, 11 Feb 2022 11:48:26 +0000 [thread overview]
Message-ID: <YgZNCoYeArYTECYC@sirena.org.uk> (raw)
In-Reply-To: <20220211034344.4130-5-jon.lin@rock-chips.com>
[-- Attachment #1.1: Type: text/plain, Size: 1162 bytes --]
On Fri, Feb 11, 2022 at 11:43:41AM +0800, Jon Lin wrote:
> 1.Add standard cs-gpio support
> 2.Refer to spi-controller.yaml for details
>
> Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
> ---
>
> Changes in v10: None
> Changes in v9: None
> Changes in v8: None
> Changes in v7: None
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
Why is this the one patch in the series with any versioning information?
> - ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER,
> - BIT(spi->chip_select));
> + if (spi->cs_gpiod)
> + ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, 1);
> + else
> + ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, BIT(spi->chip_select));
This appears to be making the device control chip select 0 if a GPIO
chip select is used - that's going to work poorly if there's a device
using that chip select. It should be fine to prohibit that
configuration if the hardware requires that a GPIO be controlled,
especially if the native chip select can be pinmuxed to a GPIO, but it
ought to be at least documented that this won't work and ideally
detected.
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_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: Jon Lin <jon.lin@rock-chips.com>
Cc: heiko@sntech.de, linux-spi@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v10 5/6] spi: rockchip: Support cs-gpio
Date: Fri, 11 Feb 2022 11:48:26 +0000 [thread overview]
Message-ID: <YgZNCoYeArYTECYC@sirena.org.uk> (raw)
In-Reply-To: <20220211034344.4130-5-jon.lin@rock-chips.com>
[-- Attachment #1.1: Type: text/plain, Size: 1162 bytes --]
On Fri, Feb 11, 2022 at 11:43:41AM +0800, Jon Lin wrote:
> 1.Add standard cs-gpio support
> 2.Refer to spi-controller.yaml for details
>
> Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
> ---
>
> Changes in v10: None
> Changes in v9: None
> Changes in v8: None
> Changes in v7: None
> Changes in v6: None
> Changes in v5: None
> Changes in v4: None
> Changes in v3: None
Why is this the one patch in the series with any versioning information?
> - ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER,
> - BIT(spi->chip_select));
> + if (spi->cs_gpiod)
> + ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, 1);
> + else
> + ROCKCHIP_SPI_SET_BITS(rs->regs + ROCKCHIP_SPI_SER, BIT(spi->chip_select));
This appears to be making the device control chip select 0 if a GPIO
chip select is used - that's going to work poorly if there's a device
using that chip select. It should be fine to prohibit that
configuration if the hardware requires that a GPIO be controlled,
especially if the native chip select can be pinmuxed to a GPIO, but it
ought to be at least documented that this won't work and ideally
detected.
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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-02-11 11:48 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-11 3:43 [PATCH 1/6] spi: rockchip: Stop spi slave dma receiver when cs inactive Jon Lin
2022-02-11 3:43 ` Jon Lin
2022-02-11 3:43 ` Jon Lin
2022-02-11 3:43 ` [PATCH 2/6] spi: rockchip: Preset cs-high and clk polarity in setup progress Jon Lin
2022-02-11 3:43 ` Jon Lin
2022-02-11 3:43 ` Jon Lin
2022-02-11 11:24 ` Mark Brown
2022-02-11 11:24 ` Mark Brown
2022-02-11 11:24 ` Mark Brown
[not found] ` <4222ce7d-a1e3-1728-fec2-976946b06ba9@rock-chips.com>
2022-02-14 12:49 ` Mark Brown
2022-02-14 12:49 ` Mark Brown
2022-02-14 12:49 ` Mark Brown
[not found] ` <e0f0ca0d-40df-cf86-9471-9272bcc171f9@rock-chips.com>
2022-02-15 12:36 ` Mark Brown
2022-02-15 12:36 ` Mark Brown
2022-02-15 12:36 ` Mark Brown
2022-02-16 1:23 ` Jon Lin
2022-02-16 1:23 ` Jon Lin
2022-02-16 1:23 ` Jon Lin
2022-02-11 3:43 ` [PATCH 3/6] spi: rockchip: Fix error in getting num-cs property Jon Lin
2022-02-11 3:43 ` Jon Lin
2022-02-11 3:43 ` Jon Lin
2022-02-11 11:25 ` Mark Brown
2022-02-11 11:25 ` Mark Brown
2022-02-11 11:25 ` Mark Brown
2022-02-11 3:43 ` [PATCH 4/6] spi: rockchip: Suspend and resume the bus during NOIRQ_SYSTEM_SLEEP_PM ops Jon Lin
2022-02-11 3:43 ` Jon Lin
2022-02-11 3:43 ` Jon Lin
2022-02-11 3:43 ` [PATCH v10 5/6] spi: rockchip: Support cs-gpio Jon Lin
2022-02-11 3:43 ` Jon Lin
2022-02-11 3:43 ` Jon Lin
2022-02-11 11:48 ` Mark Brown [this message]
2022-02-11 11:48 ` Mark Brown
2022-02-11 11:48 ` Mark Brown
2022-02-11 3:43 ` [PATCH 5/6] spi: rockchip: terminate dma transmission when slave abort Jon Lin
2022-02-11 3:43 ` Jon Lin
2022-02-11 3:43 ` Jon Lin
2022-02-11 11:49 ` Mark Brown
2022-02-11 11:49 ` Mark Brown
2022-02-11 11:49 ` Mark Brown
2022-02-11 3:43 ` [PATCH 6/6] spi: rockchip: clear interrupt status in error handler Jon Lin
2022-02-11 3:43 ` Jon Lin
2022-02-11 3:43 ` Jon Lin
2022-02-11 3:43 ` [PATCH v10 6/6] spi: rockchip: Support SPI_CS_HIGH Jon Lin
2022-02-11 3:43 ` Jon Lin
2022-02-11 3:43 ` Jon Lin
-- strict thread matches above, loose matches on Subject: below --
2021-06-21 10:47 [PATCH v10 0/6] Support ROCKCHIP SPI new feature Jon Lin
2021-06-21 10:48 ` [PATCH v10 5/6] spi: rockchip: Support cs-gpio Jon Lin
2021-06-21 10:48 ` Jon Lin
2021-06-21 10:48 ` Jon Lin
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