Re: [PATCH v5] topology: make core_mask include at least cluster_siblings

From: Darren Hart <darren@os.amperecomputing.com>
To: Ionela Voinescu <ionela.voinescu@arm.com>
Cc: Yicong Yang <yangyicong@huawei.com>,
	yangyicong@hisilicon.com, Sudeep Holla <sudeep.holla@arm.com>,
	Dietmar Eggemann <dietmar.eggemann@arm.com>,
	"Rafael J. Wysocki" <rafael@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	Peter Zijlstra <peterz@infradead.org>,
	Vincent Guittot <vincent.guittot@linaro.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	"D . Scott Phillips" <scott@os.amperecomputing.com>,
	Ilkka Koskinen <ilkka@os.amperecomputing.com>,
	stable@vger.kernel.org, LKML <linux-kernel@vger.kernel.org>,
	Linux Arm <linux-arm-kernel@lists.infradead.org>,
	Barry Song <21cnbao@gmail.com>,
	Jonathan Cameron <jonathan.cameron@huawei.com>
Subject: Re: [PATCH v5] topology: make core_mask include at least cluster_siblings
Date: Fri, 16 Sep 2022 10:46:11 -0700	[thread overview]
Message-ID: <YyS2YzOHZ8m8/OV+@fedora> (raw)
In-Reply-To: <YySg8UM2Vqb9jPfh@arm.com>

On Fri, Sep 16, 2022 at 05:14:41PM +0100, Ionela Voinescu wrote:
> > >>
> > >> I found an issue that the NUMA domains are not built on qemu with:
> > >>
> > >> qemu-system-aarch64 \
> > >>         -kernel ${Image} \
> > >>         -smp 8 \
> > >>         -cpu cortex-a72 \
> > >>         -m 32G \
> > >>         -object memory-backend-ram,id=node0,size=8G \
> > >>         -object memory-backend-ram,id=node1,size=8G \
> > >>         -object memory-backend-ram,id=node2,size=8G \
> > >>         -object memory-backend-ram,id=node3,size=8G \
> > >>         -numa node,memdev=node0,cpus=0-1,nodeid=0 \
> > >>         -numa node,memdev=node1,cpus=2-3,nodeid=1 \
> > >>         -numa node,memdev=node2,cpus=4-5,nodeid=2 \
> > >>         -numa node,memdev=node3,cpus=6-7,nodeid=3 \
> > >>         -numa dist,src=0,dst=1,val=12 \
> > >>         -numa dist,src=0,dst=2,val=20 \
> > >>         -numa dist,src=0,dst=3,val=22 \
> > >>         -numa dist,src=1,dst=2,val=22 \
> > >>         -numa dist,src=1,dst=3,val=24 \
> > >>         -numa dist,src=2,dst=3,val=12 \
> > >>         -machine virt,iommu=smmuv3 \
> > >>         -net none \
> > >>         -initrd ${Rootfs} \
> > >>         -nographic \
> > >>         -bios QEMU_EFI.fd \
> > >>         -append "rdinit=/init console=ttyAMA0 earlycon=pl011,0x9000000 sched_verbose loglevel=8"
> > >>
> > >> I can see the schedule domain build stops at MC level since we reach all the
> > >> cpus in the system:
> > >>
> > >> [    2.141316] CPU0 attaching sched-domain(s):
> > >> [    2.142558]  domain-0: span=0-7 level=MC
> > >> [    2.145364]   groups: 0:{ span=0 cap=964 }, 1:{ span=1 cap=914 }, 2:{ span=2 cap=921 }, 3:{ span=3 cap=964 }, 4:{ span=4 cap=925 }, 5:{ span=5 cap=964 }, 6:{ span=6 cap=967 }, 7:{ span=7 cap=967 }
> > >> [    2.158357] CPU1 attaching sched-domain(s):
> > >> [    2.158964]  domain-0: span=0-7 level=MC
> > >> [...]
> > >>
> 
> It took me a bit to reproduce this as it requires "QEMU emulator version
> 7.1.0" otherwise there won't be a PPTT table.
> 

Is this new PPTT presenting what we'd expect from the qemu topology? e.g. if
it's presenting a cluster layer in the PPTT - should it be? Or should that be
limited to the SRAT table only?

-- 
Darren Hart
Ampere Computing / OS and Kernel