From: Liviu Dudau <Liviu.Dudau@arm.com> To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: "Neil Armstrong" <neil.armstrong@linaro.org>, "Conor Dooley" <conor+dt@kernel.org>, "Nicolas Boichat" <drinkcat@chromium.org>, "Daniel Stone" <daniels@collabora.com>, devicetree@vger.kernel.org, dri-devel@lists.freedesktop.org, "Steven Price" <steven.price@arm.com>, "Rob Herring" <robh+dt@kernel.org>, "Boris Brezillon" <boris.brezillon@collabora.com>, "Clément Péron" <peron.clem@gmail.com>, "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>, "Marty E . Plummer" <hanetzer@startmail.com>, "Robin Murphy" <robin.murphy@arm.com>, "Faith Ekstrand" <faith.ekstrand@collabora.com> Subject: Re: [PATCH v2 14/15] dt-bindings: gpu: mali-valhall-csf: Add initial bindings for panthor driver Date: Wed, 20 Sep 2023 14:41:05 +0100 [thread overview] Message-ID: <ZQr2cTMz1-PsOMRP@e110455-lin.cambridge.arm.com> (raw) In-Reply-To: <3517f2e9-d9d7-5bf8-1905-62f52d68c512@linaro.org> Hi Krzysztof, Thanks for taking the time to review this patch. I'm about to update it to address your comments and I need some clarifications from you. On Sun, Aug 20, 2023 at 10:01:25AM +0200, Krzysztof Kozlowski wrote: > On 09/08/2023 18:53, Boris Brezillon wrote: > > From: Liviu Dudau <liviu.dudau@arm.com> > > > > Arm has introduced a new v10 GPU architecture that replaces the Job Manager > > interface with a new Command Stream Frontend. It adds firmware driven > > command stream queues that can be used by kernel and user space to submit > > jobs to the GPU. > > > > Add the initial schema for the device tree that is based on support for > > RK3588 SoC. The minimum number of clocks is one for the IP, but on Rockchip > > platforms they will tend to expose the semi-independent clocks for better > > power management. > > A nit, subject: drop second/last, redundant "bindings for". The > "dt-bindings" prefix is already stating that these are bindings. > > Also drop "driver" form the subject. Bindings are for hardware, not drivers. Not exactly true as the 'compatible' string is for the driver, but I understand your point. > > > > > v2: > > - New commit > > > > Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> > > SoB chain is incomplete. > > > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> > > Cc: Rob Herring <robh+dt@kernel.org> > > Cc: Conor Dooley <conor+dt@kernel.org> > > Cc: devicetree@vger.kernel.org > > --- > > .../bindings/gpu/arm,mali-valhall-csf.yaml | 148 ++++++++++++++++++ > > 1 file changed, 148 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > > > > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > > new file mode 100644 > > index 000000000000..2b9f77aa0b7a > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > > @@ -0,0 +1,148 @@ > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/gpu/arm,mali-valhall-csf.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: ARM Mali Valhall GPU > > + > > +maintainers: > > + - Liviu Dudau <liviu.dudau@arm.com> > > + - Boris Brezillon <boris.brezillon@collabora.com> > > + > > +properties: > > + $nodename: > > + pattern: '^gpu@[a-f0-9]+$' > > + > > + compatible: > > + oneOf: > > Drop oneOf. The idea was to allow for future compatible strings to be added later, but I guess we can re-introduce the oneOf entry later. Will remove it. > > > + - items: > > + - enum: > > + - rockchip,rk3588-mali > > + - const: arm,mali-valhall-csf # Mali Valhall GPU model/revision is fully discoverable > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + items: > > + - description: Job interrupt > > + - description: MMU interrupt > > + - description: GPU interrupt > > + > > + interrupt-names: > > + items: > > + - const: job > > + - const: mmu > > + - const: gpu > > + > > + clocks: > > + minItems: 1 > > + maxItems: 3 > > + > > + clock-names: > > + minItems: 1 > > + items: > > + - const: core > > + - const: coregroup > > + - const: stacks > > + > > + mali-supply: true > > + > > + sram-supply: true > > + > > + operating-points-v2: true > > Missing opp-table. This is the main topic I want to clarify. See further down for the main comment, but I would like to understand what you are asking here. To copy the schema from bindings/opp/opp-v2.yaml and bindings/opp/opp-v2-base.yaml? > > > + > > + power-domains: > > + minItems: 1 > > + maxItems: 5 > > + > > + power-domain-names: > > + minItems: 1 > > + maxItems: 5 > > + > > + "#cooling-cells": > > + const: 2 > > + > > + dynamic-power-coefficient: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + description: > > + A u32 value that represents the running time dynamic > > + power coefficient in units of uW/MHz/V^2. The > > + coefficient can either be calculated from power > > + measurements or derived by analysis. > > + > > + The dynamic power consumption of the GPU is > > + proportional to the square of the Voltage (V) and > > + the clock frequency (f). The coefficient is used to > > + calculate the dynamic power as below - > > + > > + Pdyn = dynamic-power-coefficient * V^2 * f > > + > > + where voltage is in V, frequency is in MHz. > > + > > + dma-coherent: true > > + > > +required: > > + - compatible > > + - reg > > + - interrupts > > + - interrupt-names > > + - clocks > > + - mali-supply > > + > > +additionalProperties: false > > + > > +allOf: > > + - if: > > + properties: > > + compatible: > > + contains: > > + const: rockchip,rk3588-mali > > + then: > > + properties: > > + clocks: > > + minItems: 3 > > + clock-names: > > + items: > > + - const: core > > + - const: coregroup > > + - const: stacks > > This duplicates top-level. Just minItems: 3. Will remove the duplicated names. > > Please describe also power domains - constrains and names. I'm not sure the power domains and how to handle them have been entirely settled for Rockchip, hence why they were not included. Will check with Collabora to see if they have anything to add here, but for non-Rockchip platforms (like Juno with FPGAs) the constraints are going to be different. > > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/rockchip,rk3588-cru.h> > > + #include <dt-bindings/interrupt-controller/irq.h> > > + #include <dt-bindings/interrupt-controller/arm-gic.h> > > + #include <dt-bindings/power/rk3588-power.h> > > + > > + gpu: gpu@fb000000 { > > + compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf"; > > + reg = <0xfb000000 0x200000>; > > + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH 0>, > > + <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH 0>, > > + <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH 0>; > > + interrupt-names = "job", "mmu", "gpu"; > > + clock-names = "core", "coregroup", "stacks"; > > + clocks = <&cru CLK_GPU>, <&cru CLK_GPU_COREGROUP>, > > + <&cru CLK_GPU_STACKS>; > > + power-domains = <&power RK3588_PD_GPU>; > > + operating-points-v2 = <&gpu_opp_table>; > > + mali-supply = <&vdd_gpu_s0>; > > + sram-supply = <&vdd_gpu_mem_s0>; > > + status = "disabled"; > > Drop status. Will do. > > > + }; > > + > > + gpu_opp_table: opp-table { > > Opp table should be inside the device node. I cannot find any device tree that supports your suggested usage. Most (all?) of the device trees that I can find have the opp table as a separate node from the gpu and make use of the 'operating-points-v2 = <&opp_node_name>' reference in the board fragment. To me that makes more sense as different boards can have different operating points and is no reason to make them sub-nodes of the gpu. > > > + compatible = "operating-points-v2"; > > + opp-300000000 { > > + opp-hz = /bits/ 64 <300000000>; > > + opp-microvolt = <675000 675000 850000>; > > + }; > > Best regards, > Krzysztof > Thanks again for your review! Best regards, Liviu -- ==================== | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --------------- ¯\_(ツ)_/¯
WARNING: multiple messages have this Message-ID (diff)
From: Liviu Dudau <Liviu.Dudau@arm.com> To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: "Boris Brezillon" <boris.brezillon@collabora.com>, dri-devel@lists.freedesktop.org, "Conor Dooley" <conor+dt@kernel.org>, "Nicolas Boichat" <drinkcat@chromium.org>, "Daniel Stone" <daniels@collabora.com>, "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>, "Neil Armstrong" <neil.armstrong@linaro.org>, "Steven Price" <steven.price@arm.com>, devicetree@vger.kernel.org, "Rob Herring" <robh+dt@kernel.org>, "Clément Péron" <peron.clem@gmail.com>, "Marty E . Plummer" <hanetzer@startmail.com>, "Robin Murphy" <robin.murphy@arm.com>, "Faith Ekstrand" <faith.ekstrand@collabora.com> Subject: Re: [PATCH v2 14/15] dt-bindings: gpu: mali-valhall-csf: Add initial bindings for panthor driver Date: Wed, 20 Sep 2023 14:41:05 +0100 [thread overview] Message-ID: <ZQr2cTMz1-PsOMRP@e110455-lin.cambridge.arm.com> (raw) In-Reply-To: <3517f2e9-d9d7-5bf8-1905-62f52d68c512@linaro.org> Hi Krzysztof, Thanks for taking the time to review this patch. I'm about to update it to address your comments and I need some clarifications from you. On Sun, Aug 20, 2023 at 10:01:25AM +0200, Krzysztof Kozlowski wrote: > On 09/08/2023 18:53, Boris Brezillon wrote: > > From: Liviu Dudau <liviu.dudau@arm.com> > > > > Arm has introduced a new v10 GPU architecture that replaces the Job Manager > > interface with a new Command Stream Frontend. It adds firmware driven > > command stream queues that can be used by kernel and user space to submit > > jobs to the GPU. > > > > Add the initial schema for the device tree that is based on support for > > RK3588 SoC. The minimum number of clocks is one for the IP, but on Rockchip > > platforms they will tend to expose the semi-independent clocks for better > > power management. > > A nit, subject: drop second/last, redundant "bindings for". The > "dt-bindings" prefix is already stating that these are bindings. > > Also drop "driver" form the subject. Bindings are for hardware, not drivers. Not exactly true as the 'compatible' string is for the driver, but I understand your point. > > > > > v2: > > - New commit > > > > Signed-off-by: Liviu Dudau <liviu.dudau@arm.com> > > SoB chain is incomplete. > > > Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org> > > Cc: Rob Herring <robh+dt@kernel.org> > > Cc: Conor Dooley <conor+dt@kernel.org> > > Cc: devicetree@vger.kernel.org > > --- > > .../bindings/gpu/arm,mali-valhall-csf.yaml | 148 ++++++++++++++++++ > > 1 file changed, 148 insertions(+) > > create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > > > > diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > > new file mode 100644 > > index 000000000000..2b9f77aa0b7a > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml > > @@ -0,0 +1,148 @@ > > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/gpu/arm,mali-valhall-csf.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: ARM Mali Valhall GPU > > + > > +maintainers: > > + - Liviu Dudau <liviu.dudau@arm.com> > > + - Boris Brezillon <boris.brezillon@collabora.com> > > + > > +properties: > > + $nodename: > > + pattern: '^gpu@[a-f0-9]+$' > > + > > + compatible: > > + oneOf: > > Drop oneOf. The idea was to allow for future compatible strings to be added later, but I guess we can re-introduce the oneOf entry later. Will remove it. > > > + - items: > > + - enum: > > + - rockchip,rk3588-mali > > + - const: arm,mali-valhall-csf # Mali Valhall GPU model/revision is fully discoverable > > + > > + reg: > > + maxItems: 1 > > + > > + interrupts: > > + items: > > + - description: Job interrupt > > + - description: MMU interrupt > > + - description: GPU interrupt > > + > > + interrupt-names: > > + items: > > + - const: job > > + - const: mmu > > + - const: gpu > > + > > + clocks: > > + minItems: 1 > > + maxItems: 3 > > + > > + clock-names: > > + minItems: 1 > > + items: > > + - const: core > > + - const: coregroup > > + - const: stacks > > + > > + mali-supply: true > > + > > + sram-supply: true > > + > > + operating-points-v2: true > > Missing opp-table. This is the main topic I want to clarify. See further down for the main comment, but I would like to understand what you are asking here. To copy the schema from bindings/opp/opp-v2.yaml and bindings/opp/opp-v2-base.yaml? > > > + > > + power-domains: > > + minItems: 1 > > + maxItems: 5 > > + > > + power-domain-names: > > + minItems: 1 > > + maxItems: 5 > > + > > + "#cooling-cells": > > + const: 2 > > + > > + dynamic-power-coefficient: > > + $ref: /schemas/types.yaml#/definitions/uint32 > > + description: > > + A u32 value that represents the running time dynamic > > + power coefficient in units of uW/MHz/V^2. The > > + coefficient can either be calculated from power > > + measurements or derived by analysis. > > + > > + The dynamic power consumption of the GPU is > > + proportional to the square of the Voltage (V) and > > + the clock frequency (f). The coefficient is used to > > + calculate the dynamic power as below - > > + > > + Pdyn = dynamic-power-coefficient * V^2 * f > > + > > + where voltage is in V, frequency is in MHz. > > + > > + dma-coherent: true > > + > > +required: > > + - compatible > > + - reg > > + - interrupts > > + - interrupt-names > > + - clocks > > + - mali-supply > > + > > +additionalProperties: false > > + > > +allOf: > > + - if: > > + properties: > > + compatible: > > + contains: > > + const: rockchip,rk3588-mali > > + then: > > + properties: > > + clocks: > > + minItems: 3 > > + clock-names: > > + items: > > + - const: core > > + - const: coregroup > > + - const: stacks > > This duplicates top-level. Just minItems: 3. Will remove the duplicated names. > > Please describe also power domains - constrains and names. I'm not sure the power domains and how to handle them have been entirely settled for Rockchip, hence why they were not included. Will check with Collabora to see if they have anything to add here, but for non-Rockchip platforms (like Juno with FPGAs) the constraints are going to be different. > > > + > > +examples: > > + - | > > + #include <dt-bindings/clock/rockchip,rk3588-cru.h> > > + #include <dt-bindings/interrupt-controller/irq.h> > > + #include <dt-bindings/interrupt-controller/arm-gic.h> > > + #include <dt-bindings/power/rk3588-power.h> > > + > > + gpu: gpu@fb000000 { > > + compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf"; > > + reg = <0xfb000000 0x200000>; > > + interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH 0>, > > + <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH 0>, > > + <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH 0>; > > + interrupt-names = "job", "mmu", "gpu"; > > + clock-names = "core", "coregroup", "stacks"; > > + clocks = <&cru CLK_GPU>, <&cru CLK_GPU_COREGROUP>, > > + <&cru CLK_GPU_STACKS>; > > + power-domains = <&power RK3588_PD_GPU>; > > + operating-points-v2 = <&gpu_opp_table>; > > + mali-supply = <&vdd_gpu_s0>; > > + sram-supply = <&vdd_gpu_mem_s0>; > > + status = "disabled"; > > Drop status. Will do. > > > + }; > > + > > + gpu_opp_table: opp-table { > > Opp table should be inside the device node. I cannot find any device tree that supports your suggested usage. Most (all?) of the device trees that I can find have the opp table as a separate node from the gpu and make use of the 'operating-points-v2 = <&opp_node_name>' reference in the board fragment. To me that makes more sense as different boards can have different operating points and is no reason to make them sub-nodes of the gpu. > > > + compatible = "operating-points-v2"; > > + opp-300000000 { > > + opp-hz = /bits/ 64 <300000000>; > > + opp-microvolt = <675000 675000 850000>; > > + }; > > Best regards, > Krzysztof > Thanks again for your review! Best regards, Liviu -- ==================== | I would like to | | fix the world, | | but they're not | | giving me the | \ source code! / --------------- ¯\_(ツ)_/¯
next prev parent reply other threads:[~2023-09-20 13:41 UTC|newest] Thread overview: 93+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-08-09 16:53 [PATCH v2 00/15] drm: Add a driver for FW-based Mali GPUs Boris Brezillon 2023-08-09 16:53 ` [PATCH v2 01/15] drm/shmem-helper: Make pages_use_count an atomic_t Boris Brezillon 2023-08-11 13:08 ` Steven Price 2023-08-19 2:13 ` Dmitry Osipenko 2023-08-28 9:03 ` Boris Brezillon 2023-08-09 16:53 ` [PATCH v2 02/15] drm/panthor: Add uAPI Boris Brezillon 2023-08-11 14:13 ` Steven Price 2023-09-01 13:59 ` Liviu Dudau 2023-09-01 16:10 ` Boris Brezillon 2023-09-04 7:42 ` Steven Price 2023-09-04 8:26 ` Boris Brezillon 2023-09-04 9:26 ` Boris Brezillon 2023-09-04 15:22 ` Steven Price 2023-09-04 16:16 ` Boris Brezillon 2023-09-04 16:25 ` Robin Murphy 2023-09-06 10:55 ` Steven Price 2023-09-04 16:06 ` Robin Murphy 2023-09-06 12:18 ` Ketil Johnsen 2023-08-09 16:53 ` [PATCH v2 03/15] drm/panthor: Add GPU register definitions Boris Brezillon 2023-08-11 14:13 ` Steven Price 2023-08-29 13:00 ` Boris Brezillon 2023-08-09 16:53 ` [PATCH v2 04/15] drm/panthor: Add the device logical block Boris Brezillon 2023-08-11 15:47 ` Steven Price 2023-08-29 14:00 ` Boris Brezillon 2023-08-30 13:17 ` Steven Price 2023-08-30 14:06 ` Boris Brezillon 2023-09-04 11:46 ` Liviu Dudau 2023-08-09 16:53 ` [PATCH v2 05/15] drm/panthor: Add the GPU " Boris Brezillon 2023-08-14 10:54 ` Steven Price 2023-08-21 16:09 ` Robin Murphy 2023-08-23 8:48 ` Steven Price 2023-08-29 14:42 ` Boris Brezillon 2023-08-29 14:40 ` Boris Brezillon 2023-08-09 16:53 ` [PATCH v2 06/15] drm/panthor: Add GEM " Boris Brezillon 2023-08-14 13:40 ` Steven Price 2023-08-29 14:45 ` Boris Brezillon 2023-08-09 16:53 ` [PATCH v2 07/15] drm/panthor: Add the devfreq " Boris Brezillon 2023-08-14 13:45 ` Steven Price 2023-08-09 16:53 ` [PATCH v2 08/15] drm/panthor: Add the MMU/VM " Boris Brezillon 2023-08-14 15:53 ` Steven Price 2023-08-29 15:33 ` Boris Brezillon 2023-08-30 14:12 ` Steven Price 2023-08-30 14:53 ` Boris Brezillon 2023-08-30 15:55 ` Steven Price 2023-08-09 16:53 ` [PATCH v2 09/15] drm/panthor: Add the FW " Boris Brezillon 2023-08-16 16:01 ` Steven Price 2023-08-29 16:15 ` Boris Brezillon 2023-08-30 15:20 ` Steven Price 2023-08-09 16:53 ` [PATCH v2 10/15] drm/panthor: Add the heap " Boris Brezillon 2023-08-18 14:39 ` Steven Price 2023-08-29 16:21 ` Boris Brezillon 2023-08-09 16:53 ` [PATCH v2 11/15] drm/panthor: Add the scheduler " Boris Brezillon 2023-08-18 15:38 ` Steven Price 2023-08-29 16:36 ` Boris Brezillon 2023-08-09 16:53 ` [PATCH v2 12/15] drm/panthor: Add the driver frontend block Boris Brezillon 2023-08-21 11:31 ` Steven Price 2023-08-29 17:46 ` Boris Brezillon 2023-08-31 14:42 ` Steven Price 2023-09-06 12:38 ` Ketil Johnsen 2023-09-06 13:05 ` Boris Brezillon 2023-08-09 16:53 ` [PATCH v2 13/15] drm/panthor: Allow driver compilation Boris Brezillon 2023-08-11 16:35 ` Robin Murphy 2023-08-11 16:56 ` Daniel Stone 2023-08-11 19:26 ` Robin Murphy 2023-08-14 11:18 ` Steven Price 2023-08-21 17:56 ` Robin Murphy 2023-08-23 9:17 ` Steven Price 2023-08-29 12:51 ` Boris Brezillon 2023-08-21 12:47 ` Steven Price 2023-08-09 16:53 ` [PATCH v2 14/15] dt-bindings: gpu: mali-valhall-csf: Add initial bindings for panthor driver Boris Brezillon 2023-08-09 16:53 ` Boris Brezillon 2023-08-20 8:01 ` Krzysztof Kozlowski 2023-08-20 8:01 ` Krzysztof Kozlowski 2023-09-20 13:41 ` Liviu Dudau [this message] 2023-09-20 13:41 ` Liviu Dudau 2023-09-20 13:51 ` Krzysztof Kozlowski 2023-09-20 13:51 ` Krzysztof Kozlowski 2023-09-20 14:25 ` Liviu Dudau 2023-09-20 14:25 ` Liviu Dudau 2023-09-20 15:31 ` Krzysztof Kozlowski 2023-09-20 15:31 ` Krzysztof Kozlowski 2023-09-20 13:56 ` Boris Brezillon 2023-09-20 13:56 ` Boris Brezillon 2023-09-20 14:03 ` Liviu Dudau 2023-08-09 16:53 ` [PATCH v2 15/15] drm/panthor: Add an entry to MAINTAINERS Boris Brezillon 2023-08-11 16:08 ` Steven Price 2023-08-29 17:48 ` Boris Brezillon 2023-08-31 13:18 ` Liviu Dudau 2023-08-31 13:25 ` Boris Brezillon 2023-08-09 20:22 ` [PATCH v2 00/15] drm: Add a driver for FW-based Mali GPUs Rob Herring 2023-08-10 15:44 ` Boris Brezillon 2023-08-21 14:01 ` Rob Herring 2023-09-27 15:47 ` Steven Price
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