All of lore.kernel.org
 help / color / mirror / Atom feed
From: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Shanker Donthineni <shankerd@qti.qualcomm.com>,
	kvm@vger.kernel.org, Catalin Marinas <catalin.marinas@arm.com>,
	Sinan Kaya <okaya@qti.qualcomm.com>,
	Will Deacon <will.deacon@arm.com>,
	iommu@lists.linux-foundation.org,
	Harv Abdulhamid <harba@qti.qualcomm.com>,
	Alex Williamson <alex.williamson@redhat.com>,
	linux-pci@vger.kernel.org, Bjorn Helgaas <bhelgaas@google.com>,
	Robin Murphy <robin.murphy@arm.com>,
	David Woodhouse <dwmw2@infradead.org>,
	linux-arm-kernel@lists.infradead.org,
	Nate Watterson <nwatters@qti.qualcomm.com>
Subject: Re: [RFC PATCH 24/30] iommu: Specify PASID state when unbinding a task
Date: Thu, 23 Mar 2017 13:37:41 +0000	[thread overview]
Message-ID: <a093bc07-a345-a689-9d97-f15a306f922d@arm.com> (raw)
In-Reply-To: <20170322225320.GF7266@8bytes.org>

On 22/03/17 22:53, Joerg Roedel wrote:
> On Wed, Mar 22, 2017 at 06:31:01PM +0000, Jean-Philippe Brucker wrote:
>> The problem might be too tied to the specifics of the SMMU. As implemented
>> in this series, the normal flow for a PPR with the SMMU is the following:
>>
>> (1) PCI device issues a PPR for PASID 1
>> (2) The PPR is queued by the SMMU in the (hardware) PRI queue
>> (3) The SMMU driver receives an interrupt, dequeues the PPR and moves it
>>     to a software work queue.
>> (4) The PPR is finally handled and a PRI response is sent to the device.
> 
> There are two ways a PASID could get shut down:
> 
> 	1) The device driver calls unbind()
> 	2) The mm_struct bound to that PASID is going away
> 
> Case 1) is the easy one, we can safely assume that the device driver did
> anything to stop new PPR requests from being created for that PASID. In
> this case we just shut down PPR processing by waiting until everything
> is handled and reply INVALID to any further PPR request before we remove
> the PASID from the per-device IOMMU data structures and flush caches.
> 
> In case 2) we have more work to do. The mm_struct is going away
> (probably because the task segfaulted) and we can't assume that the
> device driver shut everything down already. But for this case we have
> the call-back into the device driver to tell it should clean everything
> up for that PASID and stop the device from creating further requests.
> 
> After that call-back returns it is the same as in case 1), we drain the
> queue and deny any further request that comes in.

I agree on the semantics (I didn't implement case 2) here but I will have
to in the next version.)

>> The case that worries me is if someone unbinds PASID 1 between (2) and
>> (3), while the PPR is still in the hardware queue, and immediately binds
>> it to a new address space.
>>
>> Then (3) and (4) happen, the PPR is handled and the fault is for the new
>> address space. It's certainly undesirable, but I don't know if it could be
>> exploited. We don't kill the task for an unhandled fault at the moment,
>> simply report a failed PPR to the device, so I might be worrying for nothing.
> 
> As I wrote above, when the device driver calls unbind() we should
> assume that the device does not sent any further requests with that
> PASID. If it does, we just answer with INVALID.
> 
>> Having the caller tell us if PPRs might still be pending in the hardware
>> PRI queue ensures that the SMMU driver waits until it's entirely safe:
>>
>> * If the device has no outstanding PPR, PASID can be reallocated
>> * If the device has outstanding PPRs, wait for a Stop Marker, or drain
>>   the PRI queue after a while (if the Stop Marker was lost in a PRI queue
>>   overflow).
> 
> That can't happen, when the device driver does its job right. It has to
> shut down the context which causes the PPR requests for the PASID on the
> device. This includes stopping the context and waiting until all PPR
> requests it sent are processed.

By "processed", do you mean that they are committed to the IOMMU, or that
they came back with a PRG response?

The driver might not be able to do the latter, since PCI defines two ways
of shutting down a context:

* Either wait for all PPR requests to come back with a PRG response,
* Or send a Stop Marker PPR request and forget about it.

The second one is problematic, all the device says is "I've stopped
sending requests, some might still be in flight, but a Stop Marker ends
the flow".

Without having the device driver tell us which of the two models the
device is implementing, draining the hardware queue is our best bet to
ensure that no request is pending.

In any case, this is a property of the device, and passing flags to
unbind() as I suggested is probably excessive. The IOMMU driver could
store that info somewhere and use it whenever it has to unbind(), as an
indication of the minimum amount of work required to clean the context.
Without this hint the default should be to drain both queues.

My intent with passing flags to unbind() was to handle the case where VFIO
is unable to tell us whether PPRs are still being issued by the device.
But the issue seems moot to me now that I have a better understanding, as
there will be a detach_dev/attach_dev sequence before we start rebinding
PASIDs, and we can simply reset the PRI interface there (I'm currently
doing that in add_device, but I should move it.)

> And the device driver has to do this either before it calls unbind() or
> in the call-back it provided. Only after this the PASID should be freed.
>
>> Draining the PRI queue is very costly, we need to block the PRI thread to
>> inspect the queue, risking an overflow. And with these PASID state flags
>> we avoid flushing any queue.
> 
> There is a configurable maximum of PPR requests a device can have
> in-flight. If you take that into account when allocation the PPR queue
> for the SMMU, there can't be any overflows. The AMD driver allocates a
> queue for 512 entries and allows devices to have a maximum of 32
> outstanding requests.

Yes, the SMMU specification also tells that over-committing the PPR queue
is a programming error. I wonder how well it scales with hot-plugging of
devices however. At the time when we start allocating PPR credits, we
might not be sure that the number of devices with a PRI will be limited to
16. So even if overflow is a programming error, I'm not comfortable with
ruling it out just yet.

Thanks,
Jean-Philippe

>> But since the problem seems too centered around the SMMU, I might just
>> drop this patch along with the CLEAN/FLUSHED flags in my next version, and
>> go with the full-drain solution. After all, unbind should be a fairly rare
>> event.
> 
> I don't think all this is SMMU specific, it is the same on all other
> IOMMUs that have the ATS/PRI/PASID features.
> 
> 
> 
> 	Joerg
> 


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
To: Joerg Roedel <joro@8bytes.org>
Cc: Harv Abdulhamid <harba@qti.qualcomm.com>,
	Will Deacon <will.deacon@arm.com>,
	Shanker Donthineni <shankerd@qti.qualcomm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Sinan Kaya <okaya@qti.qualcomm.com>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Robin Murphy <robin.murphy@arm.com>,
	Nate Watterson <nwatters@qti.qualcomm.com>,
	Alex Williamson <alex.williamson@redhat.com>,
	David Woodhouse <dwmw2@infradead.org>,
	linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org,
	iommu@lists.linux-foundation.org, kvm@vger.kernel.org
Subject: Re: [RFC PATCH 24/30] iommu: Specify PASID state when unbinding a task
Date: Thu, 23 Mar 2017 13:37:41 +0000	[thread overview]
Message-ID: <a093bc07-a345-a689-9d97-f15a306f922d@arm.com> (raw)
In-Reply-To: <20170322225320.GF7266@8bytes.org>

On 22/03/17 22:53, Joerg Roedel wrote:
> On Wed, Mar 22, 2017 at 06:31:01PM +0000, Jean-Philippe Brucker wrote:
>> The problem might be too tied to the specifics of the SMMU. As implemented
>> in this series, the normal flow for a PPR with the SMMU is the following:
>>
>> (1) PCI device issues a PPR for PASID 1
>> (2) The PPR is queued by the SMMU in the (hardware) PRI queue
>> (3) The SMMU driver receives an interrupt, dequeues the PPR and moves it
>>     to a software work queue.
>> (4) The PPR is finally handled and a PRI response is sent to the device.
> 
> There are two ways a PASID could get shut down:
> 
> 	1) The device driver calls unbind()
> 	2) The mm_struct bound to that PASID is going away
> 
> Case 1) is the easy one, we can safely assume that the device driver did
> anything to stop new PPR requests from being created for that PASID. In
> this case we just shut down PPR processing by waiting until everything
> is handled and reply INVALID to any further PPR request before we remove
> the PASID from the per-device IOMMU data structures and flush caches.
> 
> In case 2) we have more work to do. The mm_struct is going away
> (probably because the task segfaulted) and we can't assume that the
> device driver shut everything down already. But for this case we have
> the call-back into the device driver to tell it should clean everything
> up for that PASID and stop the device from creating further requests.
> 
> After that call-back returns it is the same as in case 1), we drain the
> queue and deny any further request that comes in.

I agree on the semantics (I didn't implement case 2) here but I will have
to in the next version.)

>> The case that worries me is if someone unbinds PASID 1 between (2) and
>> (3), while the PPR is still in the hardware queue, and immediately binds
>> it to a new address space.
>>
>> Then (3) and (4) happen, the PPR is handled and the fault is for the new
>> address space. It's certainly undesirable, but I don't know if it could be
>> exploited. We don't kill the task for an unhandled fault at the moment,
>> simply report a failed PPR to the device, so I might be worrying for nothing.
> 
> As I wrote above, when the device driver calls unbind() we should
> assume that the device does not sent any further requests with that
> PASID. If it does, we just answer with INVALID.
> 
>> Having the caller tell us if PPRs might still be pending in the hardware
>> PRI queue ensures that the SMMU driver waits until it's entirely safe:
>>
>> * If the device has no outstanding PPR, PASID can be reallocated
>> * If the device has outstanding PPRs, wait for a Stop Marker, or drain
>>   the PRI queue after a while (if the Stop Marker was lost in a PRI queue
>>   overflow).
> 
> That can't happen, when the device driver does its job right. It has to
> shut down the context which causes the PPR requests for the PASID on the
> device. This includes stopping the context and waiting until all PPR
> requests it sent are processed.

By "processed", do you mean that they are committed to the IOMMU, or that
they came back with a PRG response?

The driver might not be able to do the latter, since PCI defines two ways
of shutting down a context:

* Either wait for all PPR requests to come back with a PRG response,
* Or send a Stop Marker PPR request and forget about it.

The second one is problematic, all the device says is "I've stopped
sending requests, some might still be in flight, but a Stop Marker ends
the flow".

Without having the device driver tell us which of the two models the
device is implementing, draining the hardware queue is our best bet to
ensure that no request is pending.

In any case, this is a property of the device, and passing flags to
unbind() as I suggested is probably excessive. The IOMMU driver could
store that info somewhere and use it whenever it has to unbind(), as an
indication of the minimum amount of work required to clean the context.
Without this hint the default should be to drain both queues.

My intent with passing flags to unbind() was to handle the case where VFIO
is unable to tell us whether PPRs are still being issued by the device.
But the issue seems moot to me now that I have a better understanding, as
there will be a detach_dev/attach_dev sequence before we start rebinding
PASIDs, and we can simply reset the PRI interface there (I'm currently
doing that in add_device, but I should move it.)

> And the device driver has to do this either before it calls unbind() or
> in the call-back it provided. Only after this the PASID should be freed.
>
>> Draining the PRI queue is very costly, we need to block the PRI thread to
>> inspect the queue, risking an overflow. And with these PASID state flags
>> we avoid flushing any queue.
> 
> There is a configurable maximum of PPR requests a device can have
> in-flight. If you take that into account when allocation the PPR queue
> for the SMMU, there can't be any overflows. The AMD driver allocates a
> queue for 512 entries and allows devices to have a maximum of 32
> outstanding requests.

Yes, the SMMU specification also tells that over-committing the PPR queue
is a programming error. I wonder how well it scales with hot-plugging of
devices however. At the time when we start allocating PPR credits, we
might not be sure that the number of devices with a PRI will be limited to
16. So even if overflow is a programming error, I'm not comfortable with
ruling it out just yet.

Thanks,
Jean-Philippe

>> But since the problem seems too centered around the SMMU, I might just
>> drop this patch along with the CLEAN/FLUSHED flags in my next version, and
>> go with the full-drain solution. After all, unbind should be a fairly rare
>> event.
> 
> I don't think all this is SMMU specific, it is the same on all other
> IOMMUs that have the ATS/PRI/PASID features.
> 
> 
> 
> 	Joerg
> 

WARNING: multiple messages have this Message-ID (diff)
From: jean-philippe.brucker@arm.com (Jean-Philippe Brucker)
To: linux-arm-kernel@lists.infradead.org
Subject: [RFC PATCH 24/30] iommu: Specify PASID state when unbinding a task
Date: Thu, 23 Mar 2017 13:37:41 +0000	[thread overview]
Message-ID: <a093bc07-a345-a689-9d97-f15a306f922d@arm.com> (raw)
In-Reply-To: <20170322225320.GF7266@8bytes.org>

On 22/03/17 22:53, Joerg Roedel wrote:
> On Wed, Mar 22, 2017 at 06:31:01PM +0000, Jean-Philippe Brucker wrote:
>> The problem might be too tied to the specifics of the SMMU. As implemented
>> in this series, the normal flow for a PPR with the SMMU is the following:
>>
>> (1) PCI device issues a PPR for PASID 1
>> (2) The PPR is queued by the SMMU in the (hardware) PRI queue
>> (3) The SMMU driver receives an interrupt, dequeues the PPR and moves it
>>     to a software work queue.
>> (4) The PPR is finally handled and a PRI response is sent to the device.
> 
> There are two ways a PASID could get shut down:
> 
> 	1) The device driver calls unbind()
> 	2) The mm_struct bound to that PASID is going away
> 
> Case 1) is the easy one, we can safely assume that the device driver did
> anything to stop new PPR requests from being created for that PASID. In
> this case we just shut down PPR processing by waiting until everything
> is handled and reply INVALID to any further PPR request before we remove
> the PASID from the per-device IOMMU data structures and flush caches.
> 
> In case 2) we have more work to do. The mm_struct is going away
> (probably because the task segfaulted) and we can't assume that the
> device driver shut everything down already. But for this case we have
> the call-back into the device driver to tell it should clean everything
> up for that PASID and stop the device from creating further requests.
> 
> After that call-back returns it is the same as in case 1), we drain the
> queue and deny any further request that comes in.

I agree on the semantics (I didn't implement case 2) here but I will have
to in the next version.)

>> The case that worries me is if someone unbinds PASID 1 between (2) and
>> (3), while the PPR is still in the hardware queue, and immediately binds
>> it to a new address space.
>>
>> Then (3) and (4) happen, the PPR is handled and the fault is for the new
>> address space. It's certainly undesirable, but I don't know if it could be
>> exploited. We don't kill the task for an unhandled fault at the moment,
>> simply report a failed PPR to the device, so I might be worrying for nothing.
> 
> As I wrote above, when the device driver calls unbind() we should
> assume that the device does not sent any further requests with that
> PASID. If it does, we just answer with INVALID.
> 
>> Having the caller tell us if PPRs might still be pending in the hardware
>> PRI queue ensures that the SMMU driver waits until it's entirely safe:
>>
>> * If the device has no outstanding PPR, PASID can be reallocated
>> * If the device has outstanding PPRs, wait for a Stop Marker, or drain
>>   the PRI queue after a while (if the Stop Marker was lost in a PRI queue
>>   overflow).
> 
> That can't happen, when the device driver does its job right. It has to
> shut down the context which causes the PPR requests for the PASID on the
> device. This includes stopping the context and waiting until all PPR
> requests it sent are processed.

By "processed", do you mean that they are committed to the IOMMU, or that
they came back with a PRG response?

The driver might not be able to do the latter, since PCI defines two ways
of shutting down a context:

* Either wait for all PPR requests to come back with a PRG response,
* Or send a Stop Marker PPR request and forget about it.

The second one is problematic, all the device says is "I've stopped
sending requests, some might still be in flight, but a Stop Marker ends
the flow".

Without having the device driver tell us which of the two models the
device is implementing, draining the hardware queue is our best bet to
ensure that no request is pending.

In any case, this is a property of the device, and passing flags to
unbind() as I suggested is probably excessive. The IOMMU driver could
store that info somewhere and use it whenever it has to unbind(), as an
indication of the minimum amount of work required to clean the context.
Without this hint the default should be to drain both queues.

My intent with passing flags to unbind() was to handle the case where VFIO
is unable to tell us whether PPRs are still being issued by the device.
But the issue seems moot to me now that I have a better understanding, as
there will be a detach_dev/attach_dev sequence before we start rebinding
PASIDs, and we can simply reset the PRI interface there (I'm currently
doing that in add_device, but I should move it.)

> And the device driver has to do this either before it calls unbind() or
> in the call-back it provided. Only after this the PASID should be freed.
>
>> Draining the PRI queue is very costly, we need to block the PRI thread to
>> inspect the queue, risking an overflow. And with these PASID state flags
>> we avoid flushing any queue.
> 
> There is a configurable maximum of PPR requests a device can have
> in-flight. If you take that into account when allocation the PPR queue
> for the SMMU, there can't be any overflows. The AMD driver allocates a
> queue for 512 entries and allows devices to have a maximum of 32
> outstanding requests.

Yes, the SMMU specification also tells that over-committing the PPR queue
is a programming error. I wonder how well it scales with hot-plugging of
devices however. At the time when we start allocating PPR credits, we
might not be sure that the number of devices with a PRI will be limited to
16. So even if overflow is a programming error, I'm not comfortable with
ruling it out just yet.

Thanks,
Jean-Philippe

>> But since the problem seems too centered around the SMMU, I might just
>> drop this patch along with the CLEAN/FLUSHED flags in my next version, and
>> go with the full-drain solution. After all, unbind should be a fairly rare
>> event.
> 
> I don't think all this is SMMU specific, it is the same on all other
> IOMMUs that have the ATS/PRI/PASID features.
> 
> 
> 
> 	Joerg
> 

  reply	other threads:[~2017-03-23 13:37 UTC|newest]

Thread overview: 314+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-27 19:54 [RFC PATCH 00/30] Add PCIe SVM support to ARM SMMUv3 Jean-Philippe Brucker
2017-02-27 19:54 ` Jean-Philippe Brucker
2017-02-27 19:54 ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 01/30] iommu/arm-smmu-v3: Link groups and devices Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-03-27 12:18   ` Robin Murphy
2017-03-27 12:18     ` Robin Murphy
2017-03-27 12:18     ` Robin Murphy
2017-04-10 11:02     ` Jean-Philippe Brucker
2017-04-10 11:02       ` Jean-Philippe Brucker
2017-04-10 11:02       ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 02/30] iommu/arm-smmu-v3: Link groups and domains Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 03/30] PCI: Move ATS declarations outside of CONFIG_PCI Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-03-03 21:09   ` Bjorn Helgaas
2017-03-03 21:09     ` Bjorn Helgaas
2017-03-03 21:09     ` Bjorn Helgaas
2017-03-06 11:29     ` Jean-Philippe Brucker
2017-03-06 11:29       ` Jean-Philippe Brucker
2017-03-06 11:29       ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 04/30] iommu/arm-smmu-v3: Add support for PCI ATS Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-03-01 19:24   ` Sinan Kaya
2017-03-01 19:24     ` Sinan Kaya
2017-03-01 19:24     ` Sinan Kaya
2017-03-02 10:51     ` Jean-Philippe Brucker
2017-03-02 10:51       ` Jean-Philippe Brucker
2017-03-02 10:51       ` Jean-Philippe Brucker
2017-03-02 13:11       ` okaya
2017-03-02 13:11         ` okaya at codeaurora.org
2017-03-02 13:11         ` okaya-sgV2jX0FEOL9JmXXK+q4OQ
2017-03-08 15:26   ` Sinan Kaya
2017-03-08 15:26     ` Sinan Kaya
2017-03-08 15:26     ` Sinan Kaya
2017-03-21 19:38     ` Jean-Philippe Brucker
2017-03-21 19:38       ` Jean-Philippe Brucker
2017-03-21 19:38       ` Jean-Philippe Brucker
2017-04-03  8:34   ` Sunil Kovvuri
2017-04-03  8:34     ` Sunil Kovvuri
2017-04-03  8:34     ` Sunil Kovvuri
2017-04-03 10:14     ` Jean-Philippe Brucker
2017-04-03 10:14       ` Jean-Philippe Brucker
2017-04-03 10:14       ` Jean-Philippe Brucker
2017-04-03 11:42       ` Sunil Kovvuri
2017-04-03 11:42         ` Sunil Kovvuri
2017-04-03 11:42         ` Sunil Kovvuri
2017-04-03 11:56         ` Jean-Philippe Brucker
2017-04-03 11:56           ` Jean-Philippe Brucker
2017-04-03 11:56           ` Jean-Philippe Brucker
2017-05-10 12:54   ` Tomasz Nowicki
2017-05-10 12:54     ` Tomasz Nowicki
2017-05-10 12:54     ` Tomasz Nowicki
2017-05-10 13:35     ` Jean-Philippe Brucker
2017-05-10 13:35       ` Jean-Philippe Brucker
2017-05-10 13:35       ` Jean-Philippe Brucker
2017-05-23  8:41   ` Leizhen (ThunderTown)
2017-05-23  8:41     ` Leizhen (ThunderTown)
2017-05-23  8:41     ` Leizhen (ThunderTown)
2017-05-23  8:41     ` Leizhen (ThunderTown)
2017-05-23 11:21     ` Jean-Philippe Brucker
2017-05-23 11:21       ` Jean-Philippe Brucker
2017-05-23 11:21       ` Jean-Philippe Brucker
2017-05-25 18:27       ` Roy Franz (Cavium)
2017-05-25 18:27         ` Roy Franz (Cavium)
2017-05-25 18:27         ` Roy Franz (Cavium)
2017-02-27 19:54 ` [RFC PATCH 05/30] iommu/arm-smmu-v3: Disable tagged pointers when ATS is in use Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-05-22  6:27   ` Leizhen (ThunderTown)
2017-05-22  6:27     ` Leizhen (ThunderTown)
2017-05-22  6:27     ` Leizhen (ThunderTown)
2017-05-22  6:27     ` Leizhen (ThunderTown)
2017-05-22 14:02     ` Jean-Philippe Brucker
2017-05-22 14:02       ` Jean-Philippe Brucker
2017-05-22 14:02       ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 06/30] iommu/arm-smmu-v3: Add support for Substream IDs Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 07/30] iommu/arm-smmu-v3: Add second level of context descriptor table Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-05-15 12:47   ` Tomasz Nowicki
2017-05-15 12:47     ` Tomasz Nowicki
2017-05-15 12:47     ` Tomasz Nowicki
2017-05-15 13:57     ` Jean-Philippe Brucker
2017-05-15 13:57       ` Jean-Philippe Brucker
2017-05-15 13:57       ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 08/30] iommu/arm-smmu-v3: Add support for VHE Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 09/30] iommu/arm-smmu-v3: Support broadcast TLB maintenance Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 10/30] iommu/arm-smmu-v3: Add task contexts Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 11/30] arm64: mm: Pin down ASIDs for sharing contexts with devices Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 12/30] iommu/arm-smmu-v3: Keep track of process address spaces Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 13/30] iommu/io-pgtable-arm: Factor out ARM LPAE register defines Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 14/30] iommu/arm-smmu-v3: Share process page tables Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 15/30] iommu/arm-smmu-v3: Steal private ASID from a domain Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 16/30] iommu/arm-smmu-v3: Use shared ASID set Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 17/30] iommu/arm-smmu-v3: Add SVM feature checking Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 18/30] PCI: Make "PRG Response PASID Required" handling common Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-03-03 21:11   ` Bjorn Helgaas
2017-03-03 21:11     ` Bjorn Helgaas
2017-03-03 21:11     ` Bjorn Helgaas
2017-03-06 11:31     ` Jean-Philippe Brucker
2017-03-06 11:31       ` Jean-Philippe Brucker
2017-03-06 11:31       ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 19/30] PCI: Cache PRI and PASID bits in pci_dev Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-03-03 21:12   ` Bjorn Helgaas
2017-03-03 21:12     ` Bjorn Helgaas
2017-03-03 21:12     ` Bjorn Helgaas
2017-02-27 19:54 ` [RFC PATCH 20/30] iommu/arm-smmu-v3: Enable PCI PASID in masters Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-05-31 14:10   ` [RFC,20/30] " Sinan Kaya
2017-05-31 14:10     ` Sinan Kaya
2017-05-31 14:10     ` Sinan Kaya
2017-06-01 12:30     ` Jean-Philippe Brucker
2017-06-01 12:30       ` Jean-Philippe Brucker
2017-06-01 12:30       ` Jean-Philippe Brucker
2017-06-01 12:30       ` David Woodhouse
2017-06-01 12:30         ` David Woodhouse
2017-06-01 12:30         ` David Woodhouse
2017-06-23 14:39     ` Sinan Kaya
2017-06-23 14:39       ` Sinan Kaya
2017-06-23 14:39       ` Sinan Kaya
2017-06-23 15:15       ` Jean-Philippe Brucker
2017-06-23 15:15         ` Jean-Philippe Brucker
2017-06-23 15:15         ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 21/30] iommu/arm-smmu-v3: Handle device faults from PRI Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
     [not found]   ` <8520D5D51A55D047800579B0941471982640F43C@XAP-PVEXMBX02.xlnx.xilinx.com>
2017-03-25  5:16     ` valmiki
2017-03-25  5:16       ` valmiki
2017-03-25  5:16       ` valmiki
2017-03-27 11:05       ` Jean-Philippe Brucker
2017-03-27 11:05         ` Jean-Philippe Brucker
2017-03-27 11:05         ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 22/30] iommu: Bind/unbind tasks to/from devices Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-03-02  7:29   ` Tian, Kevin
2017-03-02  7:29     ` Tian, Kevin
2017-03-02  7:29     ` Tian, Kevin
2017-03-03  9:40   ` David Woodhouse
2017-03-03  9:40     ` David Woodhouse
2017-03-03 17:05     ` Raj, Ashok
2017-03-03 17:05       ` Raj, Ashok
2017-03-03 17:05       ` Raj, Ashok
2017-03-03 18:39     ` Jean-Philippe Brucker
2017-03-03 18:39       ` Jean-Philippe Brucker
2017-03-03 18:39       ` Jean-Philippe Brucker
2017-03-22 15:36       ` Joerg Roedel
2017-03-22 15:36         ` Joerg Roedel
2017-03-22 15:36         ` Joerg Roedel
2017-03-22 18:30         ` Jean-Philippe Brucker
2017-03-22 18:30           ` Jean-Philippe Brucker
2017-03-22 18:30           ` Jean-Philippe Brucker
2017-03-22 15:38   ` Joerg Roedel
2017-03-22 15:38     ` Joerg Roedel
2017-03-22 15:38     ` Joerg Roedel
2017-02-27 19:54 ` [RFC PATCH 23/30] iommu/arm-smmu-v3: Bind/unbind device and task Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 24/30] iommu: Specify PASID state when unbinding a task Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-03-22 15:44   ` Joerg Roedel
2017-03-22 15:44     ` Joerg Roedel
2017-03-22 15:44     ` Joerg Roedel
2017-03-22 18:31     ` Jean-Philippe Brucker
2017-03-22 18:31       ` Jean-Philippe Brucker
2017-03-22 18:31       ` Jean-Philippe Brucker
2017-03-22 22:53       ` Joerg Roedel
2017-03-22 22:53         ` Joerg Roedel
2017-03-22 22:53         ` Joerg Roedel
2017-03-23 13:37         ` Jean-Philippe Brucker [this message]
2017-03-23 13:37           ` Jean-Philippe Brucker
2017-03-23 13:37           ` Jean-Philippe Brucker
2017-03-23 14:30           ` Joerg Roedel
2017-03-23 14:30             ` Joerg Roedel
2017-03-23 14:30             ` Joerg Roedel
2017-03-23 15:52             ` Jean-Philippe Brucker
2017-03-23 15:52               ` Jean-Philippe Brucker
2017-03-23 15:52               ` Jean-Philippe Brucker
2017-03-23 16:52               ` Joerg Roedel
2017-03-23 16:52                 ` Joerg Roedel
2017-03-23 16:52                 ` Joerg Roedel
2017-03-23 17:03                 ` Jean-Philippe Brucker
2017-03-23 17:03                   ` Jean-Philippe Brucker
2017-03-23 17:03                   ` Jean-Philippe Brucker
2017-03-24 11:00                   ` Joerg Roedel
2017-03-24 11:00                     ` Joerg Roedel
2017-03-24 11:00                     ` Joerg Roedel
2017-03-24 19:08                     ` Jean-Philippe Brucker
2017-03-24 19:08                       ` Jean-Philippe Brucker
2017-03-24 19:08                       ` Jean-Philippe Brucker
2017-03-27 15:33                       ` Joerg Roedel
2017-03-27 15:33                         ` Joerg Roedel
2017-03-27 15:33                         ` Joerg Roedel
2017-02-27 19:54 ` [RFC PATCH 25/30] iommu/arm-smmu-v3: Safe invalidation and recycling of PASIDs Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 26/30] iommu/arm-smmu-v3: Fix PRI queue overflow acknowledgement Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 27/30] iommu/arm-smmu-v3: Handle PRI queue overflow Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 28/30] iommu/arm-smmu-v3: Add support for Hardware Translation Table Update at stage 1 Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54 ` [RFC PATCH 29/30] vfio: Add support for Shared Virtual Memory Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-28  3:54   ` Alex Williamson
2017-02-28  3:54     ` Alex Williamson
2017-02-28  3:54     ` Alex Williamson
2017-02-28 15:17     ` Jean-Philippe Brucker
2017-02-28 15:17       ` Jean-Philippe Brucker
2017-02-28 15:17       ` Jean-Philippe Brucker
2017-03-21  7:04   ` Liu, Yi L
2017-03-21  7:04     ` Liu, Yi L
2017-03-21  7:04     ` Liu, Yi L
2017-03-21 19:37     ` Jean-Philippe Brucker
2017-03-21 19:37       ` Jean-Philippe Brucker
2017-03-21 19:37       ` Jean-Philippe Brucker
2017-03-21 20:56       ` jacob pan
2017-03-21 20:56         ` jacob pan
2017-03-21 20:56         ` jacob pan
2017-03-21 20:56         ` jacob pan
2017-03-23  8:39       ` Liu, Yi L
2017-03-23  8:39         ` Liu, Yi L
2017-03-23  8:39         ` Liu, Yi L
2017-03-23  8:39         ` Liu, Yi L
2017-03-23 13:38         ` Jean-Philippe Brucker
2017-03-23 13:38           ` Jean-Philippe Brucker
2017-03-23 13:38           ` Jean-Philippe Brucker
2017-03-23 13:38           ` Jean-Philippe Brucker
2017-03-24  7:46           ` Liu, Yi L
2017-03-24  7:46             ` Liu, Yi L
2017-03-24  7:46             ` Liu, Yi L
2017-03-24  7:46             ` Liu, Yi L
2017-03-27 10:13             ` Jean-Philippe Brucker
2017-03-27 10:13               ` Jean-Philippe Brucker
2017-03-27 10:13               ` Jean-Philippe Brucker
2017-03-29  6:17               ` Liu, Yi L
2017-03-29  6:17                 ` Liu, Yi L
2017-03-29  6:17                 ` Liu, Yi L
2017-04-26  6:53   ` Tomasz Nowicki
2017-04-26  6:53     ` Tomasz Nowicki
2017-04-26  6:53     ` Tomasz Nowicki
2017-04-26 10:08     ` Jean-Philippe Brucker
2017-04-26 10:08       ` Jean-Philippe Brucker
2017-04-26 10:08       ` Jean-Philippe Brucker
2017-04-26 11:01       ` Tomasz Nowicki
2017-04-26 11:01         ` Tomasz Nowicki
2017-04-26 11:01         ` Tomasz Nowicki
2017-02-27 19:54 ` [RFC PATCH 30/30] vfio: Allow to bind foreign task Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-27 19:54   ` Jean-Philippe Brucker
2017-02-28  3:54   ` Alex Williamson
2017-02-28  3:54     ` Alex Williamson
2017-02-28  3:54     ` Alex Williamson
2017-02-28  6:43     ` Tian, Kevin
2017-02-28  6:43       ` Tian, Kevin
2017-02-28  6:43       ` Tian, Kevin
2017-02-28 15:22       ` Jean-Philippe Brucker
2017-02-28 15:22         ` Jean-Philippe Brucker
2017-02-28 15:22         ` Jean-Philippe Brucker
2017-03-01  8:02         ` Tian, Kevin
2017-03-01  8:02           ` Tian, Kevin
2017-03-01  8:02           ` Tian, Kevin
2017-03-02 10:50           ` Jean-Philippe Brucker
2017-03-02 10:50             ` Jean-Philippe Brucker
2017-03-02 10:50             ` Jean-Philippe Brucker
2017-04-26  7:25   ` Tomasz Nowicki
2017-04-26  7:25     ` Tomasz Nowicki
2017-04-26  7:25     ` Tomasz Nowicki
2017-04-26 10:08     ` Jean-Philippe Brucker
2017-04-26 10:08       ` Jean-Philippe Brucker
2017-04-26 10:08       ` Jean-Philippe Brucker
2017-03-06  8:20 ` [RFC PATCH 00/30] Add PCIe SVM support to ARM SMMUv3 Liu, Yi L
2017-03-06  8:20   ` Liu, Yi L
2017-03-06  8:20   ` Liu, Yi L
2017-03-06 11:14   ` Jean-Philippe Brucker
2017-03-06 11:14     ` Jean-Philippe Brucker
2017-03-06 11:14     ` Jean-Philippe Brucker

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=a093bc07-a345-a689-9d97-f15a306f922d@arm.com \
    --to=jean-philippe.brucker@arm.com \
    --cc=alex.williamson@redhat.com \
    --cc=bhelgaas@google.com \
    --cc=catalin.marinas@arm.com \
    --cc=dwmw2@infradead.org \
    --cc=harba@qti.qualcomm.com \
    --cc=iommu@lists.linux-foundation.org \
    --cc=joro@8bytes.org \
    --cc=kvm@vger.kernel.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=lorenzo.pieralisi@arm.com \
    --cc=nwatters@qti.qualcomm.com \
    --cc=okaya@qti.qualcomm.com \
    --cc=robin.murphy@arm.com \
    --cc=shankerd@qti.qualcomm.com \
    --cc=will.deacon@arm.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.