From: "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com>
To: "Usyskin, Alexander" <alexander.usyskin@intel.com>,
"Winkler, Tomas" <tomas.winkler@intel.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: Jani Nikula <jani.nikula@linux.intel.com>,
Joonas Lahtinen <joonas.lahtinen@linux.intel.com>,
"Vivi, Rodrigo" <rodrigo.vivi@intel.com>,
Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Lubart, Vitaly" <vitaly.lubart@intel.com>
Subject: Re: [PATCH v7 11/15] mei: gsc: setup gsc extended operational memory
Date: Sun, 4 Sep 2022 15:26:45 -0700 [thread overview]
Message-ID: <a32e4a83-7edb-db61-635a-47b4d16fd7cf@intel.com> (raw)
In-Reply-To: <CY5PR11MB63661B40A4D331A6A7E59749ED7C9@CY5PR11MB6366.namprd11.prod.outlook.com>
On 9/4/2022 12:29 AM, Usyskin, Alexander wrote:
>>> +static void pxp_is_ready(struct mei_cl_device *cldev)
>>> +{
>>> + struct mei_device *bus = cldev->bus;
>>> +
>>> + switch (bus->pxp_mode) {
>>> + case MEI_DEV_PXP_READY:
>>> + case MEI_DEV_PXP_DEFAULT:
>>> + cldev->do_match = 1;
>> Can you explain why you set do_match = 1 with MEI_DEV_PXP_DEFAULT ?
>> AFAIU MEI_DEV_PXP_DEFAULT means that we haven't even started to
>> initialize PXP, so it seems weird to match in that scenario.
>>
>> Apart from this, the patch LGTM.
>>
>> Daniele
> MEI_DEV_PXP_DEFAULT is a state for the legacy PXP solution that uses the same firmware client
> and have no need in special initialization.
makes sense. Could use a comment, but anyway:
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Daniele
>
WARNING: multiple messages have this Message-ID (diff)
From: "Ceraolo Spurio, Daniele" <daniele.ceraolospurio@intel.com>
To: "Usyskin, Alexander" <alexander.usyskin@intel.com>,
"Winkler, Tomas" <tomas.winkler@intel.com>,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: "intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Vivi, Rodrigo" <rodrigo.vivi@intel.com>,
"Lubart, Vitaly" <vitaly.lubart@intel.com>
Subject: Re: [Intel-gfx] [PATCH v7 11/15] mei: gsc: setup gsc extended operational memory
Date: Sun, 4 Sep 2022 15:26:45 -0700 [thread overview]
Message-ID: <a32e4a83-7edb-db61-635a-47b4d16fd7cf@intel.com> (raw)
In-Reply-To: <CY5PR11MB63661B40A4D331A6A7E59749ED7C9@CY5PR11MB6366.namprd11.prod.outlook.com>
On 9/4/2022 12:29 AM, Usyskin, Alexander wrote:
>>> +static void pxp_is_ready(struct mei_cl_device *cldev)
>>> +{
>>> + struct mei_device *bus = cldev->bus;
>>> +
>>> + switch (bus->pxp_mode) {
>>> + case MEI_DEV_PXP_READY:
>>> + case MEI_DEV_PXP_DEFAULT:
>>> + cldev->do_match = 1;
>> Can you explain why you set do_match = 1 with MEI_DEV_PXP_DEFAULT ?
>> AFAIU MEI_DEV_PXP_DEFAULT means that we haven't even started to
>> initialize PXP, so it seems weird to match in that scenario.
>>
>> Apart from this, the patch LGTM.
>>
>> Daniele
> MEI_DEV_PXP_DEFAULT is a state for the legacy PXP solution that uses the same firmware client
> and have no need in special initialization.
makes sense. Could use a comment, but anyway:
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Daniele
>
next prev parent reply other threads:[~2022-09-04 22:26 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-08-06 12:26 [PATCH v7 00/15] GSC support for XeHP SDV and DG2 Tomas Winkler
2022-08-06 12:26 ` [Intel-gfx] " Tomas Winkler
2022-08-06 12:26 ` [PATCH v7 01/15] drm/i915/gsc: skip irq initialization if using polling Tomas Winkler
2022-08-06 12:26 ` [Intel-gfx] " Tomas Winkler
2022-08-06 12:26 ` [PATCH v7 02/15] mei: add kdoc for struct mei_aux_device Tomas Winkler
2022-08-06 12:26 ` [Intel-gfx] " Tomas Winkler
2022-09-01 15:30 ` Ceraolo Spurio, Daniele
2022-09-01 15:30 ` Ceraolo Spurio, Daniele
2022-08-06 12:26 ` [PATCH v7 03/15] mei: add slow_firmware flag to the mei auxiliary device Tomas Winkler
2022-08-06 12:26 ` [Intel-gfx] " Tomas Winkler
2022-08-06 12:26 ` [PATCH v7 04/15] drm/i915/gsc: add slow_firmware flag to the gsc device definition Tomas Winkler
2022-08-06 12:26 ` [Intel-gfx] " Tomas Winkler
2022-08-06 12:26 ` [PATCH v7 05/15] drm/i915/gsc: add GSC XeHP SDV platform definition Tomas Winkler
2022-08-06 12:26 ` [Intel-gfx] " Tomas Winkler
2022-09-01 15:31 ` Ceraolo Spurio, Daniele
2022-09-01 15:31 ` Ceraolo Spurio, Daniele
2022-08-06 12:26 ` [PATCH v7 06/15] mei: gsc: use polling instead of interrupts Tomas Winkler
2022-08-06 12:26 ` [Intel-gfx] " Tomas Winkler
2022-09-01 16:00 ` Ceraolo Spurio, Daniele
2022-09-01 16:00 ` Ceraolo Spurio, Daniele
2022-08-06 12:26 ` [PATCH v7 07/15] mei: gsc: wait for reset thread on stop Tomas Winkler
2022-08-06 12:26 ` [Intel-gfx] " Tomas Winkler
2022-09-01 16:07 ` Ceraolo Spurio, Daniele
2022-09-01 16:07 ` Ceraolo Spurio, Daniele
2022-08-06 12:26 ` [PATCH v7 08/15] mei: extend timeouts on slow devices Tomas Winkler
2022-08-06 12:26 ` [Intel-gfx] " Tomas Winkler
2022-09-01 17:00 ` Ceraolo Spurio, Daniele
2022-09-01 17:00 ` Ceraolo Spurio, Daniele
2022-08-06 12:26 ` [PATCH v7 09/15] mei: bus: export common mkhi definitions into a separate header Tomas Winkler
2022-08-06 12:26 ` [Intel-gfx] " Tomas Winkler
2022-09-01 20:54 ` Ceraolo Spurio, Daniele
2022-09-01 20:54 ` Ceraolo Spurio, Daniele
2022-09-03 10:05 ` Winkler, Tomas
2022-09-03 10:05 ` Winkler, Tomas
2022-08-06 12:26 ` [PATCH v7 10/15] mei: mkhi: add memory ready command Tomas Winkler
2022-08-06 12:26 ` [Intel-gfx] " Tomas Winkler
2022-09-01 15:08 ` Greg Kroah-Hartman
2022-09-01 15:08 ` [Intel-gfx] " Greg Kroah-Hartman
2022-09-01 20:56 ` Ceraolo Spurio, Daniele
2022-09-01 20:56 ` [Intel-gfx] " Ceraolo Spurio, Daniele
2022-08-06 12:26 ` [PATCH v7 11/15] mei: gsc: setup gsc extended operational memory Tomas Winkler
2022-08-06 12:26 ` [Intel-gfx] " Tomas Winkler
2022-09-01 21:02 ` Ceraolo Spurio, Daniele
2022-09-01 21:02 ` [Intel-gfx] " Ceraolo Spurio, Daniele
2022-09-04 7:29 ` Usyskin, Alexander
2022-09-04 7:29 ` [Intel-gfx] " Usyskin, Alexander
2022-09-04 22:26 ` Ceraolo Spurio, Daniele [this message]
2022-09-04 22:26 ` Ceraolo Spurio, Daniele
2022-08-06 12:26 ` [PATCH v7 12/15] mei: gsc: add transition to PXP mode in resume flow Tomas Winkler
2022-08-06 12:26 ` [Intel-gfx] " Tomas Winkler
2022-09-01 21:19 ` Ceraolo Spurio, Daniele
2022-09-01 21:19 ` [Intel-gfx] " Ceraolo Spurio, Daniele
2022-08-06 12:26 ` [PATCH v7 13/15] mei: debugfs: add pxp mode to devstate in debugfs Tomas Winkler
2022-08-06 12:26 ` [Intel-gfx] " Tomas Winkler
2022-09-01 21:20 ` Ceraolo Spurio, Daniele
2022-09-01 21:20 ` Ceraolo Spurio, Daniele
2022-08-06 12:26 ` [PATCH v7 14/15] drm/i915/gsc: allocate extended operational memory in LMEM Tomas Winkler
2022-08-06 12:26 ` [Intel-gfx] " Tomas Winkler
2022-09-01 16:31 ` Teres Alexis, Alan Previn
2022-09-01 16:31 ` [Intel-gfx] " Teres Alexis, Alan Previn
2022-09-02 8:25 ` Matthew Auld
2022-09-02 8:25 ` Matthew Auld
2022-08-06 12:26 ` [PATCH v7 15/15] HAX: drm/i915: force INTEL_MEI_GSC on for CI Tomas Winkler
2022-08-06 12:26 ` [Intel-gfx] " Tomas Winkler
2022-08-06 12:59 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for GSC support for XeHP SDV and DG2 (rev2) Patchwork
2022-08-06 12:59 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-08-06 13:22 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-08-06 14:49 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-09-01 15:09 ` [PATCH v7 00/15] GSC support for XeHP SDV and DG2 Greg Kroah-Hartman
2022-09-01 15:09 ` [Intel-gfx] " Greg Kroah-Hartman
2022-09-09 10:24 ` Joonas Lahtinen
2022-09-09 10:24 ` [Intel-gfx] " Joonas Lahtinen
2022-09-09 15:17 ` Ceraolo Spurio, Daniele
2022-09-09 15:17 ` [Intel-gfx] " Ceraolo Spurio, Daniele
2022-09-09 16:33 ` Vivi, Rodrigo
2022-09-09 16:33 ` [Intel-gfx] " Vivi, Rodrigo
2022-09-09 17:16 ` Lucas De Marchi
2022-09-09 17:16 ` Lucas De Marchi
2022-09-12 12:51 ` Joonas Lahtinen
2022-09-12 12:51 ` [Intel-gfx] " Joonas Lahtinen
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