From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com> To: Matthew Auld <matthew.auld@intel.com>, intel-gfx@lists.freedesktop.org Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>, Jordan Justen <jordan.l.justen@intel.com>, Lionel Landwerlin <lionel.g.landwerlin@intel.com>, Kenneth Graunke <kenneth@whitecape.org>, Jon Bloomfield <jon.bloomfield@intel.com>, dri-devel@lists.freedesktop.org, Daniel Vetter <daniel.vetter@ffwll.ch>, Akeem G Abodunrin <akeem.g.abodunrin@intel.com> Subject: Re: [PATCH v2 09/12] drm/i915/selftests: ensure we reserve a fence slot Date: Wed, 22 Jun 2022 16:23:21 +0200 [thread overview] Message-ID: <a7cedbd6ca56034712768b37a169202e3912adeb.camel@linux.intel.com> (raw) In-Reply-To: <20220621104434.190962-10-matthew.auld@intel.com> On Tue, 2022-06-21 at 11:44 +0100, Matthew Auld wrote: > We should always be explicit and allocate a fence slot before adding > a > new fence. > > Signed-off-by: Matthew Auld <matthew.auld@intel.com> > Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> > Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> > Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> > Cc: Jon Bloomfield <jon.bloomfield@intel.com> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch> > Cc: Jordan Justen <jordan.l.justen@intel.com> > Cc: Kenneth Graunke <kenneth@whitecape.org> > Cc: Akeem G Abodunrin <akeem.g.abodunrin@intel.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> > --- > drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c > b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c > index 5bc93a1ce3e3..7c95b6768610 100644 > --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c > +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c > @@ -1221,8 +1221,10 @@ static int __igt_mmap_migrate(struct > intel_memory_region **placements, > expand32(POISON_INUSE), > &rq); > i915_gem_object_unpin_pages(obj); > if (rq) { > - dma_resv_add_fence(obj->base.resv, &rq->fence, > - DMA_RESV_USAGE_KERNEL); > + err = dma_resv_reserve_fences(obj->base.resv, 1); > + if (!err) > + dma_resv_add_fence(obj->base.resv, &rq- > >fence, > + DMA_RESV_USAGE_KERNEL); > i915_request_put(rq); > } > i915_gem_object_unlock(obj);
WARNING: multiple messages have this Message-ID (diff)
From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com> To: Matthew Auld <matthew.auld@intel.com>, intel-gfx@lists.freedesktop.org Cc: Kenneth Graunke <kenneth@whitecape.org>, dri-devel@lists.freedesktop.org, Daniel Vetter <daniel.vetter@ffwll.ch> Subject: Re: [Intel-gfx] [PATCH v2 09/12] drm/i915/selftests: ensure we reserve a fence slot Date: Wed, 22 Jun 2022 16:23:21 +0200 [thread overview] Message-ID: <a7cedbd6ca56034712768b37a169202e3912adeb.camel@linux.intel.com> (raw) In-Reply-To: <20220621104434.190962-10-matthew.auld@intel.com> On Tue, 2022-06-21 at 11:44 +0100, Matthew Auld wrote: > We should always be explicit and allocate a fence slot before adding > a > new fence. > > Signed-off-by: Matthew Auld <matthew.auld@intel.com> > Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com> > Cc: Lionel Landwerlin <lionel.g.landwerlin@intel.com> > Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com> > Cc: Jon Bloomfield <jon.bloomfield@intel.com> > Cc: Daniel Vetter <daniel.vetter@ffwll.ch> > Cc: Jordan Justen <jordan.l.justen@intel.com> > Cc: Kenneth Graunke <kenneth@whitecape.org> > Cc: Akeem G Abodunrin <akeem.g.abodunrin@intel.com> Reviewed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com> > --- > drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c > b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c > index 5bc93a1ce3e3..7c95b6768610 100644 > --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c > +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c > @@ -1221,8 +1221,10 @@ static int __igt_mmap_migrate(struct > intel_memory_region **placements, > expand32(POISON_INUSE), > &rq); > i915_gem_object_unpin_pages(obj); > if (rq) { > - dma_resv_add_fence(obj->base.resv, &rq->fence, > - DMA_RESV_USAGE_KERNEL); > + err = dma_resv_reserve_fences(obj->base.resv, 1); > + if (!err) > + dma_resv_add_fence(obj->base.resv, &rq- > >fence, > + DMA_RESV_USAGE_KERNEL); > i915_request_put(rq); > } > i915_gem_object_unlock(obj);
next prev parent reply other threads:[~2022-06-22 14:23 UTC|newest] Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-06-21 10:44 [PATCH v2 00/12] small BAR uapi bits Matthew Auld 2022-06-21 10:44 ` [Intel-gfx] " Matthew Auld 2022-06-21 10:44 ` [PATCH v2 01/12] drm/doc: add rfc section for small BAR uapi Matthew Auld 2022-06-21 10:44 ` [Intel-gfx] " Matthew Auld 2022-06-21 12:26 ` Thomas Hellström 2022-06-21 12:26 ` [Intel-gfx] " Thomas Hellström 2022-06-21 18:31 ` Lionel Landwerlin 2022-06-21 18:31 ` [Intel-gfx] " Lionel Landwerlin 2022-06-21 19:38 ` Jordan Justen 2022-06-21 19:38 ` [Intel-gfx] " Jordan Justen 2022-06-21 10:44 ` [PATCH v2 02/12] drm/i915/uapi: add probed_cpu_visible_size Matthew Auld 2022-06-21 10:44 ` [Intel-gfx] " Matthew Auld 2022-06-21 10:44 ` [PATCH v2 03/12] drm/i915/uapi: expose the avail tracking Matthew Auld 2022-06-21 10:44 ` [Intel-gfx] " Matthew Auld 2022-06-21 19:44 ` kernel test robot 2022-06-21 19:44 ` kernel test robot 2022-06-21 19:44 ` [Intel-gfx] " kernel test robot 2022-06-22 14:19 ` Thomas Hellström 2022-06-22 14:19 ` [Intel-gfx] " Thomas Hellström 2022-06-21 10:44 ` [PATCH v2 04/12] drm/i915: remove intel_memory_region avail Matthew Auld 2022-06-21 10:44 ` [Intel-gfx] " Matthew Auld 2022-06-21 10:44 ` [PATCH v2 05/12] drm/i915/uapi: apply ALLOC_GPU_ONLY by default Matthew Auld 2022-06-21 10:44 ` [Intel-gfx] " Matthew Auld 2022-06-21 10:44 ` [PATCH v2 06/12] drm/i915/uapi: add NEEDS_CPU_ACCESS hint Matthew Auld 2022-06-21 10:44 ` [Intel-gfx] " Matthew Auld 2022-06-21 10:44 ` [PATCH v2 07/12] drm/i915/error: skip non-mappable pages Matthew Auld 2022-06-21 10:44 ` [Intel-gfx] " Matthew Auld 2022-06-21 10:44 ` [PATCH v2 08/12] drm/i915/uapi: tweak error capture on recoverable contexts Matthew Auld 2022-06-21 10:44 ` [Intel-gfx] " Matthew Auld 2022-06-21 22:06 ` kernel test robot 2022-06-21 22:06 ` kernel test robot 2022-06-21 22:06 ` [Intel-gfx] " kernel test robot 2022-06-21 10:44 ` [PATCH v2 09/12] drm/i915/selftests: ensure we reserve a fence slot Matthew Auld 2022-06-21 10:44 ` [Intel-gfx] " Matthew Auld 2022-06-22 14:23 ` Thomas Hellström [this message] 2022-06-22 14:23 ` Thomas Hellström 2022-06-21 10:44 ` [PATCH v2 10/12] drm/i915/ttm: handle blitter failure on DG2 Matthew Auld 2022-06-21 10:44 ` [Intel-gfx] " Matthew Auld 2022-06-23 7:00 ` Thomas Hellström 2022-06-23 7:00 ` [Intel-gfx] " Thomas Hellström 2022-06-23 14:13 ` Matthew Auld 2022-06-23 14:13 ` [Intel-gfx] " Matthew Auld 2022-06-23 14:52 ` Christian König 2022-06-23 14:52 ` [Intel-gfx] " Christian König 2022-06-23 15:31 ` Matthew Auld 2022-06-23 15:31 ` [Intel-gfx] " Matthew Auld 2022-06-27 10:48 ` Matthew Auld 2022-06-21 10:44 ` [PATCH v2 11/12] drm/i915: turn on small BAR support Matthew Auld 2022-06-21 10:44 ` [Intel-gfx] " Matthew Auld 2022-06-21 10:44 ` [PATCH v2 12/12] HAX: force small BAR on dg2 Matthew Auld 2022-06-21 10:44 ` [Intel-gfx] " Matthew Auld 2022-06-21 11:46 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for small BAR uapi bits (rev2) Patchwork 2022-06-21 11:46 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2022-06-21 12:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2022-06-21 21:37 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork 2022-06-22 20:02 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for small BAR uapi bits (rev3) Patchwork 2022-06-22 20:02 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2022-06-22 20:25 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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