Re: [PATCH v2] gpu: host1x: Avoid trying to use GART on Tegra20

From: Jon Hunter <jonathanh@nvidia.com>
To: Robin Murphy <robin.murphy@arm.com>, thierry.reding@gmail.com
Cc: linux-tegra@vger.kernel.org, iommu@lists.linux.dev,
	Dmitry Osipenko <digetx@gmail.com>,
	dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v2] gpu: host1x: Avoid trying to use GART on Tegra20
Date: Mon, 7 Nov 2022 21:21:13 +0000	[thread overview]
Message-ID: <a9a30bb0-6ed1-56f2-620a-f0c8233d8378@nvidia.com> (raw)
In-Reply-To: <a494905d-129d-afe9-1b06-5b35e67aad6b@nvidia.com>

Thierry,

On 21/10/2022 08:41, Jon Hunter wrote:
> 
> On 20/10/2022 15:23, Robin Murphy wrote:
>> Since commit c7e3ca515e78 ("iommu/tegra: gart: Do not register with
>> bus") quite some time ago, the GART driver has effectively disabled
>> itself to avoid issues with the GPU driver expecting it to work in ways
>> that it doesn't. As of commit 57365a04c921 ("iommu: Move bus setup to
>> IOMMU device registration") that bodge no longer works, but really the
>> GPU driver should be responsible for its own behaviour anyway. Make the
>> workaround explicit.
>>
>> Reported-by: Jon Hunter <jonathanh@nvidia.com>
>> Suggested-by: Dmitry Osipenko <digetx@gmail.com>
>> Signed-off-by: Robin Murphy <robin.murphy@arm.com>
>> ---
>>
>> v2: Cover DRM instance too, move into *_wants_iommu() for consistency
>>
>>   drivers/gpu/drm/tegra/drm.c | 4 ++++
>>   drivers/gpu/host1x/dev.c    | 4 ++++
>>   2 files changed, 8 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/tegra/drm.c b/drivers/gpu/drm/tegra/drm.c
>> index 6748ec1e0005..a1f909dac89a 100644
>> --- a/drivers/gpu/drm/tegra/drm.c
>> +++ b/drivers/gpu/drm/tegra/drm.c
>> @@ -1093,6 +1093,10 @@ static bool host1x_drm_wants_iommu(struct 
>> host1x_device *dev)
>>       struct host1x *host1x = dev_get_drvdata(dev->dev.parent);
>>       struct iommu_domain *domain;
>> +    /* Our IOMMU usage policy doesn't currently play well with GART */
>> +    if (of_machine_is_compatible("nvidia,tegra20"))
>> +        return false;
>> +
>>       /*
>>        * If the Tegra DRM clients are backed by an IOMMU, push buffers 
>> are
>>        * likely to be allocated beyond the 32-bit boundary if sufficient
>> diff --git a/drivers/gpu/host1x/dev.c b/drivers/gpu/host1x/dev.c
>> index 0cd3f97e7e49..f60ea24db0ec 100644
>> --- a/drivers/gpu/host1x/dev.c
>> +++ b/drivers/gpu/host1x/dev.c
>> @@ -292,6 +292,10 @@ static void 
>> host1x_setup_virtualization_tables(struct host1x *host)
>>   static bool host1x_wants_iommu(struct host1x *host1x)
>>   {
>> +    /* Our IOMMU usage policy doesn't currently play well with GART */
>> +    if (of_machine_is_compatible("nvidia,tegra20"))
>> +        return false;
>> +
>>       /*
>>        * If we support addressing a maximum of 32 bits of physical memory
>>        * and if the host1x firewall is enabled, there's no need to enable
> 
> 
> Thanks! Works for me.
> 
> Tested-by: Jon Hunter <jonathanh@nvidia.com>

We need to pick this fix up for v6.1.

Thanks
Jon

-- 
nvpublic