From: Sai Prakash Ranjan <quic_saipraka@quicinc.com> To: Will Deacon <will@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Marc Zyngier <maz@kernel.org>, Arnd Bergmann <arnd@arndb.de>, Steven Rostedt <rostedt@goodmis.org> Cc: gregkh <gregkh@linuxfoundation.org>, <quic_psodagud@quicinc.com>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-arm-msm@vger.kernel.org>, Sai Prakash Ranjan <quic_saipraka@quicinc.com> Subject: [PATCHv6 2/5] irqchip/tegra: Fix overflow implicit truncation warnings Date: Tue, 7 Dec 2021 12:24:46 +0530 [thread overview] Message-ID: <aba24d403b8821f1ad0f25eb7e5db3da75a65adc.1638858747.git.quic_saipraka@quicinc.com> (raw) In-Reply-To: <cover.1638858746.git.quic_saipraka@quicinc.com> Fix -Woverflow warnings for tegra irqchip driver which is a result of moving arm64 custom MMIO accessor macros to asm-generic function implementations giving a bonus type-checking now and uncovering these overflow warnings. drivers/irqchip/irq-tegra.c: In function ‘tegra_ictlr_suspend’: drivers/irqchip/irq-tegra.c:151:18: warning: large integer implicitly truncated to unsigned type [-Woverflow] writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR); ^ Cc: Marc Zyngier <maz@kernel.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> --- drivers/irqchip/irq-tegra.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/irqchip/irq-tegra.c b/drivers/irqchip/irq-tegra.c index e1f771c72fc4..9e4e5b39c701 100644 --- a/drivers/irqchip/irq-tegra.c +++ b/drivers/irqchip/irq-tegra.c @@ -148,10 +148,10 @@ static int tegra_ictlr_suspend(void) lic->cop_iep[i] = readl_relaxed(ictlr + ICTLR_COP_IEP_CLASS); /* Disable COP interrupts */ - writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR); + writel_relaxed(~0u, ictlr + ICTLR_COP_IER_CLR); /* Disable CPU interrupts */ - writel_relaxed(~0ul, ictlr + ICTLR_CPU_IER_CLR); + writel_relaxed(~0u, ictlr + ICTLR_CPU_IER_CLR); /* Enable the wakeup sources of ictlr */ writel_relaxed(lic->ictlr_wake_mask[i], ictlr + ICTLR_CPU_IER_SET); @@ -172,12 +172,12 @@ static void tegra_ictlr_resume(void) writel_relaxed(lic->cpu_iep[i], ictlr + ICTLR_CPU_IEP_CLASS); - writel_relaxed(~0ul, ictlr + ICTLR_CPU_IER_CLR); + writel_relaxed(~0u, ictlr + ICTLR_CPU_IER_CLR); writel_relaxed(lic->cpu_ier[i], ictlr + ICTLR_CPU_IER_SET); writel_relaxed(lic->cop_iep[i], ictlr + ICTLR_COP_IEP_CLASS); - writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR); + writel_relaxed(~0u, ictlr + ICTLR_COP_IER_CLR); writel_relaxed(lic->cop_ier[i], ictlr + ICTLR_COP_IER_SET); } @@ -312,7 +312,7 @@ static int __init tegra_ictlr_init(struct device_node *node, lic->base[i] = base; /* Disable all interrupts */ - writel_relaxed(~0UL, base + ICTLR_CPU_IER_CLR); + writel_relaxed(~0U, base + ICTLR_CPU_IER_CLR); /* All interrupts target IRQ */ writel_relaxed(0, base + ICTLR_CPU_IEP_CLASS); -- 2.33.1
WARNING: multiple messages have this Message-ID (diff)
From: Sai Prakash Ranjan <quic_saipraka@quicinc.com> To: Will Deacon <will@kernel.org>, Catalin Marinas <catalin.marinas@arm.com>, Marc Zyngier <maz@kernel.org>, Arnd Bergmann <arnd@arndb.de>, Steven Rostedt <rostedt@goodmis.org> Cc: gregkh <gregkh@linuxfoundation.org>, <quic_psodagud@quicinc.com>, <linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-arm-msm@vger.kernel.org>, Sai Prakash Ranjan <quic_saipraka@quicinc.com> Subject: [PATCHv6 2/5] irqchip/tegra: Fix overflow implicit truncation warnings Date: Tue, 7 Dec 2021 12:24:46 +0530 [thread overview] Message-ID: <aba24d403b8821f1ad0f25eb7e5db3da75a65adc.1638858747.git.quic_saipraka@quicinc.com> (raw) In-Reply-To: <cover.1638858746.git.quic_saipraka@quicinc.com> Fix -Woverflow warnings for tegra irqchip driver which is a result of moving arm64 custom MMIO accessor macros to asm-generic function implementations giving a bonus type-checking now and uncovering these overflow warnings. drivers/irqchip/irq-tegra.c: In function ‘tegra_ictlr_suspend’: drivers/irqchip/irq-tegra.c:151:18: warning: large integer implicitly truncated to unsigned type [-Woverflow] writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR); ^ Cc: Marc Zyngier <maz@kernel.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com> --- drivers/irqchip/irq-tegra.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/irqchip/irq-tegra.c b/drivers/irqchip/irq-tegra.c index e1f771c72fc4..9e4e5b39c701 100644 --- a/drivers/irqchip/irq-tegra.c +++ b/drivers/irqchip/irq-tegra.c @@ -148,10 +148,10 @@ static int tegra_ictlr_suspend(void) lic->cop_iep[i] = readl_relaxed(ictlr + ICTLR_COP_IEP_CLASS); /* Disable COP interrupts */ - writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR); + writel_relaxed(~0u, ictlr + ICTLR_COP_IER_CLR); /* Disable CPU interrupts */ - writel_relaxed(~0ul, ictlr + ICTLR_CPU_IER_CLR); + writel_relaxed(~0u, ictlr + ICTLR_CPU_IER_CLR); /* Enable the wakeup sources of ictlr */ writel_relaxed(lic->ictlr_wake_mask[i], ictlr + ICTLR_CPU_IER_SET); @@ -172,12 +172,12 @@ static void tegra_ictlr_resume(void) writel_relaxed(lic->cpu_iep[i], ictlr + ICTLR_CPU_IEP_CLASS); - writel_relaxed(~0ul, ictlr + ICTLR_CPU_IER_CLR); + writel_relaxed(~0u, ictlr + ICTLR_CPU_IER_CLR); writel_relaxed(lic->cpu_ier[i], ictlr + ICTLR_CPU_IER_SET); writel_relaxed(lic->cop_iep[i], ictlr + ICTLR_COP_IEP_CLASS); - writel_relaxed(~0ul, ictlr + ICTLR_COP_IER_CLR); + writel_relaxed(~0u, ictlr + ICTLR_COP_IER_CLR); writel_relaxed(lic->cop_ier[i], ictlr + ICTLR_COP_IER_SET); } @@ -312,7 +312,7 @@ static int __init tegra_ictlr_init(struct device_node *node, lic->base[i] = base; /* Disable all interrupts */ - writel_relaxed(~0UL, base + ICTLR_CPU_IER_CLR); + writel_relaxed(~0U, base + ICTLR_CPU_IER_CLR); /* All interrupts target IRQ */ writel_relaxed(0, base + ICTLR_CPU_IEP_CLASS); -- 2.33.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-12-07 6:55 UTC|newest] Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-12-07 6:54 [PATCHv6 0/5] tracing/rwmmio/arm64: Add support to trace register reads/writes Sai Prakash Ranjan 2021-12-07 6:54 ` Sai Prakash Ranjan 2021-12-07 6:54 ` [PATCHv6 1/5] arm64: io: Use asm-generic high level MMIO accessors Sai Prakash Ranjan 2021-12-07 6:54 ` Sai Prakash Ranjan 2021-12-10 18:16 ` Catalin Marinas 2021-12-10 18:16 ` Catalin Marinas 2021-12-10 18:23 ` Catalin Marinas 2021-12-10 18:23 ` Catalin Marinas 2021-12-07 6:54 ` Sai Prakash Ranjan [this message] 2021-12-07 6:54 ` [PATCHv6 2/5] irqchip/tegra: Fix overflow implicit truncation warnings Sai Prakash Ranjan 2021-12-07 6:54 ` [PATCHv6 3/5] drm/meson: " Sai Prakash Ranjan 2021-12-07 6:54 ` Sai Prakash Ranjan 2021-12-07 6:54 ` [PATCHv6 4/5] tracing: Add register read/write tracing support Sai Prakash Ranjan 2021-12-07 6:54 ` Sai Prakash Ranjan 2022-01-06 18:18 ` Steven Rostedt 2022-01-06 18:18 ` Steven Rostedt 2022-01-07 5:10 ` Sai Prakash Ranjan 2022-01-07 5:10 ` Sai Prakash Ranjan 2022-01-07 14:56 ` Steven Rostedt 2022-01-07 14:56 ` Steven Rostedt 2022-01-08 5:34 ` Sai Prakash Ranjan 2022-01-08 5:34 ` Sai Prakash Ranjan 2022-01-15 13:18 ` Sai Prakash Ranjan 2022-01-15 13:18 ` Sai Prakash Ranjan 2021-12-07 6:54 ` [PATCHv6 5/5] asm-generic/io: Add logging support for MMIO accessors Sai Prakash Ranjan 2021-12-07 6:54 ` Sai Prakash Ranjan 2021-12-13 3:28 ` [PATCHv6 0/5] tracing/rwmmio/arm64: Add support to trace register reads/writes Sai Prakash Ranjan 2021-12-13 3:28 ` Sai Prakash Ranjan 2022-01-03 5:41 ` Sai Prakash Ranjan 2022-01-03 5:41 ` Sai Prakash Ranjan
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