* [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le
@ 2016-07-10 7:51 Gowrishankar
2016-07-10 7:51 ` [PATCH v2 1/6] lpm: add altivec intrinsics for dpdk lpm on ppc_64 Gowrishankar
` (7 more replies)
0 siblings, 8 replies; 13+ messages in thread
From: Gowrishankar @ 2016-07-10 7:51 UTC (permalink / raw)
To: dev
Cc: Chao Zhu, Bruce Richardson, Konstantin Ananyev, Thomas Monjalon,
Cristian Dumitrescu, Pradeep, gowrishankar
From: gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
This patchset enables LPM, ACL and other few missing libs in ppc64le and also
address few patches in related examples (ip_pipeline and l3fwd).
Test report:
LPM and ACL unit tests verified as in patch set v1.
Same results as before observed.
v2 changes:
- enabling libs in config included as part of lib changes itself.
gowrishankar (6):
lpm: add altivec intrinsics for dpdk lpm on ppc_64
acl: add altivec intrinsics for dpdk acl on ppc_64
ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64
table: cache align rte_bucket_4_8
sched: enable sched library for ppc64le
l3fwd: add altivec support for em_hash_key
app/test-acl/main.c | 4 +
app/test/test_xmmt_ops.h | 16 +
config/defconfig_ppc_64-power8-linuxapp-gcc | 7 -
examples/ip_pipeline/cpu_core_map.c | 12 +-
examples/ip_pipeline/init.c | 4 +
examples/l3fwd/l3fwd_em.c | 8 +
lib/librte_acl/Makefile | 2 +
lib/librte_acl/acl.h | 4 +
lib/librte_acl/acl_run.h | 2 +
lib/librte_acl/acl_run_altivec.c | 47 +++
lib/librte_acl/acl_run_altivec.h | 328 +++++++++++++++++++++
lib/librte_acl/rte_acl.c | 13 +
lib/librte_acl/rte_acl.h | 1 +
.../common/include/arch/ppc_64/rte_vect.h | 60 ++++
lib/librte_lpm/Makefile | 2 +
lib/librte_lpm/rte_lpm.h | 2 +
lib/librte_lpm/rte_lpm_altivec.h | 154 ++++++++++
lib/librte_table/rte_table_hash_key8.c | 2 +-
18 files changed, 649 insertions(+), 19 deletions(-)
create mode 100644 lib/librte_acl/acl_run_altivec.c
create mode 100644 lib/librte_acl/acl_run_altivec.h
create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
create mode 100644 lib/librte_lpm/rte_lpm_altivec.h
--
1.9.1
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v2 1/6] lpm: add altivec intrinsics for dpdk lpm on ppc_64
2016-07-10 7:51 [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le Gowrishankar
@ 2016-07-10 7:51 ` Gowrishankar
2016-07-10 7:51 ` [PATCH v2 2/6] acl: add altivec intrinsics for dpdk acl " Gowrishankar
` (6 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Gowrishankar @ 2016-07-10 7:51 UTC (permalink / raw)
To: dev
Cc: Chao Zhu, Bruce Richardson, Konstantin Ananyev, Thomas Monjalon,
Cristian Dumitrescu, Pradeep, gowrishankar
From: gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
This patch adds ppc64le port for LPM library in DPDK.
Signed-off-by: Gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
---
app/test/test_xmmt_ops.h | 16 +++
config/defconfig_ppc_64-power8-linuxapp-gcc | 1 -
.../common/include/arch/ppc_64/rte_vect.h | 60 ++++++++
lib/librte_lpm/Makefile | 2 +
lib/librte_lpm/rte_lpm.h | 2 +
lib/librte_lpm/rte_lpm_altivec.h | 154 +++++++++++++++++++++
6 files changed, 234 insertions(+), 1 deletion(-)
create mode 100644 lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
create mode 100644 lib/librte_lpm/rte_lpm_altivec.h
diff --git a/app/test/test_xmmt_ops.h b/app/test/test_xmmt_ops.h
index de9c16f..42174d2 100644
--- a/app/test/test_xmmt_ops.h
+++ b/app/test/test_xmmt_ops.h
@@ -62,6 +62,22 @@ vect_set_epi32(int i3, int i2, int i1, int i0)
/* sets the 4 signed 32-bit integer values and returns the xmm_t variable */
#define vect_set_epi32(i3, i2, i1, i0) _mm_set_epi32(i3, i2, i1, i0)
+#elif defined(RTE_ARCH_PPC_64)
+
+/* vect_* abstraction implementation using ALTIVEC */
+
+/* loads the xmm_t value from address p(does not need to be 16-byte aligned)*/
+#define vect_loadu_sil128(p) vec_ld(0, p)
+
+/* sets the 4 signed 32-bit integer values and returns the xmm_t variable */
+static inline xmm_t __attribute__((always_inline))
+vect_set_epi32(int i3, int i2, int i1, int i0)
+{
+ xmm_t data = (xmm_t){i0, i1, i2, i3};
+
+ return data;
+}
+
#endif
#endif /* _TEST_XMMT_OPS_H_ */
diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc b/config/defconfig_ppc_64-power8-linuxapp-gcc
index 9eb0cc4..211ef18 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -57,7 +57,6 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n
CONFIG_RTE_LIBRTE_FM10K_PMD=n
# This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_LPM=n
CONFIG_RTE_LIBRTE_ACL=n
CONFIG_RTE_LIBRTE_SCHED=n
CONFIG_RTE_LIBRTE_PORT=n
diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h b/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
new file mode 100644
index 0000000..05209e5
--- /dev/null
+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
@@ -0,0 +1,60 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright (C) IBM Corporation 2016.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of IBM Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _RTE_VECT_PPC_64_H_
+#define _RTE_VECT_PPC_64_H_
+
+#include <altivec.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef vector signed int xmm_t;
+
+#define XMM_SIZE (sizeof(xmm_t))
+#define XMM_MASK (XMM_SIZE - 1)
+
+typedef union rte_xmm {
+ xmm_t x;
+ uint8_t u8[XMM_SIZE / sizeof(uint8_t)];
+ uint16_t u16[XMM_SIZE / sizeof(uint16_t)];
+ uint32_t u32[XMM_SIZE / sizeof(uint32_t)];
+ uint64_t u64[XMM_SIZE / sizeof(uint64_t)];
+ double pd[XMM_SIZE / sizeof(double)];
+} __attribute__((aligned(16))) rte_xmm_t;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_VECT_PPC_64_H_ */
diff --git a/lib/librte_lpm/Makefile b/lib/librte_lpm/Makefile
index 656ade2..3dc549d 100644
--- a/lib/librte_lpm/Makefile
+++ b/lib/librte_lpm/Makefile
@@ -51,6 +51,8 @@ ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) $(CONFIG_RTE_ARCH_ARM64)),)
SYMLINK-$(CONFIG_RTE_LIBRTE_LPM)-include += rte_lpm_neon.h
else ifeq ($(CONFIG_RTE_ARCH_X86),y)
SYMLINK-$(CONFIG_RTE_LIBRTE_LPM)-include += rte_lpm_sse.h
+else ifeq ($(CONFIG_RTE_ARCH_PPC_64),y)
+SYMLINK-$(CONFIG_RTE_LIBRTE_LPM)-include += rte_lpm_altivec.h
endif
# this lib needs eal
diff --git a/lib/librte_lpm/rte_lpm.h b/lib/librte_lpm/rte_lpm.h
index 2df1d67..dbe5483 100644
--- a/lib/librte_lpm/rte_lpm.h
+++ b/lib/librte_lpm/rte_lpm.h
@@ -480,6 +480,8 @@ rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4],
#if defined(RTE_ARCH_ARM) || defined(RTE_ARCH_ARM64)
#include "rte_lpm_neon.h"
+#elif defined(RTE_ARCH_PPC_64)
+#include "rte_lpm_altivec.h"
#else
#include "rte_lpm_sse.h"
#endif
diff --git a/lib/librte_lpm/rte_lpm_altivec.h b/lib/librte_lpm/rte_lpm_altivec.h
new file mode 100644
index 0000000..e26e087
--- /dev/null
+++ b/lib/librte_lpm/rte_lpm_altivec.h
@@ -0,0 +1,154 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright (C) IBM Corporation 2016.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of IBM Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#ifndef _RTE_LPM_ALTIVEC_H_
+#define _RTE_LPM_ALTIVEC_H_
+
+#include <rte_branch_prediction.h>
+#include <rte_byteorder.h>
+#include <rte_common.h>
+#include <rte_vect.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+static inline void
+rte_lpm_lookupx4(const struct rte_lpm *lpm, xmm_t ip, uint32_t hop[4],
+ uint32_t defv)
+{
+ vector signed int i24;
+ rte_xmm_t i8;
+ uint32_t tbl[4];
+ uint64_t idx, pt, pt2;
+ const uint32_t *ptbl;
+
+ const uint32_t mask = UINT8_MAX;
+ const vector signed int mask8 = (xmm_t){mask, mask, mask, mask};
+
+ /*
+ * RTE_LPM_VALID_EXT_ENTRY_BITMASK for 2 LPM entries
+ * as one 64-bit value (0x0300000003000000).
+ */
+ const uint64_t mask_xv =
+ ((uint64_t)RTE_LPM_VALID_EXT_ENTRY_BITMASK |
+ (uint64_t)RTE_LPM_VALID_EXT_ENTRY_BITMASK << 32);
+
+ /*
+ * RTE_LPM_LOOKUP_SUCCESS for 2 LPM entries
+ * as one 64-bit value (0x0100000001000000).
+ */
+ const uint64_t mask_v =
+ ((uint64_t)RTE_LPM_LOOKUP_SUCCESS |
+ (uint64_t)RTE_LPM_LOOKUP_SUCCESS << 32);
+
+ /* get 4 indexes for tbl24[]. */
+ i24 = vec_sr((xmm_t) ip,
+ (vector unsigned int){CHAR_BIT, CHAR_BIT, CHAR_BIT, CHAR_BIT});
+
+ /* extract values from tbl24[] */
+ idx = (uint32_t)i24[0];
+ idx = idx < (1<<24) ? idx : (1<<24)-1;
+ ptbl = (const uint32_t *)&lpm->tbl24[idx];
+ tbl[0] = *ptbl;
+
+ idx = (uint32_t) i24[1];
+ idx = idx < (1<<24) ? idx : (1<<24)-1;
+ ptbl = (const uint32_t *)&lpm->tbl24[idx];
+ tbl[1] = *ptbl;
+
+ idx = (uint32_t) i24[2];
+ idx = idx < (1<<24) ? idx : (1<<24)-1;
+ ptbl = (const uint32_t *)&lpm->tbl24[idx];
+ tbl[2] = *ptbl;
+
+ idx = (uint32_t) i24[3];
+ idx = idx < (1<<24) ? idx : (1<<24)-1;
+ ptbl = (const uint32_t *)&lpm->tbl24[idx];
+ tbl[3] = *ptbl;
+
+ /* get 4 indexes for tbl8[]. */
+ i8.x = vec_and(ip, mask8);
+
+ pt = (uint64_t)tbl[0] |
+ (uint64_t)tbl[1] << 32;
+ pt2 = (uint64_t)tbl[2] |
+ (uint64_t)tbl[3] << 32;
+
+ /* search successfully finished for all 4 IP addresses. */
+ if (likely((pt & mask_xv) == mask_v) &&
+ likely((pt2 & mask_xv) == mask_v)) {
+ *(uint64_t *)hop = pt & RTE_LPM_MASKX4_RES;
+ *(uint64_t *)(hop + 2) = pt2 & RTE_LPM_MASKX4_RES;
+ return;
+ }
+
+ if (unlikely((pt & RTE_LPM_VALID_EXT_ENTRY_BITMASK) ==
+ RTE_LPM_VALID_EXT_ENTRY_BITMASK)) {
+ i8.u32[0] = i8.u32[0] +
+ (uint8_t)tbl[0] * RTE_LPM_TBL8_GROUP_NUM_ENTRIES;
+ ptbl = (const uint32_t *)&lpm->tbl8[i8.u32[0]];
+ tbl[0] = *ptbl;
+ }
+ if (unlikely((pt >> 32 & RTE_LPM_VALID_EXT_ENTRY_BITMASK) ==
+ RTE_LPM_VALID_EXT_ENTRY_BITMASK)) {
+ i8.u32[1] = i8.u32[1] +
+ (uint8_t)tbl[1] * RTE_LPM_TBL8_GROUP_NUM_ENTRIES;
+ ptbl = (const uint32_t *)&lpm->tbl8[i8.u32[1]];
+ tbl[1] = *ptbl;
+ }
+ if (unlikely((pt2 & RTE_LPM_VALID_EXT_ENTRY_BITMASK) ==
+ RTE_LPM_VALID_EXT_ENTRY_BITMASK)) {
+ i8.u32[2] = i8.u32[2] +
+ (uint8_t)tbl[2] * RTE_LPM_TBL8_GROUP_NUM_ENTRIES;
+ ptbl = (const uint32_t *)&lpm->tbl8[i8.u32[2]];
+ tbl[2] = *ptbl;
+ }
+ if (unlikely((pt2 >> 32 & RTE_LPM_VALID_EXT_ENTRY_BITMASK) ==
+ RTE_LPM_VALID_EXT_ENTRY_BITMASK)) {
+ i8.u32[3] = i8.u32[3] +
+ (uint8_t)tbl[3] * RTE_LPM_TBL8_GROUP_NUM_ENTRIES;
+ ptbl = (const uint32_t *)&lpm->tbl8[i8.u32[3]];
+ tbl[3] = *ptbl;
+ }
+
+ hop[0] = (tbl[0] & RTE_LPM_LOOKUP_SUCCESS) ? tbl[0] & 0x00FFFFFF : defv;
+ hop[1] = (tbl[1] & RTE_LPM_LOOKUP_SUCCESS) ? tbl[1] & 0x00FFFFFF : defv;
+ hop[2] = (tbl[2] & RTE_LPM_LOOKUP_SUCCESS) ? tbl[2] & 0x00FFFFFF : defv;
+ hop[3] = (tbl[3] & RTE_LPM_LOOKUP_SUCCESS) ? tbl[3] & 0x00FFFFFF : defv;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _RTE_LPM_ALTIVEC_H_ */
--
1.9.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 2/6] acl: add altivec intrinsics for dpdk acl on ppc_64
2016-07-10 7:51 [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le Gowrishankar
2016-07-10 7:51 ` [PATCH v2 1/6] lpm: add altivec intrinsics for dpdk lpm on ppc_64 Gowrishankar
@ 2016-07-10 7:51 ` Gowrishankar
2016-07-10 7:51 ` [PATCH v2 3/6] ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64 Gowrishankar
` (5 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Gowrishankar @ 2016-07-10 7:51 UTC (permalink / raw)
To: dev
Cc: Chao Zhu, Bruce Richardson, Konstantin Ananyev, Thomas Monjalon,
Cristian Dumitrescu, Pradeep, gowrishankar
From: gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
This patch adds port for ACL library in ppc64le.
Signed-off-by: Gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
---
app/test-acl/main.c | 4 +
config/defconfig_ppc_64-power8-linuxapp-gcc | 1 -
lib/librte_acl/Makefile | 2 +
lib/librte_acl/acl.h | 4 +
lib/librte_acl/acl_run.h | 2 +
lib/librte_acl/acl_run_altivec.c | 47 ++++
lib/librte_acl/acl_run_altivec.h | 328 ++++++++++++++++++++++++++++
lib/librte_acl/rte_acl.c | 13 ++
lib/librte_acl/rte_acl.h | 1 +
9 files changed, 401 insertions(+), 1 deletion(-)
create mode 100644 lib/librte_acl/acl_run_altivec.c
create mode 100644 lib/librte_acl/acl_run_altivec.h
diff --git a/app/test-acl/main.c b/app/test-acl/main.c
index 0b0c093..3bee0de 100644
--- a/app/test-acl/main.c
+++ b/app/test-acl/main.c
@@ -105,6 +105,10 @@ static const struct acl_alg acl_alg[] = {
.name = "neon",
.alg = RTE_ACL_CLASSIFY_NEON,
},
+ {
+ .name = "altivec",
+ .alg = RTE_ACL_CLASSIFY_ALTIVEC,
+ },
};
static struct {
diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc b/config/defconfig_ppc_64-power8-linuxapp-gcc
index 211ef18..2ae26d9 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -57,7 +57,6 @@ CONFIG_RTE_LIBRTE_ENIC_PMD=n
CONFIG_RTE_LIBRTE_FM10K_PMD=n
# This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_ACL=n
CONFIG_RTE_LIBRTE_SCHED=n
CONFIG_RTE_LIBRTE_PORT=n
CONFIG_RTE_LIBRTE_TABLE=n
diff --git a/lib/librte_acl/Makefile b/lib/librte_acl/Makefile
index 2e394c9..6810552 100644
--- a/lib/librte_acl/Makefile
+++ b/lib/librte_acl/Makefile
@@ -52,6 +52,8 @@ SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_scalar.c
ifneq ($(filter y,$(CONFIG_RTE_ARCH_ARM) $(CONFIG_RTE_ARCH_ARM64)),)
SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_neon.c
CFLAGS_acl_run_neon.o += -flax-vector-conversions -Wno-maybe-uninitialized
+else ifeq ($(CONFIG_RTE_ARCH_PPC_64),y)
+SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_altivec.c
else
SRCS-$(CONFIG_RTE_LIBRTE_ACL) += acl_run_sse.c
#check if flag for SSE4.1 is already on, if not set it up manually
diff --git a/lib/librte_acl/acl.h b/lib/librte_acl/acl.h
index 09d6784..6664a55 100644
--- a/lib/librte_acl/acl.h
+++ b/lib/librte_acl/acl.h
@@ -234,6 +234,10 @@ int
rte_acl_classify_neon(const struct rte_acl_ctx *ctx, const uint8_t **data,
uint32_t *results, uint32_t num, uint32_t categories);
+int
+rte_acl_classify_altivec(const struct rte_acl_ctx *ctx, const uint8_t **data,
+ uint32_t *results, uint32_t num, uint32_t categories);
+
#ifdef __cplusplus
}
#endif /* __cplusplus */
diff --git a/lib/librte_acl/acl_run.h b/lib/librte_acl/acl_run.h
index b2fc42c..024f393 100644
--- a/lib/librte_acl/acl_run.h
+++ b/lib/librte_acl/acl_run.h
@@ -39,7 +39,9 @@
#define MAX_SEARCHES_AVX16 16
#define MAX_SEARCHES_SSE8 8
+#define MAX_SEARCHES_ALTIVEC8 8
#define MAX_SEARCHES_SSE4 4
+#define MAX_SEARCHES_ALTIVEC4 4
#define MAX_SEARCHES_SCALAR 2
#define GET_NEXT_4BYTES(prm, idx) \
diff --git a/lib/librte_acl/acl_run_altivec.c b/lib/librte_acl/acl_run_altivec.c
new file mode 100644
index 0000000..3523526
--- /dev/null
+++ b/lib/librte_acl/acl_run_altivec.c
@@ -0,0 +1,47 @@
+/*-
+ * BSD LICENSE
+ *
+ * Copyright (C) IBM Corporation 2016.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of Intel Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include "acl_run_altivec.h"
+
+int
+rte_acl_classify_altivec(const struct rte_acl_ctx *ctx, const uint8_t **data,
+ uint32_t *results, uint32_t num, uint32_t categories)
+{
+ if (likely(num >= MAX_SEARCHES_ALTIVEC8))
+ return search_altivec_8(ctx, data, results, num, categories);
+ else if (num >= MAX_SEARCHES_ALTIVEC4)
+ return search_altivec_4(ctx, data, results, num, categories);
+ else
+ return rte_acl_classify_scalar(ctx, data, results, num,
+ categories);
+}
diff --git a/lib/librte_acl/acl_run_altivec.h b/lib/librte_acl/acl_run_altivec.h
new file mode 100644
index 0000000..1bfb79d
--- /dev/null
+++ b/lib/librte_acl/acl_run_altivec.h
@@ -0,0 +1,328 @@
+/*
+ * BSD LICENSE
+ *
+ * Copyright (C) IBM Corporation 2016.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ * * Neither the name of IBM Corporation nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
+
+#include "acl_run.h"
+#include "acl_vect.h"
+
+struct _altivec_acl_const {
+ rte_xmm_t xmm_shuffle_input;
+ rte_xmm_t xmm_index_mask;
+ rte_xmm_t xmm_ones_16;
+ rte_xmm_t range_base;
+} altivec_acl_const __attribute__((aligned(RTE_CACHE_LINE_SIZE))) = {
+ {
+ .u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c}
+ },
+ {
+ .u32 = {RTE_ACL_NODE_INDEX, RTE_ACL_NODE_INDEX,
+ RTE_ACL_NODE_INDEX, RTE_ACL_NODE_INDEX}
+ },
+ {
+ .u16 = {1, 1, 1, 1, 1, 1, 1, 1}
+ },
+ {
+ .u32 = {0xffffff00, 0xffffff04, 0xffffff08, 0xffffff0c}
+ },
+};
+
+/*
+ * Resolve priority for multiple results (altivec version).
+ * This consists comparing the priority of the current traversal with the
+ * running set of results for the packet.
+ * For each result, keep a running array of the result (rule number) and
+ * its priority for each category.
+ */
+static inline void
+resolve_priority_altivec(uint64_t transition, int n,
+ const struct rte_acl_ctx *ctx, struct parms *parms,
+ const struct rte_acl_match_results *p, uint32_t categories)
+{
+ uint32_t x;
+ xmm_t results, priority, results1, priority1;
+ vector bool int selector;
+ xmm_t *saved_results, *saved_priority;
+
+ for (x = 0; x < categories; x += RTE_ACL_RESULTS_MULTIPLIER) {
+
+ saved_results = (xmm_t *)(&parms[n].cmplt->results[x]);
+ saved_priority =
+ (xmm_t *)(&parms[n].cmplt->priority[x]);
+
+ /* get results and priorities for completed trie */
+ results = *(const xmm_t *)&p[transition].results[x];
+ priority = *(const xmm_t *)&p[transition].priority[x];
+
+ /* if this is not the first completed trie */
+ if (parms[n].cmplt->count != ctx->num_tries) {
+
+ /* get running best results and their priorities */
+ results1 = *saved_results;
+ priority1 = *saved_priority;
+
+ /* select results that are highest priority */
+ selector = vec_cmpgt(priority1, priority);
+ results = vec_sel(results, results1, selector);
+ priority = vec_sel(priority, priority1,
+ selector);
+ }
+
+ /* save running best results and their priorities */
+ *saved_results = results;
+ *saved_priority = priority;
+ }
+}
+
+/*
+ * Check for any match in 4 transitions
+ */
+static inline __attribute__((always_inline)) uint32_t
+check_any_match_x4(uint64_t val[])
+{
+ return (val[0] | val[1] | val[2] | val[3]) & RTE_ACL_NODE_MATCH;
+}
+
+static inline __attribute__((always_inline)) void
+acl_match_check_x4(int slot, const struct rte_acl_ctx *ctx, struct parms *parms,
+ struct acl_flow_data *flows, uint64_t transitions[])
+{
+ while (check_any_match_x4(transitions)) {
+ transitions[0] = acl_match_check(transitions[0], slot, ctx,
+ parms, flows, resolve_priority_altivec);
+ transitions[1] = acl_match_check(transitions[1], slot + 1, ctx,
+ parms, flows, resolve_priority_altivec);
+ transitions[2] = acl_match_check(transitions[2], slot + 2, ctx,
+ parms, flows, resolve_priority_altivec);
+ transitions[3] = acl_match_check(transitions[3], slot + 3, ctx,
+ parms, flows, resolve_priority_altivec);
+ }
+}
+
+/*
+ * Process 4 transitions (in 2 XMM registers) in parallel
+ */
+static inline __attribute__((always_inline)) xmm_t
+transition4(xmm_t next_input, const uint64_t *trans,
+ xmm_t *indices1, xmm_t *indices2)
+{
+ xmm_t addr, tr_lo, tr_hi;
+ xmm_t in, node_type, r, t;
+ xmm_t dfa_ofs, quad_ofs;
+ xmm_t *index_mask, *tp;
+ vector bool int dfa_msk;
+ vector signed char zeroes = {};
+ uint64_t v[2];
+
+ /* Move low 32 into tr_lo and high 32 into tr_hi */
+ tr_lo = (xmm_t){(*indices1)[0], (*indices1)[2],
+ (*indices2)[0], (*indices2)[2]};
+ tr_hi = (xmm_t){(*indices1)[1], (*indices1)[3],
+ (*indices2)[1], (*indices2)[3]};
+
+ /* Calculate the address (array index) for all 4 transitions. */
+ index_mask = (xmm_t *)&altivec_acl_const.xmm_index_mask.u32;
+ t = vec_xor(*index_mask, *index_mask);
+ in = vec_perm(next_input, (xmm_t){},
+ *(vector unsigned char *)&altivec_acl_const.xmm_shuffle_input);
+
+ /* Calc node type and node addr */
+ node_type = vec_and(vec_nor(*index_mask, *index_mask), tr_lo);
+ addr = vec_and(tr_lo, *index_mask);
+
+ /* mask for DFA type(0) nodes */
+ dfa_msk = vec_cmpeq(node_type, t);
+
+ /* DFA calculations. */
+ r = vec_sr(in, (vector unsigned int){30, 30, 30, 30});
+ tp = (xmm_t *)&altivec_acl_const.range_base.u32;
+ r = vec_add(r, *tp);
+ t = vec_sr(in, (vector unsigned int){24, 24, 24, 24});
+ r = vec_perm(tr_hi, (xmm_t){(uint16_t)0 << 16},
+ (vector unsigned char)r);
+
+ dfa_ofs = vec_sub(t, r);
+
+ /* QUAD/SINGLE caluclations. */
+ t = (xmm_t)vec_cmpgt((vector signed char)in, (vector signed char)tr_hi);
+ t = (xmm_t)vec_sel(
+ vec_sel(
+ (vector signed char)vec_sub(
+ zeroes, (vector signed char)t),
+ (vector signed char)t,
+ vec_cmpgt((vector signed char)t, zeroes)),
+ zeroes,
+ vec_cmpeq((vector signed char)t, zeroes));
+
+ t = (xmm_t)vec_msum((vector signed char)t,
+ (vector unsigned char)t, (xmm_t){});
+ quad_ofs = (xmm_t)vec_msum((vector signed short)t,
+ *(vector signed short *)&altivec_acl_const.xmm_ones_16.u16,
+ (xmm_t){});
+
+ /* blend DFA and QUAD/SINGLE. */
+ t = vec_sel(quad_ofs, dfa_ofs, dfa_msk);
+
+ /* calculate address for next transitions. */
+ addr = vec_add(addr, t);
+
+ v[0] = (uint64_t)trans[addr[0]];
+ v[1] = (uint64_t)trans[addr[1]];
+ *indices1 = (xmm_t){((uint32_t *)&v)[0], ((uint32_t *)&v)[1],
+ ((uint32_t *)&v)[2], ((uint32_t *)&v)[3]};
+ v[0] = (uint64_t)trans[addr[2]];
+ v[1] = (uint64_t)trans[addr[3]];
+ *indices2 = (xmm_t){((uint32_t *)&v)[0], ((uint32_t *)&v)[1],
+ ((uint32_t *)&v)[2], ((uint32_t *)&v)[3]};
+
+ return vec_sr(next_input,
+ (vector unsigned int){CHAR_BIT, CHAR_BIT, CHAR_BIT, CHAR_BIT});
+}
+
+/*
+ * Execute trie traversal with 8 traversals in parallel
+ */
+static inline int
+search_altivec_8(const struct rte_acl_ctx *ctx, const uint8_t **data,
+ uint32_t *results, uint32_t total_packets, uint32_t categories)
+{
+ int n;
+ struct acl_flow_data flows;
+ uint64_t index_array[MAX_SEARCHES_ALTIVEC8];
+ struct completion cmplt[MAX_SEARCHES_ALTIVEC8];
+ struct parms parms[MAX_SEARCHES_ALTIVEC8];
+ xmm_t input0, input1;
+
+ acl_set_flow(&flows, cmplt, RTE_DIM(cmplt), data, results,
+ total_packets, categories, ctx->trans_table);
+
+ for (n = 0; n < MAX_SEARCHES_ALTIVEC8; n++) {
+ cmplt[n].count = 0;
+ index_array[n] = acl_start_next_trie(&flows, parms, n, ctx);
+ }
+
+ /* Check for any matches. */
+ acl_match_check_x4(0, ctx, parms, &flows, (uint64_t *)&index_array[0]);
+ acl_match_check_x4(4, ctx, parms, &flows, (uint64_t *)&index_array[4]);
+
+ while (flows.started > 0) {
+
+ /* Gather 4 bytes of input data for each stream. */
+ input0 = (xmm_t){GET_NEXT_4BYTES(parms, 0),
+ GET_NEXT_4BYTES(parms, 1),
+ GET_NEXT_4BYTES(parms, 2),
+ GET_NEXT_4BYTES(parms, 3)};
+
+ input1 = (xmm_t){GET_NEXT_4BYTES(parms, 4),
+ GET_NEXT_4BYTES(parms, 5),
+ GET_NEXT_4BYTES(parms, 6),
+ GET_NEXT_4BYTES(parms, 7)};
+
+ /* Process the 4 bytes of input on each stream. */
+
+ input0 = transition4(input0, flows.trans,
+ (xmm_t *)&index_array[0], (xmm_t *)&index_array[2]);
+ input1 = transition4(input1, flows.trans,
+ (xmm_t *)&index_array[4], (xmm_t *)&index_array[6]);
+
+ input0 = transition4(input0, flows.trans,
+ (xmm_t *)&index_array[0], (xmm_t *)&index_array[2]);
+ input1 = transition4(input1, flows.trans,
+ (xmm_t *)&index_array[4], (xmm_t *)&index_array[6]);
+
+ input0 = transition4(input0, flows.trans,
+ (xmm_t *)&index_array[0], (xmm_t *)&index_array[2]);
+ input1 = transition4(input1, flows.trans,
+ (xmm_t *)&index_array[4], (xmm_t *)&index_array[6]);
+
+ input0 = transition4(input0, flows.trans,
+ (xmm_t *)&index_array[0], (xmm_t *)&index_array[2]);
+ input1 = transition4(input1, flows.trans,
+ (xmm_t *)&index_array[4], (xmm_t *)&index_array[6]);
+
+ /* Check for any matches. */
+ acl_match_check_x4(0, ctx, parms, &flows,
+ (uint64_t *)&index_array[0]);
+ acl_match_check_x4(4, ctx, parms, &flows,
+ (uint64_t *)&index_array[4]);
+ }
+
+ return 0;
+}
+
+/*
+ * Execute trie traversal with 4 traversals in parallel
+ */
+static inline int
+search_altivec_4(const struct rte_acl_ctx *ctx, const uint8_t **data,
+ uint32_t *results, int total_packets, uint32_t categories)
+{
+ int n;
+ struct acl_flow_data flows;
+ uint64_t index_array[MAX_SEARCHES_ALTIVEC4];
+ struct completion cmplt[MAX_SEARCHES_ALTIVEC4];
+ struct parms parms[MAX_SEARCHES_ALTIVEC4];
+ xmm_t input;
+
+ acl_set_flow(&flows, cmplt, RTE_DIM(cmplt), data, results,
+ total_packets, categories, ctx->trans_table);
+
+ for (n = 0; n < MAX_SEARCHES_ALTIVEC4; n++) {
+ cmplt[n].count = 0;
+ index_array[n] = acl_start_next_trie(&flows, parms, n, ctx);
+ }
+
+ /* Check for any matches. */
+ acl_match_check_x4(0, ctx, parms, &flows, index_array);
+
+ while (flows.started > 0) {
+
+ /* Gather 4 bytes of input data for each stream. */
+ input = (xmm_t){GET_NEXT_4BYTES(parms, 0),
+ GET_NEXT_4BYTES(parms, 1),
+ GET_NEXT_4BYTES(parms, 2),
+ GET_NEXT_4BYTES(parms, 3)};
+
+ /* Process the 4 bytes of input on each stream. */
+ input = transition4(input, flows.trans,
+ (xmm_t *)&index_array[0], (xmm_t *)&index_array[2]);
+ input = transition4(input, flows.trans,
+ (xmm_t *)&index_array[0], (xmm_t *)&index_array[2]);
+ input = transition4(input, flows.trans,
+ (xmm_t *)&index_array[0], (xmm_t *)&index_array[2]);
+ input = transition4(input, flows.trans,
+ (xmm_t *)&index_array[0], (xmm_t *)&index_array[2]);
+
+ /* Check for any matches. */
+ acl_match_check_x4(0, ctx, parms, &flows, index_array);
+ }
+
+ return 0;
+}
diff --git a/lib/librte_acl/rte_acl.c b/lib/librte_acl/rte_acl.c
index 4ba9786..8b7e92c 100644
--- a/lib/librte_acl/rte_acl.c
+++ b/lib/librte_acl/rte_acl.c
@@ -75,12 +75,23 @@ rte_acl_classify_neon(__rte_unused const struct rte_acl_ctx *ctx,
return -ENOTSUP;
}
+int __attribute__ ((weak))
+rte_acl_classify_altivec(__rte_unused const struct rte_acl_ctx *ctx,
+ __rte_unused const uint8_t **data,
+ __rte_unused uint32_t *results,
+ __rte_unused uint32_t num,
+ __rte_unused uint32_t categories)
+{
+ return -ENOTSUP;
+}
+
static const rte_acl_classify_t classify_fns[] = {
[RTE_ACL_CLASSIFY_DEFAULT] = rte_acl_classify_scalar,
[RTE_ACL_CLASSIFY_SCALAR] = rte_acl_classify_scalar,
[RTE_ACL_CLASSIFY_SSE] = rte_acl_classify_sse,
[RTE_ACL_CLASSIFY_AVX2] = rte_acl_classify_avx2,
[RTE_ACL_CLASSIFY_NEON] = rte_acl_classify_neon,
+ [RTE_ACL_CLASSIFY_ALTIVEC] = rte_acl_classify_altivec,
};
/* by default, use always available scalar code path. */
@@ -119,6 +130,8 @@ rte_acl_init(void)
#elif defined(RTE_ARCH_ARM)
if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_NEON))
alg = RTE_ACL_CLASSIFY_NEON;
+#elif defined(RTE_ARCH_PPC_64)
+ alg = RTE_ACL_CLASSIFY_ALTIVEC;
#else
#ifdef CC_AVX2_SUPPORT
if (rte_cpu_get_flag_enabled(RTE_CPUFLAG_AVX2))
diff --git a/lib/librte_acl/rte_acl.h b/lib/librte_acl/rte_acl.h
index 0979a09..8d4e2a6 100644
--- a/lib/librte_acl/rte_acl.h
+++ b/lib/librte_acl/rte_acl.h
@@ -271,6 +271,7 @@ enum rte_acl_classify_alg {
RTE_ACL_CLASSIFY_SSE = 2, /**< requires SSE4.1 support. */
RTE_ACL_CLASSIFY_AVX2 = 3, /**< requires AVX2 support. */
RTE_ACL_CLASSIFY_NEON = 4, /**< requires NEON support. */
+ RTE_ACL_CLASSIFY_ALTIVEC = 5, /**< requires ALTIVEC support. */
RTE_ACL_CLASSIFY_NUM /* should always be the last one. */
};
--
1.9.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 3/6] ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64
2016-07-10 7:51 [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le Gowrishankar
2016-07-10 7:51 ` [PATCH v2 1/6] lpm: add altivec intrinsics for dpdk lpm on ppc_64 Gowrishankar
2016-07-10 7:51 ` [PATCH v2 2/6] acl: add altivec intrinsics for dpdk acl " Gowrishankar
@ 2016-07-10 7:51 ` Gowrishankar
2016-07-10 7:51 ` [PATCH v2 4/6] table: cache align rte_bucket_4_8 Gowrishankar
` (4 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Gowrishankar @ 2016-07-10 7:51 UTC (permalink / raw)
To: dev
Cc: Chao Zhu, Bruce Richardson, Konstantin Ananyev, Thomas Monjalon,
Cristian Dumitrescu, Pradeep, gowrishankar
From: gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
offline lcore would still refer to original core id and this has to
be considered while creating cpu core mask.
Signed-off-by: Gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
---
config/defconfig_ppc_64-power8-linuxapp-gcc | 3 ---
examples/ip_pipeline/cpu_core_map.c | 12 +-----------
examples/ip_pipeline/init.c | 4 ++++
3 files changed, 5 insertions(+), 14 deletions(-)
diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc b/config/defconfig_ppc_64-power8-linuxapp-gcc
index 2ae26d9..94f09a7 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -58,6 +58,3 @@ CONFIG_RTE_LIBRTE_FM10K_PMD=n
# This following libraries are not available on Power. So they're turned off.
CONFIG_RTE_LIBRTE_SCHED=n
-CONFIG_RTE_LIBRTE_PORT=n
-CONFIG_RTE_LIBRTE_TABLE=n
-CONFIG_RTE_LIBRTE_PIPELINE=n
diff --git a/examples/ip_pipeline/cpu_core_map.c b/examples/ip_pipeline/cpu_core_map.c
index cb088b1..482e68e 100644
--- a/examples/ip_pipeline/cpu_core_map.c
+++ b/examples/ip_pipeline/cpu_core_map.c
@@ -351,9 +351,6 @@ cpu_core_map_compute_linux(struct cpu_core_map *map)
int lcore_socket_id =
cpu_core_map_get_socket_id_linux(lcore_id);
- if (lcore_socket_id < 0)
- return -1;
-
if (((uint32_t) lcore_socket_id) == socket_id)
n_detected++;
}
@@ -368,18 +365,11 @@ cpu_core_map_compute_linux(struct cpu_core_map *map)
cpu_core_map_get_socket_id_linux(
lcore_id);
- if (lcore_socket_id < 0)
- return -1;
-
int lcore_core_id =
cpu_core_map_get_core_id_linux(
lcore_id);
- if (lcore_core_id < 0)
- return -1;
-
- if (((uint32_t) lcore_socket_id == socket_id) &&
- ((uint32_t) lcore_core_id == core_id)) {
+ if ((uint32_t) lcore_socket_id == socket_id) {
uint32_t pos = cpu_core_map_pos(map,
socket_id,
core_id_contig,
diff --git a/examples/ip_pipeline/init.c b/examples/ip_pipeline/init.c
index 83422e8..4acd38c 100644
--- a/examples/ip_pipeline/init.c
+++ b/examples/ip_pipeline/init.c
@@ -59,7 +59,11 @@ static void
app_init_core_map(struct app_params *app)
{
APP_LOG(app, HIGH, "Initializing CPU core map ...");
+#if defined(RTE_ARCH_PPC_64)
+ app->core_map = cpu_core_map_init(2, 5, 1, 0);
+#else
app->core_map = cpu_core_map_init(4, 32, 4, 0);
+#endif
if (app->core_map == NULL)
rte_panic("Cannot create CPU core map\n");
--
1.9.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 4/6] table: cache align rte_bucket_4_8
2016-07-10 7:51 [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le Gowrishankar
` (2 preceding siblings ...)
2016-07-10 7:51 ` [PATCH v2 3/6] ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64 Gowrishankar
@ 2016-07-10 7:51 ` Gowrishankar
2016-07-10 7:51 ` [PATCH v2 5/6] sched: enable sched library for ppc64le Gowrishankar
` (3 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Gowrishankar @ 2016-07-10 7:51 UTC (permalink / raw)
To: dev
Cc: Chao Zhu, Bruce Richardson, Konstantin Ananyev, Thomas Monjalon,
Cristian Dumitrescu, Pradeep, gowrishankar
From: gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
Align rte_bucket_4_8 for cache line.
Signed-off-by: Gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
---
lib/librte_table/rte_table_hash_key8.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/librte_table/rte_table_hash_key8.c b/lib/librte_table/rte_table_hash_key8.c
index e2e2bdc..4d5e0cd 100644
--- a/lib/librte_table/rte_table_hash_key8.c
+++ b/lib/librte_table/rte_table_hash_key8.c
@@ -68,7 +68,7 @@ struct rte_bucket_4_8 {
uint64_t key[4];
/* Cache line 1 */
- uint8_t data[0];
+ uint8_t data[0] __rte_cache_aligned;
};
struct rte_table_hash {
--
1.9.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 5/6] sched: enable sched library for ppc64le
2016-07-10 7:51 [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le Gowrishankar
` (3 preceding siblings ...)
2016-07-10 7:51 ` [PATCH v2 4/6] table: cache align rte_bucket_4_8 Gowrishankar
@ 2016-07-10 7:51 ` Gowrishankar
2016-07-10 7:51 ` [PATCH v2 6/6] l3fwd: add altivec support for em_hash_key Gowrishankar
` (2 subsequent siblings)
7 siblings, 0 replies; 13+ messages in thread
From: Gowrishankar @ 2016-07-10 7:51 UTC (permalink / raw)
To: dev
Cc: Chao Zhu, Bruce Richardson, Konstantin Ananyev, Thomas Monjalon,
Cristian Dumitrescu, Pradeep, gowrishankar
From: gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
This patch enables librte_sched in ppc64le.
Signed-off-by: Gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
---
config/defconfig_ppc_64-power8-linuxapp-gcc | 2 --
1 file changed, 2 deletions(-)
diff --git a/config/defconfig_ppc_64-power8-linuxapp-gcc b/config/defconfig_ppc_64-power8-linuxapp-gcc
index 94f09a7..bbd5568 100644
--- a/config/defconfig_ppc_64-power8-linuxapp-gcc
+++ b/config/defconfig_ppc_64-power8-linuxapp-gcc
@@ -56,5 +56,3 @@ CONFIG_RTE_LIBRTE_PMD_BOND=n
CONFIG_RTE_LIBRTE_ENIC_PMD=n
CONFIG_RTE_LIBRTE_FM10K_PMD=n
-# This following libraries are not available on Power. So they're turned off.
-CONFIG_RTE_LIBRTE_SCHED=n
--
1.9.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 6/6] l3fwd: add altivec support for em_hash_key
2016-07-10 7:51 [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le Gowrishankar
` (4 preceding siblings ...)
2016-07-10 7:51 ` [PATCH v2 5/6] sched: enable sched library for ppc64le Gowrishankar
@ 2016-07-10 7:51 ` Gowrishankar
2016-07-11 8:55 ` [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le Chao Zhu
2016-07-15 3:15 ` Chao Zhu
7 siblings, 0 replies; 13+ messages in thread
From: Gowrishankar @ 2016-07-10 7:51 UTC (permalink / raw)
To: dev
Cc: Chao Zhu, Bruce Richardson, Konstantin Ananyev, Thomas Monjalon,
Cristian Dumitrescu, Pradeep, gowrishankar
From: gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
This patch adds ppc64le port for em_mask_key function.
Signed-off-by: Gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
---
examples/l3fwd/l3fwd_em.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c
index fc59243..3e261d1 100644
--- a/examples/l3fwd/l3fwd_em.c
+++ b/examples/l3fwd/l3fwd_em.c
@@ -259,6 +259,14 @@ em_mask_key(void *key, xmm_t mask)
return vandq_s32(data, mask);
}
+#elif defined(RTE_MACHINE_CPUFLAG_ALTIVEC)
+static inline xmm_t
+em_mask_key(void *key, xmm_t mask)
+{
+ xmm_t data = vec_ld(0, (xmm_t *)(key));
+
+ return vec_and(data, mask);
+}
#endif
static inline uint8_t
--
1.9.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* Re: [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le
2016-07-10 7:51 [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le Gowrishankar
` (5 preceding siblings ...)
2016-07-10 7:51 ` [PATCH v2 6/6] l3fwd: add altivec support for em_hash_key Gowrishankar
@ 2016-07-11 8:55 ` Chao Zhu
2016-07-11 9:37 ` gowrishankar
2016-07-15 3:15 ` Chao Zhu
7 siblings, 1 reply; 13+ messages in thread
From: Chao Zhu @ 2016-07-11 8:55 UTC (permalink / raw)
To: 'Gowrishankar', dev
Cc: 'Bruce Richardson', 'Konstantin Ananyev',
'Thomas Monjalon', 'Cristian Dumitrescu',
'Pradeep'
Gowrishankar,
Nice patches! Do you have some function test result? I need some time to
verify the patches.
-----Original Message-----
From: Gowrishankar [mailto:gowrishankar.m@linux.vnet.ibm.com]
Sent: 2016年7月10日 15:51
To: dev@dpdk.org
Cc: Chao Zhu <chaozhu@linux.vnet.ibm.com>; Bruce Richardson
<bruce.richardson@intel.com>; Konstantin Ananyev
<konstantin.ananyev@intel.com>; Thomas Monjalon <thomas.monjalon@6wind.com>;
Cristian Dumitrescu <cristian.dumitrescu@intel.com>; Pradeep
<pradeep@us.ibm.com>; gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
Subject: [PATCH v2 0/6] enable lpm, acl and other missing libraries in
ppc64le
From: gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
This patchset enables LPM, ACL and other few missing libs in ppc64le and
also address few patches in related examples (ip_pipeline and l3fwd).
Test report:
LPM and ACL unit tests verified as in patch set v1.
Same results as before observed.
v2 changes:
- enabling libs in config included as part of lib changes itself.
gowrishankar (6):
lpm: add altivec intrinsics for dpdk lpm on ppc_64
acl: add altivec intrinsics for dpdk acl on ppc_64
ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64
table: cache align rte_bucket_4_8
sched: enable sched library for ppc64le
l3fwd: add altivec support for em_hash_key
app/test-acl/main.c | 4 +
app/test/test_xmmt_ops.h | 16 +
config/defconfig_ppc_64-power8-linuxapp-gcc | 7 -
examples/ip_pipeline/cpu_core_map.c | 12 +-
examples/ip_pipeline/init.c | 4 +
examples/l3fwd/l3fwd_em.c | 8 +
lib/librte_acl/Makefile | 2 +
lib/librte_acl/acl.h | 4 +
lib/librte_acl/acl_run.h | 2 +
lib/librte_acl/acl_run_altivec.c | 47 +++
lib/librte_acl/acl_run_altivec.h | 328
+++++++++++++++++++++
lib/librte_acl/rte_acl.c | 13 +
lib/librte_acl/rte_acl.h | 1 +
.../common/include/arch/ppc_64/rte_vect.h | 60 ++++
lib/librte_lpm/Makefile | 2 +
lib/librte_lpm/rte_lpm.h | 2 +
lib/librte_lpm/rte_lpm_altivec.h | 154 ++++++++++
lib/librte_table/rte_table_hash_key8.c | 2 +-
18 files changed, 649 insertions(+), 19 deletions(-) create mode 100644
lib/librte_acl/acl_run_altivec.c create mode 100644
lib/librte_acl/acl_run_altivec.h create mode 100644
lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
create mode 100644 lib/librte_lpm/rte_lpm_altivec.h
--
1.9.1
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le
2016-07-11 8:55 ` [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le Chao Zhu
@ 2016-07-11 9:37 ` gowrishankar
0 siblings, 0 replies; 13+ messages in thread
From: gowrishankar @ 2016-07-11 9:37 UTC (permalink / raw)
To: Chao Zhu, dev
Cc: 'Bruce Richardson', 'Konstantin Ananyev',
'Thomas Monjalon', 'Cristian Dumitrescu',
'Pradeep'
Hi Chao,
On Monday 11 July 2016 02:25 PM, Chao Zhu wrote:
> Gowrishankar,
>
> Nice patches! Do you have some function test result? I need some time to
> verify the patches.
Please find below lpm and acl units tests (Test OK at the end of each
tests).
# ./app/test
< EAL/PMD logs>
APP: HPET is not enabled, using TSC as default timer
RTE>>lpm_autotest
No. routes = 1076806
Route distribution per prefix width:
DEPTH QUANTITY (PERCENT)
---------------------------
01 0 (0.00)
02 0 (0.00)
03 1 (0.00)
04 0 (0.00)
05 3 (0.00)
06 2 (0.00)
07 4 (0.00)
08 201 (0.02)
09 37 (0.00)
10 55 (0.01)
11 97 (0.01)
12 381 (0.04)
13 775 (0.07)
14 2104 (0.20)
15 3712 (0.34)
16 69319 (6.44)
17 12983 (1.21)
18 23667 (2.20)
19 69068 (6.41)
20 62354 (5.79)
21 48531 (4.51)
22 72355 (6.72)
23 85427 (7.93)
24 583900 (54.23)
25 2654 (0.25)
26 5650 (0.52)
27 6467 (0.60)
28 7127 (0.66)
29 12936 (1.20)
30 5999 (0.56)
31 13 (0.00)
32 984 (0.09)
Unique added entries = 1039948
Used table 24 entries = 11343198 (67.6107%)
64 byte Cache entries used = 360735 (23087040 bytes)
Average LPM Add: 110820 cycles
Average LPM Lookup: 34.5 cycles (fails = 19.3%)
BULK LPM Lookup: 31.5 cycles (fails = 19.3%)
LPM LookupX4: 29.5 cycles (fails = 19.3%)
Average LPM Delete: 63841.6 cycles
Test OK
RTE>>acl_autotest
ACL: allocation of 25166728 bytes on socket 33 for ACL_acl_ctx failed
ACL: rte_acl_add_rules(acl_ctx): rule #1 is invalid
ACL: rte_acl_ipv4vlan_add_rules: rule #1 is invalid
ACL: rte_acl_ipv4vlan_add_rules: rule #1 is invalid
ACL: rte_acl_ipv4vlan_add_rules: rule #1 is invalid
ACL: rte_acl_ipv4vlan_add_rules: rule #1 is invalid
ACL: rte_acl_add_rules(acl_ctx): rule #1 is invalid
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 0/0
quad nodes/vectors/bytes used: 0/0/0
DFA nodes/group64/bytes used: 1/4/4104
match nodes/bytes used: 1/128
total: 6432 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 2
memory consumed: 8388615
ACL: trie 0: number of rules: 16, indexes: 1
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 22/176
quad nodes/vectors/bytes used: 30/104/832
DFA nodes/group64/bytes used: 6/19/11784
match nodes/bytes used: 6/768
total: 15760 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 64
memory consumed: 8388615
ACL: trie 0: number of rules: 6000, indexes: 4
acl context <acl_ctx>@0x3efded3b3400
socket_id=-1
alg=5
max_rules=196608
rule_size=128
num_rules=0
num_categories=0
num_tries=0
acl context <acl_ctx>@0x3efded3b3400
socket_id=-1
alg=5
max_rules=196608
rule_size=128
num_rules=0
num_categories=0
num_tries=0
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 974/7792
quad nodes/vectors/bytes used: 816/3211/25688
DFA nodes/group64/bytes used: 137/289/150024
match nodes/bytes used: 1181/151168
total: 336880 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 3108
memory consumed: 8388615
ACL: trie 0: number of rules: 15, indexes: 4
ACL: trie 1: number of rules: 12, indexes: 5
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 974/7792
quad nodes/vectors/bytes used: 816/3211/25688
DFA nodes/group64/bytes used: 137/289/150024
match nodes/bytes used: 1181/151168
total: 336880 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 3108
memory consumed: 8388615
ACL: trie 0: number of rules: 15, indexes: 4
ACL: trie 1: number of rules: 12, indexes: 5
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 0
memory consumed: 8388615
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 974/7792
quad nodes/vectors/bytes used: 816/3211/25688
DFA nodes/group64/bytes used: 137/289/150024
match nodes/bytes used: 1181/151168
total: 336880 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 3108
memory consumed: 8388615
ACL: trie 0: number of rules: 15, indexes: 4
ACL: trie 1: number of rules: 12, indexes: 5
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 974/7792
quad nodes/vectors/bytes used: 816/3211/25688
DFA nodes/group64/bytes used: 137/289/150024
match nodes/bytes used: 1181/151168
total: 336880 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 3108
memory consumed: 8388615
ACL: trie 0: number of rules: 15, indexes: 4
ACL: trie 1: number of rules: 12, indexes: 5
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 0/0
quad nodes/vectors/bytes used: 0/0/0
DFA nodes/group64/bytes used: 1/4/4104
match nodes/bytes used: 1/128
total: 6432 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 2
memory consumed: 8388615
ACL: trie 0: number of rules: 1, indexes: 1
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 0
memory consumed: 8388615
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 3/24
quad nodes/vectors/bytes used: 3/10/80
DFA nodes/group64/bytes used: 1/4/4104
match nodes/bytes used: 2/256
total: 6672 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 9
memory consumed: 8388615
ACL: trie 0: number of rules: 2, indexes: 2
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 0
memory consumed: 8388615
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 3/24
quad nodes/vectors/bytes used: 3/11/88
DFA nodes/group64/bytes used: 1/4/4104
match nodes/bytes used: 3/384
total: 6800 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 10
memory consumed: 8388615
ACL: trie 0: number of rules: 3, indexes: 2
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 0
memory consumed: 8388615
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 3/24
quad nodes/vectors/bytes used: 3/11/88
DFA nodes/group64/bytes used: 1/4/4104
match nodes/bytes used: 3/384
total: 6800 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 10
memory consumed: 8388615
ACL: trie 0: number of rules: 4, indexes: 2
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 0
memory consumed: 8388615
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 3/24
quad nodes/vectors/bytes used: 3/11/88
DFA nodes/group64/bytes used: 1/4/4104
match nodes/bytes used: 3/384
total: 6800 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 10
memory consumed: 8388615
ACL: trie 0: number of rules: 5, indexes: 2
running test_convert_rules(acl_ipv4vlan_tuple)
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 974/7792
quad nodes/vectors/bytes used: 816/3211/25688
DFA nodes/group64/bytes used: 137/289/150024
match nodes/bytes used: 1181/151168
total: 336880 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 3108
memory consumed: 8388615
ACL: trie 0: number of rules: 15, indexes: 4
ACL: trie 1: number of rules: 12, indexes: 5
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 9136/73088
quad nodes/vectors/bytes used: 13258/55366/442928
DFA nodes/group64/bytes used: 2242/4493/2302472
match nodes/bytes used: 25011/3201408
total: 6022096 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 16384
nodes created: 49647
memory consumed: 100663380
ACL: trie 0: number of rules: 22, indexes: 5
ACL: trie 1: number of rules: 5, indexes: 5
running test_convert_rules(acl_ipv4vlan_tuple,
RTE_ACL_FIELD_TYPE_BITMASK type for IPv4)
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 974/7792
quad nodes/vectors/bytes used: 816/3211/25688
DFA nodes/group64/bytes used: 137/289/150024
match nodes/bytes used: 1181/151168
total: 336880 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 3108
memory consumed: 8388615
ACL: trie 0: number of rules: 15, indexes: 4
ACL: trie 1: number of rules: 12, indexes: 5
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 9136/73088
quad nodes/vectors/bytes used: 13258/55366/442928
DFA nodes/group64/bytes used: 2242/4493/2302472
match nodes/bytes used: 25011/3201408
total: 6022096 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 16384
nodes created: 49647
memory consumed: 100663380
ACL: trie 0: number of rules: 22, indexes: 5
ACL: trie 1: number of rules: 5, indexes: 5
running test_convert_rules(acl_ipv4vlan_tuple, RTE_ACL_FIELD_TYPE_RANGE
type for IPv4)
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 997/7976
quad nodes/vectors/bytes used: 1052/4198/33584
DFA nodes/group64/bytes used: 195/405/209416
match nodes/bytes used: 1917/245376
total: 498560 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 4161
memory consumed: 8388615
ACL: trie 0: number of rules: 15, indexes: 4
ACL: trie 1: number of rules: 12, indexes: 5
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 9400/75200
quad nodes/vectors/bytes used: 13549/56210/449680
DFA nodes/group64/bytes used: 2603/5215/2672136
match nodes/bytes used: 26504/3392512
total: 6591728 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 16384
nodes created: 52056
memory consumed: 100663380
ACL: trie 0: number of rules: 22, indexes: 5
ACL: trie 1: number of rules: 5, indexes: 5
running test_convert_rules(acl_ipv4vlan_tuple: swap VLAN and PORTs order)
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 446/3568
quad nodes/vectors/bytes used: 600/1854/14832
DFA nodes/group64/bytes used: 530/924/475144
match nodes/bytes used: 544/69632
total: 565376 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 2120
memory consumed: 8388615
ACL: trie 0: number of rules: 15, indexes: 4
ACL: trie 1: number of rules: 8, indexes: 5
ACL: trie 2: number of rules: 4, indexes: 2
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 1071/8568
quad nodes/vectors/bytes used: 2328/7050/56400
DFA nodes/group64/bytes used: 3526/6266/3210248
match nodes/bytes used: 5235/670080
total: 3947504 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 16384
nodes created: 12160
memory consumed: 58720305
ACL: trie 0: number of rules: 23, indexes: 5
ACL: trie 1: number of rules: 4, indexes: 2
running test_convert_rules(acl_ipv4vlan_tuple: swap SRC and DST IPv4 order)
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 1040/8320
quad nodes/vectors/bytes used: 1319/5494/43952
DFA nodes/group64/bytes used: 162/331/171528
match nodes/bytes used: 2270/290560
total: 516560 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 2048
nodes created: 4791
memory consumed: 16777230
ACL: trie 0: number of rules: 17, indexes: 4
ACL: trie 1: number of rules: 10, indexes: 5
ACL: Gen phase for ACL "acl_ctx":
runtime memory footprint on socket -1:
single nodes/bytes used: 8822/70576
quad nodes/vectors/bytes used: 12788/53374/426992
DFA nodes/group64/bytes used: 2175/4359/2233864
match nodes/bytes used: 24100/3084800
total: 5818432 bytes
max limit: 18446744073709551615 bytes
ACL: Build phase for ACL "acl_ctx":
node limit for tree split: 16384
nodes created: 47885
memory consumed: 100663380
ACL: trie 0: number of rules: 22, indexes: 5
ACL: trie 1: number of rules: 5, indexes: 5
Test OK
RTE>>
Thanks,
Gowrishankar
> -----Original Message-----
> From: Gowrishankar [mailto:gowrishankar.m@linux.vnet.ibm.com]
> Sent: 2016年7月10日 15:51
> To: dev@dpdk.org
> Cc: Chao Zhu <chaozhu@linux.vnet.ibm.com>; Bruce Richardson
> <bruce.richardson@intel.com>; Konstantin Ananyev
> <konstantin.ananyev@intel.com>; Thomas Monjalon <thomas.monjalon@6wind.com>;
> Cristian Dumitrescu <cristian.dumitrescu@intel.com>; Pradeep
> <pradeep@us.ibm.com>; gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
> Subject: [PATCH v2 0/6] enable lpm, acl and other missing libraries in
> ppc64le
>
> From: gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
>
> This patchset enables LPM, ACL and other few missing libs in ppc64le and
> also address few patches in related examples (ip_pipeline and l3fwd).
>
> Test report:
> LPM and ACL unit tests verified as in patch set v1.
> Same results as before observed.
>
> v2 changes:
> - enabling libs in config included as part of lib changes itself.
>
> gowrishankar (6):
> lpm: add altivec intrinsics for dpdk lpm on ppc_64
> acl: add altivec intrinsics for dpdk acl on ppc_64
> ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64
> table: cache align rte_bucket_4_8
> sched: enable sched library for ppc64le
> l3fwd: add altivec support for em_hash_key
>
> app/test-acl/main.c | 4 +
> app/test/test_xmmt_ops.h | 16 +
> config/defconfig_ppc_64-power8-linuxapp-gcc | 7 -
> examples/ip_pipeline/cpu_core_map.c | 12 +-
> examples/ip_pipeline/init.c | 4 +
> examples/l3fwd/l3fwd_em.c | 8 +
> lib/librte_acl/Makefile | 2 +
> lib/librte_acl/acl.h | 4 +
> lib/librte_acl/acl_run.h | 2 +
> lib/librte_acl/acl_run_altivec.c | 47 +++
> lib/librte_acl/acl_run_altivec.h | 328
> +++++++++++++++++++++
> lib/librte_acl/rte_acl.c | 13 +
> lib/librte_acl/rte_acl.h | 1 +
> .../common/include/arch/ppc_64/rte_vect.h | 60 ++++
> lib/librte_lpm/Makefile | 2 +
> lib/librte_lpm/rte_lpm.h | 2 +
> lib/librte_lpm/rte_lpm_altivec.h | 154 ++++++++++
> lib/librte_table/rte_table_hash_key8.c | 2 +-
> 18 files changed, 649 insertions(+), 19 deletions(-) create mode 100644
> lib/librte_acl/acl_run_altivec.c create mode 100644
> lib/librte_acl/acl_run_altivec.h create mode 100644
> lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
> create mode 100644 lib/librte_lpm/rte_lpm_altivec.h
>
> --
> 1.9.1
>
>
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le
2016-07-10 7:51 [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le Gowrishankar
` (6 preceding siblings ...)
2016-07-11 8:55 ` [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le Chao Zhu
@ 2016-07-15 3:15 ` Chao Zhu
2016-07-16 7:59 ` gowrishankar
7 siblings, 1 reply; 13+ messages in thread
From: Chao Zhu @ 2016-07-15 3:15 UTC (permalink / raw)
To: 'Gowrishankar', dev
Cc: 'Bruce Richardson', 'Konstantin Ananyev',
'Thomas Monjalon', 'Cristian Dumitrescu',
'Pradeep'
Gowrishankar,
When I tried the patches, I got some compilation error:
In file included from
/root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.c:34:0:
/root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h: In function
'transition4':
/root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h:198:2: error:
dereferencing type-punned pointer will break strict-aliasing rules
[-Werror=strict-aliasing]
*indices1 = (xmm_t){((uint32_t *)&v)[0], ((uint32_t *)&v)[1],
^
/root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h:202:2: error:
dereferencing type-punned pointer will break strict-aliasing rules
[-Werror=strict-aliasing]
*indices2 = (xmm_t){((uint32_t *)&v)[0], ((uint32_t *)&v)[1],
Can you help to take a look?
-----Original Message-----
From: Gowrishankar [mailto:gowrishankar.m@linux.vnet.ibm.com]
Sent: 2016年7月10日 15:51
To: dev@dpdk.org
Cc: Chao Zhu <chaozhu@linux.vnet.ibm.com>; Bruce Richardson
<bruce.richardson@intel.com>; Konstantin Ananyev
<konstantin.ananyev@intel.com>; Thomas Monjalon <thomas.monjalon@6wind.com>;
Cristian Dumitrescu <cristian.dumitrescu@intel.com>; Pradeep
<pradeep@us.ibm.com>; gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
Subject: [PATCH v2 0/6] enable lpm, acl and other missing libraries in
ppc64le
From: gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
This patchset enables LPM, ACL and other few missing libs in ppc64le and
also address few patches in related examples (ip_pipeline and l3fwd).
Test report:
LPM and ACL unit tests verified as in patch set v1.
Same results as before observed.
v2 changes:
- enabling libs in config included as part of lib changes itself.
gowrishankar (6):
lpm: add altivec intrinsics for dpdk lpm on ppc_64
acl: add altivec intrinsics for dpdk acl on ppc_64
ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64
table: cache align rte_bucket_4_8
sched: enable sched library for ppc64le
l3fwd: add altivec support for em_hash_key
app/test-acl/main.c | 4 +
app/test/test_xmmt_ops.h | 16 +
config/defconfig_ppc_64-power8-linuxapp-gcc | 7 -
examples/ip_pipeline/cpu_core_map.c | 12 +-
examples/ip_pipeline/init.c | 4 +
examples/l3fwd/l3fwd_em.c | 8 +
lib/librte_acl/Makefile | 2 +
lib/librte_acl/acl.h | 4 +
lib/librte_acl/acl_run.h | 2 +
lib/librte_acl/acl_run_altivec.c | 47 +++
lib/librte_acl/acl_run_altivec.h | 328
+++++++++++++++++++++
lib/librte_acl/rte_acl.c | 13 +
lib/librte_acl/rte_acl.h | 1 +
.../common/include/arch/ppc_64/rte_vect.h | 60 ++++
lib/librte_lpm/Makefile | 2 +
lib/librte_lpm/rte_lpm.h | 2 +
lib/librte_lpm/rte_lpm_altivec.h | 154 ++++++++++
lib/librte_table/rte_table_hash_key8.c | 2 +-
18 files changed, 649 insertions(+), 19 deletions(-) create mode 100644
lib/librte_acl/acl_run_altivec.c create mode 100644
lib/librte_acl/acl_run_altivec.h create mode 100644
lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
create mode 100644 lib/librte_lpm/rte_lpm_altivec.h
--
1.9.1
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le
2016-07-15 3:15 ` Chao Zhu
@ 2016-07-16 7:59 ` gowrishankar
2016-07-18 8:54 ` Chao Zhu
0 siblings, 1 reply; 13+ messages in thread
From: gowrishankar @ 2016-07-16 7:59 UTC (permalink / raw)
To: Chao Zhu, dev
Cc: 'Bruce Richardson', 'Konstantin Ananyev',
'Thomas Monjalon', 'Cristian Dumitrescu',
'Pradeep'
Hi Chao,
I did not face this error. Even I verified today with tip of master
6596554... .
However I had patch conflict for examples/l3fwd/l3fwd_em.c which is
fixed now and v3 patch set sent recently. Could you please check.
Thanks,
Gowrishankar
On Friday 15 July 2016 08:45 AM, Chao Zhu wrote:
> Gowrishankar,
>
> When I tried the patches, I got some compilation error:
>
> In file included from
> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.c:34:0:
> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h: In function
> 'transition4':
> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h:198:2: error:
> dereferencing type-punned pointer will break strict-aliasing rules
> [-Werror=strict-aliasing]
> *indices1 = (xmm_t){((uint32_t *)&v)[0], ((uint32_t *)&v)[1],
> ^
> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h:202:2: error:
> dereferencing type-punned pointer will break strict-aliasing rules
> [-Werror=strict-aliasing]
> *indices2 = (xmm_t){((uint32_t *)&v)[0], ((uint32_t *)&v)[1],
>
> Can you help to take a look?
>
>
> -----Original Message-----
> From: Gowrishankar [mailto:gowrishankar.m@linux.vnet.ibm.com]
> Sent: 2016年7月10日 15:51
> To: dev@dpdk.org
> Cc: Chao Zhu <chaozhu@linux.vnet.ibm.com>; Bruce Richardson
> <bruce.richardson@intel.com>; Konstantin Ananyev
> <konstantin.ananyev@intel.com>; Thomas Monjalon <thomas.monjalon@6wind.com>;
> Cristian Dumitrescu <cristian.dumitrescu@intel.com>; Pradeep
> <pradeep@us.ibm.com>; gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
> Subject: [PATCH v2 0/6] enable lpm, acl and other missing libraries in
> ppc64le
>
> From: gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
>
> This patchset enables LPM, ACL and other few missing libs in ppc64le and
> also address few patches in related examples (ip_pipeline and l3fwd).
>
> Test report:
> LPM and ACL unit tests verified as in patch set v1.
> Same results as before observed.
>
> v2 changes:
> - enabling libs in config included as part of lib changes itself.
>
> gowrishankar (6):
> lpm: add altivec intrinsics for dpdk lpm on ppc_64
> acl: add altivec intrinsics for dpdk acl on ppc_64
> ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64
> table: cache align rte_bucket_4_8
> sched: enable sched library for ppc64le
> l3fwd: add altivec support for em_hash_key
>
> app/test-acl/main.c | 4 +
> app/test/test_xmmt_ops.h | 16 +
> config/defconfig_ppc_64-power8-linuxapp-gcc | 7 -
> examples/ip_pipeline/cpu_core_map.c | 12 +-
> examples/ip_pipeline/init.c | 4 +
> examples/l3fwd/l3fwd_em.c | 8 +
> lib/librte_acl/Makefile | 2 +
> lib/librte_acl/acl.h | 4 +
> lib/librte_acl/acl_run.h | 2 +
> lib/librte_acl/acl_run_altivec.c | 47 +++
> lib/librte_acl/acl_run_altivec.h | 328
> +++++++++++++++++++++
> lib/librte_acl/rte_acl.c | 13 +
> lib/librte_acl/rte_acl.h | 1 +
> .../common/include/arch/ppc_64/rte_vect.h | 60 ++++
> lib/librte_lpm/Makefile | 2 +
> lib/librte_lpm/rte_lpm.h | 2 +
> lib/librte_lpm/rte_lpm_altivec.h | 154 ++++++++++
> lib/librte_table/rte_table_hash_key8.c | 2 +-
> 18 files changed, 649 insertions(+), 19 deletions(-) create mode 100644
> lib/librte_acl/acl_run_altivec.c create mode 100644
> lib/librte_acl/acl_run_altivec.h create mode 100644
> lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
> create mode 100644 lib/librte_lpm/rte_lpm_altivec.h
>
> --
> 1.9.1
>
>
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le
2016-07-16 7:59 ` gowrishankar
@ 2016-07-18 8:54 ` Chao Zhu
2016-07-18 13:47 ` gowrishankar muthukrishnan
0 siblings, 1 reply; 13+ messages in thread
From: Chao Zhu @ 2016-07-18 8:54 UTC (permalink / raw)
To: 'gowrishankar', dev
Cc: 'Bruce Richardson', 'Konstantin Ananyev',
'Thomas Monjalon', 'Cristian Dumitrescu',
'Pradeep'
Gowrishankar,
I still get this error with the v3 patches. My OS is Ubuntu 16.04 LTS
ppc64le. GCC version: Ubuntu/IBM 5.3.1-14ubuntu2
Can you help to check again?
In file included from
/root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.c:34:0:
/root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h: In function
'transition4':
/root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h:198:2: error:
dereferencing type-punned pointer will break strict-aliasing rules
[-Werror=strict-aliasing]
*indices1 = (xmm_t){((uint32_t *)&v)[0], ((uint32_t *)&v)[1],
^
/root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h:202:2: error:
dereferencing type-punned pointer will break strict-aliasing rules
[-Werror=strict-aliasing]
*indices2 = (xmm_t){((uint32_t *)&v)[0], ((uint32_t *)&v)[1],
^
-----Original Message-----
From: gowrishankar [mailto:gowrishankar.m@linux.vnet.ibm.com]
Sent: 2016年7月16日 15:59
To: Chao Zhu <chaozhu@linux.vnet.ibm.com>; dev@dpdk.org
Cc: 'Bruce Richardson' <bruce.richardson@intel.com>; 'Konstantin Ananyev'
<konstantin.ananyev@intel.com>; 'Thomas Monjalon'
<thomas.monjalon@6wind.com>; 'Cristian Dumitrescu'
<cristian.dumitrescu@intel.com>; 'Pradeep' <pradeep@us.ibm.com>
Subject: Re: [PATCH v2 0/6] enable lpm, acl and other missing libraries in
ppc64le
Hi Chao,
I did not face this error. Even I verified today with tip of master
6596554... .
However I had patch conflict for examples/l3fwd/l3fwd_em.c which is fixed
now and v3 patch set sent recently. Could you please check.
Thanks,
Gowrishankar
On Friday 15 July 2016 08:45 AM, Chao Zhu wrote:
> Gowrishankar,
>
> When I tried the patches, I got some compilation error:
>
> In file included from
> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.c:34:0:
> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h: In function
> 'transition4':
> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h:198:2: error:
> dereferencing type-punned pointer will break strict-aliasing rules
> [-Werror=strict-aliasing]
> *indices1 = (xmm_t){((uint32_t *)&v)[0], ((uint32_t *)&v)[1],
> ^
> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h:202:2: error:
> dereferencing type-punned pointer will break strict-aliasing rules
> [-Werror=strict-aliasing]
> *indices2 = (xmm_t){((uint32_t *)&v)[0], ((uint32_t *)&v)[1],
>
> Can you help to take a look?
>
>
> -----Original Message-----
> From: Gowrishankar [mailto:gowrishankar.m@linux.vnet.ibm.com]
> Sent: 2016年7月10日 15:51
> To: dev@dpdk.org
> Cc: Chao Zhu <chaozhu@linux.vnet.ibm.com>; Bruce Richardson
> <bruce.richardson@intel.com>; Konstantin Ananyev
> <konstantin.ananyev@intel.com>; Thomas Monjalon
> <thomas.monjalon@6wind.com>; Cristian Dumitrescu
> <cristian.dumitrescu@intel.com>; Pradeep <pradeep@us.ibm.com>;
> gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
> Subject: [PATCH v2 0/6] enable lpm, acl and other missing libraries in
> ppc64le
>
> From: gowrishankar <gowrishankar.m@linux.vnet.ibm.com>
>
> This patchset enables LPM, ACL and other few missing libs in ppc64le
> and also address few patches in related examples (ip_pipeline and l3fwd).
>
> Test report:
> LPM and ACL unit tests verified as in patch set v1.
> Same results as before observed.
>
> v2 changes:
> - enabling libs in config included as part of lib changes itself.
>
> gowrishankar (6):
> lpm: add altivec intrinsics for dpdk lpm on ppc_64
> acl: add altivec intrinsics for dpdk acl on ppc_64
> ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64
> table: cache align rte_bucket_4_8
> sched: enable sched library for ppc64le
> l3fwd: add altivec support for em_hash_key
>
> app/test-acl/main.c | 4 +
> app/test/test_xmmt_ops.h | 16 +
> config/defconfig_ppc_64-power8-linuxapp-gcc | 7 -
> examples/ip_pipeline/cpu_core_map.c | 12 +-
> examples/ip_pipeline/init.c | 4 +
> examples/l3fwd/l3fwd_em.c | 8 +
> lib/librte_acl/Makefile | 2 +
> lib/librte_acl/acl.h | 4 +
> lib/librte_acl/acl_run.h | 2 +
> lib/librte_acl/acl_run_altivec.c | 47 +++
> lib/librte_acl/acl_run_altivec.h | 328
> +++++++++++++++++++++
> lib/librte_acl/rte_acl.c | 13 +
> lib/librte_acl/rte_acl.h | 1 +
> .../common/include/arch/ppc_64/rte_vect.h | 60 ++++
> lib/librte_lpm/Makefile | 2 +
> lib/librte_lpm/rte_lpm.h | 2 +
> lib/librte_lpm/rte_lpm_altivec.h | 154 ++++++++++
> lib/librte_table/rte_table_hash_key8.c | 2 +-
> 18 files changed, 649 insertions(+), 19 deletions(-) create mode
> 100644 lib/librte_acl/acl_run_altivec.c create mode 100644
> lib/librte_acl/acl_run_altivec.h create mode 100644
> lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
> create mode 100644 lib/librte_lpm/rte_lpm_altivec.h
>
> --
> 1.9.1
>
>
>
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le
2016-07-18 8:54 ` Chao Zhu
@ 2016-07-18 13:47 ` gowrishankar muthukrishnan
0 siblings, 0 replies; 13+ messages in thread
From: gowrishankar muthukrishnan @ 2016-07-18 13:47 UTC (permalink / raw)
To: Chao Zhu, dev
Cc: 'Bruce Richardson', 'Konstantin Ananyev',
'Thomas Monjalon', 'Cristian Dumitrescu',
'Pradeep'
Hi Chao,
I just tried building dpdk master with these patches in ubuntu 16.04 le
guest
and I could able to.
test@ubuntu:~/DPDK$ make install T=ppc_64-power8-linuxapp-gcc -j16
....
.....
INSTALL-MAP test.map
INSTALL-APP test
Build complete [ppc_64-power8-linuxapp-gcc]
Installation cannot run with T defined and DESTDIR undefined
test@ubuntu:~/DPDK$ uname -a
Linux ubuntu 4.4.0-21-generic #37-Ubuntu SMP Mon Apr 18 18:30:22 UTC
2016 ppc64le ppc64le ppc64le GNU/Linux
test@ubuntu:~/DPDK$ gcc --version
gcc (Ubuntu/IBM 5.4.0-6ubuntu1~16.04.1) 5.4.0 20160609
May be you need to check gcc again.
Thanks,
Gowrishankar
On Monday 18 July 2016 02:24 PM, Chao Zhu wrote:
> Gowrishankar,
>
> I still get this error with the v3 patches. My OS is Ubuntu 16.04 LTS
> ppc64le. GCC version: Ubuntu/IBM 5.3.1-14ubuntu2
> Can you help to check again?
>
> In file included from
> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.c:34:0:
> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h: In function
> 'transition4':
> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h:198:2: error:
> dereferencing type-punned pointer will break strict-aliasing rules
> [-Werror=strict-aliasing]
> *indices1 = (xmm_t){((uint32_t *)&v)[0], ((uint32_t *)&v)[1],
> ^
> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h:202:2: error:
> dereferencing type-punned pointer will break strict-aliasing rules
> [-Werror=strict-aliasing]
> *indices2 = (xmm_t){((uint32_t *)&v)[0], ((uint32_t *)&v)[1],
> ^
>
>
>
> -----Original Message-----
> From: gowrishankar [mailto:gowrishankar.m@linux.vnet.ibm.com]
> Sent: 2016年7月16日 15:59
> To: Chao Zhu<chaozhu@linux.vnet.ibm.com>;dev@dpdk.org
> Cc: 'Bruce Richardson'<bruce.richardson@intel.com>; 'Konstantin Ananyev'
> <konstantin.ananyev@intel.com>; 'Thomas Monjalon'
> <thomas.monjalon@6wind.com>; 'Cristian Dumitrescu'
> <cristian.dumitrescu@intel.com>; 'Pradeep'<pradeep@us.ibm.com>
> Subject: Re: [PATCH v2 0/6] enable lpm, acl and other missing libraries in
> ppc64le
>
> Hi Chao,
> I did not face this error. Even I verified today with tip of master
> 6596554... .
> However I had patch conflict for examples/l3fwd/l3fwd_em.c which is fixed
> now and v3 patch set sent recently. Could you please check.
>
> Thanks,
> Gowrishankar
> On Friday 15 July 2016 08:45 AM, Chao Zhu wrote:
>> Gowrishankar,
>>
>> When I tried the patches, I got some compilation error:
>>
>> In file included from
>> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.c:34:0:
>> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h: In function
>> 'transition4':
>> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h:198:2: error:
>> dereferencing type-punned pointer will break strict-aliasing rules
>> [-Werror=strict-aliasing]
>> *indices1 = (xmm_t){((uint32_t *)&v)[0], ((uint32_t *)&v)[1],
>> ^
>> /root/test/sub/dpdk/lib/librte_acl/acl_run_altivec.h:202:2: error:
>> dereferencing type-punned pointer will break strict-aliasing rules
>> [-Werror=strict-aliasing]
>> *indices2 = (xmm_t){((uint32_t *)&v)[0], ((uint32_t *)&v)[1],
>>
>> Can you help to take a look?
>>
>>
>> -----Original Message-----
>> From: Gowrishankar [mailto:gowrishankar.m@linux.vnet.ibm.com]
>> Sent: 2016年7月10日 15:51
>> To:dev@dpdk.org
>> Cc: Chao Zhu<chaozhu@linux.vnet.ibm.com>; Bruce Richardson
>> <bruce.richardson@intel.com>; Konstantin Ananyev
>> <konstantin.ananyev@intel.com>; Thomas Monjalon
>> <thomas.monjalon@6wind.com>; Cristian Dumitrescu
>> <cristian.dumitrescu@intel.com>; Pradeep<pradeep@us.ibm.com>;
>> gowrishankar<gowrishankar.m@linux.vnet.ibm.com>
>> Subject: [PATCH v2 0/6] enable lpm, acl and other missing libraries in
>> ppc64le
>>
>> From: gowrishankar<gowrishankar.m@linux.vnet.ibm.com>
>>
>> This patchset enables LPM, ACL and other few missing libs in ppc64le
>> and also address few patches in related examples (ip_pipeline and l3fwd).
>>
>> Test report:
>> LPM and ACL unit tests verified as in patch set v1.
>> Same results as before observed.
>>
>> v2 changes:
>> - enabling libs in config included as part of lib changes itself.
>>
>> gowrishankar (6):
>> lpm: add altivec intrinsics for dpdk lpm on ppc_64
>> acl: add altivec intrinsics for dpdk acl on ppc_64
>> ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64
>> table: cache align rte_bucket_4_8
>> sched: enable sched library for ppc64le
>> l3fwd: add altivec support for em_hash_key
>>
>> app/test-acl/main.c | 4 +
>> app/test/test_xmmt_ops.h | 16 +
>> config/defconfig_ppc_64-power8-linuxapp-gcc | 7 -
>> examples/ip_pipeline/cpu_core_map.c | 12 +-
>> examples/ip_pipeline/init.c | 4 +
>> examples/l3fwd/l3fwd_em.c | 8 +
>> lib/librte_acl/Makefile | 2 +
>> lib/librte_acl/acl.h | 4 +
>> lib/librte_acl/acl_run.h | 2 +
>> lib/librte_acl/acl_run_altivec.c | 47 +++
>> lib/librte_acl/acl_run_altivec.h | 328
>> +++++++++++++++++++++
>> lib/librte_acl/rte_acl.c | 13 +
>> lib/librte_acl/rte_acl.h | 1 +
>> .../common/include/arch/ppc_64/rte_vect.h | 60 ++++
>> lib/librte_lpm/Makefile | 2 +
>> lib/librte_lpm/rte_lpm.h | 2 +
>> lib/librte_lpm/rte_lpm_altivec.h | 154 ++++++++++
>> lib/librte_table/rte_table_hash_key8.c | 2 +-
>> 18 files changed, 649 insertions(+), 19 deletions(-) create mode
>> 100644 lib/librte_acl/acl_run_altivec.c create mode 100644
>> lib/librte_acl/acl_run_altivec.h create mode 100644
>> lib/librte_eal/common/include/arch/ppc_64/rte_vect.h
>> create mode 100644 lib/librte_lpm/rte_lpm_altivec.h
>>
>> --
>> 1.9.1
>>
>>
>>
>
>
^ permalink raw reply [flat|nested] 13+ messages in thread
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2016-07-10 7:51 [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le Gowrishankar
2016-07-10 7:51 ` [PATCH v2 1/6] lpm: add altivec intrinsics for dpdk lpm on ppc_64 Gowrishankar
2016-07-10 7:51 ` [PATCH v2 2/6] acl: add altivec intrinsics for dpdk acl " Gowrishankar
2016-07-10 7:51 ` [PATCH v2 3/6] ip_pipeline: fix lcore mapping for varying SMT threads as in ppc64 Gowrishankar
2016-07-10 7:51 ` [PATCH v2 4/6] table: cache align rte_bucket_4_8 Gowrishankar
2016-07-10 7:51 ` [PATCH v2 5/6] sched: enable sched library for ppc64le Gowrishankar
2016-07-10 7:51 ` [PATCH v2 6/6] l3fwd: add altivec support for em_hash_key Gowrishankar
2016-07-11 8:55 ` [PATCH v2 0/6] enable lpm, acl and other missing libraries in ppc64le Chao Zhu
2016-07-11 9:37 ` gowrishankar
2016-07-15 3:15 ` Chao Zhu
2016-07-16 7:59 ` gowrishankar
2016-07-18 8:54 ` Chao Zhu
2016-07-18 13:47 ` gowrishankar muthukrishnan
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