[ath9k-devel] AR9380 - Transmit power control per packet

[ath9k-devel] AR9380 - Transmit power control per packet

[Robert Budde]

Hi all,

for a research project we are trying to use TPC per packet on AR9380
chipsets. We are setting the AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit in the
AR_PHY_POWER_TX_RATE_MAX register. Then we are setting the desired tx power
in word 11 of the tx descriptor. Setting the power on all other chipsets
(AR5418/16, AR9280) works perfectly, but no luck on AR9380, although we are
honoring the new tx descriptor layout.

Any hints?

Best regards,
Robert

[ath9k-devel] AR9380 - Transmit power control per packet

[Robert Budde]

Does nobody have a clue about the problem? Reproducing the issue is totally
easy: Just set the AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit in the
AR_PHY_POWER_TX_RATE_MAX register and write a tx-power to the packet
descriptor - it won't work! Is nobody at Atheros bothered by the fact that
transmit control per packet is obviously not working with their latest
product on the market?

Best regards,
Robert

_______________________________________________
ath9k-devel mailing list
ath9k-devel at lists.ath9k.org
https://lists.ath9k.org/mailman/listinfo/ath9k-devel

[ath9k-devel] AR9380 - Transmit power control per packet

[Mohammed Shafi]

On Fri, Jul 8, 2011 at 2:54 PM, Robert Budde <Robert.Budde@gmx.net> wrote:
> Does nobody have a clue about the problem? Reproducing the issue is totally
> easy: Just set the AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit in the
> AR_PHY_POWER_TX_RATE_MAX register and write a tx-power to the packet
> descriptor - it won't work! Is nobody at Atheros bothered by the fact that
> transmit control per packet is obviously not working with their latest
> product on the market?

we will surely take a look into it.

thanks,
shafi

>
> Best regards,
> Robert
>
> _______________________________________________
> ath9k-devel mailing list
> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
>
> _______________________________________________
> ath9k-devel mailing list
> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
>



-- 
shafi

[ath9k-devel] AR9380 - Transmit power control per packet

[Alex Hacker]

I test the TPC in our own propiertay driver (not ath9k) with AR9380. It works
likewise previous Atheros chips. I think this is not a HW problem, probably
EEPROM power limit. Currently have no time to experiment with ath9k (should
complete AR93xx support in my own driver ASAP).

On Fri, Jul 08, 2011 at 11:24:25AM +0200, Robert Budde wrote:
> Does nobody have a clue about the problem? Reproducing the issue is totally
> easy: Just set the AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit in the
> AR_PHY_POWER_TX_RATE_MAX register and write a tx-power to the packet
> descriptor - it won't work! Is nobody at Atheros bothered by the fact that
> transmit control per packet is obviously not working with their latest
> product on the market?
> 
> Best regards,
> Robert
> 
> _______________________________________________
> ath9k-devel mailing list
> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
> 
> _______________________________________________
> ath9k-devel mailing list
> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel

[ath9k-devel] AR9380 - Transmit power control per packet

[Mohammed Shafi]

On Fri, Jul 8, 2011 at 2:54 PM, Robert Budde <Robert.Budde@gmx.net> wrote:
> Does nobody have a clue about the problem? Reproducing the issue is totally
> easy: Just set the AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit in the
> AR_PHY_POWER_TX_RATE_MAX register and write a tx-power to the packet
> descriptor - it won't work! Is nobody at Atheros bothered by the fact that
> transmit control per packet is obviously not working with their latest
> product on the market?

can you please elaborate on this more and in detail. I have not looked
into this previously and it will be help me read some docs and fix the
issue.  I understand AR9300 has a different TPC.

>
> Best regards,
> Robert
>
> _______________________________________________
> ath9k-devel mailing list
> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
>
> _______________________________________________
> ath9k-devel mailing list
> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
>



-- 
shafi

[ath9k-devel] AR9380 - Transmit power control per packet

[Robert Budde]

Hi!

We are using TPC per packet with the ath9k driver for AR5416/AR5418 and
AR9280 chipsets. All these chipsets work as expected if you

1. add "REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, MAX_RATE_POWER |
AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE); " to "ar5008_hw_process_ini" in
"ar5008_phy.c" after " ah->eep_ops->set_txpower"
2. replace "MAX_RATE_POWER" in "ath9k_hw_set11n_txdesc(ah, ds, fi->framelen,
frm_type, MAX_RATE_POWER, fi->keyix, fi->keytype, bf->bf_flags);" in
function "ath_tx_setup_buffer" of "xmit.c" with some arbitrary value between
1 and 20

You can observe how the tx power changes accordingly when altering the
power-value.

Enabling the TPC the same way in "ar9003_phy.c" (see step 1) does not change
anything. The tx power is always maximum, no matter what is written to the
tx descriptor. Cards are Sparklan WPEA-127N. Regarding the EEPROM we think
that it should work by writing to the tx descriptor no matter what is stored
in the EEPROM. Further, as we are also not able to REDUCE the tx-power, it
looks uncertain that this problem is caused by the EEPROM.

Best regards
Robert
 
-----Urspr?ngliche Nachricht-----
Von: ath9k-devel-bounces at lists.ath9k.org
[mailto:ath9k-devel-bounces at lists.ath9k.org] Im Auftrag von Mohammed Shafi
Gesendet: Freitag, 8. Juli 2011 14:00
An: Robert Budde
Cc: ath9k-devel at lists.ath9k.org
Betreff: Re: [ath9k-devel] AR9380 - Transmit power control per packet

On Fri, Jul 8, 2011 at 2:54 PM, Robert Budde <Robert.Budde@gmx.net> wrote:
> Does nobody have a clue about the problem? Reproducing the issue is 
> totally
> easy: Just set the AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit in the 
> AR_PHY_POWER_TX_RATE_MAX register and write a tx-power to the packet 
> descriptor - it won't work! Is nobody at Atheros bothered by the fact 
> that transmit control per packet is obviously not working with their 
> latest product on the market?

can you please elaborate on this more and in detail. I have not looked into
this previously and it will be help me read some docs and fix the issue.  I
understand AR9300 has a different TPC.

>
> Best regards,
> Robert
>
> _______________________________________________
> ath9k-devel mailing list
> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
>
> _______________________________________________
> ath9k-devel mailing list
> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
>



--
shafi
_______________________________________________
ath9k-devel mailing list
ath9k-devel at lists.ath9k.org
https://lists.ath9k.org/mailman/listinfo/ath9k-devel

[ath9k-devel] AR9380 - Transmit power control per packet

[Mohammed Shafi]

On Fri, Jul 8, 2011 at 6:27 PM, Robert Budde <Robert.Budde@gmx.net> wrote:
> Hi!
>
> We are using TPC per packet with the ath9k driver for AR5416/AR5418 and
> AR9280 chipsets. All these chipsets work as expected if you
>
> 1. add "REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, MAX_RATE_POWER |
> AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE); " to "ar5008_hw_process_ini" in
> "ar5008_phy.c" after " ah->eep_ops->set_txpower"
> 2. replace "MAX_RATE_POWER" in "ath9k_hw_set11n_txdesc(ah, ds, fi->framelen,
> frm_type, MAX_RATE_POWER, fi->keyix, fi->keytype, bf->bf_flags);" in
> function "ath_tx_setup_buffer" of "xmit.c" with some arbitrary value between
> 1 and 20
>
> You can observe how the tx power changes accordingly when altering the
> power-value.

thanks a lot, i will check into this.

>
> Enabling the TPC the same way in "ar9003_phy.c" (see step 1) does not change
> anything. The tx power is always maximum, no matter what is written to the
> tx descriptor. Cards are Sparklan WPEA-127N. Regarding the EEPROM we think
> that it should work by writing to the tx descriptor no matter what is stored
> in the EEPROM. Further, as we are also not able to REDUCE the tx-power, it
> looks uncertain that this problem is caused by the EEPROM.

please check you have this fix in your code

commit 21fdc87248d1d28492c775e05fa92b3c8c7bc8db
Author: Daniel Halperin <dhalperi@cs.washington.edu>
Date:   Tue May 31 11:59:30 2011 -0700

    ath9k: fix two more bugs in tx power

    This is the same fix as

       commit 841051602e3fa18ea468fe5a177aa92b6eb44b56
       Author: Matteo Croce <technoboy85@gmail.com>
       Date:   Fri Dec 3 02:25:08 2010 +0100

       The ath9k driver subtracts 3 dBm to the txpower as with two radios the
       signal power is doubled.
       The resulting value is assigned in an u16 which overflows and makes
       the card work at full power.

    in two more places. I grepped the ath tree and didn't find any others.

    Cc: stable at kernel.org
    Signed-off-by: Daniel Halperin <dhalperi@cs.washington.edu>
    Signed-off-by: John W. Linville <linville@tuxdriver.com>

diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index 0ca7635..ff8150e 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -4645,10 +4645,16 @@ static void
ar9003_hw_set_power_per_rate_table(struct ath_hw *ah,
        case 1:
                break;
        case 2:
-               scaledPower -= REDUCE_SCALED_POWER_BY_TWO_CHAIN;
+               if (scaledPower > REDUCE_SCALED_POWER_BY_TWO_CHAIN)
+                       scaledPower -= REDUCE_SCALED_POWER_BY_TWO_CHAIN;
+               else
+                       scaledPower = 0;
                break;
        case 3:
-               scaledPower -= REDUCE_SCALED_POWER_BY_THREE_CHAIN;
+               if (scaledPower > REDUCE_SCALED_POWER_BY_THREE_CHAIN)
+                       scaledPower -= REDUCE_SCALED_POWER_BY_THREE_CHAIN;
+               else
+                       scaledPower = 0;
                break;
        }



>
> Best regards
> Robert
>
> -----Urspr?ngliche Nachricht-----
> Von: ath9k-devel-bounces at lists.ath9k.org
> [mailto:ath9k-devel-bounces at lists.ath9k.org] Im Auftrag von Mohammed Shafi
> Gesendet: Freitag, 8. Juli 2011 14:00
> An: Robert Budde
> Cc: ath9k-devel at lists.ath9k.org
> Betreff: Re: [ath9k-devel] AR9380 - Transmit power control per packet
>
> On Fri, Jul 8, 2011 at 2:54 PM, Robert Budde <Robert.Budde@gmx.net> wrote:
>> Does nobody have a clue about the problem? Reproducing the issue is
>> totally
>> easy: Just set the AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit in the
>> AR_PHY_POWER_TX_RATE_MAX register and write a tx-power to the packet
>> descriptor - it won't work! Is nobody at Atheros bothered by the fact
>> that transmit control per packet is obviously not working with their
>> latest product on the market?
>
> can you please elaborate on this more and in detail. I have not looked into
> this previously and it will be help me read some docs and fix the issue. ?I
> understand AR9300 has a different TPC.
>
>>
>> Best regards,
>> Robert
>>
>> _______________________________________________
>> ath9k-devel mailing list
>> ath9k-devel at lists.ath9k.org
>> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
>>
>> _______________________________________________
>> ath9k-devel mailing list
>> ath9k-devel at lists.ath9k.org
>> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
>>
>
>
>
> --
> shafi
> _______________________________________________
> ath9k-devel mailing list
> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
>
>



-- 
shafi

[ath9k-devel] AR9380 - Transmit power control per packet

[Alex Hacker]

Oh sorry, let me take last words back. Robert is right it does not work with AR9380.
Power control mechanism does not depend on AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit.
The AR_PHY_POWER_TX_RATE_MAX register contains a different value 0x00367044 on AR9380 and
0x0000007f on older chips.

On Fri, Jul 08, 2011 at 05:27:22PM +0600, Alex Hacker wrote:
> I test the TPC in our own propiertay driver (not ath9k) with AR9380. It works
> likewise previous Atheros chips. I think this is not a HW problem, probably
> EEPROM power limit. Currently have no time to experiment with ath9k (should
> complete AR93xx support in my own driver ASAP).
> 
> On Fri, Jul 08, 2011 at 11:24:25AM +0200, Robert Budde wrote:
> > Does nobody have a clue about the problem? Reproducing the issue is totally
> > easy: Just set the AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit in the
> > AR_PHY_POWER_TX_RATE_MAX register and write a tx-power to the packet
> > descriptor - it won't work! Is nobody at Atheros bothered by the fact that
> > transmit control per packet is obviously not working with their latest
> > product on the market?
> > 
> > Best regards,
> > Robert
> > 
> > _______________________________________________
> > ath9k-devel mailing list
> > ath9k-devel at lists.ath9k.org
> > https://lists.ath9k.org/mailman/listinfo/ath9k-devel
> > 
> > _______________________________________________
> > ath9k-devel mailing list
> > ath9k-devel at lists.ath9k.org
> > https://lists.ath9k.org/mailman/listinfo/ath9k-devel
> _______________________________________________
> ath9k-devel mailing list
> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel

[ath9k-devel] AR9380 - Transmit power control per packet

[Adrian Chadd]

On 8 July 2011 22:19, Alex Hacker <hacker@epn.ru> wrote:
> Oh sorry, let me take last words back. Robert is right it does not work with AR9380.
> Power control mechanism does not depend on AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit.
> The AR_PHY_POWER_TX_RATE_MAX register contains a different value 0x00367044 on AR9380 and
> 0x0000007f on older chips.

Except that the AR9300 TPC enable code does exactly the same as the
TPC enable code for the AR5416 series chips.

By the way, the 11n rate scenario code doesn't have any per-rate TPC
code in it. Only the TX power for rate series 0 is set. Is this
potentially causing you problems?

[ath9k-devel] AR9380 - Transmit power control per packet

[Aleksey Shevkov]

On Sat, Jul 09, 2011 at 08:21:20AM +0800, Adrian Chadd wrote:
> On 8 July 2011 22:19, Alex Hacker <hacker@epn.ru> wrote:
> > Oh sorry, let me take last words back. Robert is right it does not work with AR9380.
> > Power control mechanism does not depend on AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit.
> > The AR_PHY_POWER_TX_RATE_MAX register contains a different value 0x00367044 on AR9380 and
> > 0x0000007f on older chips.
> 
> Except that the AR9300 TPC enable code does exactly the same as the
> TPC enable code for the AR5416 series chips.
> 
Shure exactly same code. I havn't any other source of information about AR9380
PHY except the ar9003_phy.h file.

> By the way, the 11n rate scenario code doesn't have any per-rate TPC
> code in it. Only the TX power for rate series 0 is set. Is this
> potentially causing you problems?
> 
I test it with single series NoAck packets (XmitDataTries0 = 1, XmitPower != 0).
The AR9380 transmit at the power configured for self generated packets
AR_PHY_POWER_TX_RATEn registers not at the power set in AR_XmitPower field of
ctl11 word of TX descriptor.

> From a cursory examination of the AR9300 code (and I should say, I've
> not even used an AR9300 yet, let alone tinkered with the TPC stuff) it
> looks all very straightforward. Unless some other chip functionality
> is required that hasn't been ported to ath9k, it "should just work".
> 
My primary distrust falls on the AR_PHY_POWER_TX_RATE_MAX register. Although
the AR9380 chip has very different PHY, this register is defined at the same
adress as in the older chips (I'm afraid the definition is copy-pasted from
ar9002_phy.h file). This register holds the value prior to the last write, i.e.
REG_WRITE(AR_PHY_POWER_TX_RATE_MAX,x)
REG_WRITE(AR_PHY_POWER_TX_RATE_MAX,y)
REG_READ(AR_PHY_POWER_TX_RATE_MAX) == x
This is not look like ordinary PHY register.

> Sorry, I can't be more helpful than that.
> 
Thank you Adrian for you attention to this problem! I am ensured that all
together we found the solution.

> (Also, it'd be nice if someone contributed per-packet TPC support -
> proper support at that! - to ath9k. :)
> 
I think about it just some time later. Currently really very busy on my primary
job. I found some other HW problems on AR9380 which does not allow me to
finish MIMO 3x3 support for our equipment.

> 
> adrian

[ath9k-devel] AR9380 - Transmit power control per packet

[Adrian Chadd]

Have you just manually tried setting the relevant register using the
debug register read/write setup?

Or when you set bit 6 in 0x993c, bit 6 doesn't stay set?


adrian

[ath9k-devel] AR9380 - Transmit power control per packet

[Mohammed Shafi]

On Fri, Jul 8, 2011 at 7:49 PM, Alex Hacker <hacker@epn.ru> wrote:
> Oh sorry, let me take last words back. Robert is right it does not work with AR9380.
> Power control mechanism does not depend on AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit.
> The AR_PHY_POWER_TX_RATE_MAX register contains a different value 0x00367044 on AR9380 and
> 0x0000007f on older chips.

hi did you check it multiple times, at first some other values comes
after that 7f comes(with the hack suggested by Rober)

>
> On Fri, Jul 08, 2011 at 05:27:22PM +0600, Alex Hacker wrote:
>> I test the TPC in our own propiertay driver (not ath9k) with AR9380. It works
>> likewise previous Atheros chips. I think this is not a HW problem, probably
>> EEPROM power limit. Currently have no time to experiment with ath9k (should
>> complete AR93xx support in my own driver ASAP).
>>
>> On Fri, Jul 08, 2011 at 11:24:25AM +0200, Robert Budde wrote:
>> > Does nobody have a clue about the problem? Reproducing the issue is totally
>> > easy: Just set the AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE bit in the
>> > AR_PHY_POWER_TX_RATE_MAX register and write a tx-power to the packet
>> > descriptor - it won't work! Is nobody at Atheros bothered by the fact that
>> > transmit control per packet is obviously not working with their latest
>> > product on the market?
>> >
>> > Best regards,
>> > Robert
>> >
>> > _______________________________________________
>> > ath9k-devel mailing list
>> > ath9k-devel at lists.ath9k.org
>> > https://lists.ath9k.org/mailman/listinfo/ath9k-devel
>> >
>> > _______________________________________________
>> > ath9k-devel mailing list
>> > ath9k-devel at lists.ath9k.org
>> > https://lists.ath9k.org/mailman/listinfo/ath9k-devel
>> _______________________________________________
>> ath9k-devel mailing list
>> ath9k-devel at lists.ath9k.org
>> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
> _______________________________________________
> ath9k-devel mailing list
> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
>



-- 
shafi

[ath9k-devel] AR9380 - Transmit power control per packet

[Alex Hacker]

On Mon, Jul 11, 2011 at 10:39:46PM +0800, Adrian Chadd wrote:
> Have you just manually tried setting the relevant register using the
> debug register read/write setup?
> 
The TPC code is written aproximately 2 years ago in our propiertary AR5416/AR92xx driver
which I currently adopt for AR9300. For AR5416/AR92xx chips it works fine.

> Or when you set bit 6 in 0x993c, bit 6 doesn't stay set?

Yes, exactly the following are happens:
  REG_WRITE(0X993c,0x7f);
  REG_READ(0X993c) -> 0x00367044;
  REG_WRITE(0X993c,<somethin>);
  REG_READ(0X993c) -> 0x0000007f;

> adrian
Best regards,
Alex.

[ath9k-devel] AR9380 - Transmit power control per packet

[Mohammed Shafi]

On Mon, Jul 11, 2011 at 8:43 PM, Alex Hacker <hacker@epn.ru> wrote:
> On Mon, Jul 11, 2011 at 10:39:46PM +0800, Adrian Chadd wrote:
>> Have you just manually tried setting the relevant register using the
>> debug register read/write setup?
>>
> The TPC code is written aproximately 2 years ago in our propiertary AR5416/AR92xx driver
> which I currently adopt for AR9300. For AR5416/AR92xx chips it works fine.

I think this module has to be taken into  acoount ar9003_eeprom.c ?

static int ar9003_hw_power_control_override(struct ath_hw *ah,
                                            int frequency,
                                            int *correction,
                                            int *voltage, int *temperature)



>
>> Or when you set bit 6 in 0x993c, bit 6 doesn't stay set?
>
> Yes, exactly the following are happens:
> ?REG_WRITE(0X993c,0x7f);
> ?REG_READ(0X993c) -> 0x00367044;
> ?REG_WRITE(0X993c,<somethin>);
> ?REG_READ(0X993c) -> 0x0000007f;
>
>> adrian
> Best regards,
> Alex.
> _______________________________________________
> ath9k-devel mailing list
> ath9k-devel at lists.ath9k.org
> https://lists.ath9k.org/mailman/listinfo/ath9k-devel
>



-- 
shafi

[ath9k-devel] AR9380 - Transmit power control per packet

[Adrian Chadd]

If the pre-AR9003 TPC code in question was public and in
ath9k/mac80211, I'd consider give getting it going on the AR9300 a
shot. I've been meaning to tinker with these NICs for a while.

(hint. :)


Adrian

[ath9k-devel] AR9380 - Transmit power control per packet

[Alex Hacker]

Yes, the EEPROM power calibration is implemented (oh excuse me, retyped from ath9k :).
Any way power detector calibration can not be a reason, so plain (not per packet) power
control is works as expected.

Best regards,
Alex.

On Mon, Jul 11, 2011 at 08:51:48PM +0530, Mohammed Shafi wrote:
> On Mon, Jul 11, 2011 at 8:43 PM, Alex Hacker <hacker@epn.ru> wrote:
> > On Mon, Jul 11, 2011 at 10:39:46PM +0800, Adrian Chadd wrote:
> >> Have you just manually tried setting the relevant register using the
> >> debug register read/write setup?
> >>
> > The TPC code is written aproximately 2 years ago in our propiertary AR5416/AR92xx driver
> > which I currently adopt for AR9300. For AR5416/AR92xx chips it works fine.
> 
> I think this module has to be taken into  acoount ar9003_eeprom.c ?
> 
> static int ar9003_hw_power_control_override(struct ath_hw *ah,
>                                             int frequency,
>                                             int *correction,
>                                             int *voltage, int *temperature)
> 
> 
> 
> >
> >> Or when you set bit 6 in 0x993c, bit 6 doesn't stay set?
> >
> > Yes, exactly the following are happens:
> > ?REG_WRITE(0X993c,0x7f);
> > ?REG_READ(0X993c) -> 0x00367044;
> > ?REG_WRITE(0X993c,<somethin>);
> > ?REG_READ(0X993c) -> 0x0000007f;
> >
> >> adrian
> > Best regards,
> > Alex.
> > _______________________________________________
> > ath9k-devel mailing list
> > ath9k-devel at lists.ath9k.org
> > https://lists.ath9k.org/mailman/listinfo/ath9k-devel
> >
> 
> 
> 
> -- 
> shafi

[ath9k-devel] AR9380 - Transmit power control per packet

[Alex Hacker]

On Mon, Jul 11, 2011 at 11:23:18PM +0800, Adrian Chadd wrote:
> If the pre-AR9003 TPC code in question was public and in
> ath9k/mac80211, I'd consider give getting it going on the AR9300 a
> shot. I've been meaning to tinker with these NICs for a while.
> 
> (hint. :)
> 
> 
> Adrian

Of coarse it's a way. But you know, customers wants more and more power and higer speeds...
I beleave what Atheros do not ignore the possibility to sell severak thousands modern
chips. :)

Best regrads,
Alex.

[ath9k-devel] AR9380 - Transmit power control per packet

[Alex Hacker]

I found the cause of TPC malfunction. As I assumed early, usage of
AR_PHY_POWER_TX_RATE_MAX register in AR9380 is incorrect. The following
lines should be removed from ar9003_phy.h file.
These registers does not exists:

--- ar9003_phy.h.orig	2011-03-30 16:25:00.000000000 +0600
+++ ar9003_phy.h	2011-07-12 12:53:30.000000000 +0600
@@ -733,9 +733,6 @@
 #define AR_PHY_TXGAIN_FORCED_TXBB1DBGAIN  0x0000000e
 #define AR_PHY_TXGAIN_FORCED_TXBB1DBGAIN_S 1
 
-#define AR_PHY_POWER_TX_RATE1   0x9934
-#define AR_PHY_POWER_TX_RATE2   0x9938
-#define AR_PHY_POWER_TX_RATE_MAX    0x993c
 #define AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE 0x00000040
 #define PHY_AGC_CLR             0x10000000
 #define RFSILENT_BB             0x00002000

The AR_PHY_PWRTX_MAX register should be used instead. This register currently
do not hold MAX_RATE_POWER value, but 6th bit controls the TPC enable.
Now all works as expected for AR9380.

Best regards,
Alex.

[ath9k-devel] AR9380 - Transmit power control per packet

[Adrian Chadd]

Oh wow, you're quite right!

Thanks very much for finding this!



Adrian

On 12 July 2011 15:03, Alex Hacker <hacker@epn.ru> wrote:
> I found the cause of TPC malfunction. As I assumed early, usage of
> AR_PHY_POWER_TX_RATE_MAX register in AR9380 is incorrect. The following
> lines should be removed from ar9003_phy.h file.
> These registers does not exists:
>
> --- ar9003_phy.h.orig ? 2011-03-30 16:25:00.000000000 +0600
> +++ ar9003_phy.h ? ? ? ?2011-07-12 12:53:30.000000000 +0600
> @@ -733,9 +733,6 @@
> ?#define AR_PHY_TXGAIN_FORCED_TXBB1DBGAIN ?0x0000000e
> ?#define AR_PHY_TXGAIN_FORCED_TXBB1DBGAIN_S 1
>
> -#define AR_PHY_POWER_TX_RATE1 ? 0x9934
> -#define AR_PHY_POWER_TX_RATE2 ? 0x9938
> -#define AR_PHY_POWER_TX_RATE_MAX ? ?0x993c
> ?#define AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE 0x00000040
> ?#define PHY_AGC_CLR ? ? ? ? ? ? 0x10000000
> ?#define RFSILENT_BB ? ? ? ? ? ? 0x00002000
>
> The AR_PHY_PWRTX_MAX register should be used instead. This register currently
> do not hold MAX_RATE_POWER value, but 6th bit controls the TPC enable.
> Now all works as expected for AR9380.
>
> Best regards,
> Alex.
>

[ath9k-devel] AR9380 - Transmit power control per packet

[Robert Budde]

Alex, you are GREAT! Thank you so much!

For some reason whatsoever we missed checking the AR_PHY_PWRTX_MAX register.
We checked everything regarding power settings, but as the AR_PHY_PWRTX_MAX
is never used we must have missed that. After a quick check, everything
works perfect. Great job!

Best regards,
Robert

-----Urspr?ngliche Nachricht-----
Von: ath9k-devel-bounces at lists.ath9k.org
[mailto:ath9k-devel-bounces at lists.ath9k.org] Im Auftrag von Alex Hacker
Gesendet: Dienstag, 12. Juli 2011 09:04
An: ath9k-devel at venema.h4ckr.net
Betreff: Re: [ath9k-devel] AR9380 - Transmit power control per packet

I found the cause of TPC malfunction. As I assumed early, usage of
AR_PHY_POWER_TX_RATE_MAX register in AR9380 is incorrect. The following
lines should be removed from ar9003_phy.h file.
These registers does not exists:

--- ar9003_phy.h.orig	2011-03-30 16:25:00.000000000 +0600
+++ ar9003_phy.h	2011-07-12 12:53:30.000000000 +0600
@@ -733,9 +733,6 @@
 #define AR_PHY_TXGAIN_FORCED_TXBB1DBGAIN  0x0000000e  #define
AR_PHY_TXGAIN_FORCED_TXBB1DBGAIN_S 1
 
-#define AR_PHY_POWER_TX_RATE1   0x9934
-#define AR_PHY_POWER_TX_RATE2   0x9938
-#define AR_PHY_POWER_TX_RATE_MAX    0x993c
 #define AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE 0x00000040
 #define PHY_AGC_CLR             0x10000000
 #define RFSILENT_BB             0x00002000

The AR_PHY_PWRTX_MAX register should be used instead. This register
currently do not hold MAX_RATE_POWER value, but 6th bit controls the TPC
enable.
Now all works as expected for AR9380.

Best regards,
Alex.
_______________________________________________
ath9k-devel mailing list
ath9k-devel at lists.ath9k.org
https://lists.ath9k.org/mailman/listinfo/ath9k-devel

[ath9k-devel] AR9380 - Transmit power control per packet

[Mohammed Shafi]

On Tue, Jul 12, 2011 at 12:33 PM, Alex Hacker <hacker@epn.ru> wrote:
> I found the cause of TPC malfunction. As I assumed early, usage of
> AR_PHY_POWER_TX_RATE_MAX register in AR9380 is incorrect. The following
> lines should be removed from ar9003_phy.h file.
> These registers does not exists:
>
> --- ar9003_phy.h.orig ? 2011-03-30 16:25:00.000000000 +0600
> +++ ar9003_phy.h ? ? ? ?2011-07-12 12:53:30.000000000 +0600
> @@ -733,9 +733,6 @@
> ?#define AR_PHY_TXGAIN_FORCED_TXBB1DBGAIN ?0x0000000e
> ?#define AR_PHY_TXGAIN_FORCED_TXBB1DBGAIN_S 1
>
> -#define AR_PHY_POWER_TX_RATE1 ? 0x9934
> -#define AR_PHY_POWER_TX_RATE2 ? 0x9938
> -#define AR_PHY_POWER_TX_RATE_MAX ? ?0x993c
> ?#define AR_PHY_POWER_TX_RATE_MAX_TPC_ENABLE 0x00000040
> ?#define PHY_AGC_CLR ? ? ? ? ? ? 0x10000000
> ?#define RFSILENT_BB ? ? ? ? ? ? 0x00002000
>
> The AR_PHY_PWRTX_MAX register should be used instead. This register currently
> do not hold MAX_RATE_POWER value, but 6th bit controls the TPC enable.
> Now all works as expected for AR9380.

great, i need to read more, still have not got the clear idea for this

>
> Best regards,
> Alex.
>



-- 
shafi