* [U-Boot-Users] U-Boot-Users Digest, Vol 9, Issue 41
[not found] <mailman.40855.1171563974.16820.u-boot-users@lists.sourceforge.net>
@ 2007-02-15 18:36 ` Russell McGuire
0 siblings, 0 replies; only message in thread
From: Russell McGuire @ 2007-02-15 18:36 UTC (permalink / raw)
To: u-boot
Kim,
I assume this change has no affect on boards that are do not have the BCSR
registers on them? i.e. I have a tendancy to use your config files, with a
board that I designed after your reference design. The only differenc being
we don't have the FPGPA sitting in the middle of the board.
Oridinarily I wouldn't ask this, but I have seen this hardware timeout with
my Engineering sample of a Rev 1.2 <half way to Rev 2.0 CPU, since I was
having to add new CPU ID's to U-boot 6 months ago>. Is it purely CPU related
or something to do with extra buffers that were created via extra hardware?
-Russ
> From: Kim Phillips <kim.phillips@freescale.com>
> Subject: [U-Boot-Users] [PATCH] mpc83xx: Disable G1TXCLK, G2TXCLK h/w
> buffers
> To: u-boot-users at lists.sourceforge.net
> Message-ID: <20070215104830.2a00be45.kim.phillips@freescale.com>
> Content-Type: text/plain; charset=US-ASCII
>
> Disable G1TXCLK, G2TXCLK h/w buffers. This patch
> fixes a networking timeout issue with MPC8360EA (Rev.2) PBs.
>
> Verified does not break MPC8360 MDS Rev. 1.1, Rev. 1.2 boards.
>
> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
> Signed-off-by: Emilian Medve <Emilian.Medve@freescale.com>
> ---
> board/mpc8360emds/mpc8360emds.c | 9 ++++++++-
> 1 files changed, 8 insertions(+), 1 deletions(-)
>
> diff --git a/board/mpc8360emds/mpc8360emds.c
> b/board/mpc8360emds/mpc8360emds.c
> index 54b9acc..535884c 100644
> --- a/board/mpc8360emds/mpc8360emds.c
> +++ b/board/mpc8360emds/mpc8360emds.c
> @@ -90,11 +90,18 @@ const qe_iop_conf_t qe_iop_conf_tab[] =
>
> int board_early_init_f(void)
> {
> - volatile u8 *bcsr = (volatile u8 *)CFG_BCSR;
> +
> + u8 *bcsr = (u8 *)CFG_BCSR;
> + const immap_t *immr = (immap_t *)CFG_IMMR;
>
> /* Enable flash write */
> bcsr[0xa] &= ~0x04;
>
> + /* Disable G1TXCLK, G2TXCLK h/w buffers (rev.2 h/w bug workaround)
> */
> + if (immr->sysconf.spridr == SPR_8360_REV20 ||
> + immr->sysconf.spridr == SPR_8360E_REV20)
> + bcsr[0xe] = 0x30;
> +
> return 0;
> }
^ permalink raw reply [flat|nested] only message in thread