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From: <ilialin@codeaurora.org>
To: 'Viresh Kumar' <viresh.kumar@linaro.org>
Cc: mturquette@baylibre.com, sboyd@kernel.org, robh@kernel.org,
	mark.rutland@arm.com, rjw@rjwysocki.net, lgirdwood@gmail.com,
	broonie@kernel.org, andy.gross@linaro.org,
	david.brown@linaro.org, catalin.marinas@arm.com,
	will.deacon@arm.com, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	rnayak@codeaurora.org, amit.kucheria@linaro.org,
	nicolas.dechesne@linaro.org, celster@codeaurora.org,
	tfinkel@codeaurora.org
Subject: RE: [PATCH v5 13/14] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu
Date: Fri, 4 May 2018 09:46:58 +0300	[thread overview]
Message-ID: <002e01d3e373$b958b8e0$2c0a2aa0$@codeaurora.org> (raw)
In-Reply-To: <20180504061123.lf2ffpami23d3q72@vireshk-i7>

bbbb

> -----Original Message-----
> From: Viresh Kumar <viresh.kumar@linaro.org>
> Sent: Friday, May 4, 2018 09:11
> To: Ilia Lin <ilialin@codeaurora.org>
> Cc: mturquette@baylibre.com; sboyd@kernel.org; robh@kernel.org;
> mark.rutland@arm.com; rjw@rjwysocki.net; lgirdwood@gmail.com;
> broonie@kernel.org; andy.gross@linaro.org; david.brown@linaro.org;
> catalin.marinas@arm.com; will.deacon@arm.com; linux-clk@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-
> pm@vger.kernel.org; linux-arm-msm@vger.kernel.org; linux-
> soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> rnayak@codeaurora.org; amit.kucheria@linaro.org;
> nicolas.dechesne@linaro.org; celster@codeaurora.org;
> tfinkel@codeaurora.org
> Subject: Re: [PATCH v5 13/14] dt-bindings: cpufreq: Document operating-
> points-v2-kryo-cpu
> 
> On 03-05-18, 14:52, Ilia Lin wrote:
> > In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996
> > that have KRYO processors, the CPU ferequencies subset and voltage
> > value of each OPP varies based on the silicon variant in use.
> > Qualcomm Technologies, Inc. Process Voltage Scaling Tables defines the
> > voltage and frequency value based on the msm-id in SMEM and speedbin
> > blown in the efuse combination.
> > The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the
> > SoC to provide the OPP framework with required information.
> > This is used to determine the voltage and frequency value for each OPP
> > of
> > operating-points-v2 table when it is parsed by the OPP framework.
> >
> > This change adds documentation.
> >
> > Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
> > ---
> >  .../devicetree/bindings/opp/kryo-cpufreq.txt       | 693
> +++++++++++++++++++++
> >  1 file changed, 693 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
> >
> > diff --git a/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
> > b/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
> > new file mode 100644
> > index 0000000..20cef9d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
> > @@ -0,0 +1,693 @@
> > +Qualcomm Technologies, Inc. KRYO CPUFreq and OPP bindings
> > +===================================
> > +
> > +In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996
> > +that have KRYO processors, the CPU ferequencies subset and voltage
> > +value of each OPP varies based on the silicon variant in use.
> > +Qualcomm Technologies, Inc. Process Voltage Scaling Tables defines
> > +the voltage and frequency value based on the msm-id in SMEM and
> > +speedbin blown in the efuse combination.
> > +The qcom-cpufreq-kryo driver reads the msm-id and efuse value from
> > +the SoC to provide the OPP framework with required information
> (existing HW bitmap).
> > +This is used to determine the voltage and frequency value for each
> > +OPP of
> > +operating-points-v2 table when it is parsed by the OPP framework.
> > +
> > +Required properties:
> > +--------------------
> > +In 'cpus' nodes:
> > +- operating-points-v2: Phandle to the operating-points-v2 table to use.
> > +
> > +In 'operating-points-v2' table:
> > +- compatible: Should be
> > +	- 'operating-points-v2-kryo-cpu' for apq8096 and msm8996.
> > +- nvmem-cells: A phandle pointing to a nvmem-cells node representing
> the
> > +		efuse registers that has information about the
> > +		speedbin that is used to select the right frequency/voltage
> > +		value pair.
> > +		Please refer the for nvmem-cells
> > +		bindings
> Documentation/devicetree/bindings/nvmem/nvmem.txt
> > +		and also examples below.
> > +
> > +In every OPP node:
> > +- opp-supported-hw: A single 32 bit bitmap value, representing
> compatible HW.
> > +		    Bitmap:
> > +			0:	MSM8996 V3, speedbin 0
> > +			1:	MSM8996 V3, speedbin 1
> > +			2:	MSM8996 V3, speedbin 2
> > +			3:	unused
> > +			4:	MSM8996 SG, speedbin 0
> > +			5:	MSM8996 SG, speedbin 1
> > +			6:	MSM8996 SG, speedbin 2
> > +			7-31:	unused
> > +
> > +Example 1:
> > +---------
> > +
> > +	cpus {
> > +		#address-cells = <2>;
> > +		#size-cells = <0>;
> > +
> > +		CPU0: cpu@0 {
> > +			device_type = "cpu";
> > +			compatible = "qcom,kryo";
> > +			reg = <0x0 0x0>;
> > +			enable-method = "psci";
> > +			clocks = <&kryocc 0>;
> > +			cpu-supply = <&pm8994_s11_saw>;
> > +			operating-points-v2 = <&cluster0_opp>;
> > +			/* cooling options */
> > +			cooling-min-level = <0>;
> > +			cooling-max-level = <15>;
> 
> cooling min/max aren't required anymore, as I told you in the previous
> version :)

Sure, I removed them in the DT, but forgot in the documentation. Will fix.

> 
> > +	cluster0_opp: opp_table0 {
> > +		compatible = "operating-points-v2-kryo-cpu";
> > +		nvmem-cells = <&speedbin_efuse>;
> > +		opp-shared;
> > +
> > +		opp-307200000 {
> > +			opp-hz = /bits/ 64 <  307200000 >;
> 
> You fixed spacing around frequency values in the dts but not here.

Same as above.

> 
> > +			opp-microvolt = <905000 905000 1140000>;
> > +			opp-supported-hw = <0x77>;
> > +			clock-latency-ns = <200000>;
> > +		};
> 
> --
> viresh

WARNING: multiple messages have this Message-ID (diff)
From: <ilialin@codeaurora.org>
To: "'Viresh Kumar'" <viresh.kumar@linaro.org>
Cc: <mturquette@baylibre.com>, <sboyd@kernel.org>, <robh@kernel.org>,
	<mark.rutland@arm.com>, <rjw@rjwysocki.net>,
	<lgirdwood@gmail.com>, <broonie@kernel.org>,
	<andy.gross@linaro.org>, <david.brown@linaro.org>,
	<catalin.marinas@arm.com>, <will.deacon@arm.com>,
	<linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-pm@vger.kernel.org>,
	<linux-arm-msm@vger.kernel.org>, <linux-soc@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <rnayak@codeaurora.org>,
	<amit.kucheria@linaro.org>, <nicolas.dechesne@linaro.org>,
	<celster@codeaurora.org>, <tfinkel@codeaurora.org>
Subject: RE: [PATCH v5 13/14] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu
Date: Fri, 4 May 2018 09:46:58 +0300	[thread overview]
Message-ID: <002e01d3e373$b958b8e0$2c0a2aa0$@codeaurora.org> (raw)
In-Reply-To: <20180504061123.lf2ffpami23d3q72@vireshk-i7>

bbbb

> -----Original Message-----
> From: Viresh Kumar <viresh.kumar@linaro.org>
> Sent: Friday, May 4, 2018 09:11
> To: Ilia Lin <ilialin@codeaurora.org>
> Cc: mturquette@baylibre.com; sboyd@kernel.org; robh@kernel.org;
> mark.rutland@arm.com; rjw@rjwysocki.net; lgirdwood@gmail.com;
> broonie@kernel.org; andy.gross@linaro.org; david.brown@linaro.org;
> catalin.marinas@arm.com; will.deacon@arm.com; linux-clk@vger.kernel.org;
> devicetree@vger.kernel.org; linux-kernel@vger.kernel.org; linux-
> pm@vger.kernel.org; linux-arm-msm@vger.kernel.org; linux-
> soc@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> rnayak@codeaurora.org; amit.kucheria@linaro.org;
> nicolas.dechesne@linaro.org; celster@codeaurora.org;
> tfinkel@codeaurora.org
> Subject: Re: [PATCH v5 13/14] dt-bindings: cpufreq: Document operating-
> points-v2-kryo-cpu
> 
> On 03-05-18, 14:52, Ilia Lin wrote:
> > In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996
> > that have KRYO processors, the CPU ferequencies subset and voltage
> > value of each OPP varies based on the silicon variant in use.
> > Qualcomm Technologies, Inc. Process Voltage Scaling Tables defines the
> > voltage and frequency value based on the msm-id in SMEM and speedbin
> > blown in the efuse combination.
> > The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the
> > SoC to provide the OPP framework with required information.
> > This is used to determine the voltage and frequency value for each OPP
> > of
> > operating-points-v2 table when it is parsed by the OPP framework.
> >
> > This change adds documentation.
> >
> > Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
> > ---
> >  .../devicetree/bindings/opp/kryo-cpufreq.txt       | 693
> +++++++++++++++++++++
> >  1 file changed, 693 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
> >
> > diff --git a/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
> > b/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
> > new file mode 100644
> > index 0000000..20cef9d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
> > @@ -0,0 +1,693 @@
> > +Qualcomm Technologies, Inc. KRYO CPUFreq and OPP bindings
> > +===================================
> > +
> > +In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996
> > +that have KRYO processors, the CPU ferequencies subset and voltage
> > +value of each OPP varies based on the silicon variant in use.
> > +Qualcomm Technologies, Inc. Process Voltage Scaling Tables defines
> > +the voltage and frequency value based on the msm-id in SMEM and
> > +speedbin blown in the efuse combination.
> > +The qcom-cpufreq-kryo driver reads the msm-id and efuse value from
> > +the SoC to provide the OPP framework with required information
> (existing HW bitmap).
> > +This is used to determine the voltage and frequency value for each
> > +OPP of
> > +operating-points-v2 table when it is parsed by the OPP framework.
> > +
> > +Required properties:
> > +--------------------
> > +In 'cpus' nodes:
> > +- operating-points-v2: Phandle to the operating-points-v2 table to use.
> > +
> > +In 'operating-points-v2' table:
> > +- compatible: Should be
> > +	- 'operating-points-v2-kryo-cpu' for apq8096 and msm8996.
> > +- nvmem-cells: A phandle pointing to a nvmem-cells node representing
> the
> > +		efuse registers that has information about the
> > +		speedbin that is used to select the right frequency/voltage
> > +		value pair.
> > +		Please refer the for nvmem-cells
> > +		bindings
> Documentation/devicetree/bindings/nvmem/nvmem.txt
> > +		and also examples below.
> > +
> > +In every OPP node:
> > +- opp-supported-hw: A single 32 bit bitmap value, representing
> compatible HW.
> > +		    Bitmap:
> > +			0:	MSM8996 V3, speedbin 0
> > +			1:	MSM8996 V3, speedbin 1
> > +			2:	MSM8996 V3, speedbin 2
> > +			3:	unused
> > +			4:	MSM8996 SG, speedbin 0
> > +			5:	MSM8996 SG, speedbin 1
> > +			6:	MSM8996 SG, speedbin 2
> > +			7-31:	unused
> > +
> > +Example 1:
> > +---------
> > +
> > +	cpus {
> > +		#address-cells = <2>;
> > +		#size-cells = <0>;
> > +
> > +		CPU0: cpu@0 {
> > +			device_type = "cpu";
> > +			compatible = "qcom,kryo";
> > +			reg = <0x0 0x0>;
> > +			enable-method = "psci";
> > +			clocks = <&kryocc 0>;
> > +			cpu-supply = <&pm8994_s11_saw>;
> > +			operating-points-v2 = <&cluster0_opp>;
> > +			/* cooling options */
> > +			cooling-min-level = <0>;
> > +			cooling-max-level = <15>;
> 
> cooling min/max aren't required anymore, as I told you in the previous
> version :)

Sure, I removed them in the DT, but forgot in the documentation. Will fix.

> 
> > +	cluster0_opp: opp_table0 {
> > +		compatible = "operating-points-v2-kryo-cpu";
> > +		nvmem-cells = <&speedbin_efuse>;
> > +		opp-shared;
> > +
> > +		opp-307200000 {
> > +			opp-hz = /bits/ 64 <  307200000 >;
> 
> You fixed spacing around frequency values in the dts but not here.

Same as above.

> 
> > +			opp-microvolt = <905000 905000 1140000>;
> > +			opp-supported-hw = <0x77>;
> > +			clock-latency-ns = <200000>;
> > +		};
> 
> --
> viresh

WARNING: multiple messages have this Message-ID (diff)
From: ilialin@codeaurora.org (ilialin at codeaurora.org)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 13/14] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu
Date: Fri, 4 May 2018 09:46:58 +0300	[thread overview]
Message-ID: <002e01d3e373$b958b8e0$2c0a2aa0$@codeaurora.org> (raw)
In-Reply-To: <20180504061123.lf2ffpami23d3q72@vireshk-i7>

bbbb

> -----Original Message-----
> From: Viresh Kumar <viresh.kumar@linaro.org>
> Sent: Friday, May 4, 2018 09:11
> To: Ilia Lin <ilialin@codeaurora.org>
> Cc: mturquette at baylibre.com; sboyd at kernel.org; robh at kernel.org;
> mark.rutland at arm.com; rjw at rjwysocki.net; lgirdwood at gmail.com;
> broonie at kernel.org; andy.gross at linaro.org; david.brown at linaro.org;
> catalin.marinas at arm.com; will.deacon at arm.com; linux-clk at vger.kernel.org;
> devicetree at vger.kernel.org; linux-kernel at vger.kernel.org; linux-
> pm at vger.kernel.org; linux-arm-msm at vger.kernel.org; linux-
> soc at vger.kernel.org; linux-arm-kernel at lists.infradead.org;
> rnayak at codeaurora.org; amit.kucheria at linaro.org;
> nicolas.dechesne at linaro.org; celster at codeaurora.org;
> tfinkel at codeaurora.org
> Subject: Re: [PATCH v5 13/14] dt-bindings: cpufreq: Document operating-
> points-v2-kryo-cpu
> 
> On 03-05-18, 14:52, Ilia Lin wrote:
> > In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996
> > that have KRYO processors, the CPU ferequencies subset and voltage
> > value of each OPP varies based on the silicon variant in use.
> > Qualcomm Technologies, Inc. Process Voltage Scaling Tables defines the
> > voltage and frequency value based on the msm-id in SMEM and speedbin
> > blown in the efuse combination.
> > The qcom-cpufreq-kryo driver reads the msm-id and efuse value from the
> > SoC to provide the OPP framework with required information.
> > This is used to determine the voltage and frequency value for each OPP
> > of
> > operating-points-v2 table when it is parsed by the OPP framework.
> >
> > This change adds documentation.
> >
> > Signed-off-by: Ilia Lin <ilialin@codeaurora.org>
> > ---
> >  .../devicetree/bindings/opp/kryo-cpufreq.txt       | 693
> +++++++++++++++++++++
> >  1 file changed, 693 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
> >
> > diff --git a/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
> > b/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
> > new file mode 100644
> > index 0000000..20cef9d
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/opp/kryo-cpufreq.txt
> > @@ -0,0 +1,693 @@
> > +Qualcomm Technologies, Inc. KRYO CPUFreq and OPP bindings
> > +===================================
> > +
> > +In Certain Qualcomm Technologies, Inc. SoCs like apq8096 and msm8996
> > +that have KRYO processors, the CPU ferequencies subset and voltage
> > +value of each OPP varies based on the silicon variant in use.
> > +Qualcomm Technologies, Inc. Process Voltage Scaling Tables defines
> > +the voltage and frequency value based on the msm-id in SMEM and
> > +speedbin blown in the efuse combination.
> > +The qcom-cpufreq-kryo driver reads the msm-id and efuse value from
> > +the SoC to provide the OPP framework with required information
> (existing HW bitmap).
> > +This is used to determine the voltage and frequency value for each
> > +OPP of
> > +operating-points-v2 table when it is parsed by the OPP framework.
> > +
> > +Required properties:
> > +--------------------
> > +In 'cpus' nodes:
> > +- operating-points-v2: Phandle to the operating-points-v2 table to use.
> > +
> > +In 'operating-points-v2' table:
> > +- compatible: Should be
> > +	- 'operating-points-v2-kryo-cpu' for apq8096 and msm8996.
> > +- nvmem-cells: A phandle pointing to a nvmem-cells node representing
> the
> > +		efuse registers that has information about the
> > +		speedbin that is used to select the right frequency/voltage
> > +		value pair.
> > +		Please refer the for nvmem-cells
> > +		bindings
> Documentation/devicetree/bindings/nvmem/nvmem.txt
> > +		and also examples below.
> > +
> > +In every OPP node:
> > +- opp-supported-hw: A single 32 bit bitmap value, representing
> compatible HW.
> > +		    Bitmap:
> > +			0:	MSM8996 V3, speedbin 0
> > +			1:	MSM8996 V3, speedbin 1
> > +			2:	MSM8996 V3, speedbin 2
> > +			3:	unused
> > +			4:	MSM8996 SG, speedbin 0
> > +			5:	MSM8996 SG, speedbin 1
> > +			6:	MSM8996 SG, speedbin 2
> > +			7-31:	unused
> > +
> > +Example 1:
> > +---------
> > +
> > +	cpus {
> > +		#address-cells = <2>;
> > +		#size-cells = <0>;
> > +
> > +		CPU0: cpu at 0 {
> > +			device_type = "cpu";
> > +			compatible = "qcom,kryo";
> > +			reg = <0x0 0x0>;
> > +			enable-method = "psci";
> > +			clocks = <&kryocc 0>;
> > +			cpu-supply = <&pm8994_s11_saw>;
> > +			operating-points-v2 = <&cluster0_opp>;
> > +			/* cooling options */
> > +			cooling-min-level = <0>;
> > +			cooling-max-level = <15>;
> 
> cooling min/max aren't required anymore, as I told you in the previous
> version :)

Sure, I removed them in the DT, but forgot in the documentation. Will fix.

> 
> > +	cluster0_opp: opp_table0 {
> > +		compatible = "operating-points-v2-kryo-cpu";
> > +		nvmem-cells = <&speedbin_efuse>;
> > +		opp-shared;
> > +
> > +		opp-307200000 {
> > +			opp-hz = /bits/ 64 <  307200000 >;
> 
> You fixed spacing around frequency values in the dts but not here.

Same as above.

> 
> > +			opp-microvolt = <905000 905000 1140000>;
> > +			opp-supported-hw = <0x77>;
> > +			clock-latency-ns = <200000>;
> > +		};
> 
> --
> viresh

  reply	other threads:[~2018-05-04  6:46 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-05-03 11:52 [PATCH v5 00/14] CPU scaling support for msm8996 Ilia Lin
2018-05-03 11:52 ` Ilia Lin
2018-05-03 11:52 ` [PATCH v5 01/14] soc: qcom: Separate kryo l2 accessors from PMU driver Ilia Lin
2018-05-03 11:52   ` Ilia Lin
2018-05-03 11:52 ` [PATCH v5 02/14] clk: qcom: Make clk_alpha_pll_configure available to modules Ilia Lin
2018-05-03 11:52   ` Ilia Lin
2018-05-03 11:52 ` [PATCH v5 03/14] clk: qcom: Add CPU clock driver for msm8996 Ilia Lin
2018-05-03 11:52   ` Ilia Lin
2018-05-03 11:52   ` Ilia Lin
2018-05-04 12:27   ` kbuild test robot
2018-05-04 12:27     ` kbuild test robot
2018-05-04 12:27     ` kbuild test robot
2018-05-03 11:52 ` [PATCH v5 04/14] clk: qcom: Add DT bindings for " Ilia Lin
2018-05-03 11:52   ` Ilia Lin
2018-05-03 11:52 ` [PATCH v5 05/14] clk: qcom: cpu-8996: Add support to switch to alternate PLL Ilia Lin
2018-05-03 11:52   ` Ilia Lin
2018-05-03 11:52 ` [PATCH v5 06/14] clk: qcom: cpu-8996: Add support to switch below 600Mhz Ilia Lin
2018-05-03 11:52   ` Ilia Lin
2018-05-03 11:52 ` [PATCH v5 07/14] clk: qcom: Add ACD path to CPU clock driver for msm8996 Ilia Lin
2018-05-03 11:52   ` Ilia Lin
2018-05-03 11:52 ` [PATCH v5 08/14] dt: qcom: Add opp and thermal to the msm8996 Ilia Lin
2018-05-03 11:52   ` Ilia Lin
2018-05-03 11:52 ` [PATCH v5 09/14] regulator: qcom_spmi: Add support for SAW Ilia Lin
2018-05-03 11:52   ` Ilia Lin
2018-05-03 11:52 ` [PATCH v5 10/14] dt-bindings: qcom_spmi: Add support for SAW documentation Ilia Lin
2018-05-03 11:52   ` Ilia Lin
2018-05-07 16:07   ` Rob Herring
2018-05-07 16:07     ` Rob Herring
2018-05-03 11:52 ` [PATCH v5 11/14] dt: qcom: Add SAW regulator for 8x96 CPUs Ilia Lin
2018-05-03 11:52   ` Ilia Lin
2018-05-03 11:52 ` [PATCH v5 12/14] cpufreq: Add Kryo CPU scaling driver Ilia Lin
2018-05-03 11:52   ` Ilia Lin
2018-05-04  6:08   ` Viresh Kumar
2018-05-04  6:08     ` Viresh Kumar
2018-05-04  6:44     ` ilialin
2018-05-04  6:44       ` ilialin at codeaurora.org
2018-05-04  6:44       ` ilialin
2018-05-04  6:57       ` Viresh Kumar
2018-05-04  6:57         ` Viresh Kumar
2018-05-04 19:20         ` ilialin
2018-05-04 19:20           ` ilialin at codeaurora.org
2018-05-04 19:20           ` ilialin
2018-05-03 11:52 ` [PATCH v5 13/14] dt-bindings: cpufreq: Document operating-points-v2-kryo-cpu Ilia Lin
2018-05-03 11:52   ` Ilia Lin
2018-05-04  6:11   ` Viresh Kumar
2018-05-04  6:11     ` Viresh Kumar
2018-05-04  6:46     ` ilialin [this message]
2018-05-04  6:46       ` ilialin at codeaurora.org
2018-05-04  6:46       ` ilialin
2018-05-03 11:52 ` [PATCH v5 14/14] dt: qcom: Add qcom-cpufreq-kryo driver configuration Ilia Lin
2018-05-03 11:52   ` Ilia Lin
2018-05-04  6:00 ` [PATCH v5 00/14] CPU scaling support for msm8996 Viresh Kumar
2018-05-04  6:00   ` Viresh Kumar

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