[PATCH 0/7]: ARM: SAMSUNG: Add SPI clkdev support

[PATCH 0/7]: ARM: SAMSUNG: Add SPI clkdev support

[Padmavathi Venna]

This patchset modifies the existing clkdev to make SPI driver
independent of the clock names send from platform data. This
patches enables the SPI driver to request SPI bus clocks
using generic connection ID.

The patches are created against "for-next" branch of Kukjin Kim's tree at:
git://github.com/kgene/linux-samsung.git

Due to the issue with the GPIO in the latest commits of for-next branch,
following patches are tested against the following commit: 
9eb1e9aeec6f6f68d83a463446d1b30cb8ffcc65
ARM: S5PV210: enable TV support on GONI board

Padmavathi Venna (7):
  SPI: S3C64XX: Use bus clocks created using clkdev
  ARM: SAMSUNG: Add CLK Macro for clkdev support
  ARM: S3C64XX: Add SPI clkdev support
  ARM: S5PC100: Add SPI clkdev support
  ARM: S5P64X0: Add SPI clkdev support
  ARM: S5PV210: Add SPI clkdev support
  ARM: SAMSUNG: Remove SPI bus clocks from platform data

 arch/arm/mach-s3c64xx/clock.c                    |   98 +++++++++++-----
 arch/arm/mach-s3c64xx/dev-spi.c                  |    7 -
 arch/arm/mach-s5p64x0/clock-s5p6440.c            |   57 ++++++----
 arch/arm/mach-s5p64x0/clock-s5p6450.c            |   57 ++++++----
 arch/arm/mach-s5p64x0/dev-spi.c                  |    6 -
 arch/arm/mach-s5pc100/clock.c                    |  132 +++++++++++++---------
 arch/arm/mach-s5pc100/dev-spi.c                  |    7 -
 arch/arm/mach-s5pv210/clock.c                    |   58 ++++++----
 arch/arm/mach-s5pv210/dev-spi.c                  |    6 -
 arch/arm/plat-samsung/include/plat/clock.h       |    7 +
 arch/arm/plat-samsung/include/plat/s3c64xx-spi.h |    2 -
 drivers/spi/spi-s3c64xx.c                        |   14 +--
 12 files changed, 271 insertions(+), 180 deletions(-)

-- 
1.7.4.4

[PATCH 0/7]: ARM: SAMSUNG: Add SPI clkdev support

[Padmavathi Venna]

This patchset modifies the existing clkdev to make SPI driver
independent of the clock names send from platform data. This
patches enables the SPI driver to request SPI bus clocks
using generic connection ID.

The patches are created against "for-next" branch of Kukjin Kim's tree at:
git://github.com/kgene/linux-samsung.git

Due to the issue with the GPIO in the latest commits of for-next branch,
following patches are tested against the following commit: 
9eb1e9aeec6f6f68d83a463446d1b30cb8ffcc65
ARM: S5PV210: enable TV support on GONI board

Padmavathi Venna (7):
  SPI: S3C64XX: Use bus clocks created using clkdev
  ARM: SAMSUNG: Add CLK Macro for clkdev support
  ARM: S3C64XX: Add SPI clkdev support
  ARM: S5PC100: Add SPI clkdev support
  ARM: S5P64X0: Add SPI clkdev support
  ARM: S5PV210: Add SPI clkdev support
  ARM: SAMSUNG: Remove SPI bus clocks from platform data

 arch/arm/mach-s3c64xx/clock.c                    |   98 +++++++++++-----
 arch/arm/mach-s3c64xx/dev-spi.c                  |    7 -
 arch/arm/mach-s5p64x0/clock-s5p6440.c            |   57 ++++++----
 arch/arm/mach-s5p64x0/clock-s5p6450.c            |   57 ++++++----
 arch/arm/mach-s5p64x0/dev-spi.c                  |    6 -
 arch/arm/mach-s5pc100/clock.c                    |  132 +++++++++++++---------
 arch/arm/mach-s5pc100/dev-spi.c                  |    7 -
 arch/arm/mach-s5pv210/clock.c                    |   58 ++++++----
 arch/arm/mach-s5pv210/dev-spi.c                  |    6 -
 arch/arm/plat-samsung/include/plat/clock.h       |    7 +
 arch/arm/plat-samsung/include/plat/s3c64xx-spi.h |    2 -
 drivers/spi/spi-s3c64xx.c                        |   14 +--
 12 files changed, 271 insertions(+), 180 deletions(-)

-- 
1.7.4.4

[PATCH 1/7] SPI: S3C64XX: Use bus clocks created using clkdev

[Padmavathi Venna]

This patch modifies the driver to stop depending on the
clock names being passed from platform and switch over
to lookup clocks generic names using clkdev

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
 drivers/spi/spi-s3c64xx.c |   14 +++++---------
 1 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 019a716..dcf7e10 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -971,6 +971,7 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
 	struct s3c64xx_spi_info *sci;
 	struct spi_master *master;
 	int ret;
+	char clk_name[16];
 
 	if (pdev->id < 0) {
 		dev_err(&pdev->dev,
@@ -984,11 +985,6 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
 	}
 
 	sci = pdev->dev.platform_data;
-	if (!sci->src_clk_name) {
-		dev_err(&pdev->dev,
-			"Board init must call s3c64xx_spi_set_info()\n");
-		return -EINVAL;
-	}
 
 	/* Check for availability of necessary resource */
 
@@ -1073,17 +1069,17 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
 		goto err4;
 	}
 
-	sdd->src_clk = clk_get(&pdev->dev, sci->src_clk_name);
+	sprintf(clk_name, "spi_busclk%d", sci->src_clk_nr);
+	sdd->src_clk = clk_get(&pdev->dev, clk_name);
 	if (IS_ERR(sdd->src_clk)) {
 		dev_err(&pdev->dev,
-			"Unable to acquire clock '%s'\n", sci->src_clk_name);
+			"Unable to acquire clock '%s'\n", clk_name);
 		ret = PTR_ERR(sdd->src_clk);
 		goto err5;
 	}
 
 	if (clk_enable(sdd->src_clk)) {
-		dev_err(&pdev->dev, "Couldn't enable clock '%s'\n",
-							sci->src_clk_name);
+		dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name);
 		ret = -EBUSY;
 		goto err6;
 	}
-- 
1.7.4.4

[PATCH 1/7] SPI: S3C64XX: Use bus clocks created using clkdev

[Padmavathi Venna]

This patch modifies the driver to stop depending on the
clock names being passed from platform and switch over
to lookup clocks generic names using clkdev

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
 drivers/spi/spi-s3c64xx.c |   14 +++++---------
 1 files changed, 5 insertions(+), 9 deletions(-)

diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
index 019a716..dcf7e10 100644
--- a/drivers/spi/spi-s3c64xx.c
+++ b/drivers/spi/spi-s3c64xx.c
@@ -971,6 +971,7 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
 	struct s3c64xx_spi_info *sci;
 	struct spi_master *master;
 	int ret;
+	char clk_name[16];
 
 	if (pdev->id < 0) {
 		dev_err(&pdev->dev,
@@ -984,11 +985,6 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
 	}
 
 	sci = pdev->dev.platform_data;
-	if (!sci->src_clk_name) {
-		dev_err(&pdev->dev,
-			"Board init must call s3c64xx_spi_set_info()\n");
-		return -EINVAL;
-	}
 
 	/* Check for availability of necessary resource */
 
@@ -1073,17 +1069,17 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
 		goto err4;
 	}
 
-	sdd->src_clk = clk_get(&pdev->dev, sci->src_clk_name);
+	sprintf(clk_name, "spi_busclk%d", sci->src_clk_nr);
+	sdd->src_clk = clk_get(&pdev->dev, clk_name);
 	if (IS_ERR(sdd->src_clk)) {
 		dev_err(&pdev->dev,
-			"Unable to acquire clock '%s'\n", sci->src_clk_name);
+			"Unable to acquire clock '%s'\n", clk_name);
 		ret = PTR_ERR(sdd->src_clk);
 		goto err5;
 	}
 
 	if (clk_enable(sdd->src_clk)) {
-		dev_err(&pdev->dev, "Couldn't enable clock '%s'\n",
-							sci->src_clk_name);
+		dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name);
 		ret = -EBUSY;
 		goto err6;
 	}
-- 
1.7.4.4

[PATCH 2/7] ARM: SAMSUNG: Add CLK Macro for clkdev support

[Padmavathi Venna]

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
 arch/arm/plat-samsung/include/plat/clock.h |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index 73c66d4..c864825 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -17,6 +17,13 @@
 
 struct clk;
 
+#define CLK(dev, con, ck)	\
+	{			\
+		.dev_id = dev,	\
+		.con_id = con,	\
+		.clk = ck,	\
+	}
+
 /**
  * struct clk_ops - standard clock operations
  * @set_rate: set the clock rate, see clk_set_rate().
-- 
1.7.4.4

[PATCH 2/7] ARM: SAMSUNG: Add CLK Macro for clkdev support

[Padmavathi Venna]

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
 arch/arm/plat-samsung/include/plat/clock.h |    7 +++++++
 1 files changed, 7 insertions(+), 0 deletions(-)

diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
index 73c66d4..c864825 100644
--- a/arch/arm/plat-samsung/include/plat/clock.h
+++ b/arch/arm/plat-samsung/include/plat/clock.h
@@ -17,6 +17,13 @@
 
 struct clk;
 
+#define CLK(dev, con, ck)	\
+	{			\
+		.dev_id = dev,	\
+		.con_id = con,	\
+		.clk = ck,	\
+	}
+
 /**
  * struct clk_ops - standard clock operations
  * @set_rate: set the clock rate, see clk_set_rate().
-- 
1.7.4.4

[PATCH 3/7] ARM: S3C64XX: Add SPI clkdev support

[Padmavathi Venna]

Registered the SPI bus clocks with clkdev using generic
connection id.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
 arch/arm/mach-s3c64xx/clock.c |   98 +++++++++++++++++++++++++++-------------
 1 files changed, 66 insertions(+), 32 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 872e683..e1d5376 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -184,18 +184,6 @@ static struct clk init_clocks_off[] = {
 		.enable		= s3c64xx_pclk_ctrl,
 		.ctrlbit	= S3C_CLKCON_PCLK_SPI1,
 	}, {
-		.name		= "spi_48m",
-		.devname	= "s3c64xx-spi.0",
-		.parent		= &clk_48m,
-		.enable		= s3c64xx_sclk_ctrl,
-		.ctrlbit	= S3C_CLKCON_SCLK_SPI0_48,
-	}, {
-		.name		= "spi_48m",
-		.devname	= "s3c64xx-spi.1",
-		.parent		= &clk_48m,
-		.enable		= s3c64xx_sclk_ctrl,
-		.ctrlbit	= S3C_CLKCON_SCLK_SPI1_48,
-	}, {
 		.name		= "48m",
 		.devname	= "s3c-sdhci.0",
 		.parent		= &clk_48m,
@@ -625,26 +613,6 @@ static struct clksrc_clk clksrcs[] = {
 		.reg_div	= { .reg = S3C_CLK_DIV2, .shift = 16, .size = 4  },
 		.sources	= &clkset_uart,
 	}, {
-/* Where does UCLK0 come from? */
-		.clk	= {
-			.name		= "spi-bus",
-			.devname	= "s3c64xx-spi.0",
-			.ctrlbit        = S3C_CLKCON_SCLK_SPI0,
-			.enable		= s3c64xx_sclk_ctrl,
-		},
-		.reg_src	= { .reg = S3C_CLK_SRC, .shift = 14, .size = 2  },
-		.reg_div	= { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4  },
-		.sources	= &clkset_spi_mmc,
-	}, {
-		.clk	= {
-			.name		= "spi-bus",
-			.devname	= "s3c64xx-spi.1",
-			.enable		= s3c64xx_sclk_ctrl,
-		},
-		.reg_src	= { .reg = S3C_CLK_SRC, .shift = 16, .size = 2  },
-		.reg_div	= { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4  },
-		.sources	= &clkset_spi_mmc,
-	}, {
 		.clk	= {
 			.name		= "audio-bus",
 			.devname	= "samsung-i2s.0",
@@ -695,6 +663,60 @@ static struct clksrc_clk clksrcs[] = {
 	},
 };
 
+static struct clk clk_48m_spi0 = {
+	.name		= "spi_48m",
+	.parent		= &clk_48m,
+	.enable		= s3c64xx_sclk_ctrl,
+	.ctrlbit	= S3C_CLKCON_SCLK_SPI0_48,
+};
+
+static struct clk clk_48m_spi1 = {
+	.name		= "spi_48m",
+	.parent		= &clk_48m,
+	.enable		= s3c64xx_sclk_ctrl,
+	.ctrlbit	= S3C_CLKCON_SCLK_SPI1_48,
+};
+
+static struct clksrc_clk sclk_spi0 = {
+	.clk	 = {
+		.name		= "spi-bus",
+		.ctrlbit	= S3C_CLKCON_SCLK_SPI0,
+		.enable		= s3c64xx_sclk_ctrl,
+	},
+	.reg_src = { .reg = S3C_CLK_SRC, .shift = 14, .size = 2 },
+	.reg_div = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4 },
+	.sources = &clkset_spi_mmc,
+};
+
+static struct clksrc_clk sclk_spi1 = {
+	.clk	= {
+		.name		= "spi-bus",
+		.ctrlbit	= S3C_CLKCON_SCLK_SPI1,
+		.enable		= s3c64xx_sclk_ctrl,
+	},
+	.reg_src = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2 },
+	.reg_div = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4 },
+	.sources = &clkset_spi_mmc,
+};
+
+static struct clk_lookup clk_lookup_table[] = {
+	CLK(NULL, "spi_busclk0", &clk_p),
+	CLK("s3c64xx-spi.0", "spi_busclk1", &sclk_spi0.clk),
+	CLK("s3c64xx-spi.0", "spi_busclk2", &clk_48m_spi0),
+	CLK("s3c64xx-spi.1", "spi_busclk1", &sclk_spi1.clk),
+	CLK("s3c64xx-spi.1", "spi_busclk2", &clk_48m_spi1),
+};
+
+static struct clksrc_clk *clksrc_cdev[] = {
+	&sclk_spi0,
+	&sclk_spi1,
+};
+
+static struct clk *clk_cdev[] = {
+	&clk_48m_spi0,
+	&clk_48m_spi1,
+};
+
 /* Clock initialisation code */
 
 static struct clksrc_clk *init_parents[] = {
@@ -810,11 +832,16 @@ static struct clk *clks[] __initdata = {
 void __init s3c64xx_register_clocks(unsigned long xtal, 
 				    unsigned armclk_divlimit)
 {
+	int ptr;
+
 	armclk_mask = armclk_divlimit;
 
 	s3c24xx_register_baseclocks(xtal);
 	s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
 
+	for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+		s3c_register_clksrc(clksrc_cdev[ptr], 1);
+
 	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
 	s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
@@ -822,5 +849,12 @@ void __init s3c64xx_register_clocks(unsigned long xtal,
 
 	s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1));
 	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+
+	s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
+	for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
+		s3c_disable_clocks(clk_cdev[ptr], 1);
+
 	s3c_pwmclk_init();
+
+	clkdev_add_table(clk_lookup_table, ARRAY_SIZE(clk_lookup_table));
 }
-- 
1.7.4.4

[PATCH 3/7] ARM: S3C64XX: Add SPI clkdev support

[Padmavathi Venna]

Registered the SPI bus clocks with clkdev using generic
connection id.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
 arch/arm/mach-s3c64xx/clock.c |   98 +++++++++++++++++++++++++++-------------
 1 files changed, 66 insertions(+), 32 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/clock.c b/arch/arm/mach-s3c64xx/clock.c
index 872e683..e1d5376 100644
--- a/arch/arm/mach-s3c64xx/clock.c
+++ b/arch/arm/mach-s3c64xx/clock.c
@@ -184,18 +184,6 @@ static struct clk init_clocks_off[] = {
 		.enable		= s3c64xx_pclk_ctrl,
 		.ctrlbit	= S3C_CLKCON_PCLK_SPI1,
 	}, {
-		.name		= "spi_48m",
-		.devname	= "s3c64xx-spi.0",
-		.parent		= &clk_48m,
-		.enable		= s3c64xx_sclk_ctrl,
-		.ctrlbit	= S3C_CLKCON_SCLK_SPI0_48,
-	}, {
-		.name		= "spi_48m",
-		.devname	= "s3c64xx-spi.1",
-		.parent		= &clk_48m,
-		.enable		= s3c64xx_sclk_ctrl,
-		.ctrlbit	= S3C_CLKCON_SCLK_SPI1_48,
-	}, {
 		.name		= "48m",
 		.devname	= "s3c-sdhci.0",
 		.parent		= &clk_48m,
@@ -625,26 +613,6 @@ static struct clksrc_clk clksrcs[] = {
 		.reg_div	= { .reg = S3C_CLK_DIV2, .shift = 16, .size = 4  },
 		.sources	= &clkset_uart,
 	}, {
-/* Where does UCLK0 come from? */
-		.clk	= {
-			.name		= "spi-bus",
-			.devname	= "s3c64xx-spi.0",
-			.ctrlbit        = S3C_CLKCON_SCLK_SPI0,
-			.enable		= s3c64xx_sclk_ctrl,
-		},
-		.reg_src	= { .reg = S3C_CLK_SRC, .shift = 14, .size = 2  },
-		.reg_div	= { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4  },
-		.sources	= &clkset_spi_mmc,
-	}, {
-		.clk	= {
-			.name		= "spi-bus",
-			.devname	= "s3c64xx-spi.1",
-			.enable		= s3c64xx_sclk_ctrl,
-		},
-		.reg_src	= { .reg = S3C_CLK_SRC, .shift = 16, .size = 2  },
-		.reg_div	= { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4  },
-		.sources	= &clkset_spi_mmc,
-	}, {
 		.clk	= {
 			.name		= "audio-bus",
 			.devname	= "samsung-i2s.0",
@@ -695,6 +663,60 @@ static struct clksrc_clk clksrcs[] = {
 	},
 };
 
+static struct clk clk_48m_spi0 = {
+	.name		= "spi_48m",
+	.parent		= &clk_48m,
+	.enable		= s3c64xx_sclk_ctrl,
+	.ctrlbit	= S3C_CLKCON_SCLK_SPI0_48,
+};
+
+static struct clk clk_48m_spi1 = {
+	.name		= "spi_48m",
+	.parent		= &clk_48m,
+	.enable		= s3c64xx_sclk_ctrl,
+	.ctrlbit	= S3C_CLKCON_SCLK_SPI1_48,
+};
+
+static struct clksrc_clk sclk_spi0 = {
+	.clk	 = {
+		.name		= "spi-bus",
+		.ctrlbit	= S3C_CLKCON_SCLK_SPI0,
+		.enable		= s3c64xx_sclk_ctrl,
+	},
+	.reg_src = { .reg = S3C_CLK_SRC, .shift = 14, .size = 2 },
+	.reg_div = { .reg = S3C_CLK_DIV2, .shift = 0, .size = 4 },
+	.sources = &clkset_spi_mmc,
+};
+
+static struct clksrc_clk sclk_spi1 = {
+	.clk	= {
+		.name		= "spi-bus",
+		.ctrlbit	= S3C_CLKCON_SCLK_SPI1,
+		.enable		= s3c64xx_sclk_ctrl,
+	},
+	.reg_src = { .reg = S3C_CLK_SRC, .shift = 16, .size = 2 },
+	.reg_div = { .reg = S3C_CLK_DIV2, .shift = 4, .size = 4 },
+	.sources = &clkset_spi_mmc,
+};
+
+static struct clk_lookup clk_lookup_table[] = {
+	CLK(NULL, "spi_busclk0", &clk_p),
+	CLK("s3c64xx-spi.0", "spi_busclk1", &sclk_spi0.clk),
+	CLK("s3c64xx-spi.0", "spi_busclk2", &clk_48m_spi0),
+	CLK("s3c64xx-spi.1", "spi_busclk1", &sclk_spi1.clk),
+	CLK("s3c64xx-spi.1", "spi_busclk2", &clk_48m_spi1),
+};
+
+static struct clksrc_clk *clksrc_cdev[] = {
+	&sclk_spi0,
+	&sclk_spi1,
+};
+
+static struct clk *clk_cdev[] = {
+	&clk_48m_spi0,
+	&clk_48m_spi1,
+};
+
 /* Clock initialisation code */
 
 static struct clksrc_clk *init_parents[] = {
@@ -810,11 +832,16 @@ static struct clk *clks[] __initdata = {
 void __init s3c64xx_register_clocks(unsigned long xtal, 
 				    unsigned armclk_divlimit)
 {
+	int ptr;
+
 	armclk_mask = armclk_divlimit;
 
 	s3c24xx_register_baseclocks(xtal);
 	s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
 
+	for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+		s3c_register_clksrc(clksrc_cdev[ptr], 1);
+
 	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
 	s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
@@ -822,5 +849,12 @@ void __init s3c64xx_register_clocks(unsigned long xtal,
 
 	s3c24xx_register_clocks(clks1, ARRAY_SIZE(clks1));
 	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+
+	s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
+	for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
+		s3c_disable_clocks(clk_cdev[ptr], 1);
+
 	s3c_pwmclk_init();
+
+	clkdev_add_table(clk_lookup_table, ARRAY_SIZE(clk_lookup_table));
 }
-- 
1.7.4.4

[PATCH 4/7] ARM: S5PC100: Add SPI clkdev support

[Padmavathi Venna]

Registered the SPI bus clocks with clkdev using generic
connection id.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
 arch/arm/mach-s5pc100/clock.c |  132 +++++++++++++++++++++++++----------------
 1 files changed, 81 insertions(+), 51 deletions(-)

diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index 8d47709..3a415d0 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -673,24 +673,6 @@ static struct clk init_clocks_off[] = {
 		.enable		= s5pc100_d1_5_ctrl,
 		.ctrlbit	= (1 << 8),
 	}, {
-		.name		= "spi_48m",
-		.devname	= "s3c64xx-spi.0",
-		.parent		= &clk_mout_48m.clk,
-		.enable		= s5pc100_sclk0_ctrl,
-		.ctrlbit	= (1 << 7),
-	}, {
-		.name		= "spi_48m",
-		.devname	= "s3c64xx-spi.1",
-		.parent		= &clk_mout_48m.clk,
-		.enable		= s5pc100_sclk0_ctrl,
-		.ctrlbit	= (1 << 8),
-	}, {
-		.name		= "spi_48m",
-		.devname	= "s3c64xx-spi.2",
-		.parent		= &clk_mout_48m.clk,
-		.enable		= s5pc100_sclk0_ctrl,
-		.ctrlbit	= (1 << 9),
-	}, {
 		.name		= "mmc_48m",
 		.devname	= "s3c-sdhci.0",
 		.parent		= &clk_mout_48m.clk,
@@ -929,39 +911,6 @@ static struct clksrc_clk clk_sclk_spdif = {
 static struct clksrc_clk clksrcs[] = {
 	{
 		.clk	= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.0",
-			.ctrlbit	= (1 << 4),
-			.enable		= s5pc100_sclk0_ctrl,
-
-		},
-		.sources = &clk_src_group1,
-		.reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 },
-		.reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.1",
-			.ctrlbit	= (1 << 5),
-			.enable		= s5pc100_sclk0_ctrl,
-
-		},
-		.sources = &clk_src_group1,
-		.reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 },
-		.reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.2",
-			.ctrlbit	= (1 << 6),
-			.enable		= s5pc100_sclk0_ctrl,
-
-		},
-		.sources = &clk_src_group1,
-		.reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 2 },
-		.reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 },
-	}, {
-		.clk	= {
 			.name		= "uclk1",
 			.ctrlbit	= (1 << 3),
 			.enable		= s5pc100_sclk0_ctrl,
@@ -1098,6 +1047,78 @@ static struct clksrc_clk clksrcs[] = {
 	},
 };
 
+static struct clk clk_48m_spi0 = {
+	.name		= "spi_48m",
+	.parent		= &clk_mout_48m.clk,
+	.enable		= s5pc100_sclk0_ctrl,
+	.ctrlbit	= (1 << 7),
+};
+
+static struct clk clk_48m_spi1 = {
+	.name		= "spi_48m",
+	.parent		= &clk_mout_48m.clk,
+	.enable		= s5pc100_sclk0_ctrl,
+	.ctrlbit	= (1 << 8),
+};
+
+static struct clk clk_48m_spi2 = {
+	.name		= "spi_48m",
+	.parent		= &clk_mout_48m.clk,
+	.enable		= s5pc100_sclk0_ctrl,
+	.ctrlbit	= (1 << 9),
+};
+
+static struct clksrc_clk sclk_spi0 = {
+	.clk	= {
+		.name		= "sclk_spi",
+		.ctrlbit	= (1 << 4),
+		.enable		= s5pc100_sclk0_ctrl,
+		},
+	.sources = &clk_src_group1,
+	.reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 },
+	.reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
+};
+
+static struct clksrc_clk sclk_spi1 = {
+	.clk	= {
+		.name		= "sclk_spi",
+		.ctrlbit	= (1 << 5),
+		.enable		= s5pc100_sclk0_ctrl,
+	},
+	.sources = &clk_src_group1,
+	.reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 },
+	.reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk sclk_spi2 = {
+	.clk	= {
+		.name		= "sclk_spi",
+		.ctrlbit	= (1 << 6),
+		.enable		= s5pc100_sclk0_ctrl,
+	},
+	.sources = &clk_src_group1,
+	.reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 2 },
+	.reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 },
+};
+
+static struct clk_lookup clk_lookup_table[] = {
+	CLK(NULL, "spi_busclk0", &clk_p),
+	CLK("s3c64xx-spi.0", "spi_busclk1", &clk_48m_spi0),
+	CLK("s3c64xx-spi.0", "spi_busclk2", &sclk_spi0.clk),
+	CLK("s3c64xx-spi.1", "spi_busclk1", &clk_48m_spi1),
+	CLK("s3c64xx-spi.1", "spi_busclk2", &sclk_spi1.clk),
+};
+
+static struct clksrc_clk *clksrc_cdev[] = {
+	&sclk_spi0,
+	&sclk_spi1,
+};
+
+static struct clk *clk_cdev[] = {
+	&clk_48m_spi0,
+	&clk_48m_spi1,
+};
+
 /* Clock initialisation code */
 static struct clksrc_clk *sysclks[] = {
 	&clk_mout_apll,
@@ -1276,12 +1297,21 @@ void __init s5pc100_register_clocks(void)
 		s3c_register_clksrc(sysclks[ptr], 1);
 
 	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+
+	for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+		s3c_register_clksrc(clksrc_cdev[ptr], 1);
+
 	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
 	s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
 	s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
 
+	s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
+	for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
+		s3c_disable_clocks(clk_cdev[ptr], 1);
+
 	s3c24xx_register_clock(&dummy_apb_pclk);
 
 	s3c_pwmclk_init();
+	clkdev_add_table(clk_lookup_table, ARRAY_SIZE(clk_lookup_table));
 }
-- 
1.7.4.4

[PATCH 4/7] ARM: S5PC100: Add SPI clkdev support

[Padmavathi Venna]

Registered the SPI bus clocks with clkdev using generic
connection id.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
 arch/arm/mach-s5pc100/clock.c |  132 +++++++++++++++++++++++++----------------
 1 files changed, 81 insertions(+), 51 deletions(-)

diff --git a/arch/arm/mach-s5pc100/clock.c b/arch/arm/mach-s5pc100/clock.c
index 8d47709..3a415d0 100644
--- a/arch/arm/mach-s5pc100/clock.c
+++ b/arch/arm/mach-s5pc100/clock.c
@@ -673,24 +673,6 @@ static struct clk init_clocks_off[] = {
 		.enable		= s5pc100_d1_5_ctrl,
 		.ctrlbit	= (1 << 8),
 	}, {
-		.name		= "spi_48m",
-		.devname	= "s3c64xx-spi.0",
-		.parent		= &clk_mout_48m.clk,
-		.enable		= s5pc100_sclk0_ctrl,
-		.ctrlbit	= (1 << 7),
-	}, {
-		.name		= "spi_48m",
-		.devname	= "s3c64xx-spi.1",
-		.parent		= &clk_mout_48m.clk,
-		.enable		= s5pc100_sclk0_ctrl,
-		.ctrlbit	= (1 << 8),
-	}, {
-		.name		= "spi_48m",
-		.devname	= "s3c64xx-spi.2",
-		.parent		= &clk_mout_48m.clk,
-		.enable		= s5pc100_sclk0_ctrl,
-		.ctrlbit	= (1 << 9),
-	}, {
 		.name		= "mmc_48m",
 		.devname	= "s3c-sdhci.0",
 		.parent		= &clk_mout_48m.clk,
@@ -929,39 +911,6 @@ static struct clksrc_clk clk_sclk_spdif = {
 static struct clksrc_clk clksrcs[] = {
 	{
 		.clk	= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.0",
-			.ctrlbit	= (1 << 4),
-			.enable		= s5pc100_sclk0_ctrl,
-
-		},
-		.sources = &clk_src_group1,
-		.reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 },
-		.reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.1",
-			.ctrlbit	= (1 << 5),
-			.enable		= s5pc100_sclk0_ctrl,
-
-		},
-		.sources = &clk_src_group1,
-		.reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 },
-		.reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.2",
-			.ctrlbit	= (1 << 6),
-			.enable		= s5pc100_sclk0_ctrl,
-
-		},
-		.sources = &clk_src_group1,
-		.reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 2 },
-		.reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 },
-	}, {
-		.clk	= {
 			.name		= "uclk1",
 			.ctrlbit	= (1 << 3),
 			.enable		= s5pc100_sclk0_ctrl,
@@ -1098,6 +1047,78 @@ static struct clksrc_clk clksrcs[] = {
 	},
 };
 
+static struct clk clk_48m_spi0 = {
+	.name		= "spi_48m",
+	.parent		= &clk_mout_48m.clk,
+	.enable		= s5pc100_sclk0_ctrl,
+	.ctrlbit	= (1 << 7),
+};
+
+static struct clk clk_48m_spi1 = {
+	.name		= "spi_48m",
+	.parent		= &clk_mout_48m.clk,
+	.enable		= s5pc100_sclk0_ctrl,
+	.ctrlbit	= (1 << 8),
+};
+
+static struct clk clk_48m_spi2 = {
+	.name		= "spi_48m",
+	.parent		= &clk_mout_48m.clk,
+	.enable		= s5pc100_sclk0_ctrl,
+	.ctrlbit	= (1 << 9),
+};
+
+static struct clksrc_clk sclk_spi0 = {
+	.clk	= {
+		.name		= "sclk_spi",
+		.ctrlbit	= (1 << 4),
+		.enable		= s5pc100_sclk0_ctrl,
+		},
+	.sources = &clk_src_group1,
+	.reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 },
+	.reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
+};
+
+static struct clksrc_clk sclk_spi1 = {
+	.clk	= {
+		.name		= "sclk_spi",
+		.ctrlbit	= (1 << 5),
+		.enable		= s5pc100_sclk0_ctrl,
+	},
+	.sources = &clk_src_group1,
+	.reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 },
+	.reg_div = { .reg = S5P_CLK_DIV2, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk sclk_spi2 = {
+	.clk	= {
+		.name		= "sclk_spi",
+		.ctrlbit	= (1 << 6),
+		.enable		= s5pc100_sclk0_ctrl,
+	},
+	.sources = &clk_src_group1,
+	.reg_src = { .reg = S5P_CLK_SRC1, .shift = 12, .size = 2 },
+	.reg_div = { .reg = S5P_CLK_DIV2, .shift = 12, .size = 4 },
+};
+
+static struct clk_lookup clk_lookup_table[] = {
+	CLK(NULL, "spi_busclk0", &clk_p),
+	CLK("s3c64xx-spi.0", "spi_busclk1", &clk_48m_spi0),
+	CLK("s3c64xx-spi.0", "spi_busclk2", &sclk_spi0.clk),
+	CLK("s3c64xx-spi.1", "spi_busclk1", &clk_48m_spi1),
+	CLK("s3c64xx-spi.1", "spi_busclk2", &sclk_spi1.clk),
+};
+
+static struct clksrc_clk *clksrc_cdev[] = {
+	&sclk_spi0,
+	&sclk_spi1,
+};
+
+static struct clk *clk_cdev[] = {
+	&clk_48m_spi0,
+	&clk_48m_spi1,
+};
+
 /* Clock initialisation code */
 static struct clksrc_clk *sysclks[] = {
 	&clk_mout_apll,
@@ -1276,12 +1297,21 @@ void __init s5pc100_register_clocks(void)
 		s3c_register_clksrc(sysclks[ptr], 1);
 
 	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+
+	for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+		s3c_register_clksrc(clksrc_cdev[ptr], 1);
+
 	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
 	s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
 	s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
 
+	s3c24xx_register_clocks(clk_cdev, ARRAY_SIZE(clk_cdev));
+	for (ptr = 0; ptr < ARRAY_SIZE(clk_cdev); ptr++)
+		s3c_disable_clocks(clk_cdev[ptr], 1);
+
 	s3c24xx_register_clock(&dummy_apb_pclk);
 
 	s3c_pwmclk_init();
+	clkdev_add_table(clk_lookup_table, ARRAY_SIZE(clk_lookup_table));
 }
-- 
1.7.4.4

[PATCH 5/7] ARM: S5P64X0: Add SPI clkdev support

[Padmavathi Venna]

Registered the SPI bus clocks with clkdev using generic
connection id.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
 arch/arm/mach-s5p64x0/clock-s5p6440.c |   57 +++++++++++++++++++++-----------
 arch/arm/mach-s5p64x0/clock-s5p6450.c |   57 +++++++++++++++++++++-----------
 2 files changed, 74 insertions(+), 40 deletions(-)

diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index c54c65d..618df0d 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -430,26 +430,6 @@ static struct clksrc_clk clksrcs[] = {
 		.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
 	}, {
 		.clk	= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.0",
-			.ctrlbit	= (1 << 20),
-			.enable		= s5p64x0_sclk_ctrl,
-		},
-		.sources = &clkset_group1,
-		.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.1",
-			.ctrlbit	= (1 << 21),
-			.enable		= s5p64x0_sclk_ctrl,
-		},
-		.sources = &clkset_group1,
-		.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
-	}, {
-		.clk	= {
 			.name		= "sclk_post",
 			.ctrlbit	= (1 << 10),
 			.enable		= s5p64x0_sclk_ctrl,
@@ -487,6 +467,39 @@ static struct clksrc_clk clksrcs[] = {
 	},
 };
 
+static struct clksrc_clk sclk_spi0 = {
+	.clk	= {
+		.name		= "sclk_spi",
+		.ctrlbit	= (1 << 20),
+		.enable		= s5p64x0_sclk_ctrl,
+		},
+	.sources = &clkset_group1,
+	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
+	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk sclk_spi1 = {
+	.clk	= {
+		.name		= "sclk_spi",
+		.ctrlbit	= (1 << 21),
+		.enable		= s5p64x0_sclk_ctrl,
+	},
+	.sources = &clkset_group1,
+	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
+	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
+};
+
+static struct clk_lookup clk_lookup_table[] = {
+	CLK(NULL, "spi_busclk0", &clk_p),
+	CLK("s3c64xx-spi.0", "spi_busclk1", &sclk_spi0.clk),
+	CLK("s3c64xx-spi.1", "spi_busclk1", &sclk_spi1.clk),
+};
+
+static struct clksrc_clk *clksrc_cdev[] = {
+	&sclk_spi0,
+	&sclk_spi1,
+};
+
 /* Clock initialization code */
 static struct clksrc_clk *sysclks[] = {
 	&clk_mout_apll,
@@ -581,6 +594,9 @@ void __init s5p6440_register_clocks(void)
 	for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
 		s3c_register_clksrc(sysclks[ptr], 1);
 
+	for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+		s3c_register_clksrc(clksrc_cdev[ptr], 1);
+
 	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
 	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
@@ -590,4 +606,5 @@ void __init s5p6440_register_clocks(void)
 	s3c24xx_register_clock(&dummy_apb_pclk);
 
 	s3c_pwmclk_init();
+	clkdev_add_table(clk_lookup_table, ARRAY_SIZE(clk_lookup_table));
 }
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index 2d04abf..b6ba929 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -452,26 +452,6 @@ static struct clksrc_clk clksrcs[] = {
 		.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
 	}, {
 		.clk	= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.0",
-			.ctrlbit	= (1 << 20),
-			.enable		= s5p64x0_sclk_ctrl,
-		},
-		.sources = &clkset_group2,
-		.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.1",
-			.ctrlbit	= (1 << 21),
-			.enable		= s5p64x0_sclk_ctrl,
-		},
-		.sources = &clkset_group2,
-		.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
-	}, {
-		.clk	= {
 			.name		= "sclk_fimc",
 			.ctrlbit	= (1 << 10),
 			.enable		= s5p64x0_sclk_ctrl,
@@ -536,6 +516,39 @@ static struct clksrc_clk clksrcs[] = {
 	},
 };
 
+static struct clksrc_clk sclk_spi0 = {
+	.clk	= {
+		.name		= "sclk_spi",
+		.ctrlbit	= (1 << 20),
+		.enable		= s5p64x0_sclk_ctrl,
+	},
+	.sources = &clkset_group2,
+	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
+	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk sclk_spi1 = {
+	.clk	= {
+		.name		= "sclk_spi",
+		.ctrlbit	= (1 << 21),
+		.enable		= s5p64x0_sclk_ctrl,
+	},
+	.sources = &clkset_group2,
+	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
+	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
+};
+
+static struct clk_lookup clk_lookup_table[] = {
+	CLK(NULL, "spi_busclk0", &clk_p),
+	CLK("s3c64xx-spi.0", "spi_busclk1", &sclk_spi0.clk),
+	CLK("s3c64xx-spi.1", "spi_busclk1", &sclk_spi1.clk),
+};
+
+static struct clksrc_clk *clksrc_cdev[] = {
+	&sclk_spi0,
+	&sclk_spi1,
+};
+
 /* Clock initialization code */
 static struct clksrc_clk *sysclks[] = {
 	&clk_mout_apll,
@@ -632,6 +645,9 @@ void __init s5p6450_register_clocks(void)
 	for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
 		s3c_register_clksrc(sysclks[ptr], 1);
 
+	for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+		s3c_register_clksrc(clksrc_cdev[ptr], 1);
+
 	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
 	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
@@ -641,4 +657,5 @@ void __init s5p6450_register_clocks(void)
 	s3c24xx_register_clock(&dummy_apb_pclk);
 
 	s3c_pwmclk_init();
+	clkdev_add_table(clk_lookup_table, ARRAY_SIZE(clk_lookup_table));
 }
-- 
1.7.4.4

[PATCH 5/7] ARM: S5P64X0: Add SPI clkdev support

[Padmavathi Venna]

Registered the SPI bus clocks with clkdev using generic
connection id.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
 arch/arm/mach-s5p64x0/clock-s5p6440.c |   57 +++++++++++++++++++++-----------
 arch/arm/mach-s5p64x0/clock-s5p6450.c |   57 +++++++++++++++++++++-----------
 2 files changed, 74 insertions(+), 40 deletions(-)

diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
index c54c65d..618df0d 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6440.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -430,26 +430,6 @@ static struct clksrc_clk clksrcs[] = {
 		.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
 	}, {
 		.clk	= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.0",
-			.ctrlbit	= (1 << 20),
-			.enable		= s5p64x0_sclk_ctrl,
-		},
-		.sources = &clkset_group1,
-		.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.1",
-			.ctrlbit	= (1 << 21),
-			.enable		= s5p64x0_sclk_ctrl,
-		},
-		.sources = &clkset_group1,
-		.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
-	}, {
-		.clk	= {
 			.name		= "sclk_post",
 			.ctrlbit	= (1 << 10),
 			.enable		= s5p64x0_sclk_ctrl,
@@ -487,6 +467,39 @@ static struct clksrc_clk clksrcs[] = {
 	},
 };
 
+static struct clksrc_clk sclk_spi0 = {
+	.clk	= {
+		.name		= "sclk_spi",
+		.ctrlbit	= (1 << 20),
+		.enable		= s5p64x0_sclk_ctrl,
+		},
+	.sources = &clkset_group1,
+	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
+	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk sclk_spi1 = {
+	.clk	= {
+		.name		= "sclk_spi",
+		.ctrlbit	= (1 << 21),
+		.enable		= s5p64x0_sclk_ctrl,
+	},
+	.sources = &clkset_group1,
+	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
+	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
+};
+
+static struct clk_lookup clk_lookup_table[] = {
+	CLK(NULL, "spi_busclk0", &clk_p),
+	CLK("s3c64xx-spi.0", "spi_busclk1", &sclk_spi0.clk),
+	CLK("s3c64xx-spi.1", "spi_busclk1", &sclk_spi1.clk),
+};
+
+static struct clksrc_clk *clksrc_cdev[] = {
+	&sclk_spi0,
+	&sclk_spi1,
+};
+
 /* Clock initialization code */
 static struct clksrc_clk *sysclks[] = {
 	&clk_mout_apll,
@@ -581,6 +594,9 @@ void __init s5p6440_register_clocks(void)
 	for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
 		s3c_register_clksrc(sysclks[ptr], 1);
 
+	for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+		s3c_register_clksrc(clksrc_cdev[ptr], 1);
+
 	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
 	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
@@ -590,4 +606,5 @@ void __init s5p6440_register_clocks(void)
 	s3c24xx_register_clock(&dummy_apb_pclk);
 
 	s3c_pwmclk_init();
+	clkdev_add_table(clk_lookup_table, ARRAY_SIZE(clk_lookup_table));
 }
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
index 2d04abf..b6ba929 100644
--- a/arch/arm/mach-s5p64x0/clock-s5p6450.c
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -452,26 +452,6 @@ static struct clksrc_clk clksrcs[] = {
 		.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
 	}, {
 		.clk	= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.0",
-			.ctrlbit	= (1 << 20),
-			.enable		= s5p64x0_sclk_ctrl,
-		},
-		.sources = &clkset_group2,
-		.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
-	}, {
-		.clk	= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.1",
-			.ctrlbit	= (1 << 21),
-			.enable		= s5p64x0_sclk_ctrl,
-		},
-		.sources = &clkset_group2,
-		.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
-		.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
-	}, {
-		.clk	= {
 			.name		= "sclk_fimc",
 			.ctrlbit	= (1 << 10),
 			.enable		= s5p64x0_sclk_ctrl,
@@ -536,6 +516,39 @@ static struct clksrc_clk clksrcs[] = {
 	},
 };
 
+static struct clksrc_clk sclk_spi0 = {
+	.clk	= {
+		.name		= "sclk_spi",
+		.ctrlbit	= (1 << 20),
+		.enable		= s5p64x0_sclk_ctrl,
+	},
+	.sources = &clkset_group2,
+	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
+	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk sclk_spi1 = {
+	.clk	= {
+		.name		= "sclk_spi",
+		.ctrlbit	= (1 << 21),
+		.enable		= s5p64x0_sclk_ctrl,
+	},
+	.sources = &clkset_group2,
+	.reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
+	.reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
+};
+
+static struct clk_lookup clk_lookup_table[] = {
+	CLK(NULL, "spi_busclk0", &clk_p),
+	CLK("s3c64xx-spi.0", "spi_busclk1", &sclk_spi0.clk),
+	CLK("s3c64xx-spi.1", "spi_busclk1", &sclk_spi1.clk),
+};
+
+static struct clksrc_clk *clksrc_cdev[] = {
+	&sclk_spi0,
+	&sclk_spi1,
+};
+
 /* Clock initialization code */
 static struct clksrc_clk *sysclks[] = {
 	&clk_mout_apll,
@@ -632,6 +645,9 @@ void __init s5p6450_register_clocks(void)
 	for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
 		s3c_register_clksrc(sysclks[ptr], 1);
 
+	for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+		s3c_register_clksrc(clksrc_cdev[ptr], 1);
+
 	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
 	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
@@ -641,4 +657,5 @@ void __init s5p6450_register_clocks(void)
 	s3c24xx_register_clock(&dummy_apb_pclk);
 
 	s3c_pwmclk_init();
+	clkdev_add_table(clk_lookup_table, ARRAY_SIZE(clk_lookup_table));
 }
-- 
1.7.4.4

[PATCH 6/7] ARM: S5PV210: Add SPI clkdev support

[Padmavathi Venna]

Registered the SPI bus clocks with clkdev using generic
connection id.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
 arch/arm/mach-s5pv210/clock.c |   58 ++++++++++++++++++++++++++--------------
 1 files changed, 38 insertions(+), 20 deletions(-)

diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index ad553ee..00fe252 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -985,26 +985,6 @@ static struct clksrc_clk clksrcs[] = {
 		.reg_div = { .reg = S5P_CLK_DIV1, .shift = 28, .size = 4 },
 	}, {
 		.clk		= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.0",
-			.enable		= s5pv210_clk_mask0_ctrl,
-			.ctrlbit	= (1 << 16),
-		},
-		.sources = &clkset_group2,
-		.reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 },
-		.reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 },
-	}, {
-		.clk		= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.1",
-			.enable		= s5pv210_clk_mask0_ctrl,
-			.ctrlbit	= (1 << 17),
-		},
-		.sources = &clkset_group2,
-		.reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 },
-		.reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 },
-	}, {
-		.clk		= {
 			.name		= "sclk_pwi",
 			.enable		= s5pv210_clk_mask0_ctrl,
 			.ctrlbit	= (1 << 29),
@@ -1024,6 +1004,39 @@ static struct clksrc_clk clksrcs[] = {
 	},
 };
 
+static struct clksrc_clk sclk_spi0 = {
+	.clk		= {
+		.name		= "sclk_spi",
+		.enable		= s5pv210_clk_mask0_ctrl,
+		.ctrlbit	= (1 << 16),
+	},
+	.sources = &clkset_group2,
+	.reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 },
+	.reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk sclk_spi1 = {
+	.clk		= {
+		.name		= "sclk_spi",
+		.enable		= s5pv210_clk_mask0_ctrl,
+		.ctrlbit	= (1 << 17),
+	},
+	.sources = &clkset_group2,
+	.reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 },
+	.reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 },
+};
+
+static struct clk_lookup clk_lookup_table[] = {
+	CLK(NULL, "spi_busclk0", &clk_p),
+	CLK("s3c64xx-spi.0", "spi_busclk1", &sclk_spi0.clk),
+	CLK("s3c64xx-spi.1", "spi_busclk1", &sclk_spi1.clk),
+};
+
+static struct clksrc_clk *clksrc_cdev[] = {
+	&sclk_spi0,
+	&sclk_spi1,
+};
+
 /* Clock initialisation code */
 static struct clksrc_clk *sysclks[] = {
 	&clk_mout_apll,
@@ -1275,6 +1288,9 @@ void __init s5pv210_register_clocks(void)
 	for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++)
 		s3c_register_clksrc(sclk_tv[ptr], 1);
 
+	for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+		s3c_register_clksrc(clksrc_cdev[ptr], 1);
+
 	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
 	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
@@ -1283,4 +1299,6 @@ void __init s5pv210_register_clocks(void)
 
 	s3c24xx_register_clock(&dummy_apb_pclk);
 	s3c_pwmclk_init();
+
+	clkdev_add_table(clk_lookup_table, ARRAY_SIZE(clk_lookup_table));
 }
-- 
1.7.4.4

[PATCH 6/7] ARM: S5PV210: Add SPI clkdev support

[Padmavathi Venna]

Registered the SPI bus clocks with clkdev using generic
connection id.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
 arch/arm/mach-s5pv210/clock.c |   58 ++++++++++++++++++++++++++--------------
 1 files changed, 38 insertions(+), 20 deletions(-)

diff --git a/arch/arm/mach-s5pv210/clock.c b/arch/arm/mach-s5pv210/clock.c
index ad553ee..00fe252 100644
--- a/arch/arm/mach-s5pv210/clock.c
+++ b/arch/arm/mach-s5pv210/clock.c
@@ -985,26 +985,6 @@ static struct clksrc_clk clksrcs[] = {
 		.reg_div = { .reg = S5P_CLK_DIV1, .shift = 28, .size = 4 },
 	}, {
 		.clk		= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.0",
-			.enable		= s5pv210_clk_mask0_ctrl,
-			.ctrlbit	= (1 << 16),
-		},
-		.sources = &clkset_group2,
-		.reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 },
-		.reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 },
-	}, {
-		.clk		= {
-			.name		= "sclk_spi",
-			.devname	= "s3c64xx-spi.1",
-			.enable		= s5pv210_clk_mask0_ctrl,
-			.ctrlbit	= (1 << 17),
-		},
-		.sources = &clkset_group2,
-		.reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 },
-		.reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 },
-	}, {
-		.clk		= {
 			.name		= "sclk_pwi",
 			.enable		= s5pv210_clk_mask0_ctrl,
 			.ctrlbit	= (1 << 29),
@@ -1024,6 +1004,39 @@ static struct clksrc_clk clksrcs[] = {
 	},
 };
 
+static struct clksrc_clk sclk_spi0 = {
+	.clk		= {
+		.name		= "sclk_spi",
+		.enable		= s5pv210_clk_mask0_ctrl,
+		.ctrlbit	= (1 << 16),
+	},
+	.sources = &clkset_group2,
+	.reg_src = { .reg = S5P_CLK_SRC5, .shift = 0, .size = 4 },
+	.reg_div = { .reg = S5P_CLK_DIV5, .shift = 0, .size = 4 },
+};
+
+static struct clksrc_clk sclk_spi1 = {
+	.clk		= {
+		.name		= "sclk_spi",
+		.enable		= s5pv210_clk_mask0_ctrl,
+		.ctrlbit	= (1 << 17),
+	},
+	.sources = &clkset_group2,
+	.reg_src = { .reg = S5P_CLK_SRC5, .shift = 4, .size = 4 },
+	.reg_div = { .reg = S5P_CLK_DIV5, .shift = 4, .size = 4 },
+};
+
+static struct clk_lookup clk_lookup_table[] = {
+	CLK(NULL, "spi_busclk0", &clk_p),
+	CLK("s3c64xx-spi.0", "spi_busclk1", &sclk_spi0.clk),
+	CLK("s3c64xx-spi.1", "spi_busclk1", &sclk_spi1.clk),
+};
+
+static struct clksrc_clk *clksrc_cdev[] = {
+	&sclk_spi0,
+	&sclk_spi1,
+};
+
 /* Clock initialisation code */
 static struct clksrc_clk *sysclks[] = {
 	&clk_mout_apll,
@@ -1275,6 +1288,9 @@ void __init s5pv210_register_clocks(void)
 	for (ptr = 0; ptr < ARRAY_SIZE(sclk_tv); ptr++)
 		s3c_register_clksrc(sclk_tv[ptr], 1);
 
+	for (ptr = 0; ptr < ARRAY_SIZE(clksrc_cdev); ptr++)
+		s3c_register_clksrc(clksrc_cdev[ptr], 1);
+
 	s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
 	s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
 
@@ -1283,4 +1299,6 @@ void __init s5pv210_register_clocks(void)
 
 	s3c24xx_register_clock(&dummy_apb_pclk);
 	s3c_pwmclk_init();
+
+	clkdev_add_table(clk_lookup_table, ARRAY_SIZE(clk_lookup_table));
 }
-- 
1.7.4.4

[PATCH 7/7] ARM: SAMSUNG: Remove SPI bus clocks from platform data

[Padmavathi Venna]

SPI bus clocks can be avoided passing through platform
data as spi driver is getting the bus clock using the
generic clock connection id registered via clkdev.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
 arch/arm/mach-s3c64xx/dev-spi.c                  |    7 -------
 arch/arm/mach-s5p64x0/dev-spi.c                  |    6 ------
 arch/arm/mach-s5pc100/dev-spi.c                  |    7 -------
 arch/arm/mach-s5pv210/dev-spi.c                  |    6 ------
 arch/arm/plat-samsung/include/plat/s3c64xx-spi.h |    2 --
 5 files changed, 0 insertions(+), 28 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
index 5e6b420..86fb130 100644
--- a/arch/arm/mach-s3c64xx/dev-spi.c
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -23,12 +23,6 @@
 #include <plat/gpio-cfg.h>
 #include <plat/devs.h>
 
-static char *spi_src_clks[] = {
-	[S3C64XX_SPI_SRCCLK_PCLK] = "pclk",
-	[S3C64XX_SPI_SRCCLK_SPIBUS] = "spi-bus",
-	[S3C64XX_SPI_SRCCLK_48M] = "spi_48m",
-};
-
 /* SPI Controller platform_devices */
 
 /* Since we emulate multi-cs capability, we do not touch the GPC-3,7.
@@ -175,5 +169,4 @@ void __init s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
 
 	pd->num_cs = num_cs;
 	pd->src_clk_nr = src_clk_nr;
-	pd->src_clk_name = spi_src_clks[src_clk_nr];
 }
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c
index ac825e8..0604494 100644
--- a/arch/arm/mach-s5p64x0/dev-spi.c
+++ b/arch/arm/mach-s5p64x0/dev-spi.c
@@ -24,11 +24,6 @@
 #include <plat/s3c64xx-spi.h>
 #include <plat/gpio-cfg.h>
 
-static char *s5p64x0_spi_src_clks[] = {
-	[S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
-	[S5P64X0_SPI_SRCCLK_SCLK] = "sclk_spi",
-};
-
 /* SPI Controller platform_devices */
 
 /* Since we emulate multi-cs capability, we do not touch the CS.
@@ -222,5 +217,4 @@ void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
 
 	pd->num_cs = num_cs;
 	pd->src_clk_nr = src_clk_nr;
-	pd->src_clk_name = s5p64x0_spi_src_clks[src_clk_nr];
 }
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c
index e5d6c4d..155f50d 100644
--- a/arch/arm/mach-s5pc100/dev-spi.c
+++ b/arch/arm/mach-s5pc100/dev-spi.c
@@ -21,12 +21,6 @@
 #include <plat/gpio-cfg.h>
 #include <plat/irqs.h>
 
-static char *spi_src_clks[] = {
-	[S5PC100_SPI_SRCCLK_PCLK] = "pclk",
-	[S5PC100_SPI_SRCCLK_48M] = "spi_48m",
-	[S5PC100_SPI_SRCCLK_SPIBUS] = "spi_bus",
-};
-
 /* SPI Controller platform_devices */
 
 /* Since we emulate multi-cs capability, we do not touch the CS.
@@ -223,5 +217,4 @@ void __init s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
 
 	pd->num_cs = num_cs;
 	pd->src_clk_nr = src_clk_nr;
-	pd->src_clk_name = spi_src_clks[src_clk_nr];
 }
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c
index eaf9a7b..39bef19 100644
--- a/arch/arm/mach-s5pv210/dev-spi.c
+++ b/arch/arm/mach-s5pv210/dev-spi.c
@@ -20,11 +20,6 @@
 #include <plat/s3c64xx-spi.h>
 #include <plat/gpio-cfg.h>
 
-static char *spi_src_clks[] = {
-	[S5PV210_SPI_SRCCLK_PCLK] = "pclk",
-	[S5PV210_SPI_SRCCLK_SCLK] = "sclk_spi",
-};
-
 /* SPI Controller platform_devices */
 
 /* Since we emulate multi-cs capability, we do not touch the CS.
@@ -171,5 +166,4 @@ void __init s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
 
 	pd->num_cs = num_cs;
 	pd->src_clk_nr = src_clk_nr;
-	pd->src_clk_name = spi_src_clks[src_clk_nr];
 }
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
index 4c16fa3..c3d82a5 100644
--- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -31,7 +31,6 @@ struct s3c64xx_spi_csinfo {
 /**
  * struct s3c64xx_spi_info - SPI Controller defining structure
  * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field.
- * @src_clk_name: Platform name of the corresponding clock.
  * @clk_from_cmu: If the SPI clock/prescalar control block is present
  *     by the platform's clock-management-unit and not in SPI controller.
  * @num_cs: Number of CS this controller emulates.
@@ -43,7 +42,6 @@ struct s3c64xx_spi_csinfo {
  */
 struct s3c64xx_spi_info {
 	int src_clk_nr;
-	char *src_clk_name;
 	bool clk_from_cmu;
 
 	int num_cs;
-- 
1.7.4.4

[PATCH 7/7] ARM: SAMSUNG: Remove SPI bus clocks from platform data

[Padmavathi Venna]

SPI bus clocks can be avoided passing through platform
data as spi driver is getting the bus clock using the
generic clock connection id registered via clkdev.

Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
---
 arch/arm/mach-s3c64xx/dev-spi.c                  |    7 -------
 arch/arm/mach-s5p64x0/dev-spi.c                  |    6 ------
 arch/arm/mach-s5pc100/dev-spi.c                  |    7 -------
 arch/arm/mach-s5pv210/dev-spi.c                  |    6 ------
 arch/arm/plat-samsung/include/plat/s3c64xx-spi.h |    2 --
 5 files changed, 0 insertions(+), 28 deletions(-)

diff --git a/arch/arm/mach-s3c64xx/dev-spi.c b/arch/arm/mach-s3c64xx/dev-spi.c
index 5e6b420..86fb130 100644
--- a/arch/arm/mach-s3c64xx/dev-spi.c
+++ b/arch/arm/mach-s3c64xx/dev-spi.c
@@ -23,12 +23,6 @@
 #include <plat/gpio-cfg.h>
 #include <plat/devs.h>
 
-static char *spi_src_clks[] = {
-	[S3C64XX_SPI_SRCCLK_PCLK] = "pclk",
-	[S3C64XX_SPI_SRCCLK_SPIBUS] = "spi-bus",
-	[S3C64XX_SPI_SRCCLK_48M] = "spi_48m",
-};
-
 /* SPI Controller platform_devices */
 
 /* Since we emulate multi-cs capability, we do not touch the GPC-3,7.
@@ -175,5 +169,4 @@ void __init s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
 
 	pd->num_cs = num_cs;
 	pd->src_clk_nr = src_clk_nr;
-	pd->src_clk_name = spi_src_clks[src_clk_nr];
 }
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c
index ac825e8..0604494 100644
--- a/arch/arm/mach-s5p64x0/dev-spi.c
+++ b/arch/arm/mach-s5p64x0/dev-spi.c
@@ -24,11 +24,6 @@
 #include <plat/s3c64xx-spi.h>
 #include <plat/gpio-cfg.h>
 
-static char *s5p64x0_spi_src_clks[] = {
-	[S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
-	[S5P64X0_SPI_SRCCLK_SCLK] = "sclk_spi",
-};
-
 /* SPI Controller platform_devices */
 
 /* Since we emulate multi-cs capability, we do not touch the CS.
@@ -222,5 +217,4 @@ void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
 
 	pd->num_cs = num_cs;
 	pd->src_clk_nr = src_clk_nr;
-	pd->src_clk_name = s5p64x0_spi_src_clks[src_clk_nr];
 }
diff --git a/arch/arm/mach-s5pc100/dev-spi.c b/arch/arm/mach-s5pc100/dev-spi.c
index e5d6c4d..155f50d 100644
--- a/arch/arm/mach-s5pc100/dev-spi.c
+++ b/arch/arm/mach-s5pc100/dev-spi.c
@@ -21,12 +21,6 @@
 #include <plat/gpio-cfg.h>
 #include <plat/irqs.h>
 
-static char *spi_src_clks[] = {
-	[S5PC100_SPI_SRCCLK_PCLK] = "pclk",
-	[S5PC100_SPI_SRCCLK_48M] = "spi_48m",
-	[S5PC100_SPI_SRCCLK_SPIBUS] = "spi_bus",
-};
-
 /* SPI Controller platform_devices */
 
 /* Since we emulate multi-cs capability, we do not touch the CS.
@@ -223,5 +217,4 @@ void __init s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
 
 	pd->num_cs = num_cs;
 	pd->src_clk_nr = src_clk_nr;
-	pd->src_clk_name = spi_src_clks[src_clk_nr];
 }
diff --git a/arch/arm/mach-s5pv210/dev-spi.c b/arch/arm/mach-s5pv210/dev-spi.c
index eaf9a7b..39bef19 100644
--- a/arch/arm/mach-s5pv210/dev-spi.c
+++ b/arch/arm/mach-s5pv210/dev-spi.c
@@ -20,11 +20,6 @@
 #include <plat/s3c64xx-spi.h>
 #include <plat/gpio-cfg.h>
 
-static char *spi_src_clks[] = {
-	[S5PV210_SPI_SRCCLK_PCLK] = "pclk",
-	[S5PV210_SPI_SRCCLK_SCLK] = "sclk_spi",
-};
-
 /* SPI Controller platform_devices */
 
 /* Since we emulate multi-cs capability, we do not touch the CS.
@@ -171,5 +166,4 @@ void __init s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
 
 	pd->num_cs = num_cs;
 	pd->src_clk_nr = src_clk_nr;
-	pd->src_clk_name = spi_src_clks[src_clk_nr];
 }
diff --git a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
index 4c16fa3..c3d82a5 100644
--- a/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
+++ b/arch/arm/plat-samsung/include/plat/s3c64xx-spi.h
@@ -31,7 +31,6 @@ struct s3c64xx_spi_csinfo {
 /**
  * struct s3c64xx_spi_info - SPI Controller defining structure
  * @src_clk_nr: Clock source index for the CLK_CFG[SPI_CLKSEL] field.
- * @src_clk_name: Platform name of the corresponding clock.
  * @clk_from_cmu: If the SPI clock/prescalar control block is present
  *     by the platform's clock-management-unit and not in SPI controller.
  * @num_cs: Number of CS this controller emulates.
@@ -43,7 +42,6 @@ struct s3c64xx_spi_csinfo {
  */
 struct s3c64xx_spi_info {
 	int src_clk_nr;
-	char *src_clk_name;
 	bool clk_from_cmu;
 
 	int num_cs;
-- 
1.7.4.4

Re: [PATCH 2/7] ARM: SAMSUNG: Add CLK Macro for clkdev support

[Russell King - ARM Linux]

On Fri, Sep 23, 2011 at 05:23:42PM +0530, Padmavathi Venna wrote:
> diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
> index 73c66d4..c864825 100644
> --- a/arch/arm/plat-samsung/include/plat/clock.h
> +++ b/arch/arm/plat-samsung/include/plat/clock.h
> @@ -17,6 +17,13 @@
>  
>  struct clk;
>  
> +#define CLK(dev, con, ck)	\
> +	{			\
> +		.dev_id = dev,	\
> +		.con_id = con,	\
> +		.clk = ck,	\
> +	}
> +

How about a patch series which moves this to include/linux/clkdev.h,
preferably called CLKDEV_INIT() ?

There's versions of this already in:
arch/arm/mach-ux500/clock.h
arch/arm/mach-tegra/tegra2_clocks.c
arch/arm/mach-nomadik/clock.c
arch/arm/mach-davinci/clock.h

so let's have it standardized instead of everyone inventing their own.

(Remember, that's what we're supposed to already being looking out for
since Linus' whinge about how ARM stuff tends to grow out of control...)

[PATCH 2/7] ARM: SAMSUNG: Add CLK Macro for clkdev support

[Russell King - ARM Linux]

On Fri, Sep 23, 2011 at 05:23:42PM +0530, Padmavathi Venna wrote:
> diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
> index 73c66d4..c864825 100644
> --- a/arch/arm/plat-samsung/include/plat/clock.h
> +++ b/arch/arm/plat-samsung/include/plat/clock.h
> @@ -17,6 +17,13 @@
>  
>  struct clk;
>  
> +#define CLK(dev, con, ck)	\
> +	{			\
> +		.dev_id = dev,	\
> +		.con_id = con,	\
> +		.clk = ck,	\
> +	}
> +

How about a patch series which moves this to include/linux/clkdev.h,
preferably called CLKDEV_INIT() ?

There's versions of this already in:
arch/arm/mach-ux500/clock.h
arch/arm/mach-tegra/tegra2_clocks.c
arch/arm/mach-nomadik/clock.c
arch/arm/mach-davinci/clock.h

so let's have it standardized instead of everyone inventing their own.

(Remember, that's what we're supposed to already being looking out for
since Linus' whinge about how ARM stuff tends to grow out of control...)

Re: [PATCH 1/7] SPI: S3C64XX: Use bus clocks created using clkdev

[Grant Likely]

On Fri, Sep 23, 2011 at 05:23:41PM +0530, Padmavathi Venna wrote:
> This patch modifies the driver to stop depending on the
> clock names being passed from platform and switch over
> to lookup clocks generic names using clkdev
> 
> Signed-off-by: Padmavathi Venna <padma.v@samsung.com>

Looks okay to me.

Acked-by: Grant Likely <grant.likely@secretlab.ca>

This series I imagine should go in via the arm-soc tree.

g.

> ---
>  drivers/spi/spi-s3c64xx.c |   14 +++++---------
>  1 files changed, 5 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
> index 019a716..dcf7e10 100644
> --- a/drivers/spi/spi-s3c64xx.c
> +++ b/drivers/spi/spi-s3c64xx.c
> @@ -971,6 +971,7 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
>  	struct s3c64xx_spi_info *sci;
>  	struct spi_master *master;
>  	int ret;
> +	char clk_name[16];
>  
>  	if (pdev->id < 0) {
>  		dev_err(&pdev->dev,
> @@ -984,11 +985,6 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
>  	}
>  
>  	sci = pdev->dev.platform_data;
> -	if (!sci->src_clk_name) {
> -		dev_err(&pdev->dev,
> -			"Board init must call s3c64xx_spi_set_info()\n");
> -		return -EINVAL;
> -	}
>  
>  	/* Check for availability of necessary resource */
>  
> @@ -1073,17 +1069,17 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
>  		goto err4;
>  	}
>  
> -	sdd->src_clk = clk_get(&pdev->dev, sci->src_clk_name);
> +	sprintf(clk_name, "spi_busclk%d", sci->src_clk_nr);
> +	sdd->src_clk = clk_get(&pdev->dev, clk_name);
>  	if (IS_ERR(sdd->src_clk)) {
>  		dev_err(&pdev->dev,
> -			"Unable to acquire clock '%s'\n", sci->src_clk_name);
> +			"Unable to acquire clock '%s'\n", clk_name);
>  		ret = PTR_ERR(sdd->src_clk);
>  		goto err5;
>  	}
>  
>  	if (clk_enable(sdd->src_clk)) {
> -		dev_err(&pdev->dev, "Couldn't enable clock '%s'\n",
> -							sci->src_clk_name);
> +		dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name);
>  		ret = -EBUSY;
>  		goto err6;
>  	}
> -- 
> 1.7.4.4
> 

[PATCH 1/7] SPI: S3C64XX: Use bus clocks created using clkdev

[Grant Likely]

On Fri, Sep 23, 2011 at 05:23:41PM +0530, Padmavathi Venna wrote:
> This patch modifies the driver to stop depending on the
> clock names being passed from platform and switch over
> to lookup clocks generic names using clkdev
> 
> Signed-off-by: Padmavathi Venna <padma.v@samsung.com>

Looks okay to me.

Acked-by: Grant Likely <grant.likely@secretlab.ca>

This series I imagine should go in via the arm-soc tree.

g.

> ---
>  drivers/spi/spi-s3c64xx.c |   14 +++++---------
>  1 files changed, 5 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
> index 019a716..dcf7e10 100644
> --- a/drivers/spi/spi-s3c64xx.c
> +++ b/drivers/spi/spi-s3c64xx.c
> @@ -971,6 +971,7 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
>  	struct s3c64xx_spi_info *sci;
>  	struct spi_master *master;
>  	int ret;
> +	char clk_name[16];
>  
>  	if (pdev->id < 0) {
>  		dev_err(&pdev->dev,
> @@ -984,11 +985,6 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
>  	}
>  
>  	sci = pdev->dev.platform_data;
> -	if (!sci->src_clk_name) {
> -		dev_err(&pdev->dev,
> -			"Board init must call s3c64xx_spi_set_info()\n");
> -		return -EINVAL;
> -	}
>  
>  	/* Check for availability of necessary resource */
>  
> @@ -1073,17 +1069,17 @@ static int __init s3c64xx_spi_probe(struct platform_device *pdev)
>  		goto err4;
>  	}
>  
> -	sdd->src_clk = clk_get(&pdev->dev, sci->src_clk_name);
> +	sprintf(clk_name, "spi_busclk%d", sci->src_clk_nr);
> +	sdd->src_clk = clk_get(&pdev->dev, clk_name);
>  	if (IS_ERR(sdd->src_clk)) {
>  		dev_err(&pdev->dev,
> -			"Unable to acquire clock '%s'\n", sci->src_clk_name);
> +			"Unable to acquire clock '%s'\n", clk_name);
>  		ret = PTR_ERR(sdd->src_clk);
>  		goto err5;
>  	}
>  
>  	if (clk_enable(sdd->src_clk)) {
> -		dev_err(&pdev->dev, "Couldn't enable clock '%s'\n",
> -							sci->src_clk_name);
> +		dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", clk_name);
>  		ret = -EBUSY;
>  		goto err6;
>  	}
> -- 
> 1.7.4.4
> 

RE: [PATCH 1/7] SPI: S3C64XX: Use bus clocks created using clkdev

[Kukjin Kim]

Grant Likely wrote:
> 
> On Fri, Sep 23, 2011 at 05:23:41PM +0530, Padmavathi Venna wrote:
> > This patch modifies the driver to stop depending on the
> > clock names being passed from platform and switch over
> > to lookup clocks generic names using clkdev
> >
> > Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
> 
> Looks okay to me.
> 
> Acked-by: Grant Likely <grant.likely@secretlab.ca>
> 
> This series I imagine should go in via the arm-soc tree.
> 
OK, if others ok to me, I will pick up this series so that it will be sent
to upstream via arm-soc.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
> 
> > ---
> >  drivers/spi/spi-s3c64xx.c |   14 +++++---------
> >  1 files changed, 5 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
> > index 019a716..dcf7e10 100644
> > --- a/drivers/spi/spi-s3c64xx.c
> > +++ b/drivers/spi/spi-s3c64xx.c
> > @@ -971,6 +971,7 @@ static int __init s3c64xx_spi_probe(struct
> platform_device *pdev)
> >  	struct s3c64xx_spi_info *sci;
> >  	struct spi_master *master;
> >  	int ret;
> > +	char clk_name[16];
> >
> >  	if (pdev->id < 0) {
> >  		dev_err(&pdev->dev,
> > @@ -984,11 +985,6 @@ static int __init s3c64xx_spi_probe(struct
> platform_device *pdev)
> >  	}
> >
> >  	sci = pdev->dev.platform_data;
> > -	if (!sci->src_clk_name) {
> > -		dev_err(&pdev->dev,
> > -			"Board init must call s3c64xx_spi_set_info()\n");
> > -		return -EINVAL;
> > -	}
> >
> >  	/* Check for availability of necessary resource */
> >
> > @@ -1073,17 +1069,17 @@ static int __init s3c64xx_spi_probe(struct
> platform_device *pdev)
> >  		goto err4;
> >  	}
> >
> > -	sdd->src_clk = clk_get(&pdev->dev, sci->src_clk_name);
> > +	sprintf(clk_name, "spi_busclk%d", sci->src_clk_nr);
> > +	sdd->src_clk = clk_get(&pdev->dev, clk_name);
> >  	if (IS_ERR(sdd->src_clk)) {
> >  		dev_err(&pdev->dev,
> > -			"Unable to acquire clock '%s'\n",
sci->src_clk_name);
> > +			"Unable to acquire clock '%s'\n", clk_name);
> >  		ret = PTR_ERR(sdd->src_clk);
> >  		goto err5;
> >  	}
> >
> >  	if (clk_enable(sdd->src_clk)) {
> > -		dev_err(&pdev->dev, "Couldn't enable clock '%s'\n",
> > -							sci->src_clk_name);
> > +		dev_err(&pdev->dev, "Couldn't enable clock '%s'\n",
clk_name);
> >  		ret = -EBUSY;
> >  		goto err6;
> >  	}
> > --
> > 1.7.4.4
> >

[PATCH 1/7] SPI: S3C64XX: Use bus clocks created using clkdev

[Kukjin Kim]

Grant Likely wrote:
> 
> On Fri, Sep 23, 2011 at 05:23:41PM +0530, Padmavathi Venna wrote:
> > This patch modifies the driver to stop depending on the
> > clock names being passed from platform and switch over
> > to lookup clocks generic names using clkdev
> >
> > Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
> 
> Looks okay to me.
> 
> Acked-by: Grant Likely <grant.likely@secretlab.ca>
> 
> This series I imagine should go in via the arm-soc tree.
> 
OK, if others ok to me, I will pick up this series so that it will be sent
to upstream via arm-soc.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
> 
> > ---
> >  drivers/spi/spi-s3c64xx.c |   14 +++++---------
> >  1 files changed, 5 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
> > index 019a716..dcf7e10 100644
> > --- a/drivers/spi/spi-s3c64xx.c
> > +++ b/drivers/spi/spi-s3c64xx.c
> > @@ -971,6 +971,7 @@ static int __init s3c64xx_spi_probe(struct
> platform_device *pdev)
> >  	struct s3c64xx_spi_info *sci;
> >  	struct spi_master *master;
> >  	int ret;
> > +	char clk_name[16];
> >
> >  	if (pdev->id < 0) {
> >  		dev_err(&pdev->dev,
> > @@ -984,11 +985,6 @@ static int __init s3c64xx_spi_probe(struct
> platform_device *pdev)
> >  	}
> >
> >  	sci = pdev->dev.platform_data;
> > -	if (!sci->src_clk_name) {
> > -		dev_err(&pdev->dev,
> > -			"Board init must call s3c64xx_spi_set_info()\n");
> > -		return -EINVAL;
> > -	}
> >
> >  	/* Check for availability of necessary resource */
> >
> > @@ -1073,17 +1069,17 @@ static int __init s3c64xx_spi_probe(struct
> platform_device *pdev)
> >  		goto err4;
> >  	}
> >
> > -	sdd->src_clk = clk_get(&pdev->dev, sci->src_clk_name);
> > +	sprintf(clk_name, "spi_busclk%d", sci->src_clk_nr);
> > +	sdd->src_clk = clk_get(&pdev->dev, clk_name);
> >  	if (IS_ERR(sdd->src_clk)) {
> >  		dev_err(&pdev->dev,
> > -			"Unable to acquire clock '%s'\n",
sci->src_clk_name);
> > +			"Unable to acquire clock '%s'\n", clk_name);
> >  		ret = PTR_ERR(sdd->src_clk);
> >  		goto err5;
> >  	}
> >
> >  	if (clk_enable(sdd->src_clk)) {
> > -		dev_err(&pdev->dev, "Couldn't enable clock '%s'\n",
> > -							sci->src_clk_name);
> > +		dev_err(&pdev->dev, "Couldn't enable clock '%s'\n",
clk_name);
> >  		ret = -EBUSY;
> >  		goto err6;
> >  	}
> > --
> > 1.7.4.4
> >

Re: [PATCH 2/7] ARM: SAMSUNG: Add CLK Macro for clkdev support

[padma venkat]

Hi Russell,

On Sat, Sep 24, 2011 at 1:56 AM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
>
> On Fri, Sep 23, 2011 at 05:23:42PM +0530, Padmavathi Venna wrote:
> > diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
> > index 73c66d4..c864825 100644
> > --- a/arch/arm/plat-samsung/include/plat/clock.h
> > +++ b/arch/arm/plat-samsung/include/plat/clock.h
> > @@ -17,6 +17,13 @@
> >
> >  struct clk;
> >
> > +#define CLK(dev, con, ck)    \
> > +     {                       \
> > +             .dev_id = dev,  \
> > +             .con_id = con,  \
> > +             .clk = ck,      \
> > +     }
> > +
>
> How about a patch series which moves this to include/linux/clkdev.h,
> preferably called CLKDEV_INIT() ?
>
   Thanks for the review. I am currently working on preparing the patch series
   as per your suggestion.

> There's versions of this already in:
> arch/arm/mach-ux500/clock.h
> arch/arm/mach-tegra/tegra2_clocks.c
> arch/arm/mach-nomadik/clock.c
> arch/arm/mach-davinci/clock.h
>
> so let's have it standardized instead of everyone inventing their own.
>
> (Remember, that's what we're supposed to already being looking out for
> since Linus' whinge about how ARM stuff tends to grow out of control...)
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

Best Regards
Padma

[PATCH 2/7] ARM: SAMSUNG: Add CLK Macro for clkdev support

[padma venkat]

Hi Russell,

On Sat, Sep 24, 2011 at 1:56 AM, Russell King - ARM Linux
<linux@arm.linux.org.uk> wrote:
>
> On Fri, Sep 23, 2011 at 05:23:42PM +0530, Padmavathi Venna wrote:
> > diff --git a/arch/arm/plat-samsung/include/plat/clock.h b/arch/arm/plat-samsung/include/plat/clock.h
> > index 73c66d4..c864825 100644
> > --- a/arch/arm/plat-samsung/include/plat/clock.h
> > +++ b/arch/arm/plat-samsung/include/plat/clock.h
> > @@ -17,6 +17,13 @@
> >
> > ?struct clk;
> >
> > +#define CLK(dev, con, ck) ? ?\
> > + ? ? { ? ? ? ? ? ? ? ? ? ? ? \
> > + ? ? ? ? ? ? .dev_id = dev, ?\
> > + ? ? ? ? ? ? .con_id = con, ?\
> > + ? ? ? ? ? ? .clk = ck, ? ? ?\
> > + ? ? }
> > +
>
> How about a patch series which moves this to include/linux/clkdev.h,
> preferably called CLKDEV_INIT() ?
>
   Thanks for the review. I am currently working on preparing the patch series
   as per your suggestion.

> There's versions of this already in:
> arch/arm/mach-ux500/clock.h
> arch/arm/mach-tegra/tegra2_clocks.c
> arch/arm/mach-nomadik/clock.c
> arch/arm/mach-davinci/clock.h
>
> so let's have it standardized instead of everyone inventing their own.
>
> (Remember, that's what we're supposed to already being looking out for
> since Linus' whinge about how ARM stuff tends to grow out of control...)
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at ?http://vger.kernel.org/majordomo-info.html

Best Regards
Padma

Re: [PATCH 1/7] SPI: S3C64XX: Use bus clocks created using clkdev

[padma venkat]

Hi All,

On Tue, Sep 27, 2011 at 4:52 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
>
> Grant Likely wrote:
> >
> > On Fri, Sep 23, 2011 at 05:23:41PM +0530, Padmavathi Venna wrote:
> > > This patch modifies the driver to stop depending on the
> > > clock names being passed from platform and switch over
> > > to lookup clocks generic names using clkdev
> > >
> > > Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
> >
> > Looks okay to me.
> >
> > Acked-by: Grant Likely <grant.likely@secretlab.ca>
> >
> > This series I imagine should go in via the arm-soc tree.
> >
> OK, if others ok to me, I will pick up this series so that it will be sent
> to upstream via arm-soc.

Ping.
Any update on this.

Thanks
Padma
>
> Thanks.
>
> Best regards,
> Kgene.
> --
> Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
> SW Solution Development Team, Samsung Electronics Co., Ltd.
> >
> > > ---
> > >  drivers/spi/spi-s3c64xx.c |   14 +++++---------
> > >  1 files changed, 5 insertions(+), 9 deletions(-)
> > >
> > > diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
> > > index 019a716..dcf7e10 100644
> > > --- a/drivers/spi/spi-s3c64xx.c
> > > +++ b/drivers/spi/spi-s3c64xx.c
> > > @@ -971,6 +971,7 @@ static int __init s3c64xx_spi_probe(struct
> > platform_device *pdev)
> > >     struct s3c64xx_spi_info *sci;
> > >     struct spi_master *master;
> > >     int ret;
> > > +   char clk_name[16];
> > >
> > >     if (pdev->id < 0) {
> > >             dev_err(&pdev->dev,
> > > @@ -984,11 +985,6 @@ static int __init s3c64xx_spi_probe(struct
> > platform_device *pdev)
> > >     }
> > >
> > >     sci = pdev->dev.platform_data;
> > > -   if (!sci->src_clk_name) {
> > > -           dev_err(&pdev->dev,
> > > -                   "Board init must call s3c64xx_spi_set_info()\n");
> > > -           return -EINVAL;
> > > -   }
> > >
> > >     /* Check for availability of necessary resource */
> > >
> > > @@ -1073,17 +1069,17 @@ static int __init s3c64xx_spi_probe(struct
> > platform_device *pdev)
> > >             goto err4;
> > >     }
> > >
> > > -   sdd->src_clk = clk_get(&pdev->dev, sci->src_clk_name);
> > > +   sprintf(clk_name, "spi_busclk%d", sci->src_clk_nr);
> > > +   sdd->src_clk = clk_get(&pdev->dev, clk_name);
> > >     if (IS_ERR(sdd->src_clk)) {
> > >             dev_err(&pdev->dev,
> > > -                   "Unable to acquire clock '%s'\n",
> sci->src_clk_name);
> > > +                   "Unable to acquire clock '%s'\n", clk_name);
> > >             ret = PTR_ERR(sdd->src_clk);
> > >             goto err5;
> > >     }
> > >
> > >     if (clk_enable(sdd->src_clk)) {
> > > -           dev_err(&pdev->dev, "Couldn't enable clock '%s'\n",
> > > -                                                   sci->src_clk_name);
> > > +           dev_err(&pdev->dev, "Couldn't enable clock '%s'\n",
> clk_name);
> > >             ret = -EBUSY;
> > >             goto err6;
> > >     }
> > > --
> > > 1.7.4.4
> > >
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

[PATCH 1/7] SPI: S3C64XX: Use bus clocks created using clkdev

[padma venkat]

Hi All,

On Tue, Sep 27, 2011 at 4:52 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
>
> Grant Likely wrote:
> >
> > On Fri, Sep 23, 2011 at 05:23:41PM +0530, Padmavathi Venna wrote:
> > > This patch modifies the driver to stop depending on the
> > > clock names being passed from platform and switch over
> > > to lookup clocks generic names using clkdev
> > >
> > > Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
> >
> > Looks okay to me.
> >
> > Acked-by: Grant Likely <grant.likely@secretlab.ca>
> >
> > This series I imagine should go in via the arm-soc tree.
> >
> OK, if others ok to me, I will pick up this series so that it will be sent
> to upstream via arm-soc.

Ping.
Any update on this.

Thanks
Padma
>
> Thanks.
>
> Best regards,
> Kgene.
> --
> Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
> SW Solution Development Team, Samsung Electronics Co., Ltd.
> >
> > > ---
> > > ?drivers/spi/spi-s3c64xx.c | ? 14 +++++---------
> > > ?1 files changed, 5 insertions(+), 9 deletions(-)
> > >
> > > diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c
> > > index 019a716..dcf7e10 100644
> > > --- a/drivers/spi/spi-s3c64xx.c
> > > +++ b/drivers/spi/spi-s3c64xx.c
> > > @@ -971,6 +971,7 @@ static int __init s3c64xx_spi_probe(struct
> > platform_device *pdev)
> > > ? ? struct s3c64xx_spi_info *sci;
> > > ? ? struct spi_master *master;
> > > ? ? int ret;
> > > + ? char clk_name[16];
> > >
> > > ? ? if (pdev->id < 0) {
> > > ? ? ? ? ? ? dev_err(&pdev->dev,
> > > @@ -984,11 +985,6 @@ static int __init s3c64xx_spi_probe(struct
> > platform_device *pdev)
> > > ? ? }
> > >
> > > ? ? sci = pdev->dev.platform_data;
> > > - ? if (!sci->src_clk_name) {
> > > - ? ? ? ? ? dev_err(&pdev->dev,
> > > - ? ? ? ? ? ? ? ? ? "Board init must call s3c64xx_spi_set_info()\n");
> > > - ? ? ? ? ? return -EINVAL;
> > > - ? }
> > >
> > > ? ? /* Check for availability of necessary resource */
> > >
> > > @@ -1073,17 +1069,17 @@ static int __init s3c64xx_spi_probe(struct
> > platform_device *pdev)
> > > ? ? ? ? ? ? goto err4;
> > > ? ? }
> > >
> > > - ? sdd->src_clk = clk_get(&pdev->dev, sci->src_clk_name);
> > > + ? sprintf(clk_name, "spi_busclk%d", sci->src_clk_nr);
> > > + ? sdd->src_clk = clk_get(&pdev->dev, clk_name);
> > > ? ? if (IS_ERR(sdd->src_clk)) {
> > > ? ? ? ? ? ? dev_err(&pdev->dev,
> > > - ? ? ? ? ? ? ? ? ? "Unable to acquire clock '%s'\n",
> sci->src_clk_name);
> > > + ? ? ? ? ? ? ? ? ? "Unable to acquire clock '%s'\n", clk_name);
> > > ? ? ? ? ? ? ret = PTR_ERR(sdd->src_clk);
> > > ? ? ? ? ? ? goto err5;
> > > ? ? }
> > >
> > > ? ? if (clk_enable(sdd->src_clk)) {
> > > - ? ? ? ? ? dev_err(&pdev->dev, "Couldn't enable clock '%s'\n",
> > > - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? sci->src_clk_name);
> > > + ? ? ? ? ? dev_err(&pdev->dev, "Couldn't enable clock '%s'\n",
> clk_name);
> > > ? ? ? ? ? ? ret = -EBUSY;
> > > ? ? ? ? ? ? goto err6;
> > > ? ? }
> > > --
> > > 1.7.4.4
> > >
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at ?http://vger.kernel.org/majordomo-info.html

RE: [PATCH 1/7] SPI: S3C64XX: Use bus clocks created using clkdev

[Kukjin Kim]

padma venkat wrote:
> 
> Hi All,
> 
> On Tue, Sep 27, 2011 at 4:52 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> >
> > Grant Likely wrote:
> > >
> > > On Fri, Sep 23, 2011 at 05:23:41PM +0530, Padmavathi Venna wrote:
> > > > This patch modifies the driver to stop depending on the
> > > > clock names being passed from platform and switch over
> > > > to lookup clocks generic names using clkdev
> > > >
> > > > Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
> > >
> > > Looks okay to me.
> > >
> > > Acked-by: Grant Likely <grant.likely@secretlab.ca>
> > >
> > > This series I imagine should go in via the arm-soc tree.
> > >
> > OK, if others ok to me, I will pick up this series so that it will be
sent
> > to upstream via arm-soc.
> 
> Ping.
> Any update on this.
> 

As I said, you need to re-submit others now. Then I will pick this up with
others.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH 1/7] SPI: S3C64XX: Use bus clocks created using clkdev

[Kukjin Kim]

padma venkat wrote:
> 
> Hi All,
> 
> On Tue, Sep 27, 2011 at 4:52 AM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> >
> > Grant Likely wrote:
> > >
> > > On Fri, Sep 23, 2011 at 05:23:41PM +0530, Padmavathi Venna wrote:
> > > > This patch modifies the driver to stop depending on the
> > > > clock names being passed from platform and switch over
> > > > to lookup clocks generic names using clkdev
> > > >
> > > > Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
> > >
> > > Looks okay to me.
> > >
> > > Acked-by: Grant Likely <grant.likely@secretlab.ca>
> > >
> > > This series I imagine should go in via the arm-soc tree.
> > >
> > OK, if others ok to me, I will pick up this series so that it will be
sent
> > to upstream via arm-soc.
> 
> Ping.
> Any update on this.
> 

As I said, you need to re-submit others now. Then I will pick this up with
others.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.