* [PATCH 00/13] ARM: S5P64X0: Add new S5P6450 Support
@ 2010-09-01 7:09 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel, linux-samsung-soc; +Cc: ben-linux
This patches add basic support for Samsung S5P6450 SoC.
Basically this patch moves mach-s5p6440 (ARCH_S5P6440) to mach-s5p64x0
(ARCH_S5P64X0) to support Samsung's new S5P6450 SoC. The ARCH_S5P64X0
can support S5P6440 and S5P6450 with one kernel image. It is tested on
SMDK6440(S5P6440) and SMDK6450(S5P6450) with s5p64x0_defconfig. And
this patch changes s5p6440_defconfig to s5p64x0_defconfig for S5P64X0.
[PATCH 01/13] ARM: S5P: Moves initial map for merging S5P64X0
[PATCH 02/13] ARM: S5P64X0: Update Kconfig and Makefile
[PATCH 03/13] ARM: S5P64X0: Add S5P64X0(S5P6440 and S5P6450) initialization support
[PATCH 04/13] ARM: S5P64X0: Update Clock for S5P6440 and S5P6450
[PATCH 05/13] ARM: S5P64X0: Update IRQ support
[PATCH 06/13] ARM: S5P64X0: Update Timer support
[PATCH 07/13] ARM: S5P64X0: Update Audio support
[PATCH 08/13] ARM: S5P64X0: Move DMA support for S5P64X0
[PATCH 09/13] ARM: S5P64X0: Add S5P6450 I2C support
[PATCH 10/13] ARM: S5P64X0: Move GPIO support files for merge S5P64X0
[PATCH 11/13] ARM: S5P64X0: Move SMDK6440 board file and Add SMDK6450 board file
[PATCH 12/13] ARM: S5P64X0: Add UART serial support for S5P6450
[PATCH 13/13] ARM: s5p64x0_defconfig: Update for support S5P6440 and S5P6450
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH 00/13] ARM: S5P64X0: Add new S5P6450 Support
@ 2010-09-01 7:09 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel
This patches add basic support for Samsung S5P6450 SoC.
Basically this patch moves mach-s5p6440 (ARCH_S5P6440) to mach-s5p64x0
(ARCH_S5P64X0) to support Samsung's new S5P6450 SoC. The ARCH_S5P64X0
can support S5P6440 and S5P6450 with one kernel image. It is tested on
SMDK6440(S5P6440) and SMDK6450(S5P6450) with s5p64x0_defconfig. And
this patch changes s5p6440_defconfig to s5p64x0_defconfig for S5P64X0.
[PATCH 01/13] ARM: S5P: Moves initial map for merging S5P64X0
[PATCH 02/13] ARM: S5P64X0: Update Kconfig and Makefile
[PATCH 03/13] ARM: S5P64X0: Add S5P64X0(S5P6440 and S5P6450) initialization support
[PATCH 04/13] ARM: S5P64X0: Update Clock for S5P6440 and S5P6450
[PATCH 05/13] ARM: S5P64X0: Update IRQ support
[PATCH 06/13] ARM: S5P64X0: Update Timer support
[PATCH 07/13] ARM: S5P64X0: Update Audio support
[PATCH 08/13] ARM: S5P64X0: Move DMA support for S5P64X0
[PATCH 09/13] ARM: S5P64X0: Add S5P6450 I2C support
[PATCH 10/13] ARM: S5P64X0: Move GPIO support files for merge S5P64X0
[PATCH 11/13] ARM: S5P64X0: Move SMDK6440 board file and Add SMDK6450 board file
[PATCH 12/13] ARM: S5P64X0: Add UART serial support for S5P6450
[PATCH 13/13] ARM: s5p64x0_defconfig: Update for support S5P6440 and S5P6450
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH 01/13] ARM: S5P: Moves initial map for merging S5P64X0
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 7:09 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel, linux-samsung-soc; +Cc: ben-linux, Kukjin Kim
This patch moves some initial maps from plat-s5p to machine,
so that can merge mach-s5p6440 and mach-s5p6450.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/mach-s5p6440/cpu.c | 37 ++++++++++++++++++++++++++---
arch/arm/mach-s5p6440/include/mach/map.h | 7 +-----
arch/arm/mach-s5p6442/cpu.c | 27 +++++++++++++++++++--
arch/arm/mach-s5p6442/include/mach/map.h | 6 -----
arch/arm/mach-s5pc100/cpu.c | 25 +++++++++++++++++++-
arch/arm/mach-s5pc100/include/mach/map.h | 11 +++-----
arch/arm/mach-s5pv210/cpu.c | 22 +++++++++++++++++-
arch/arm/mach-s5pv210/include/mach/map.h | 8 ------
arch/arm/mach-s5pv310/cpu.c | 26 ++++++++++++++------
arch/arm/plat-s5p/cpu.c | 22 -----------------
10 files changed, 125 insertions(+), 66 deletions(-)
diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c
index 526f33a..a3c33d9 100644
--- a/arch/arm/mach-s5p6440/cpu.c
+++ b/arch/arm/mach-s5p6440/cpu.c
@@ -1,7 +1,7 @@
/* linux/arch/arm/mach-s5p6440/cpu.c
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -39,6 +39,32 @@
#include <plat/s5p6440.h>
#include <plat/adc-core.h>
+/* Initial IO mappings */
+
+static struct map_desc s5p6440_iodesc[] __initdata = {
+ {
+ .virtual = (unsigned long)S5P_VA_GPIO,
+ .pfn = __phys_to_pfn(S5P6440_PA_GPIO),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC0,
+ .pfn = __phys_to_pfn(S5P6440_PA_VIC0),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC1,
+ .pfn = __phys_to_pfn(S5P6440_PA_VIC1),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)S3C_VA_UART,
+ .pfn = __phys_to_pfn(S3C_PA_UART),
+ .length = SZ_512K,
+ .type = MT_DEVICE,
+ }
+};
+
static void s5p6440_idle(void)
{
unsigned long val;
@@ -54,15 +80,18 @@ static void s5p6440_idle(void)
local_irq_enable();
}
-/* s5p6440_map_io
+/*
+ * s5p6440_map_io
*
* register the standard cpu IO areas
-*/
+ */
void __init s5p6440_map_io(void)
{
/* initialize any device information early */
s3c_adc_setname("s3c64xx-adc");
+
+ iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
}
void __init s5p6440_init_clocks(int xtal)
diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h
index 6cc5cbc..11d31fe 100644
--- a/arch/arm/mach-s5p6440/include/mach/map.h
+++ b/arch/arm/mach-s5p6440/include/mach/map.h
@@ -24,23 +24,18 @@
#define S5P_PA_SYSCON S5P6440_PA_SYSCON
#define S5P6440_PA_GPIO (0xE0308000)
-#define S5P_PA_GPIO S5P6440_PA_GPIO
#define S5P6440_PA_VIC0 (0xE4000000)
-#define S5P_PA_VIC0 S5P6440_PA_VIC0
+#define S5P6440_PA_VIC1 (0xE4100000)
#define S5P6440_PA_PDMA 0xE9000000
-#define S5P6440_PA_VIC1 (0xE4100000)
-#define S5P_PA_VIC1 S5P6440_PA_VIC1
-
#define S5P6440_PA_TIMER (0xEA000000)
#define S5P_PA_TIMER S5P6440_PA_TIMER
#define S5P6440_PA_RTC (0xEA100000)
#define S5P6440_PA_WDT (0xEA200000)
-#define S5P_PA_WDT S5P6440_PA_WDT
#define S5P6440_PA_UART (0xEC000000)
diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c
index a48fb55..d3ab268 100644
--- a/arch/arm/mach-s5p6442/cpu.c
+++ b/arch/arm/mach-s5p6442/cpu.c
@@ -1,7 +1,7 @@
/* linux/arch/arm/mach-s5p6442/cpu.c
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -47,10 +47,30 @@ static struct map_desc s5p6442_iodesc[] __initdata = {
.length = SZ_16K,
.type = MT_DEVICE,
}, {
+ .virtual = (unsigned long)S5P_VA_GPIO,
+ .pfn = __phys_to_pfn(S5P6442_PA_GPIO),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC0,
+ .pfn = __phys_to_pfn(S5P6442_PA_VIC0),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC1,
+ .pfn = __phys_to_pfn(S5P6442_PA_VIC1),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
.virtual = (unsigned long)VA_VIC2,
.pfn = __phys_to_pfn(S5P6442_PA_VIC2),
.length = SZ_16K,
.type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)S3C_VA_UART,
+ .pfn = __phys_to_pfn(S3C_PA_UART),
+ .length = SZ_512K,
+ .type = MT_DEVICE,
}
};
@@ -62,10 +82,11 @@ static void s5p6442_idle(void)
local_irq_enable();
}
-/* s5p6442_map_io
+/*
+ * s5p6442_map_io
*
* register the standard cpu IO areas
-*/
+ */
void __init s5p6442_map_io(void)
{
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
index 281d256..31fb2e6 100644
--- a/arch/arm/mach-s5p6442/include/mach/map.h
+++ b/arch/arm/mach-s5p6442/include/mach/map.h
@@ -23,16 +23,10 @@
#define S5P_PA_SYSCON S5P6442_PA_SYSCON
#define S5P6442_PA_GPIO (0xE0200000)
-#define S5P_PA_GPIO S5P6442_PA_GPIO
#define S5P6442_PA_VIC0 (0xE4000000)
-#define S5P_PA_VIC0 S5P6442_PA_VIC0
-
#define S5P6442_PA_VIC1 (0xE4100000)
-#define S5P_PA_VIC1 S5P6442_PA_VIC1
-
#define S5P6442_PA_VIC2 (0xE4200000)
-#define S5P_PA_VIC2 S5P6442_PA_VIC2
#define S5P6442_PA_MDMA 0xE8000000
#define S5P6442_PA_PDMA 0xE9000000
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/cpu.c
index 251c92a..d13552c 100644
--- a/arch/arm/mach-s5pc100/cpu.c
+++ b/arch/arm/mach-s5pc100/cpu.c
@@ -1,5 +1,8 @@
/* linux/arch/arm/mach-s5pc100/cpu.c
*
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
* Copyright 2009 Samsung Electronics Co.
* Byungho Min <bhmin@samsung.com>
*
@@ -56,11 +59,31 @@ static struct map_desc s5pc100_iodesc[] __initdata = {
.length = SZ_16K,
.type = MT_DEVICE,
}, {
+ .virtual = (unsigned long)S5P_VA_GPIO,
+ .pfn = __phys_to_pfn(S5PC100_PA_GPIO),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC0,
+ .pfn = __phys_to_pfn(S5PC100_PA_VIC0),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC1,
+ .pfn = __phys_to_pfn(S5PC100_PA_VIC1),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
.virtual = (unsigned long)VA_VIC2,
- .pfn = __phys_to_pfn(S5P_PA_VIC2),
+ .pfn = __phys_to_pfn(S5PC100_PA_VIC2),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
+ .virtual = (unsigned long)S3C_VA_UART,
+ .pfn = __phys_to_pfn(S3C_PA_UART),
+ .length = SZ_512K,
+ .type = MT_DEVICE,
+ }, {
.virtual = (unsigned long)S5PC100_VA_OTHERS,
.pfn = __phys_to_pfn(S5PC100_PA_OTHERS),
.length = SZ_4K,
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
index 01b9134..8751ef4 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -44,19 +44,16 @@
#define S5PC100_PA_OTHERS (0xE0200000)
#define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000)
-#define S5P_PA_GPIO (0xE0300000)
+#define S5PC100_PA_GPIO (0xE0300000)
#define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000)
/* Interrupt */
-#define S5PC100_PA_VIC (0xE4000000)
+#define S5PC100_PA_VIC0 (0xE4000000)
+#define S5PC100_PA_VIC1 (0xE4100000)
+#define S5PC100_PA_VIC2 (0xE4200000)
#define S5PC100_VA_VIC S3C_VA_IRQ
-#define S5PC100_PA_VIC_OFFSET 0x100000
#define S5PC100_VA_VIC_OFFSET 0x10000
-#define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET))
#define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET))
-#define S5P_PA_VIC0 S5PC1XX_PA_VIC(0)
-#define S5P_PA_VIC1 S5PC1XX_PA_VIC(1)
-#define S5P_PA_VIC2 S5PC1XX_PA_VIC(2)
#define S5PC100_PA_ONENAND (0xE7100000)
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
index b9f4d67..00f9ca1 100644
--- a/arch/arm/mach-s5pv210/cpu.c
+++ b/arch/arm/mach-s5pv210/cpu.c
@@ -1,7 +1,7 @@
/* linux/arch/arm/mach-s5pv210/cpu.c
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -50,6 +50,21 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
.length = SZ_1M,
.type = MT_DEVICE,
}, {
+ .virtual = (unsigned long)S5P_VA_GPIO,
+ .pfn = __phys_to_pfn(S5PV210_PA_GPIO),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC0,
+ .pfn = __phys_to_pfn(S5PV210_PA_VIC0),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC1,
+ .pfn = __phys_to_pfn(S5PV210_PA_VIC1),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
.virtual = (unsigned long)VA_VIC2,
.pfn = __phys_to_pfn(S5PV210_PA_VIC2),
.length = SZ_16K,
@@ -60,6 +75,11 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
.length = SZ_16K,
.type = MT_DEVICE,
}, {
+ .virtual = (unsigned long)S3C_VA_UART,
+ .pfn = __phys_to_pfn(S3C_PA_UART),
+ .length = SZ_512K,
+ .type = MT_DEVICE,
+ }, {
.virtual = (unsigned long)S5P_VA_SROMC,
.pfn = __phys_to_pfn(S5PV210_PA_SROMC),
.length = SZ_4K,
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index dd4fb6b..cc50541 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -26,7 +26,6 @@
#define S5P_PA_SYSCON S5PV210_PA_SYSCON
#define S5PV210_PA_GPIO (0xE0200000)
-#define S5P_PA_GPIO S5PV210_PA_GPIO
/* SPI */
#define S5PV210_PA_SPI0 0xE1300000
@@ -72,16 +71,9 @@
#define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000))
#define S5PV210_PA_VIC0 (0xF2000000)
-#define S5P_PA_VIC0 S5PV210_PA_VIC0
-
#define S5PV210_PA_VIC1 (0xF2100000)
-#define S5P_PA_VIC1 S5PV210_PA_VIC1
-
#define S5PV210_PA_VIC2 (0xF2200000)
-#define S5P_PA_VIC2 S5PV210_PA_VIC2
-
#define S5PV210_PA_VIC3 (0xF2300000)
-#define S5P_PA_VIC3 S5PV210_PA_VIC3
#define S5PV210_PA_SDRAM (0x20000000)
#define S5P_PA_SDRAM S5PV210_PA_SDRAM
diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c
index e5b261a..3b9c872 100644
--- a/arch/arm/mach-s5pv310/cpu.c
+++ b/arch/arm/mach-s5pv310/cpu.c
@@ -31,9 +31,14 @@ extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
/* Initial IO mappings */
static struct map_desc s5pv310_iodesc[] __initdata = {
{
- .virtual = (unsigned long)S5P_VA_COREPERI_BASE,
- .pfn = __phys_to_pfn(S5PV310_PA_COREPERI),
- .length = SZ_8K,
+ .virtual = (unsigned long)S5P_VA_SYSRAM,
+ .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)S5P_VA_CMU,
+ .pfn = __phys_to_pfn(S5PV310_PA_CMU),
+ .length = SZ_128K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_COMBINER_BASE,
@@ -41,19 +46,24 @@ static struct map_desc s5pv310_iodesc[] __initdata = {
.length = SZ_4K,
.type = MT_DEVICE,
}, {
+ .virtual = (unsigned long)S5P_VA_COREPERI_BASE,
+ .pfn = __phys_to_pfn(S5PV310_PA_COREPERI),
+ .length = SZ_8K,
+ .type = MT_DEVICE,
+ }, {
.virtual = (unsigned long)S5P_VA_L2CC,
.pfn = __phys_to_pfn(S5PV310_PA_L2CC),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
- .virtual = (unsigned long)S5P_VA_SYSRAM,
- .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM),
+ .virtual = (unsigned long)S5P_VA_GPIO,
+ .pfn = __phys_to_pfn(S5PV310_PA_GPIO),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
- .virtual = (unsigned long)S5P_VA_CMU,
- .pfn = __phys_to_pfn(S5PV310_PA_CMU),
- .length = SZ_128K,
+ .virtual = (unsigned long)S3C_VA_UART,
+ .pfn = __phys_to_pfn(S3C_PA_UART),
+ .length = SZ_512K,
.type = MT_DEVICE,
},
};
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
index b07a078..57f08ee 100644
--- a/arch/arm/plat-s5p/cpu.c
+++ b/arch/arm/plat-s5p/cpu.c
@@ -89,33 +89,11 @@ static struct map_desc s5p_iodesc[] __initdata = {
.length = SZ_64K,
.type = MT_DEVICE,
}, {
- .virtual = (unsigned long)S3C_VA_UART,
- .pfn = __phys_to_pfn(S3C_PA_UART),
- .length = SZ_512K,
- .type = MT_DEVICE,
-#ifdef CONFIG_ARM_VIC
- }, {
- .virtual = (unsigned long)VA_VIC0,
- .pfn = __phys_to_pfn(S5P_PA_VIC0),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
- .virtual = (unsigned long)VA_VIC1,
- .pfn = __phys_to_pfn(S5P_PA_VIC1),
- .length = SZ_16K,
- .type = MT_DEVICE,
-#endif
- }, {
.virtual = (unsigned long)S3C_VA_TIMER,
.pfn = __phys_to_pfn(S5P_PA_TIMER),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
- .virtual = (unsigned long)S5P_VA_GPIO,
- .pfn = __phys_to_pfn(S5P_PA_GPIO),
- .length = SZ_4K,
- .type = MT_DEVICE,
- }, {
.virtual = (unsigned long)S3C_VA_WATCHDOG,
.pfn = __phys_to_pfn(S3C_PA_WDT),
.length = SZ_4K,
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 01/13] ARM: S5P: Moves initial map for merging S5P64X0
@ 2010-09-01 7:09 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel
This patch moves some initial maps from plat-s5p to machine,
so that can merge mach-s5p6440 and mach-s5p6450.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/mach-s5p6440/cpu.c | 37 ++++++++++++++++++++++++++---
arch/arm/mach-s5p6440/include/mach/map.h | 7 +-----
arch/arm/mach-s5p6442/cpu.c | 27 +++++++++++++++++++--
arch/arm/mach-s5p6442/include/mach/map.h | 6 -----
arch/arm/mach-s5pc100/cpu.c | 25 +++++++++++++++++++-
arch/arm/mach-s5pc100/include/mach/map.h | 11 +++-----
arch/arm/mach-s5pv210/cpu.c | 22 +++++++++++++++++-
arch/arm/mach-s5pv210/include/mach/map.h | 8 ------
arch/arm/mach-s5pv310/cpu.c | 26 ++++++++++++++------
arch/arm/plat-s5p/cpu.c | 22 -----------------
10 files changed, 125 insertions(+), 66 deletions(-)
diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c
index 526f33a..a3c33d9 100644
--- a/arch/arm/mach-s5p6440/cpu.c
+++ b/arch/arm/mach-s5p6440/cpu.c
@@ -1,7 +1,7 @@
/* linux/arch/arm/mach-s5p6440/cpu.c
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -39,6 +39,32 @@
#include <plat/s5p6440.h>
#include <plat/adc-core.h>
+/* Initial IO mappings */
+
+static struct map_desc s5p6440_iodesc[] __initdata = {
+ {
+ .virtual = (unsigned long)S5P_VA_GPIO,
+ .pfn = __phys_to_pfn(S5P6440_PA_GPIO),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC0,
+ .pfn = __phys_to_pfn(S5P6440_PA_VIC0),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC1,
+ .pfn = __phys_to_pfn(S5P6440_PA_VIC1),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)S3C_VA_UART,
+ .pfn = __phys_to_pfn(S3C_PA_UART),
+ .length = SZ_512K,
+ .type = MT_DEVICE,
+ }
+};
+
static void s5p6440_idle(void)
{
unsigned long val;
@@ -54,15 +80,18 @@ static void s5p6440_idle(void)
local_irq_enable();
}
-/* s5p6440_map_io
+/*
+ * s5p6440_map_io
*
* register the standard cpu IO areas
-*/
+ */
void __init s5p6440_map_io(void)
{
/* initialize any device information early */
s3c_adc_setname("s3c64xx-adc");
+
+ iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
}
void __init s5p6440_init_clocks(int xtal)
diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h
index 6cc5cbc..11d31fe 100644
--- a/arch/arm/mach-s5p6440/include/mach/map.h
+++ b/arch/arm/mach-s5p6440/include/mach/map.h
@@ -24,23 +24,18 @@
#define S5P_PA_SYSCON S5P6440_PA_SYSCON
#define S5P6440_PA_GPIO (0xE0308000)
-#define S5P_PA_GPIO S5P6440_PA_GPIO
#define S5P6440_PA_VIC0 (0xE4000000)
-#define S5P_PA_VIC0 S5P6440_PA_VIC0
+#define S5P6440_PA_VIC1 (0xE4100000)
#define S5P6440_PA_PDMA 0xE9000000
-#define S5P6440_PA_VIC1 (0xE4100000)
-#define S5P_PA_VIC1 S5P6440_PA_VIC1
-
#define S5P6440_PA_TIMER (0xEA000000)
#define S5P_PA_TIMER S5P6440_PA_TIMER
#define S5P6440_PA_RTC (0xEA100000)
#define S5P6440_PA_WDT (0xEA200000)
-#define S5P_PA_WDT S5P6440_PA_WDT
#define S5P6440_PA_UART (0xEC000000)
diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c
index a48fb55..d3ab268 100644
--- a/arch/arm/mach-s5p6442/cpu.c
+++ b/arch/arm/mach-s5p6442/cpu.c
@@ -1,7 +1,7 @@
/* linux/arch/arm/mach-s5p6442/cpu.c
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -47,10 +47,30 @@ static struct map_desc s5p6442_iodesc[] __initdata = {
.length = SZ_16K,
.type = MT_DEVICE,
}, {
+ .virtual = (unsigned long)S5P_VA_GPIO,
+ .pfn = __phys_to_pfn(S5P6442_PA_GPIO),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC0,
+ .pfn = __phys_to_pfn(S5P6442_PA_VIC0),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC1,
+ .pfn = __phys_to_pfn(S5P6442_PA_VIC1),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
.virtual = (unsigned long)VA_VIC2,
.pfn = __phys_to_pfn(S5P6442_PA_VIC2),
.length = SZ_16K,
.type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)S3C_VA_UART,
+ .pfn = __phys_to_pfn(S3C_PA_UART),
+ .length = SZ_512K,
+ .type = MT_DEVICE,
}
};
@@ -62,10 +82,11 @@ static void s5p6442_idle(void)
local_irq_enable();
}
-/* s5p6442_map_io
+/*
+ * s5p6442_map_io
*
* register the standard cpu IO areas
-*/
+ */
void __init s5p6442_map_io(void)
{
diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
index 281d256..31fb2e6 100644
--- a/arch/arm/mach-s5p6442/include/mach/map.h
+++ b/arch/arm/mach-s5p6442/include/mach/map.h
@@ -23,16 +23,10 @@
#define S5P_PA_SYSCON S5P6442_PA_SYSCON
#define S5P6442_PA_GPIO (0xE0200000)
-#define S5P_PA_GPIO S5P6442_PA_GPIO
#define S5P6442_PA_VIC0 (0xE4000000)
-#define S5P_PA_VIC0 S5P6442_PA_VIC0
-
#define S5P6442_PA_VIC1 (0xE4100000)
-#define S5P_PA_VIC1 S5P6442_PA_VIC1
-
#define S5P6442_PA_VIC2 (0xE4200000)
-#define S5P_PA_VIC2 S5P6442_PA_VIC2
#define S5P6442_PA_MDMA 0xE8000000
#define S5P6442_PA_PDMA 0xE9000000
diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/cpu.c
index 251c92a..d13552c 100644
--- a/arch/arm/mach-s5pc100/cpu.c
+++ b/arch/arm/mach-s5pc100/cpu.c
@@ -1,5 +1,8 @@
/* linux/arch/arm/mach-s5pc100/cpu.c
*
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
* Copyright 2009 Samsung Electronics Co.
* Byungho Min <bhmin@samsung.com>
*
@@ -56,11 +59,31 @@ static struct map_desc s5pc100_iodesc[] __initdata = {
.length = SZ_16K,
.type = MT_DEVICE,
}, {
+ .virtual = (unsigned long)S5P_VA_GPIO,
+ .pfn = __phys_to_pfn(S5PC100_PA_GPIO),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC0,
+ .pfn = __phys_to_pfn(S5PC100_PA_VIC0),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC1,
+ .pfn = __phys_to_pfn(S5PC100_PA_VIC1),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
.virtual = (unsigned long)VA_VIC2,
- .pfn = __phys_to_pfn(S5P_PA_VIC2),
+ .pfn = __phys_to_pfn(S5PC100_PA_VIC2),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
+ .virtual = (unsigned long)S3C_VA_UART,
+ .pfn = __phys_to_pfn(S3C_PA_UART),
+ .length = SZ_512K,
+ .type = MT_DEVICE,
+ }, {
.virtual = (unsigned long)S5PC100_VA_OTHERS,
.pfn = __phys_to_pfn(S5PC100_PA_OTHERS),
.length = SZ_4K,
diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
index 01b9134..8751ef4 100644
--- a/arch/arm/mach-s5pc100/include/mach/map.h
+++ b/arch/arm/mach-s5pc100/include/mach/map.h
@@ -44,19 +44,16 @@
#define S5PC100_PA_OTHERS (0xE0200000)
#define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000)
-#define S5P_PA_GPIO (0xE0300000)
+#define S5PC100_PA_GPIO (0xE0300000)
#define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000)
/* Interrupt */
-#define S5PC100_PA_VIC (0xE4000000)
+#define S5PC100_PA_VIC0 (0xE4000000)
+#define S5PC100_PA_VIC1 (0xE4100000)
+#define S5PC100_PA_VIC2 (0xE4200000)
#define S5PC100_VA_VIC S3C_VA_IRQ
-#define S5PC100_PA_VIC_OFFSET 0x100000
#define S5PC100_VA_VIC_OFFSET 0x10000
-#define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET))
#define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET))
-#define S5P_PA_VIC0 S5PC1XX_PA_VIC(0)
-#define S5P_PA_VIC1 S5PC1XX_PA_VIC(1)
-#define S5P_PA_VIC2 S5PC1XX_PA_VIC(2)
#define S5PC100_PA_ONENAND (0xE7100000)
diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
index b9f4d67..00f9ca1 100644
--- a/arch/arm/mach-s5pv210/cpu.c
+++ b/arch/arm/mach-s5pv210/cpu.c
@@ -1,7 +1,7 @@
/* linux/arch/arm/mach-s5pv210/cpu.c
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -50,6 +50,21 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
.length = SZ_1M,
.type = MT_DEVICE,
}, {
+ .virtual = (unsigned long)S5P_VA_GPIO,
+ .pfn = __phys_to_pfn(S5PV210_PA_GPIO),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC0,
+ .pfn = __phys_to_pfn(S5PV210_PA_VIC0),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC1,
+ .pfn = __phys_to_pfn(S5PV210_PA_VIC1),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
.virtual = (unsigned long)VA_VIC2,
.pfn = __phys_to_pfn(S5PV210_PA_VIC2),
.length = SZ_16K,
@@ -60,6 +75,11 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
.length = SZ_16K,
.type = MT_DEVICE,
}, {
+ .virtual = (unsigned long)S3C_VA_UART,
+ .pfn = __phys_to_pfn(S3C_PA_UART),
+ .length = SZ_512K,
+ .type = MT_DEVICE,
+ }, {
.virtual = (unsigned long)S5P_VA_SROMC,
.pfn = __phys_to_pfn(S5PV210_PA_SROMC),
.length = SZ_4K,
diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
index dd4fb6b..cc50541 100644
--- a/arch/arm/mach-s5pv210/include/mach/map.h
+++ b/arch/arm/mach-s5pv210/include/mach/map.h
@@ -26,7 +26,6 @@
#define S5P_PA_SYSCON S5PV210_PA_SYSCON
#define S5PV210_PA_GPIO (0xE0200000)
-#define S5P_PA_GPIO S5PV210_PA_GPIO
/* SPI */
#define S5PV210_PA_SPI0 0xE1300000
@@ -72,16 +71,9 @@
#define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000))
#define S5PV210_PA_VIC0 (0xF2000000)
-#define S5P_PA_VIC0 S5PV210_PA_VIC0
-
#define S5PV210_PA_VIC1 (0xF2100000)
-#define S5P_PA_VIC1 S5PV210_PA_VIC1
-
#define S5PV210_PA_VIC2 (0xF2200000)
-#define S5P_PA_VIC2 S5PV210_PA_VIC2
-
#define S5PV210_PA_VIC3 (0xF2300000)
-#define S5P_PA_VIC3 S5PV210_PA_VIC3
#define S5PV210_PA_SDRAM (0x20000000)
#define S5P_PA_SDRAM S5PV210_PA_SDRAM
diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c
index e5b261a..3b9c872 100644
--- a/arch/arm/mach-s5pv310/cpu.c
+++ b/arch/arm/mach-s5pv310/cpu.c
@@ -31,9 +31,14 @@ extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
/* Initial IO mappings */
static struct map_desc s5pv310_iodesc[] __initdata = {
{
- .virtual = (unsigned long)S5P_VA_COREPERI_BASE,
- .pfn = __phys_to_pfn(S5PV310_PA_COREPERI),
- .length = SZ_8K,
+ .virtual = (unsigned long)S5P_VA_SYSRAM,
+ .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)S5P_VA_CMU,
+ .pfn = __phys_to_pfn(S5PV310_PA_CMU),
+ .length = SZ_128K,
.type = MT_DEVICE,
}, {
.virtual = (unsigned long)S5P_VA_COMBINER_BASE,
@@ -41,19 +46,24 @@ static struct map_desc s5pv310_iodesc[] __initdata = {
.length = SZ_4K,
.type = MT_DEVICE,
}, {
+ .virtual = (unsigned long)S5P_VA_COREPERI_BASE,
+ .pfn = __phys_to_pfn(S5PV310_PA_COREPERI),
+ .length = SZ_8K,
+ .type = MT_DEVICE,
+ }, {
.virtual = (unsigned long)S5P_VA_L2CC,
.pfn = __phys_to_pfn(S5PV310_PA_L2CC),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
- .virtual = (unsigned long)S5P_VA_SYSRAM,
- .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM),
+ .virtual = (unsigned long)S5P_VA_GPIO,
+ .pfn = __phys_to_pfn(S5PV310_PA_GPIO),
.length = SZ_4K,
.type = MT_DEVICE,
}, {
- .virtual = (unsigned long)S5P_VA_CMU,
- .pfn = __phys_to_pfn(S5PV310_PA_CMU),
- .length = SZ_128K,
+ .virtual = (unsigned long)S3C_VA_UART,
+ .pfn = __phys_to_pfn(S3C_PA_UART),
+ .length = SZ_512K,
.type = MT_DEVICE,
},
};
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
index b07a078..57f08ee 100644
--- a/arch/arm/plat-s5p/cpu.c
+++ b/arch/arm/plat-s5p/cpu.c
@@ -89,33 +89,11 @@ static struct map_desc s5p_iodesc[] __initdata = {
.length = SZ_64K,
.type = MT_DEVICE,
}, {
- .virtual = (unsigned long)S3C_VA_UART,
- .pfn = __phys_to_pfn(S3C_PA_UART),
- .length = SZ_512K,
- .type = MT_DEVICE,
-#ifdef CONFIG_ARM_VIC
- }, {
- .virtual = (unsigned long)VA_VIC0,
- .pfn = __phys_to_pfn(S5P_PA_VIC0),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
- .virtual = (unsigned long)VA_VIC1,
- .pfn = __phys_to_pfn(S5P_PA_VIC1),
- .length = SZ_16K,
- .type = MT_DEVICE,
-#endif
- }, {
.virtual = (unsigned long)S3C_VA_TIMER,
.pfn = __phys_to_pfn(S5P_PA_TIMER),
.length = SZ_16K,
.type = MT_DEVICE,
}, {
- .virtual = (unsigned long)S5P_VA_GPIO,
- .pfn = __phys_to_pfn(S5P_PA_GPIO),
- .length = SZ_4K,
- .type = MT_DEVICE,
- }, {
.virtual = (unsigned long)S3C_VA_WATCHDOG,
.pfn = __phys_to_pfn(S3C_PA_WDT),
.length = SZ_4K,
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 02/13] ARM: S5P64X0: Update Kconfig and Makefile
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 7:09 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel, linux-samsung-soc; +Cc: ben-linux, Kukjin Kim
This patch updates the Kconfig and Makefile for the S5P6440 and S5P6450
machines. It also updates arch/arm/ Kconfig and Makefile to include for
support ARCH_S5P64X0 with one kernel image.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/Kconfig | 16 +++---
arch/arm/Makefile | 2 +-
arch/arm/mach-s5p6440/Kconfig | 33 ------------
arch/arm/mach-s5p6440/Makefile | 25 ---------
arch/arm/mach-s5p64x0/Kconfig | 55 ++++++++++++++++++++
arch/arm/mach-s5p64x0/Makefile | 30 +++++++++++
.../{mach-s5p6440 => mach-s5p64x0}/Makefile.boot | 0
arch/arm/plat-s5p/Kconfig | 4 +-
8 files changed, 95 insertions(+), 70 deletions(-)
delete mode 100644 arch/arm/mach-s5p6440/Kconfig
delete mode 100644 arch/arm/mach-s5p6440/Makefile
create mode 100644 arch/arm/mach-s5p64x0/Kconfig
create mode 100644 arch/arm/mach-s5p64x0/Makefile
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/Makefile.boot (100%)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a7ed21f..40e75b3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -679,17 +679,15 @@ config ARCH_S3C64XX
help
Samsung S3C64XX series based systems
-config ARCH_S5P6440
- bool "Samsung S5P6440"
+config ARCH_S5P64X0
+ bool "Samsung S5P6440 S5P6450"
select CPU_V6
select GENERIC_GPIO
select HAVE_CLK
- select HAVE_S3C2410_WATCHDOG
select ARCH_USES_GETTIMEOFFSET
- select HAVE_S3C2410_I2C
- select HAVE_S3C_RTC
help
- Samsung S5P6440 CPU based systems
+ Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
+ SMDK6450.
config ARCH_S5P6442
bool "Samsung S5P6442"
@@ -929,7 +927,7 @@ if ARCH_S3C64XX
source "arch/arm/mach-s3c64xx/Kconfig"
endif
-source "arch/arm/mach-s5p6440/Kconfig"
+source "arch/arm/mach-s5p64x0/Kconfig"
source "arch/arm/mach-s5p6442/Kconfig"
@@ -1232,7 +1230,7 @@ source kernel/Kconfig.preempt
config HZ
int
- default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \
+ default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
default AT91_TIMER_HZ if ARCH_AT91
@@ -1609,7 +1607,7 @@ config ZRELADDR
default 0x10008000 if ARCH_MSM ||\
ARCH_OMAP1 ||\
ARCH_RPC
- default 0x20008000 if ARCH_S5P6440 ||\
+ default 0x20008000 if ARCH_S5P64X0 ||\
ARCH_S5P6442 ||\
ARCH_S5PC100 ||\
ARCH_S5PV210
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 59c1ce8..8420f21 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -173,7 +173,7 @@ machine-$(CONFIG_ARCH_RPC) := rpc
machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2416 s3c2440 s3c2443
machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0
machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx
-machine-$(CONFIG_ARCH_S5P6440) := s5p6440
+machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0
machine-$(CONFIG_ARCH_S5P6442) := s5p6442
machine-$(CONFIG_ARCH_S5PC100) := s5pc100
machine-$(CONFIG_ARCH_S5PV210) := s5pv210
diff --git a/arch/arm/mach-s5p6440/Kconfig b/arch/arm/mach-s5p6440/Kconfig
deleted file mode 100644
index 6a4af7f..0000000
--- a/arch/arm/mach-s5p6440/Kconfig
+++ /dev/null
@@ -1,33 +0,0 @@
-# arch/arm/mach-s5p6440/Kconfig
-#
-# Copyright (c) 2009 Samsung Electronics Co., Ltd.
-# http://www.samsung.com/
-#
-# Licensed under GPLv2
-
-if ARCH_S5P6440
-
-config CPU_S5P6440
- bool
- select S3C_PL330_DMA
- help
- Enable S5P6440 CPU support
-
-config S5P6440_SETUP_I2C1
- bool
- help
- Common setup code for i2c bus 1.
-
-config MACH_SMDK6440
- bool "SMDK6440"
- select CPU_S5P6440
- select S3C_DEV_I2C1
- select S3C_DEV_RTC
- select S3C_DEV_WDT
- select SAMSUNG_DEV_ADC
- select SAMSUNG_DEV_TS
- select S5P6440_SETUP_I2C1
- help
- Machine support for the Samsung SMDK6440
-
-endif
diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile
deleted file mode 100644
index c3fe4d3..0000000
--- a/arch/arm/mach-s5p6440/Makefile
+++ /dev/null
@@ -1,25 +0,0 @@
-# arch/arm/mach-s5p6440/Makefile
-#
-# Copyright (c) 2009 Samsung Electronics Co., Ltd.
-# http://www.samsung.com/
-#
-# Licensed under GPLv2
-
-obj-y :=
-obj-m :=
-obj-n :=
-obj- :=
-
-# Core support for S5P6440 system
-
-obj-$(CONFIG_CPU_S5P6440) += cpu.o init.o clock.o gpio.o dma.o
-obj-$(CONFIG_CPU_S5P6440) += setup-i2c0.o
-
-# machine support
-
-obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o
-
-# device support
-obj-y += dev-audio.o
-obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
-obj-$(CONFIG_S5P6440_SETUP_I2C1) += setup-i2c1.o
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
new file mode 100644
index 0000000..488375c
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/Kconfig
@@ -0,0 +1,55 @@
+# arch/arm/mach-s5p64x0/Kconfig
+#
+# Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+# http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+if ARCH_S5P64X0
+
+config CPU_S5P6440
+ bool
+ select PLAT_S5P
+ select S3C_PL330_DMA
+ help
+ Enable S5P6440 CPU support
+
+config CPU_S5P6450
+ bool
+ select PLAT_S5P
+ select S3C_PL330_DMA
+ help
+ Enable S5P6450 CPU support
+
+config S5P64X0_SETUP_I2C1
+ bool
+ help
+ Common setup code for i2c bus 1.
+
+# machine support
+
+config MACH_SMDK6440
+ bool "SMDK6440"
+ select CPU_S5P6440
+ select S3C_DEV_I2C1
+ select S3C_DEV_RTC
+ select S3C_DEV_WDT
+ select SAMSUNG_DEV_ADC
+ select SAMSUNG_DEV_TS
+ select S5P64X0_SETUP_I2C1
+ help
+ Machine support for the Samsung SMDK6440
+
+config MACH_SMDK6450
+ bool "SMDK6450"
+ select CPU_S5P6450
+ select S3C_DEV_I2C1
+ select S3C_DEV_RTC
+ select S3C_DEV_WDT
+ select SAMSUNG_DEV_ADC
+ select SAMSUNG_DEV_TS
+ select S5P64X0_SETUP_I2C1
+ help
+ Machine support for the Samsung SMDK6450
+
+endif
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
new file mode 100644
index 0000000..2655829
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -0,0 +1,30 @@
+# arch/arm/mach-s5p64x0/Makefile
+#
+# Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+# http://www.samsung.com
+#
+# Licensed under GPLv2
+
+obj-y :=
+obj-m :=
+obj-n :=
+obj- :=
+
+# Core support for S5P64X0 system
+
+obj-$(CONFIG_ARCH_S5P64X0) += cpu.o init.o clock.o dma.o
+obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o
+obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o gpio.o
+obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o
+
+# machine support
+
+obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o
+obj-$(CONFIG_MACH_SMDK6450) += mach-smdk6450.o
+
+# device support
+
+obj-y += dev-audio.o
+obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
+
+obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o
diff --git a/arch/arm/mach-s5p6440/Makefile.boot b/arch/arm/mach-s5p64x0/Makefile.boot
similarity index 100%
rename from arch/arm/mach-s5p6440/Makefile.boot
rename to arch/arm/mach-s5p64x0/Makefile.boot
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index c6a855d..90f97d6 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -7,7 +7,7 @@
config PLAT_S5P
bool
- depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310)
+ depends on (ARCH_S5P64X0 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310)
default y
select ARM_VIC if !ARCH_S5PV310
select ARM_GIC if ARCH_S5PV310
@@ -30,7 +30,7 @@ config S5P_EXT_INT
bool
help
Use the external interrupts (other than GPIO interrupts.)
- Note: Do not choose this for S5P6440.
+ Note: Do not choose this for S5P6440 and S5P6450.
config S5P_DEV_FIMC0
bool
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 02/13] ARM: S5P64X0: Update Kconfig and Makefile
@ 2010-09-01 7:09 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel
This patch updates the Kconfig and Makefile for the S5P6440 and S5P6450
machines. It also updates arch/arm/ Kconfig and Makefile to include for
support ARCH_S5P64X0 with one kernel image.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/Kconfig | 16 +++---
arch/arm/Makefile | 2 +-
arch/arm/mach-s5p6440/Kconfig | 33 ------------
arch/arm/mach-s5p6440/Makefile | 25 ---------
arch/arm/mach-s5p64x0/Kconfig | 55 ++++++++++++++++++++
arch/arm/mach-s5p64x0/Makefile | 30 +++++++++++
.../{mach-s5p6440 => mach-s5p64x0}/Makefile.boot | 0
arch/arm/plat-s5p/Kconfig | 4 +-
8 files changed, 95 insertions(+), 70 deletions(-)
delete mode 100644 arch/arm/mach-s5p6440/Kconfig
delete mode 100644 arch/arm/mach-s5p6440/Makefile
create mode 100644 arch/arm/mach-s5p64x0/Kconfig
create mode 100644 arch/arm/mach-s5p64x0/Makefile
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/Makefile.boot (100%)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index a7ed21f..40e75b3 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -679,17 +679,15 @@ config ARCH_S3C64XX
help
Samsung S3C64XX series based systems
-config ARCH_S5P6440
- bool "Samsung S5P6440"
+config ARCH_S5P64X0
+ bool "Samsung S5P6440 S5P6450"
select CPU_V6
select GENERIC_GPIO
select HAVE_CLK
- select HAVE_S3C2410_WATCHDOG
select ARCH_USES_GETTIMEOFFSET
- select HAVE_S3C2410_I2C
- select HAVE_S3C_RTC
help
- Samsung S5P6440 CPU based systems
+ Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
+ SMDK6450.
config ARCH_S5P6442
bool "Samsung S5P6442"
@@ -929,7 +927,7 @@ if ARCH_S3C64XX
source "arch/arm/mach-s3c64xx/Kconfig"
endif
-source "arch/arm/mach-s5p6440/Kconfig"
+source "arch/arm/mach-s5p64x0/Kconfig"
source "arch/arm/mach-s5p6442/Kconfig"
@@ -1232,7 +1230,7 @@ source kernel/Kconfig.preempt
config HZ
int
- default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \
+ default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
default AT91_TIMER_HZ if ARCH_AT91
@@ -1609,7 +1607,7 @@ config ZRELADDR
default 0x10008000 if ARCH_MSM ||\
ARCH_OMAP1 ||\
ARCH_RPC
- default 0x20008000 if ARCH_S5P6440 ||\
+ default 0x20008000 if ARCH_S5P64X0 ||\
ARCH_S5P6442 ||\
ARCH_S5PC100 ||\
ARCH_S5PV210
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 59c1ce8..8420f21 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -173,7 +173,7 @@ machine-$(CONFIG_ARCH_RPC) := rpc
machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2416 s3c2440 s3c2443
machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0
machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx
-machine-$(CONFIG_ARCH_S5P6440) := s5p6440
+machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0
machine-$(CONFIG_ARCH_S5P6442) := s5p6442
machine-$(CONFIG_ARCH_S5PC100) := s5pc100
machine-$(CONFIG_ARCH_S5PV210) := s5pv210
diff --git a/arch/arm/mach-s5p6440/Kconfig b/arch/arm/mach-s5p6440/Kconfig
deleted file mode 100644
index 6a4af7f..0000000
--- a/arch/arm/mach-s5p6440/Kconfig
+++ /dev/null
@@ -1,33 +0,0 @@
-# arch/arm/mach-s5p6440/Kconfig
-#
-# Copyright (c) 2009 Samsung Electronics Co., Ltd.
-# http://www.samsung.com/
-#
-# Licensed under GPLv2
-
-if ARCH_S5P6440
-
-config CPU_S5P6440
- bool
- select S3C_PL330_DMA
- help
- Enable S5P6440 CPU support
-
-config S5P6440_SETUP_I2C1
- bool
- help
- Common setup code for i2c bus 1.
-
-config MACH_SMDK6440
- bool "SMDK6440"
- select CPU_S5P6440
- select S3C_DEV_I2C1
- select S3C_DEV_RTC
- select S3C_DEV_WDT
- select SAMSUNG_DEV_ADC
- select SAMSUNG_DEV_TS
- select S5P6440_SETUP_I2C1
- help
- Machine support for the Samsung SMDK6440
-
-endif
diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile
deleted file mode 100644
index c3fe4d3..0000000
--- a/arch/arm/mach-s5p6440/Makefile
+++ /dev/null
@@ -1,25 +0,0 @@
-# arch/arm/mach-s5p6440/Makefile
-#
-# Copyright (c) 2009 Samsung Electronics Co., Ltd.
-# http://www.samsung.com/
-#
-# Licensed under GPLv2
-
-obj-y :=
-obj-m :=
-obj-n :=
-obj- :=
-
-# Core support for S5P6440 system
-
-obj-$(CONFIG_CPU_S5P6440) += cpu.o init.o clock.o gpio.o dma.o
-obj-$(CONFIG_CPU_S5P6440) += setup-i2c0.o
-
-# machine support
-
-obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o
-
-# device support
-obj-y += dev-audio.o
-obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
-obj-$(CONFIG_S5P6440_SETUP_I2C1) += setup-i2c1.o
diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
new file mode 100644
index 0000000..488375c
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/Kconfig
@@ -0,0 +1,55 @@
+# arch/arm/mach-s5p64x0/Kconfig
+#
+# Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+# http://www.samsung.com/
+#
+# Licensed under GPLv2
+
+if ARCH_S5P64X0
+
+config CPU_S5P6440
+ bool
+ select PLAT_S5P
+ select S3C_PL330_DMA
+ help
+ Enable S5P6440 CPU support
+
+config CPU_S5P6450
+ bool
+ select PLAT_S5P
+ select S3C_PL330_DMA
+ help
+ Enable S5P6450 CPU support
+
+config S5P64X0_SETUP_I2C1
+ bool
+ help
+ Common setup code for i2c bus 1.
+
+# machine support
+
+config MACH_SMDK6440
+ bool "SMDK6440"
+ select CPU_S5P6440
+ select S3C_DEV_I2C1
+ select S3C_DEV_RTC
+ select S3C_DEV_WDT
+ select SAMSUNG_DEV_ADC
+ select SAMSUNG_DEV_TS
+ select S5P64X0_SETUP_I2C1
+ help
+ Machine support for the Samsung SMDK6440
+
+config MACH_SMDK6450
+ bool "SMDK6450"
+ select CPU_S5P6450
+ select S3C_DEV_I2C1
+ select S3C_DEV_RTC
+ select S3C_DEV_WDT
+ select SAMSUNG_DEV_ADC
+ select SAMSUNG_DEV_TS
+ select S5P64X0_SETUP_I2C1
+ help
+ Machine support for the Samsung SMDK6450
+
+endif
diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
new file mode 100644
index 0000000..2655829
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/Makefile
@@ -0,0 +1,30 @@
+# arch/arm/mach-s5p64x0/Makefile
+#
+# Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+# http://www.samsung.com
+#
+# Licensed under GPLv2
+
+obj-y :=
+obj-m :=
+obj-n :=
+obj- :=
+
+# Core support for S5P64X0 system
+
+obj-$(CONFIG_ARCH_S5P64X0) += cpu.o init.o clock.o dma.o
+obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o
+obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o gpio.o
+obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o
+
+# machine support
+
+obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o
+obj-$(CONFIG_MACH_SMDK6450) += mach-smdk6450.o
+
+# device support
+
+obj-y += dev-audio.o
+obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
+
+obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o
diff --git a/arch/arm/mach-s5p6440/Makefile.boot b/arch/arm/mach-s5p64x0/Makefile.boot
similarity index 100%
rename from arch/arm/mach-s5p6440/Makefile.boot
rename to arch/arm/mach-s5p64x0/Makefile.boot
diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
index c6a855d..90f97d6 100644
--- a/arch/arm/plat-s5p/Kconfig
+++ b/arch/arm/plat-s5p/Kconfig
@@ -7,7 +7,7 @@
config PLAT_S5P
bool
- depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310)
+ depends on (ARCH_S5P64X0 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310)
default y
select ARM_VIC if !ARCH_S5PV310
select ARM_GIC if ARCH_S5PV310
@@ -30,7 +30,7 @@ config S5P_EXT_INT
bool
help
Use the external interrupts (other than GPIO interrupts.)
- Note: Do not choose this for S5P6440.
+ Note: Do not choose this for S5P6440 and S5P6450.
config S5P_DEV_FIMC0
bool
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 03/13] ARM: S5P64X0: Add S5P64X0(S5P6440 and S5P6450) initialization support
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 7:09 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel, linux-samsung-soc; +Cc: ben-linux, Kukjin Kim
This patch adds ARCH_S5P64X0 which can support S5P6440 and S5P6450 with
one kernel image. So moved some files of mach-s5p6440 into the new ARCH
directory mach-s5p64x0.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/mach-s5p6440/cpu.c | 145 -------------
arch/arm/mach-s5p6440/include/mach/debug-macro.S | 37 ----
arch/arm/mach-s5p6440/include/mach/io.h | 18 --
arch/arm/mach-s5p6440/include/mach/map.h | 81 --------
arch/arm/mach-s5p6440/include/mach/uncompress.h | 24 ---
arch/arm/mach-s5p6440/init.c | 52 -----
arch/arm/mach-s5p64x0/cpu.c | 208 +++++++++++++++++++
arch/arm/mach-s5p64x0/include/mach/debug-macro.S | 39 ++++
.../include/mach/entry-macro.S | 8 +-
.../include/mach/hardware.h | 8 +-
arch/arm/mach-s5p64x0/include/mach/io.h | 25 +++
arch/arm/mach-s5p64x0/include/mach/map.h | 83 ++++++++
.../include/mach/memory.h | 12 +-
.../include/mach/system.h | 8 +-
.../include/mach/timex.h | 7 +-
arch/arm/mach-s5p64x0/include/mach/uncompress.h | 212 ++++++++++++++++++++
.../include/mach/vmalloc.h | 5 +-
arch/arm/mach-s5p64x0/init.c | 73 +++++++
arch/arm/plat-s5p/cpu.c | 12 +-
arch/arm/plat-s5p/include/plat/s5p6440.h | 7 +-
arch/arm/plat-s5p/include/plat/s5p6450.h | 36 ++++
21 files changed, 717 insertions(+), 383 deletions(-)
delete mode 100644 arch/arm/mach-s5p6440/cpu.c
delete mode 100644 arch/arm/mach-s5p6440/include/mach/debug-macro.S
delete mode 100644 arch/arm/mach-s5p6440/include/mach/io.h
delete mode 100644 arch/arm/mach-s5p6440/include/mach/map.h
delete mode 100644 arch/arm/mach-s5p6440/include/mach/uncompress.h
delete mode 100644 arch/arm/mach-s5p6440/init.c
create mode 100644 arch/arm/mach-s5p64x0/cpu.c
create mode 100644 arch/arm/mach-s5p64x0/include/mach/debug-macro.S
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/entry-macro.S (58%)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/hardware.h (67%)
create mode 100644 arch/arm/mach-s5p64x0/include/mach/io.h
create mode 100644 arch/arm/mach-s5p64x0/include/mach/map.h
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/memory.h (55%)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/system.h (69%)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/timex.h (80%)
create mode 100644 arch/arm/mach-s5p64x0/include/mach/uncompress.h
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/vmalloc.h (74%)
create mode 100644 arch/arm/mach-s5p64x0/init.c
create mode 100644 arch/arm/plat-s5p/include/plat/s5p6450.h
diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c
deleted file mode 100644
index a3c33d9..0000000
--- a/arch/arm/mach-s5p6440/cpu.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/cpu.c
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/list.h>
-#include <linux/timer.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/sysdev.h>
-#include <linux/serial_core.h>
-#include <linux/platform_device.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <asm/proc-fns.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <asm/irq.h>
-
-#include <plat/regs-serial.h>
-#include <mach/regs-clock.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/clock.h>
-#include <plat/s5p6440.h>
-#include <plat/adc-core.h>
-
-/* Initial IO mappings */
-
-static struct map_desc s5p6440_iodesc[] __initdata = {
- {
- .virtual = (unsigned long)S5P_VA_GPIO,
- .pfn = __phys_to_pfn(S5P6440_PA_GPIO),
- .length = SZ_4K,
- .type = MT_DEVICE,
- }, {
- .virtual = (unsigned long)VA_VIC0,
- .pfn = __phys_to_pfn(S5P6440_PA_VIC0),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
- .virtual = (unsigned long)VA_VIC1,
- .pfn = __phys_to_pfn(S5P6440_PA_VIC1),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
- .virtual = (unsigned long)S3C_VA_UART,
- .pfn = __phys_to_pfn(S3C_PA_UART),
- .length = SZ_512K,
- .type = MT_DEVICE,
- }
-};
-
-static void s5p6440_idle(void)
-{
- unsigned long val;
-
- if (!need_resched()) {
- val = __raw_readl(S5P_PWR_CFG);
- val &= ~(0x3<<5);
- val |= (0x1<<5);
- __raw_writel(val, S5P_PWR_CFG);
-
- cpu_do_idle();
- }
- local_irq_enable();
-}
-
-/*
- * s5p6440_map_io
- *
- * register the standard cpu IO areas
- */
-
-void __init s5p6440_map_io(void)
-{
- /* initialize any device information early */
- s3c_adc_setname("s3c64xx-adc");
-
- iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
-}
-
-void __init s5p6440_init_clocks(int xtal)
-{
- printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
-
- s3c24xx_register_baseclocks(xtal);
- s5p_register_clocks(xtal);
- s5p6440_register_clocks();
- s5p6440_setup_clocks();
-}
-
-void __init s5p6440_init_irq(void)
-{
- /* S5P6440 supports only 2 VIC */
- u32 vic[2];
-
- /*
- * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
- * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
- */
- vic[0] = 0xff800ae7;
- vic[1] = 0xffbf23e5;
-
- s5p_init_irq(vic, ARRAY_SIZE(vic));
-}
-
-struct sysdev_class s5p6440_sysclass = {
- .name = "s5p6440-core",
-};
-
-static struct sys_device s5p6440_sysdev = {
- .cls = &s5p6440_sysclass,
-};
-
-static int __init s5p6440_core_init(void)
-{
- return sysdev_class_register(&s5p6440_sysclass);
-}
-
-core_initcall(s5p6440_core_init);
-
-int __init s5p6440_init(void)
-{
- printk(KERN_INFO "S5P6440: Initializing architecture\n");
-
- /* set idle function */
- pm_idle = s5p6440_idle;
-
- return sysdev_register(&s5p6440_sysdev);
-}
diff --git a/arch/arm/mach-s5p6440/include/mach/debug-macro.S b/arch/arm/mach-s5p6440/include/mach/debug-macro.S
deleted file mode 100644
index 1347d7f..0000000
--- a/arch/arm/mach-s5p6440/include/mach/debug-macro.S
+++ /dev/null
@@ -1,37 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/debug-macro.S
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* pull in the relevant register and map files. */
-
-#include <mach/map.h>
-#include <plat/regs-serial.h>
-
- /* note, for the boot process to work we have to keep the UART
- * virtual address aligned to an 1MiB boundary for the L1
- * mapping the head code makes. We keep the UART virtual address
- * aligned and add in the offset when we load the value here.
- */
-
- .macro addruart, rx, rtmp
- mrc p15, 0, \rx, c1, c0
- tst \rx, #1
- ldreq \rx, = S3C_PA_UART
- ldrne \rx, = S3C_VA_UART
-#if CONFIG_DEBUG_S3C_UART != 0
- add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
-#endif
- .endm
-
-/* include the reset of the code which will do the work, we're only
- * compiling for a single cpu processor type so the default of s3c2440
- * will be fine with us.
- */
-
-#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5p6440/include/mach/io.h b/arch/arm/mach-s5p6440/include/mach/io.h
deleted file mode 100644
index fa2d69c..0000000
--- a/arch/arm/mach-s5p6440/include/mach/io.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* arch/arm/mach-s5p6440/include/mach/io.h
- *
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben-linux@fluff.org>
- *
- * Default IO routines for S3C64XX based
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-/* No current ISA/PCI bus support. */
-#define __io(a) __typesafe_io(a)
-#define __mem_pci(a) (a)
-
-#define IO_SPACE_LIMIT (0xFFFFFFFF)
-
-#endif
diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h
deleted file mode 100644
index 11d31fe..0000000
--- a/arch/arm/mach-s5p6440/include/mach/map.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/map.h
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S5P6440 - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_MAP_H
-#define __ASM_ARCH_MAP_H __FILE__
-
-#include <plat/map-base.h>
-#include <plat/map-s5p.h>
-
-#define S5P6440_PA_CHIPID (0xE0000000)
-#define S5P_PA_CHIPID S5P6440_PA_CHIPID
-
-#define S5P6440_PA_SYSCON (0xE0100000)
-#define S5P6440_PA_CLK (S5P6440_PA_SYSCON + 0x0)
-#define S5P_PA_SYSCON S5P6440_PA_SYSCON
-
-#define S5P6440_PA_GPIO (0xE0308000)
-
-#define S5P6440_PA_VIC0 (0xE4000000)
-#define S5P6440_PA_VIC1 (0xE4100000)
-
-#define S5P6440_PA_PDMA 0xE9000000
-
-#define S5P6440_PA_TIMER (0xEA000000)
-#define S5P_PA_TIMER S5P6440_PA_TIMER
-
-#define S5P6440_PA_RTC (0xEA100000)
-
-#define S5P6440_PA_WDT (0xEA200000)
-
-#define S5P6440_PA_UART (0xEC000000)
-
-#define S5P_PA_UART0 (S5P6440_PA_UART + 0x0)
-#define S5P_PA_UART1 (S5P6440_PA_UART + 0x400)
-#define S5P_PA_UART2 (S5P6440_PA_UART + 0x800)
-#define S5P_PA_UART3 (S5P6440_PA_UART + 0xC00)
-
-#define S5P_SZ_UART SZ_256
-
-#define S5P6440_PA_IIC0 (0xEC104000)
-#define S5P6440_PA_IIC1 (0xEC20F000)
-
-#define S5P6440_PA_SPI0 0xEC400000
-#define S5P6440_PA_SPI1 0xEC500000
-
-#define S5P6440_PA_HSOTG (0xED100000)
-
-#define S5P6440_PA_HSMMC0 (0xED800000)
-#define S5P6440_PA_HSMMC1 (0xED900000)
-#define S5P6440_PA_HSMMC2 (0xEDA00000)
-
-#define S5P6440_PA_SDRAM (0x20000000)
-#define S5P_PA_SDRAM S5P6440_PA_SDRAM
-
-/* I2S */
-#define S5P6440_PA_I2S 0xF2000000
-
-/* PCM */
-#define S5P6440_PA_PCM 0xF2100000
-
-#define S5P6440_PA_ADC (0xF3000000)
-
-/* compatibiltiy defines. */
-#define S3C_PA_UART S5P6440_PA_UART
-#define S3C_PA_IIC S5P6440_PA_IIC0
-#define S3C_PA_RTC S5P6440_PA_RTC
-#define S3C_PA_IIC1 S5P6440_PA_IIC1
-#define S3C_PA_WDT S5P6440_PA_WDT
-
-#define SAMSUNG_PA_ADC S5P6440_PA_ADC
-
-#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/uncompress.h b/arch/arm/mach-s5p6440/include/mach/uncompress.h
deleted file mode 100644
index 7c1f600..0000000
--- a/arch/arm/mach-s5p6440/include/mach/uncompress.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/uncompress.h
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S5P6440 - uncompress code
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_UNCOMPRESS_H
-#define __ASM_ARCH_UNCOMPRESS_H
-
-#include <mach/map.h>
-#include <plat/uncompress.h>
-
-static void arch_detect_cpu(void)
-{
- /* we do not need to do any cpu detection here at the moment. */
-}
-
-#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5p6440/init.c b/arch/arm/mach-s5p6440/init.c
deleted file mode 100644
index a1f3727..0000000
--- a/arch/arm/mach-s5p6440/init.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/init.c
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S5P6440 - Init support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/serial_core.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/s5p6440.h>
-#include <plat/regs-serial.h>
-
-static struct s3c24xx_uart_clksrc s5p6440_serial_clocks[] = {
- [0] = {
- .name = "pclk_low",
- .divisor = 1,
- .min_baud = 0,
- .max_baud = 0,
- },
- [1] = {
- .name = "uclk1",
- .divisor = 1,
- .min_baud = 0,
- .max_baud = 0,
- },
-};
-
-/* uart registration process */
-void __init s5p6440_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
- struct s3c2410_uartcfg *tcfg = cfg;
- u32 ucnt;
-
- for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
- if (!tcfg->clocks) {
- tcfg->clocks = s5p6440_serial_clocks;
- tcfg->clocks_size = ARRAY_SIZE(s5p6440_serial_clocks);
- }
- }
-
- s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
-}
diff --git a/arch/arm/mach-s5p64x0/cpu.c b/arch/arm/mach-s5p64x0/cpu.c
new file mode 100644
index 0000000..fb90a30
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/cpu.c
@@ -0,0 +1,208 @@
+/* linux/arch/arm/mach-s5p64x0/cpu.c
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/sysdev.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/proc-fns.h>
+#include <asm/irq.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+
+#include <plat/regs-serial.h>
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/clock.h>
+#include <plat/s5p6440.h>
+#include <plat/s5p6450.h>
+#include <plat/adc-core.h>
+
+/* Initial IO mappings */
+
+static struct map_desc s5p64x0_iodesc[] __initdata = {
+ {
+ .virtual = (unsigned long)S5P_VA_GPIO,
+ .pfn = __phys_to_pfn(S5P64X0_PA_GPIO),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC0,
+ .pfn = __phys_to_pfn(S5P64X0_PA_VIC0),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC1,
+ .pfn = __phys_to_pfn(S5P64X0_PA_VIC1),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ },
+};
+
+static struct map_desc s5p6440_iodesc[] __initdata = {
+ {
+ .virtual = (unsigned long)S3C_VA_UART,
+ .pfn = __phys_to_pfn(S5P6440_PA_UART(0)),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ },
+};
+
+static struct map_desc s5p6450_iodesc[] __initdata = {
+ {
+ .virtual = (unsigned long)S3C_VA_UART,
+ .pfn = __phys_to_pfn(S5P6450_PA_UART(0)),
+ .length = SZ_512K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)S3C_VA_UART + SZ_512K,
+ .pfn = __phys_to_pfn(S5P6450_PA_UART(5)),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ },
+};
+
+static void s5p64x0_idle(void)
+{
+ unsigned long val;
+
+ if (!need_resched()) {
+ val = __raw_readl(S5P64X0_PWR_CFG);
+ val &= ~(0x3 << 5);
+ val |= (0x1 << 5);
+ __raw_writel(val, S5P64X0_PWR_CFG);
+
+ cpu_do_idle();
+ }
+ local_irq_enable();
+}
+
+/*
+ * s5p64x0_map_io
+ *
+ * register the standard CPU IO areas
+ */
+
+void __init s5p6440_map_io(void)
+{
+ /* initialize any device information early */
+ s3c_adc_setname("s3c64x0-adc");
+
+ iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
+ iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
+}
+
+void __init s5p6450_map_io(void)
+{
+ /* initialize any device information early */
+ s3c_adc_setname("s3c64x0-adc");
+
+ iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
+ iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6440_iodesc));
+}
+
+/*
+ * s5p64x0_init_clocks
+ *
+ * register and setup the CPU clocks
+ */
+
+void __init s5p6440_init_clocks(int xtal)
+{
+ printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+ s3c24xx_register_baseclocks(xtal);
+ s5p_register_clocks(xtal);
+ s5p6440_register_clocks();
+ s5p6440_setup_clocks();
+}
+
+void __init s5p6450_init_clocks(int xtal)
+{
+ printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+ s3c24xx_register_baseclocks(xtal);
+ s5p_register_clocks(xtal);
+ s5p6450_register_clocks();
+ s5p6450_setup_clocks();
+}
+
+/*
+ * s5p64x0_init_irq
+ *
+ * register the CPU interrupts
+ */
+
+void __init s5p6440_init_irq(void)
+{
+ /* S5P6440 supports 2 VIC */
+ u32 vic[2];
+
+ /*
+ * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
+ * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
+ */
+ vic[0] = 0xff800ae7;
+ vic[1] = 0xffbf23e5;
+
+ s5p_init_irq(vic, ARRAY_SIZE(vic));
+}
+
+void __init s5p6450_init_irq(void)
+{
+ /* S5P6450 supports only 2 VIC */
+ u32 vic[2];
+
+ /*
+ * VIC0 is missing IRQ_VIC0[(13-15), (21-22)]
+ * VIC1 is missing IRQ VIC1[12, 14, 23]
+ */
+ vic[0] = 0xff9f1fff;
+ vic[1] = 0xff7fafff;
+
+ s5p_init_irq(vic, ARRAY_SIZE(vic));
+}
+
+struct sysdev_class s5p64x0_sysclass = {
+ .name = "s5p64x0-core",
+};
+
+static struct sys_device s5p64x0_sysdev = {
+ .cls = &s5p64x0_sysclass,
+};
+
+static int __init s5p64x0_core_init(void)
+{
+ return sysdev_class_register(&s5p64x0_sysclass);
+}
+core_initcall(s5p64x0_core_init);
+
+int __init s5p64x0_init(void)
+{
+ printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
+
+ /* set idle function */
+ pm_idle = s5p64x0_idle;
+
+ return sysdev_register(&s5p64x0_sysdev);
+}
diff --git a/arch/arm/mach-s5p64x0/include/mach/debug-macro.S b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
new file mode 100644
index 0000000..f122baa
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
@@ -0,0 +1,39 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* pull in the relevant register and map files. */
+
+#include <plat/map-base.h>
+#include <plat/map-s5p.h>
+
+#include <plat/regs-serial.h>
+
+ .macro addruart, rx, tmp
+ mrc p15, 0, \rx, c1, c0
+ tst \rx, #1 @ MMU enabled?
+ bne 1002f
+
+ mov \rx, #0xE0000000
+ orr \rx, \rx, #0x00100000
+ ldr \rx, [\rx, #0x118 ]
+ and \rx, \rx, #0xff000
+ teq \rx, #0x50000 @@ S5P6450
+ ldreq \rx, =0xEC800000
+ movne \rx, #0xEC000000 @@ S5P6440
+ b 1003f
+ 1002:
+ ldrne \rx, = S3C_VA_UART
+ 1003:
+#if CONFIG_DEBUG_S3C_UART != 0
+ add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
+#endif
+ .endm
+
+#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5p6440/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
similarity index 58%
rename from arch/arm/mach-s5p6440/include/mach/entry-macro.S
rename to arch/arm/mach-s5p64x0/include/mach/entry-macro.S
index e65f1b9..10b62b4 100644
--- a/arch/arm/mach-s5p6440/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/entry-macro.S
+/* linux/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * Low-level IRQ helper macros for the Samsung S5P6440
+ * Low-level IRQ helper macros for the Samsung S5P64X0
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5p6440/include/mach/hardware.h b/arch/arm/mach-s5p64x0/include/mach/hardware.h
similarity index 67%
rename from arch/arm/mach-s5p6440/include/mach/hardware.h
rename to arch/arm/mach-s5p64x0/include/mach/hardware.h
index be8b26e..d3e8799 100644
--- a/arch/arm/mach-s5p6440/include/mach/hardware.h
+++ b/arch/arm/mach-s5p64x0/include/mach/hardware.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/hardware.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/hardware.h
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5P6440 - Hardware support
+ * S5P64X0 - Hardware support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5p64x0/include/mach/io.h b/arch/arm/mach-s5p64x0/include/mach/io.h
new file mode 100644
index 0000000..a3e095c
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/io.h
@@ -0,0 +1,25 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/io.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Copyright 2008 Simtec Electronics
+ * Ben Dooks <ben-linux@fluff.org>
+ *
+ * Default IO routines for S5P64X0 based
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+/* No current ISA/PCI bus support. */
+#define __io(a) __typesafe_io(a)
+#define __mem_pci(a) (a)
+
+#define IO_SPACE_LIMIT (0xFFFFFFFF)
+
+#endif
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h
new file mode 100644
index 0000000..31e5341
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/map.h
@@ -0,0 +1,83 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/map.h
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P64X0 - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MAP_H
+#define __ASM_ARCH_MAP_H __FILE__
+
+#include <plat/map-base.h>
+#include <plat/map-s5p.h>
+
+#define S5P64X0_PA_SDRAM (0x20000000)
+
+#define S5P64X0_PA_CHIPID (0xE0000000)
+#define S5P_PA_CHIPID S5P64X0_PA_CHIPID
+
+#define S5P64X0_PA_SYSCON (0xE0100000)
+#define S5P_PA_SYSCON S5P64X0_PA_SYSCON
+
+#define S5P64X0_PA_GPIO (0xE0308000)
+
+#define S5P64X0_PA_VIC0 (0xE4000000)
+#define S5P64X0_PA_VIC1 (0xE4100000)
+
+#define S5P64X0_PA_PDMA (0xE9000000)
+
+#define S5P64X0_PA_TIMER (0xEA000000)
+#define S5P_PA_TIMER S5P64X0_PA_TIMER
+
+#define S5P64X0_PA_RTC (0xEA100000)
+
+#define S5P64X0_PA_WDT (0xEA200000)
+
+#define S5P6440_PA_UART(x) (0xEC000000 + ((x) * S3C_UART_OFFSET))
+#define S5P6450_PA_UART(x) ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000))
+
+#define S5P_PA_UART0 S5P6450_PA_UART(0)
+#define S5P_PA_UART1 S5P6450_PA_UART(1)
+#define S5P_PA_UART2 S5P6450_PA_UART(2)
+#define S5P_PA_UART3 S5P6450_PA_UART(3)
+#define S5P_PA_UART4 S5P6450_PA_UART(4)
+#define S5P_PA_UART5 S5P6450_PA_UART(5)
+
+#define S5P_SZ_UART SZ_256
+
+#define S5P6440_PA_IIC0 (0xEC104000)
+#define S5P6440_PA_IIC1 (0xEC20F000)
+#define S5P6450_PA_IIC0 (0xEC100000)
+#define S5P6450_PA_IIC1 (0xEC200000)
+
+#define S5P64X0_PA_SPI0 (0xEC400000)
+#define S5P64X0_PA_SPI1 (0xEC500000)
+
+#define S5P64X0_PA_HSOTG (0xED100000)
+
+#define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000))
+
+#define S5P64X0_PA_I2S (0xF2000000)
+
+#define S5P64X0_PA_PCM (0xF2100000)
+
+#define S5P64X0_PA_ADC (0xF3000000)
+
+/* compatibiltiy defines. */
+
+#define S3C_PA_HSMMC0 S5P64X0_PA_HSMMC(0)
+#define S3C_PA_HSMMC1 S5P64X0_PA_HSMMC(1)
+#define S3C_PA_HSMMC2 S5P64X0_PA_HSMMC(2)
+#define S3C_PA_IIC S5P6440_PA_IIC0
+#define S3C_PA_IIC1 S5P6440_PA_IIC1
+#define S3C_PA_RTC S5P64X0_PA_RTC
+#define S3C_PA_WDT S5P64X0_PA_WDT
+
+#define SAMSUNG_PA_ADC S5P64X0_PA_ADC
+
+#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/memory.h b/arch/arm/mach-s5p64x0/include/mach/memory.h
similarity index 55%
rename from arch/arm/mach-s5p6440/include/mach/memory.h
rename to arch/arm/mach-s5p64x0/include/mach/memory.h
index d62910c..1b036b0 100644
--- a/arch/arm/mach-s5p6440/include/mach/memory.h
+++ b/arch/arm/mach-s5p64x0/include/mach/memory.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/memory.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/memory.h
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5P6440 - Memory definitions
+ * S5P64X0 - Memory definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -11,9 +11,9 @@
*/
#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H __FILE__
-#define PHYS_OFFSET UL(0x20000000)
+#define PHYS_OFFSET UL(0x20000000)
#define CONSISTENT_DMA_SIZE SZ_8M
#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h
similarity index 69%
rename from arch/arm/mach-s5p6440/include/mach/system.h
rename to arch/arm/mach-s5p64x0/include/mach/system.h
index a359ee3..60f5753 100644
--- a/arch/arm/mach-s5p6440/include/mach/system.h
+++ b/arch/arm/mach-s5p64x0/include/mach/system.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/system.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/system.h
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5P6440 - system support header
+ * S5P64X0 - system support header
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5p6440/include/mach/timex.h b/arch/arm/mach-s5p64x0/include/mach/timex.h
similarity index 80%
rename from arch/arm/mach-s5p6440/include/mach/timex.h
rename to arch/arm/mach-s5p64x0/include/mach/timex.h
index fb2e8cd..4b91faa 100644
--- a/arch/arm/mach-s5p6440/include/mach/timex.h
+++ b/arch/arm/mach-s5p64x0/include/mach/timex.h
@@ -1,9 +1,12 @@
-/* arch/arm/mach-s3c64xx/include/mach/timex.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/timex.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* Copyright (c) 2003-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
- * S3C6400 - time parameters
+ * S5P64X0 - time parameters
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5p64x0/include/mach/uncompress.h b/arch/arm/mach-s5p64x0/include/mach/uncompress.h
new file mode 100644
index 0000000..c65b229
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/uncompress.h
@@ -0,0 +1,212 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/uncompress.h
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P64X0 - uncompress code
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H
+
+#include <mach/map.h>
+
+/*
+ * cannot use commonly <plat/uncompress.h>
+ * because uart base of S5P6440 and S5P6450 is different
+ */
+
+typedef unsigned int upf_t; /* cannot include linux/serial_core.h */
+
+/* uart setup */
+
+static unsigned int fifo_mask;
+static unsigned int fifo_max;
+
+/* forward declerations */
+
+static void arch_detect_cpu(void);
+
+/* defines for UART registers */
+
+#include <plat/regs-serial.h>
+#include <plat/regs-watchdog.h>
+
+/* working in physical space... */
+#undef S3C2410_WDOGREG
+#define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x)))
+
+/* how many bytes we allow into the FIFO at a time in FIFO mode */
+#define FIFO_MAX (14)
+
+static unsigned long uart_base;
+
+static __inline__ void get_uart_base(void)
+{
+ unsigned int chipid;
+
+ chipid = *(const volatile unsigned int __force *) 0xE0100118;
+
+ uart_base = S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT;
+
+ if ((chipid & 0xff000) == 0x50000)
+ uart_base += 0xEC800000;
+ else
+ uart_base += 0xEC000000;
+}
+
+static __inline__ void uart_wr(unsigned int reg, unsigned int val)
+{
+ volatile unsigned int *ptr;
+
+ get_uart_base();
+ ptr = (volatile unsigned int *)(reg + uart_base);
+ *ptr = val;
+}
+
+static __inline__ unsigned int uart_rd(unsigned int reg)
+{
+ volatile unsigned int *ptr;
+
+ get_uart_base();
+ ptr = (volatile unsigned int *)(reg + uart_base);
+ return *ptr;
+}
+
+/*
+ * we can deal with the case the UARTs are being run
+ * in FIFO mode, so that we don't hold up our execution
+ * waiting for tx to happen...
+ */
+
+static void putc(int ch)
+{
+ if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
+ int level;
+
+ while (1) {
+ level = uart_rd(S3C2410_UFSTAT);
+ level &= fifo_mask;
+
+ if (level < fifo_max)
+ break;
+ }
+
+ } else {
+ /* not using fifos */
+
+ while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE)
+ barrier();
+ }
+
+ /* write byte to transmission register */
+ uart_wr(S3C2410_UTXH, ch);
+}
+
+static inline void flush(void)
+{
+}
+
+#define __raw_writel(d, ad) \
+ do { \
+ *((volatile unsigned int __force *)(ad)) = (d); \
+ } while (0)
+
+/*
+ * CONFIG_S3C_BOOT_WATCHDOG
+ *
+ * Simple boot-time watchdog setup, to reboot the system if there is
+ * any problem with the boot process
+ */
+
+#ifdef CONFIG_S3C_BOOT_WATCHDOG
+
+#define WDOG_COUNT (0xff00)
+
+static inline void arch_decomp_wdog(void)
+{
+ __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
+}
+
+static void arch_decomp_wdog_start(void)
+{
+ __raw_writel(WDOG_COUNT, S3C2410_WTDAT);
+ __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
+ __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON);
+}
+
+#else
+#define arch_decomp_wdog_start()
+#define arch_decomp_wdog()
+#endif
+
+#ifdef CONFIG_S3C_BOOT_ERROR_RESET
+
+static void arch_decomp_error(const char *x)
+{
+ putstr("\n\n");
+ putstr(x);
+ putstr("\n\n -- System resetting\n");
+
+ __raw_writel(0x4000, S3C2410_WTDAT);
+ __raw_writel(0x4000, S3C2410_WTCNT);
+ __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
+
+ while(1);
+}
+
+#define arch_error arch_decomp_error
+#endif
+
+#ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO
+static inline void arch_enable_uart_fifo(void)
+{
+ u32 fifocon = uart_rd(S3C2410_UFCON);
+
+ if (!(fifocon & S3C2410_UFCON_FIFOMODE)) {
+ fifocon |= S3C2410_UFCON_RESETBOTH;
+ uart_wr(S3C2410_UFCON, fifocon);
+
+ /* wait for fifo reset to complete */
+ while (1) {
+ fifocon = uart_rd(S3C2410_UFCON);
+ if (!(fifocon & S3C2410_UFCON_RESETBOTH))
+ break;
+ }
+ }
+}
+#else
+#define arch_enable_uart_fifo() do { } while(0)
+#endif
+
+static void arch_decomp_setup(void)
+{
+ /*
+ * we may need to setup the uart(s) here if we are not running
+ * on an BAST... the BAST will have left the uarts configured
+ * after calling linux.
+ */
+
+ arch_detect_cpu();
+ arch_decomp_wdog_start();
+
+ /*
+ * Enable the UART FIFOs if they where not enabled and our
+ * configuration says we should turn them on.
+ */
+
+ arch_enable_uart_fifo();
+}
+
+
+
+static void arch_detect_cpu(void)
+{
+ /* we do not need to do any cpu detection here at the moment. */
+}
+
+#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/vmalloc.h b/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
similarity index 74%
rename from arch/arm/mach-s5p6440/include/mach/vmalloc.h
rename to arch/arm/mach-s5p64x0/include/mach/vmalloc.h
index e3f0eeb..97a9df3 100644
--- a/arch/arm/mach-s5p6440/include/mach/vmalloc.h
+++ b/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
@@ -1,4 +1,7 @@
-/* arch/arm/mach-s5p6440/include/mach/vmalloc.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* Copyright 2010 Ben Dooks <ben-linux@fluff.org>
*
diff --git a/arch/arm/mach-s5p64x0/init.c b/arch/arm/mach-s5p64x0/init.c
new file mode 100644
index 0000000..79833ca
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/init.c
@@ -0,0 +1,73 @@
+/* linux/arch/arm/mach-s5p64x0/init.c
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P64X0 - Init support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+
+#include <mach/map.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/s5p6440.h>
+#include <plat/s5p6450.h>
+#include <plat/regs-serial.h>
+
+static struct s3c24xx_uart_clksrc s5p64x0_serial_clocks[] = {
+ [0] = {
+ .name = "pclk_low",
+ .divisor = 1,
+ .min_baud = 0,
+ .max_baud = 0,
+ },
+ [1] = {
+ .name = "uclk1",
+ .divisor = 1,
+ .min_baud = 0,
+ .max_baud = 0,
+ },
+};
+
+/* uart registration process */
+
+void __init s5p64x0_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+ struct s3c2410_uartcfg *tcfg = cfg;
+ u32 ucnt;
+
+ for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
+ if (!tcfg->clocks) {
+ tcfg->clocks = s5p64x0_serial_clocks;
+ tcfg->clocks_size = ARRAY_SIZE(s5p64x0_serial_clocks);
+ }
+ }
+}
+
+void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+ int uart;
+
+ for (uart = 0; uart < no; uart++) {
+ s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart);
+ s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART;
+ }
+
+ s5p64x0_common_init_uarts(cfg, no);
+ s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
+}
+
+void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+ s5p64x0_common_init_uarts(cfg, no);
+ s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
+}
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
index 57f08ee..74f7f5a 100644
--- a/arch/arm/plat-s5p/cpu.c
+++ b/arch/arm/plat-s5p/cpu.c
@@ -19,6 +19,7 @@
#include <plat/cpu.h>
#include <plat/s5p6440.h>
#include <plat/s5p6442.h>
+#include <plat/s5p6450.h>
#include <plat/s5pc100.h>
#include <plat/s5pv210.h>
#include <plat/s5pv310.h>
@@ -27,6 +28,7 @@
static const char name_s5p6440[] = "S5P6440";
static const char name_s5p6442[] = "S5P6442";
+static const char name_s5p6450[] = "S5P6450";
static const char name_s5pc100[] = "S5PC100";
static const char name_s5pv210[] = "S5PV210/S5PC110";
static const char name_s5pv310[] = "S5PV310";
@@ -38,7 +40,7 @@ static struct cpu_table cpu_ids[] __initdata = {
.map_io = s5p6440_map_io,
.init_clocks = s5p6440_init_clocks,
.init_uarts = s5p6440_init_uarts,
- .init = s5p6440_init,
+ .init = s5p64x0_init,
.name = name_s5p6440,
}, {
.idcode = 0x36442000,
@@ -49,6 +51,14 @@ static struct cpu_table cpu_ids[] __initdata = {
.init = s5p6442_init,
.name = name_s5p6442,
}, {
+ .idcode = 0x36450000,
+ .idmask = 0xffffff00,
+ .map_io = s5p6450_map_io,
+ .init_clocks = s5p6450_init_clocks,
+ .init_uarts = s5p6450_init_uarts,
+ .init = s5p64x0_init,
+ .name = name_s5p6450,
+ }, {
.idcode = 0x43100000,
.idmask = 0xfffff000,
.map_io = s5pc100_map_io,
diff --git a/arch/arm/plat-s5p/include/plat/s5p6440.h b/arch/arm/plat-s5p/include/plat/s5p6440.h
index a4cd75a..528585d 100644
--- a/arch/arm/plat-s5p/include/plat/s5p6440.h
+++ b/arch/arm/plat-s5p/include/plat/s5p6440.h
@@ -12,24 +12,23 @@
/* Common init code for S5P6440 related SoCs */
-extern void s5p6440_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
extern void s5p6440_register_clocks(void);
extern void s5p6440_setup_clocks(void);
#ifdef CONFIG_CPU_S5P6440
-extern int s5p6440_init(void);
+extern int s5p64x0_init(void);
extern void s5p6440_init_irq(void);
extern void s5p6440_map_io(void);
extern void s5p6440_init_clocks(int xtal);
-#define s5p6440_init_uarts s5p6440_common_init_uarts
+extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
#else
#define s5p6440_init_clocks NULL
#define s5p6440_init_uarts NULL
#define s5p6440_map_io NULL
-#define s5p6440_init NULL
+#define s5p64x0_init NULL
#endif
/* S5P6440 timer */
diff --git a/arch/arm/plat-s5p/include/plat/s5p6450.h b/arch/arm/plat-s5p/include/plat/s5p6450.h
new file mode 100644
index 0000000..640a41c
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5p6450.h
@@ -0,0 +1,36 @@
+/* arch/arm/plat-s5p/include/plat/s5p6450.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Header file for s5p6450 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* Common init code for S5P6450 related SoCs */
+
+extern void s5p6450_register_clocks(void);
+extern void s5p6450_setup_clocks(void);
+
+#ifdef CONFIG_CPU_S5P6450
+
+extern int s5p64x0_init(void);
+extern void s5p6450_init_irq(void);
+extern void s5p6450_map_io(void);
+extern void s5p6450_init_clocks(int xtal);
+
+extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+
+#else
+#define s5p6450_init_clocks NULL
+#define s5p6450_init_uarts NULL
+#define s5p6450_map_io NULL
+#define s5p64x0_init NULL
+#endif
+
+/* S5P6450 timer */
+
+extern struct sys_timer s5p6450_timer;
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 03/13] ARM: S5P64X0: Add S5P64X0(S5P6440 and S5P6450) initialization support
@ 2010-09-01 7:09 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds ARCH_S5P64X0 which can support S5P6440 and S5P6450 with
one kernel image. So moved some files of mach-s5p6440 into the new ARCH
directory mach-s5p64x0.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/mach-s5p6440/cpu.c | 145 -------------
arch/arm/mach-s5p6440/include/mach/debug-macro.S | 37 ----
arch/arm/mach-s5p6440/include/mach/io.h | 18 --
arch/arm/mach-s5p6440/include/mach/map.h | 81 --------
arch/arm/mach-s5p6440/include/mach/uncompress.h | 24 ---
arch/arm/mach-s5p6440/init.c | 52 -----
arch/arm/mach-s5p64x0/cpu.c | 208 +++++++++++++++++++
arch/arm/mach-s5p64x0/include/mach/debug-macro.S | 39 ++++
.../include/mach/entry-macro.S | 8 +-
.../include/mach/hardware.h | 8 +-
arch/arm/mach-s5p64x0/include/mach/io.h | 25 +++
arch/arm/mach-s5p64x0/include/mach/map.h | 83 ++++++++
.../include/mach/memory.h | 12 +-
.../include/mach/system.h | 8 +-
.../include/mach/timex.h | 7 +-
arch/arm/mach-s5p64x0/include/mach/uncompress.h | 212 ++++++++++++++++++++
.../include/mach/vmalloc.h | 5 +-
arch/arm/mach-s5p64x0/init.c | 73 +++++++
arch/arm/plat-s5p/cpu.c | 12 +-
arch/arm/plat-s5p/include/plat/s5p6440.h | 7 +-
arch/arm/plat-s5p/include/plat/s5p6450.h | 36 ++++
21 files changed, 717 insertions(+), 383 deletions(-)
delete mode 100644 arch/arm/mach-s5p6440/cpu.c
delete mode 100644 arch/arm/mach-s5p6440/include/mach/debug-macro.S
delete mode 100644 arch/arm/mach-s5p6440/include/mach/io.h
delete mode 100644 arch/arm/mach-s5p6440/include/mach/map.h
delete mode 100644 arch/arm/mach-s5p6440/include/mach/uncompress.h
delete mode 100644 arch/arm/mach-s5p6440/init.c
create mode 100644 arch/arm/mach-s5p64x0/cpu.c
create mode 100644 arch/arm/mach-s5p64x0/include/mach/debug-macro.S
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/entry-macro.S (58%)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/hardware.h (67%)
create mode 100644 arch/arm/mach-s5p64x0/include/mach/io.h
create mode 100644 arch/arm/mach-s5p64x0/include/mach/map.h
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/memory.h (55%)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/system.h (69%)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/timex.h (80%)
create mode 100644 arch/arm/mach-s5p64x0/include/mach/uncompress.h
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/vmalloc.h (74%)
create mode 100644 arch/arm/mach-s5p64x0/init.c
create mode 100644 arch/arm/plat-s5p/include/plat/s5p6450.h
diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c
deleted file mode 100644
index a3c33d9..0000000
--- a/arch/arm/mach-s5p6440/cpu.c
+++ /dev/null
@@ -1,145 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/cpu.c
- *
- * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
- * http://www.samsung.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/interrupt.h>
-#include <linux/list.h>
-#include <linux/timer.h>
-#include <linux/init.h>
-#include <linux/clk.h>
-#include <linux/io.h>
-#include <linux/sysdev.h>
-#include <linux/serial_core.h>
-#include <linux/platform_device.h>
-
-#include <asm/mach/arch.h>
-#include <asm/mach/map.h>
-#include <asm/mach/irq.h>
-
-#include <asm/proc-fns.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <asm/irq.h>
-
-#include <plat/regs-serial.h>
-#include <mach/regs-clock.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/clock.h>
-#include <plat/s5p6440.h>
-#include <plat/adc-core.h>
-
-/* Initial IO mappings */
-
-static struct map_desc s5p6440_iodesc[] __initdata = {
- {
- .virtual = (unsigned long)S5P_VA_GPIO,
- .pfn = __phys_to_pfn(S5P6440_PA_GPIO),
- .length = SZ_4K,
- .type = MT_DEVICE,
- }, {
- .virtual = (unsigned long)VA_VIC0,
- .pfn = __phys_to_pfn(S5P6440_PA_VIC0),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
- .virtual = (unsigned long)VA_VIC1,
- .pfn = __phys_to_pfn(S5P6440_PA_VIC1),
- .length = SZ_16K,
- .type = MT_DEVICE,
- }, {
- .virtual = (unsigned long)S3C_VA_UART,
- .pfn = __phys_to_pfn(S3C_PA_UART),
- .length = SZ_512K,
- .type = MT_DEVICE,
- }
-};
-
-static void s5p6440_idle(void)
-{
- unsigned long val;
-
- if (!need_resched()) {
- val = __raw_readl(S5P_PWR_CFG);
- val &= ~(0x3<<5);
- val |= (0x1<<5);
- __raw_writel(val, S5P_PWR_CFG);
-
- cpu_do_idle();
- }
- local_irq_enable();
-}
-
-/*
- * s5p6440_map_io
- *
- * register the standard cpu IO areas
- */
-
-void __init s5p6440_map_io(void)
-{
- /* initialize any device information early */
- s3c_adc_setname("s3c64xx-adc");
-
- iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
-}
-
-void __init s5p6440_init_clocks(int xtal)
-{
- printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
-
- s3c24xx_register_baseclocks(xtal);
- s5p_register_clocks(xtal);
- s5p6440_register_clocks();
- s5p6440_setup_clocks();
-}
-
-void __init s5p6440_init_irq(void)
-{
- /* S5P6440 supports only 2 VIC */
- u32 vic[2];
-
- /*
- * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
- * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
- */
- vic[0] = 0xff800ae7;
- vic[1] = 0xffbf23e5;
-
- s5p_init_irq(vic, ARRAY_SIZE(vic));
-}
-
-struct sysdev_class s5p6440_sysclass = {
- .name = "s5p6440-core",
-};
-
-static struct sys_device s5p6440_sysdev = {
- .cls = &s5p6440_sysclass,
-};
-
-static int __init s5p6440_core_init(void)
-{
- return sysdev_class_register(&s5p6440_sysclass);
-}
-
-core_initcall(s5p6440_core_init);
-
-int __init s5p6440_init(void)
-{
- printk(KERN_INFO "S5P6440: Initializing architecture\n");
-
- /* set idle function */
- pm_idle = s5p6440_idle;
-
- return sysdev_register(&s5p6440_sysdev);
-}
diff --git a/arch/arm/mach-s5p6440/include/mach/debug-macro.S b/arch/arm/mach-s5p6440/include/mach/debug-macro.S
deleted file mode 100644
index 1347d7f..0000000
--- a/arch/arm/mach-s5p6440/include/mach/debug-macro.S
+++ /dev/null
@@ -1,37 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/debug-macro.S
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-/* pull in the relevant register and map files. */
-
-#include <mach/map.h>
-#include <plat/regs-serial.h>
-
- /* note, for the boot process to work we have to keep the UART
- * virtual address aligned to an 1MiB boundary for the L1
- * mapping the head code makes. We keep the UART virtual address
- * aligned and add in the offset when we load the value here.
- */
-
- .macro addruart, rx, rtmp
- mrc p15, 0, \rx, c1, c0
- tst \rx, #1
- ldreq \rx, = S3C_PA_UART
- ldrne \rx, = S3C_VA_UART
-#if CONFIG_DEBUG_S3C_UART != 0
- add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
-#endif
- .endm
-
-/* include the reset of the code which will do the work, we're only
- * compiling for a single cpu processor type so the default of s3c2440
- * will be fine with us.
- */
-
-#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5p6440/include/mach/io.h b/arch/arm/mach-s5p6440/include/mach/io.h
deleted file mode 100644
index fa2d69c..0000000
--- a/arch/arm/mach-s5p6440/include/mach/io.h
+++ /dev/null
@@ -1,18 +0,0 @@
-/* arch/arm/mach-s5p6440/include/mach/io.h
- *
- * Copyright 2008 Simtec Electronics
- * Ben Dooks <ben-linux@fluff.org>
- *
- * Default IO routines for S3C64XX based
- */
-
-#ifndef __ASM_ARM_ARCH_IO_H
-#define __ASM_ARM_ARCH_IO_H
-
-/* No current ISA/PCI bus support. */
-#define __io(a) __typesafe_io(a)
-#define __mem_pci(a) (a)
-
-#define IO_SPACE_LIMIT (0xFFFFFFFF)
-
-#endif
diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h
deleted file mode 100644
index 11d31fe..0000000
--- a/arch/arm/mach-s5p6440/include/mach/map.h
+++ /dev/null
@@ -1,81 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/map.h
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S5P6440 - Memory map definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_MAP_H
-#define __ASM_ARCH_MAP_H __FILE__
-
-#include <plat/map-base.h>
-#include <plat/map-s5p.h>
-
-#define S5P6440_PA_CHIPID (0xE0000000)
-#define S5P_PA_CHIPID S5P6440_PA_CHIPID
-
-#define S5P6440_PA_SYSCON (0xE0100000)
-#define S5P6440_PA_CLK (S5P6440_PA_SYSCON + 0x0)
-#define S5P_PA_SYSCON S5P6440_PA_SYSCON
-
-#define S5P6440_PA_GPIO (0xE0308000)
-
-#define S5P6440_PA_VIC0 (0xE4000000)
-#define S5P6440_PA_VIC1 (0xE4100000)
-
-#define S5P6440_PA_PDMA 0xE9000000
-
-#define S5P6440_PA_TIMER (0xEA000000)
-#define S5P_PA_TIMER S5P6440_PA_TIMER
-
-#define S5P6440_PA_RTC (0xEA100000)
-
-#define S5P6440_PA_WDT (0xEA200000)
-
-#define S5P6440_PA_UART (0xEC000000)
-
-#define S5P_PA_UART0 (S5P6440_PA_UART + 0x0)
-#define S5P_PA_UART1 (S5P6440_PA_UART + 0x400)
-#define S5P_PA_UART2 (S5P6440_PA_UART + 0x800)
-#define S5P_PA_UART3 (S5P6440_PA_UART + 0xC00)
-
-#define S5P_SZ_UART SZ_256
-
-#define S5P6440_PA_IIC0 (0xEC104000)
-#define S5P6440_PA_IIC1 (0xEC20F000)
-
-#define S5P6440_PA_SPI0 0xEC400000
-#define S5P6440_PA_SPI1 0xEC500000
-
-#define S5P6440_PA_HSOTG (0xED100000)
-
-#define S5P6440_PA_HSMMC0 (0xED800000)
-#define S5P6440_PA_HSMMC1 (0xED900000)
-#define S5P6440_PA_HSMMC2 (0xEDA00000)
-
-#define S5P6440_PA_SDRAM (0x20000000)
-#define S5P_PA_SDRAM S5P6440_PA_SDRAM
-
-/* I2S */
-#define S5P6440_PA_I2S 0xF2000000
-
-/* PCM */
-#define S5P6440_PA_PCM 0xF2100000
-
-#define S5P6440_PA_ADC (0xF3000000)
-
-/* compatibiltiy defines. */
-#define S3C_PA_UART S5P6440_PA_UART
-#define S3C_PA_IIC S5P6440_PA_IIC0
-#define S3C_PA_RTC S5P6440_PA_RTC
-#define S3C_PA_IIC1 S5P6440_PA_IIC1
-#define S3C_PA_WDT S5P6440_PA_WDT
-
-#define SAMSUNG_PA_ADC S5P6440_PA_ADC
-
-#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/uncompress.h b/arch/arm/mach-s5p6440/include/mach/uncompress.h
deleted file mode 100644
index 7c1f600..0000000
--- a/arch/arm/mach-s5p6440/include/mach/uncompress.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/uncompress.h
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S5P6440 - uncompress code
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_UNCOMPRESS_H
-#define __ASM_ARCH_UNCOMPRESS_H
-
-#include <mach/map.h>
-#include <plat/uncompress.h>
-
-static void arch_detect_cpu(void)
-{
- /* we do not need to do any cpu detection here at the moment. */
-}
-
-#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5p6440/init.c b/arch/arm/mach-s5p6440/init.c
deleted file mode 100644
index a1f3727..0000000
--- a/arch/arm/mach-s5p6440/init.c
+++ /dev/null
@@ -1,52 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/init.c
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S5P6440 - Init support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/init.h>
-#include <linux/serial_core.h>
-
-#include <plat/cpu.h>
-#include <plat/devs.h>
-#include <plat/s5p6440.h>
-#include <plat/regs-serial.h>
-
-static struct s3c24xx_uart_clksrc s5p6440_serial_clocks[] = {
- [0] = {
- .name = "pclk_low",
- .divisor = 1,
- .min_baud = 0,
- .max_baud = 0,
- },
- [1] = {
- .name = "uclk1",
- .divisor = 1,
- .min_baud = 0,
- .max_baud = 0,
- },
-};
-
-/* uart registration process */
-void __init s5p6440_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
-{
- struct s3c2410_uartcfg *tcfg = cfg;
- u32 ucnt;
-
- for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
- if (!tcfg->clocks) {
- tcfg->clocks = s5p6440_serial_clocks;
- tcfg->clocks_size = ARRAY_SIZE(s5p6440_serial_clocks);
- }
- }
-
- s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
-}
diff --git a/arch/arm/mach-s5p64x0/cpu.c b/arch/arm/mach-s5p64x0/cpu.c
new file mode 100644
index 0000000..fb90a30
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/cpu.c
@@ -0,0 +1,208 @@
+/* linux/arch/arm/mach-s5p64x0/cpu.c
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/init.h>
+#include <linux/clk.h>
+#include <linux/io.h>
+#include <linux/sysdev.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/mach/irq.h>
+#include <asm/proc-fns.h>
+#include <asm/irq.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+
+#include <plat/regs-serial.h>
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/clock.h>
+#include <plat/s5p6440.h>
+#include <plat/s5p6450.h>
+#include <plat/adc-core.h>
+
+/* Initial IO mappings */
+
+static struct map_desc s5p64x0_iodesc[] __initdata = {
+ {
+ .virtual = (unsigned long)S5P_VA_GPIO,
+ .pfn = __phys_to_pfn(S5P64X0_PA_GPIO),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC0,
+ .pfn = __phys_to_pfn(S5P64X0_PA_VIC0),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)VA_VIC1,
+ .pfn = __phys_to_pfn(S5P64X0_PA_VIC1),
+ .length = SZ_16K,
+ .type = MT_DEVICE,
+ },
+};
+
+static struct map_desc s5p6440_iodesc[] __initdata = {
+ {
+ .virtual = (unsigned long)S3C_VA_UART,
+ .pfn = __phys_to_pfn(S5P6440_PA_UART(0)),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ },
+};
+
+static struct map_desc s5p6450_iodesc[] __initdata = {
+ {
+ .virtual = (unsigned long)S3C_VA_UART,
+ .pfn = __phys_to_pfn(S5P6450_PA_UART(0)),
+ .length = SZ_512K,
+ .type = MT_DEVICE,
+ }, {
+ .virtual = (unsigned long)S3C_VA_UART + SZ_512K,
+ .pfn = __phys_to_pfn(S5P6450_PA_UART(5)),
+ .length = SZ_4K,
+ .type = MT_DEVICE,
+ },
+};
+
+static void s5p64x0_idle(void)
+{
+ unsigned long val;
+
+ if (!need_resched()) {
+ val = __raw_readl(S5P64X0_PWR_CFG);
+ val &= ~(0x3 << 5);
+ val |= (0x1 << 5);
+ __raw_writel(val, S5P64X0_PWR_CFG);
+
+ cpu_do_idle();
+ }
+ local_irq_enable();
+}
+
+/*
+ * s5p64x0_map_io
+ *
+ * register the standard CPU IO areas
+ */
+
+void __init s5p6440_map_io(void)
+{
+ /* initialize any device information early */
+ s3c_adc_setname("s3c64x0-adc");
+
+ iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
+ iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
+}
+
+void __init s5p6450_map_io(void)
+{
+ /* initialize any device information early */
+ s3c_adc_setname("s3c64x0-adc");
+
+ iotable_init(s5p64x0_iodesc, ARRAY_SIZE(s5p64x0_iodesc));
+ iotable_init(s5p6450_iodesc, ARRAY_SIZE(s5p6440_iodesc));
+}
+
+/*
+ * s5p64x0_init_clocks
+ *
+ * register and setup the CPU clocks
+ */
+
+void __init s5p6440_init_clocks(int xtal)
+{
+ printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+ s3c24xx_register_baseclocks(xtal);
+ s5p_register_clocks(xtal);
+ s5p6440_register_clocks();
+ s5p6440_setup_clocks();
+}
+
+void __init s5p6450_init_clocks(int xtal)
+{
+ printk(KERN_DEBUG "%s: initializing clocks\n", __func__);
+
+ s3c24xx_register_baseclocks(xtal);
+ s5p_register_clocks(xtal);
+ s5p6450_register_clocks();
+ s5p6450_setup_clocks();
+}
+
+/*
+ * s5p64x0_init_irq
+ *
+ * register the CPU interrupts
+ */
+
+void __init s5p6440_init_irq(void)
+{
+ /* S5P6440 supports 2 VIC */
+ u32 vic[2];
+
+ /*
+ * VIC0 is missing IRQ_VIC0[3, 4, 8, 10, (12-22)]
+ * VIC1 is missing IRQ VIC1[1, 3, 4, 10, 11, 12, 14, 15, 22]
+ */
+ vic[0] = 0xff800ae7;
+ vic[1] = 0xffbf23e5;
+
+ s5p_init_irq(vic, ARRAY_SIZE(vic));
+}
+
+void __init s5p6450_init_irq(void)
+{
+ /* S5P6450 supports only 2 VIC */
+ u32 vic[2];
+
+ /*
+ * VIC0 is missing IRQ_VIC0[(13-15), (21-22)]
+ * VIC1 is missing IRQ VIC1[12, 14, 23]
+ */
+ vic[0] = 0xff9f1fff;
+ vic[1] = 0xff7fafff;
+
+ s5p_init_irq(vic, ARRAY_SIZE(vic));
+}
+
+struct sysdev_class s5p64x0_sysclass = {
+ .name = "s5p64x0-core",
+};
+
+static struct sys_device s5p64x0_sysdev = {
+ .cls = &s5p64x0_sysclass,
+};
+
+static int __init s5p64x0_core_init(void)
+{
+ return sysdev_class_register(&s5p64x0_sysclass);
+}
+core_initcall(s5p64x0_core_init);
+
+int __init s5p64x0_init(void)
+{
+ printk(KERN_INFO "S5P64X0(S5P6440/S5P6450): Initializing architecture\n");
+
+ /* set idle function */
+ pm_idle = s5p64x0_idle;
+
+ return sysdev_register(&s5p64x0_sysdev);
+}
diff --git a/arch/arm/mach-s5p64x0/include/mach/debug-macro.S b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
new file mode 100644
index 0000000..f122baa
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
@@ -0,0 +1,39 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/debug-macro.S
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* pull in the relevant register and map files. */
+
+#include <plat/map-base.h>
+#include <plat/map-s5p.h>
+
+#include <plat/regs-serial.h>
+
+ .macro addruart, rx, tmp
+ mrc p15, 0, \rx, c1, c0
+ tst \rx, #1 @ MMU enabled?
+ bne 1002f
+
+ mov \rx, #0xE0000000
+ orr \rx, \rx, #0x00100000
+ ldr \rx, [\rx, #0x118 ]
+ and \rx, \rx, #0xff000
+ teq \rx, #0x50000 @@ S5P6450
+ ldreq \rx, =0xEC800000
+ movne \rx, #0xEC000000 @@ S5P6440
+ b 1003f
+ 1002:
+ ldrne \rx, = S3C_VA_UART
+ 1003:
+#if CONFIG_DEBUG_S3C_UART != 0
+ add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART)
+#endif
+ .endm
+
+#include <plat/debug-macro.S>
diff --git a/arch/arm/mach-s5p6440/include/mach/entry-macro.S b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
similarity index 58%
rename from arch/arm/mach-s5p6440/include/mach/entry-macro.S
rename to arch/arm/mach-s5p64x0/include/mach/entry-macro.S
index e65f1b9..10b62b4 100644
--- a/arch/arm/mach-s5p6440/include/mach/entry-macro.S
+++ b/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/entry-macro.S
+/* linux/arch/arm/mach-s5p64x0/include/mach/entry-macro.S
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * Low-level IRQ helper macros for the Samsung S5P6440
+ * Low-level IRQ helper macros for the Samsung S5P64X0
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5p6440/include/mach/hardware.h b/arch/arm/mach-s5p64x0/include/mach/hardware.h
similarity index 67%
rename from arch/arm/mach-s5p6440/include/mach/hardware.h
rename to arch/arm/mach-s5p64x0/include/mach/hardware.h
index be8b26e..d3e8799 100644
--- a/arch/arm/mach-s5p6440/include/mach/hardware.h
+++ b/arch/arm/mach-s5p64x0/include/mach/hardware.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/hardware.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/hardware.h
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5P6440 - Hardware support
+ * S5P64X0 - Hardware support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5p64x0/include/mach/io.h b/arch/arm/mach-s5p64x0/include/mach/io.h
new file mode 100644
index 0000000..a3e095c
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/io.h
@@ -0,0 +1,25 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/io.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Copyright 2008 Simtec Electronics
+ * Ben Dooks <ben-linux@fluff.org>
+ *
+ * Default IO routines for S5P64X0 based
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARM_ARCH_IO_H
+#define __ASM_ARM_ARCH_IO_H
+
+/* No current ISA/PCI bus support. */
+#define __io(a) __typesafe_io(a)
+#define __mem_pci(a) (a)
+
+#define IO_SPACE_LIMIT (0xFFFFFFFF)
+
+#endif
diff --git a/arch/arm/mach-s5p64x0/include/mach/map.h b/arch/arm/mach-s5p64x0/include/mach/map.h
new file mode 100644
index 0000000..31e5341
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/map.h
@@ -0,0 +1,83 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/map.h
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P64X0 - Memory map definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_MAP_H
+#define __ASM_ARCH_MAP_H __FILE__
+
+#include <plat/map-base.h>
+#include <plat/map-s5p.h>
+
+#define S5P64X0_PA_SDRAM (0x20000000)
+
+#define S5P64X0_PA_CHIPID (0xE0000000)
+#define S5P_PA_CHIPID S5P64X0_PA_CHIPID
+
+#define S5P64X0_PA_SYSCON (0xE0100000)
+#define S5P_PA_SYSCON S5P64X0_PA_SYSCON
+
+#define S5P64X0_PA_GPIO (0xE0308000)
+
+#define S5P64X0_PA_VIC0 (0xE4000000)
+#define S5P64X0_PA_VIC1 (0xE4100000)
+
+#define S5P64X0_PA_PDMA (0xE9000000)
+
+#define S5P64X0_PA_TIMER (0xEA000000)
+#define S5P_PA_TIMER S5P64X0_PA_TIMER
+
+#define S5P64X0_PA_RTC (0xEA100000)
+
+#define S5P64X0_PA_WDT (0xEA200000)
+
+#define S5P6440_PA_UART(x) (0xEC000000 + ((x) * S3C_UART_OFFSET))
+#define S5P6450_PA_UART(x) ((x < 5) ? (0xEC800000 + ((x) * S3C_UART_OFFSET)) : (0xEC000000))
+
+#define S5P_PA_UART0 S5P6450_PA_UART(0)
+#define S5P_PA_UART1 S5P6450_PA_UART(1)
+#define S5P_PA_UART2 S5P6450_PA_UART(2)
+#define S5P_PA_UART3 S5P6450_PA_UART(3)
+#define S5P_PA_UART4 S5P6450_PA_UART(4)
+#define S5P_PA_UART5 S5P6450_PA_UART(5)
+
+#define S5P_SZ_UART SZ_256
+
+#define S5P6440_PA_IIC0 (0xEC104000)
+#define S5P6440_PA_IIC1 (0xEC20F000)
+#define S5P6450_PA_IIC0 (0xEC100000)
+#define S5P6450_PA_IIC1 (0xEC200000)
+
+#define S5P64X0_PA_SPI0 (0xEC400000)
+#define S5P64X0_PA_SPI1 (0xEC500000)
+
+#define S5P64X0_PA_HSOTG (0xED100000)
+
+#define S5P64X0_PA_HSMMC(x) (0xED800000 + ((x) * 0x100000))
+
+#define S5P64X0_PA_I2S (0xF2000000)
+
+#define S5P64X0_PA_PCM (0xF2100000)
+
+#define S5P64X0_PA_ADC (0xF3000000)
+
+/* compatibiltiy defines. */
+
+#define S3C_PA_HSMMC0 S5P64X0_PA_HSMMC(0)
+#define S3C_PA_HSMMC1 S5P64X0_PA_HSMMC(1)
+#define S3C_PA_HSMMC2 S5P64X0_PA_HSMMC(2)
+#define S3C_PA_IIC S5P6440_PA_IIC0
+#define S3C_PA_IIC1 S5P6440_PA_IIC1
+#define S3C_PA_RTC S5P64X0_PA_RTC
+#define S3C_PA_WDT S5P64X0_PA_WDT
+
+#define SAMSUNG_PA_ADC S5P64X0_PA_ADC
+
+#endif /* __ASM_ARCH_MAP_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/memory.h b/arch/arm/mach-s5p64x0/include/mach/memory.h
similarity index 55%
rename from arch/arm/mach-s5p6440/include/mach/memory.h
rename to arch/arm/mach-s5p64x0/include/mach/memory.h
index d62910c..1b036b0 100644
--- a/arch/arm/mach-s5p6440/include/mach/memory.h
+++ b/arch/arm/mach-s5p64x0/include/mach/memory.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/memory.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/memory.h
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5P6440 - Memory definitions
+ * S5P64X0 - Memory definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -11,9 +11,9 @@
*/
#ifndef __ASM_ARCH_MEMORY_H
-#define __ASM_ARCH_MEMORY_H
+#define __ASM_ARCH_MEMORY_H __FILE__
-#define PHYS_OFFSET UL(0x20000000)
+#define PHYS_OFFSET UL(0x20000000)
#define CONSISTENT_DMA_SIZE SZ_8M
#endif /* __ASM_ARCH_MEMORY_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/system.h b/arch/arm/mach-s5p64x0/include/mach/system.h
similarity index 69%
rename from arch/arm/mach-s5p6440/include/mach/system.h
rename to arch/arm/mach-s5p64x0/include/mach/system.h
index a359ee3..60f5753 100644
--- a/arch/arm/mach-s5p6440/include/mach/system.h
+++ b/arch/arm/mach-s5p64x0/include/mach/system.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/system.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/system.h
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5P6440 - system support header
+ * S5P64X0 - system support header
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5p6440/include/mach/timex.h b/arch/arm/mach-s5p64x0/include/mach/timex.h
similarity index 80%
rename from arch/arm/mach-s5p6440/include/mach/timex.h
rename to arch/arm/mach-s5p64x0/include/mach/timex.h
index fb2e8cd..4b91faa 100644
--- a/arch/arm/mach-s5p6440/include/mach/timex.h
+++ b/arch/arm/mach-s5p64x0/include/mach/timex.h
@@ -1,9 +1,12 @@
-/* arch/arm/mach-s3c64xx/include/mach/timex.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/timex.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* Copyright (c) 2003-2005 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
*
- * S3C6400 - time parameters
+ * S5P64X0 - time parameters
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5p64x0/include/mach/uncompress.h b/arch/arm/mach-s5p64x0/include/mach/uncompress.h
new file mode 100644
index 0000000..c65b229
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/uncompress.h
@@ -0,0 +1,212 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/uncompress.h
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P64X0 - uncompress code
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_UNCOMPRESS_H
+#define __ASM_ARCH_UNCOMPRESS_H
+
+#include <mach/map.h>
+
+/*
+ * cannot use commonly <plat/uncompress.h>
+ * because uart base of S5P6440 and S5P6450 is different
+ */
+
+typedef unsigned int upf_t; /* cannot include linux/serial_core.h */
+
+/* uart setup */
+
+static unsigned int fifo_mask;
+static unsigned int fifo_max;
+
+/* forward declerations */
+
+static void arch_detect_cpu(void);
+
+/* defines for UART registers */
+
+#include <plat/regs-serial.h>
+#include <plat/regs-watchdog.h>
+
+/* working in physical space... */
+#undef S3C2410_WDOGREG
+#define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x)))
+
+/* how many bytes we allow into the FIFO at a time in FIFO mode */
+#define FIFO_MAX (14)
+
+static unsigned long uart_base;
+
+static __inline__ void get_uart_base(void)
+{
+ unsigned int chipid;
+
+ chipid = *(const volatile unsigned int __force *) 0xE0100118;
+
+ uart_base = S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT;
+
+ if ((chipid & 0xff000) == 0x50000)
+ uart_base += 0xEC800000;
+ else
+ uart_base += 0xEC000000;
+}
+
+static __inline__ void uart_wr(unsigned int reg, unsigned int val)
+{
+ volatile unsigned int *ptr;
+
+ get_uart_base();
+ ptr = (volatile unsigned int *)(reg + uart_base);
+ *ptr = val;
+}
+
+static __inline__ unsigned int uart_rd(unsigned int reg)
+{
+ volatile unsigned int *ptr;
+
+ get_uart_base();
+ ptr = (volatile unsigned int *)(reg + uart_base);
+ return *ptr;
+}
+
+/*
+ * we can deal with the case the UARTs are being run
+ * in FIFO mode, so that we don't hold up our execution
+ * waiting for tx to happen...
+ */
+
+static void putc(int ch)
+{
+ if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
+ int level;
+
+ while (1) {
+ level = uart_rd(S3C2410_UFSTAT);
+ level &= fifo_mask;
+
+ if (level < fifo_max)
+ break;
+ }
+
+ } else {
+ /* not using fifos */
+
+ while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE)
+ barrier();
+ }
+
+ /* write byte to transmission register */
+ uart_wr(S3C2410_UTXH, ch);
+}
+
+static inline void flush(void)
+{
+}
+
+#define __raw_writel(d, ad) \
+ do { \
+ *((volatile unsigned int __force *)(ad)) = (d); \
+ } while (0)
+
+/*
+ * CONFIG_S3C_BOOT_WATCHDOG
+ *
+ * Simple boot-time watchdog setup, to reboot the system if there is
+ * any problem with the boot process
+ */
+
+#ifdef CONFIG_S3C_BOOT_WATCHDOG
+
+#define WDOG_COUNT (0xff00)
+
+static inline void arch_decomp_wdog(void)
+{
+ __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
+}
+
+static void arch_decomp_wdog_start(void)
+{
+ __raw_writel(WDOG_COUNT, S3C2410_WTDAT);
+ __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
+ __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON);
+}
+
+#else
+#define arch_decomp_wdog_start()
+#define arch_decomp_wdog()
+#endif
+
+#ifdef CONFIG_S3C_BOOT_ERROR_RESET
+
+static void arch_decomp_error(const char *x)
+{
+ putstr("\n\n");
+ putstr(x);
+ putstr("\n\n -- System resetting\n");
+
+ __raw_writel(0x4000, S3C2410_WTDAT);
+ __raw_writel(0x4000, S3C2410_WTCNT);
+ __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
+
+ while(1);
+}
+
+#define arch_error arch_decomp_error
+#endif
+
+#ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO
+static inline void arch_enable_uart_fifo(void)
+{
+ u32 fifocon = uart_rd(S3C2410_UFCON);
+
+ if (!(fifocon & S3C2410_UFCON_FIFOMODE)) {
+ fifocon |= S3C2410_UFCON_RESETBOTH;
+ uart_wr(S3C2410_UFCON, fifocon);
+
+ /* wait for fifo reset to complete */
+ while (1) {
+ fifocon = uart_rd(S3C2410_UFCON);
+ if (!(fifocon & S3C2410_UFCON_RESETBOTH))
+ break;
+ }
+ }
+}
+#else
+#define arch_enable_uart_fifo() do { } while(0)
+#endif
+
+static void arch_decomp_setup(void)
+{
+ /*
+ * we may need to setup the uart(s) here if we are not running
+ * on an BAST... the BAST will have left the uarts configured
+ * after calling linux.
+ */
+
+ arch_detect_cpu();
+ arch_decomp_wdog_start();
+
+ /*
+ * Enable the UART FIFOs if they where not enabled and our
+ * configuration says we should turn them on.
+ */
+
+ arch_enable_uart_fifo();
+}
+
+
+
+static void arch_detect_cpu(void)
+{
+ /* we do not need to do any cpu detection here at the moment. */
+}
+
+#endif /* __ASM_ARCH_UNCOMPRESS_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/vmalloc.h b/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
similarity index 74%
rename from arch/arm/mach-s5p6440/include/mach/vmalloc.h
rename to arch/arm/mach-s5p64x0/include/mach/vmalloc.h
index e3f0eeb..97a9df3 100644
--- a/arch/arm/mach-s5p6440/include/mach/vmalloc.h
+++ b/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
@@ -1,4 +1,7 @@
-/* arch/arm/mach-s5p6440/include/mach/vmalloc.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/vmalloc.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* Copyright 2010 Ben Dooks <ben-linux@fluff.org>
*
diff --git a/arch/arm/mach-s5p64x0/init.c b/arch/arm/mach-s5p64x0/init.c
new file mode 100644
index 0000000..79833ca
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/init.c
@@ -0,0 +1,73 @@
+/* linux/arch/arm/mach-s5p64x0/init.c
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P64X0 - Init support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+
+#include <mach/map.h>
+
+#include <plat/cpu.h>
+#include <plat/devs.h>
+#include <plat/s5p6440.h>
+#include <plat/s5p6450.h>
+#include <plat/regs-serial.h>
+
+static struct s3c24xx_uart_clksrc s5p64x0_serial_clocks[] = {
+ [0] = {
+ .name = "pclk_low",
+ .divisor = 1,
+ .min_baud = 0,
+ .max_baud = 0,
+ },
+ [1] = {
+ .name = "uclk1",
+ .divisor = 1,
+ .min_baud = 0,
+ .max_baud = 0,
+ },
+};
+
+/* uart registration process */
+
+void __init s5p64x0_common_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+ struct s3c2410_uartcfg *tcfg = cfg;
+ u32 ucnt;
+
+ for (ucnt = 0; ucnt < no; ucnt++, tcfg++) {
+ if (!tcfg->clocks) {
+ tcfg->clocks = s5p64x0_serial_clocks;
+ tcfg->clocks_size = ARRAY_SIZE(s5p64x0_serial_clocks);
+ }
+ }
+}
+
+void __init s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+ int uart;
+
+ for (uart = 0; uart < no; uart++) {
+ s5p_uart_resources[uart].resources->start = S5P6440_PA_UART(uart);
+ s5p_uart_resources[uart].resources->end = S5P6440_PA_UART(uart) + S5P_SZ_UART;
+ }
+
+ s5p64x0_common_init_uarts(cfg, no);
+ s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
+}
+
+void __init s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no)
+{
+ s5p64x0_common_init_uarts(cfg, no);
+ s3c24xx_init_uartdevs("s3c6400-uart", s5p_uart_resources, cfg, no);
+}
diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
index 57f08ee..74f7f5a 100644
--- a/arch/arm/plat-s5p/cpu.c
+++ b/arch/arm/plat-s5p/cpu.c
@@ -19,6 +19,7 @@
#include <plat/cpu.h>
#include <plat/s5p6440.h>
#include <plat/s5p6442.h>
+#include <plat/s5p6450.h>
#include <plat/s5pc100.h>
#include <plat/s5pv210.h>
#include <plat/s5pv310.h>
@@ -27,6 +28,7 @@
static const char name_s5p6440[] = "S5P6440";
static const char name_s5p6442[] = "S5P6442";
+static const char name_s5p6450[] = "S5P6450";
static const char name_s5pc100[] = "S5PC100";
static const char name_s5pv210[] = "S5PV210/S5PC110";
static const char name_s5pv310[] = "S5PV310";
@@ -38,7 +40,7 @@ static struct cpu_table cpu_ids[] __initdata = {
.map_io = s5p6440_map_io,
.init_clocks = s5p6440_init_clocks,
.init_uarts = s5p6440_init_uarts,
- .init = s5p6440_init,
+ .init = s5p64x0_init,
.name = name_s5p6440,
}, {
.idcode = 0x36442000,
@@ -49,6 +51,14 @@ static struct cpu_table cpu_ids[] __initdata = {
.init = s5p6442_init,
.name = name_s5p6442,
}, {
+ .idcode = 0x36450000,
+ .idmask = 0xffffff00,
+ .map_io = s5p6450_map_io,
+ .init_clocks = s5p6450_init_clocks,
+ .init_uarts = s5p6450_init_uarts,
+ .init = s5p64x0_init,
+ .name = name_s5p6450,
+ }, {
.idcode = 0x43100000,
.idmask = 0xfffff000,
.map_io = s5pc100_map_io,
diff --git a/arch/arm/plat-s5p/include/plat/s5p6440.h b/arch/arm/plat-s5p/include/plat/s5p6440.h
index a4cd75a..528585d 100644
--- a/arch/arm/plat-s5p/include/plat/s5p6440.h
+++ b/arch/arm/plat-s5p/include/plat/s5p6440.h
@@ -12,24 +12,23 @@
/* Common init code for S5P6440 related SoCs */
-extern void s5p6440_common_init_uarts(struct s3c2410_uartcfg *cfg, int no);
extern void s5p6440_register_clocks(void);
extern void s5p6440_setup_clocks(void);
#ifdef CONFIG_CPU_S5P6440
-extern int s5p6440_init(void);
+extern int s5p64x0_init(void);
extern void s5p6440_init_irq(void);
extern void s5p6440_map_io(void);
extern void s5p6440_init_clocks(int xtal);
-#define s5p6440_init_uarts s5p6440_common_init_uarts
+extern void s5p6440_init_uarts(struct s3c2410_uartcfg *cfg, int no);
#else
#define s5p6440_init_clocks NULL
#define s5p6440_init_uarts NULL
#define s5p6440_map_io NULL
-#define s5p6440_init NULL
+#define s5p64x0_init NULL
#endif
/* S5P6440 timer */
diff --git a/arch/arm/plat-s5p/include/plat/s5p6450.h b/arch/arm/plat-s5p/include/plat/s5p6450.h
new file mode 100644
index 0000000..640a41c
--- /dev/null
+++ b/arch/arm/plat-s5p/include/plat/s5p6450.h
@@ -0,0 +1,36 @@
+/* arch/arm/plat-s5p/include/plat/s5p6450.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Header file for s5p6450 cpu support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+/* Common init code for S5P6450 related SoCs */
+
+extern void s5p6450_register_clocks(void);
+extern void s5p6450_setup_clocks(void);
+
+#ifdef CONFIG_CPU_S5P6450
+
+extern int s5p64x0_init(void);
+extern void s5p6450_init_irq(void);
+extern void s5p6450_map_io(void);
+extern void s5p6450_init_clocks(int xtal);
+
+extern void s5p6450_init_uarts(struct s3c2410_uartcfg *cfg, int no);
+
+#else
+#define s5p6450_init_clocks NULL
+#define s5p6450_init_uarts NULL
+#define s5p6450_map_io NULL
+#define s5p64x0_init NULL
+#endif
+
+/* S5P6450 timer */
+
+extern struct sys_timer s5p6450_timer;
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 04/13] ARM: S5P64X0: Update Clock for S5P6440 and S5P6450
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 7:09 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel, linux-samsung-soc; +Cc: ben-linux, Kukjin Kim
This patch updates regarding clock files for supporting S5P6440 and
S5P6450 with one kernel image. The mach-s5p64x0/clock.c is for common
of them and there are specific clock files for each SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/mach-s5p6440/clock.c | 846 --------------------
arch/arm/mach-s5p6440/include/mach/regs-clock.h | 130 ---
arch/arm/mach-s5p64x0/clock-s5p6440.c | 626 +++++++++++++++
arch/arm/mach-s5p64x0/clock-s5p6450.c | 655 +++++++++++++++
arch/arm/mach-s5p64x0/clock.c | 253 ++++++
arch/arm/mach-s5p64x0/include/mach/regs-clock.h | 63 ++
arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h | 46 ++
arch/arm/plat-s5p/clock.c | 19 +
arch/arm/plat-s5p/include/plat/pll.h | 7 +
arch/arm/plat-s5p/include/plat/s5p-clock.h | 8 +-
10 files changed, 1674 insertions(+), 979 deletions(-)
delete mode 100644 arch/arm/mach-s5p6440/clock.c
delete mode 100644 arch/arm/mach-s5p6440/include/mach/regs-clock.h
create mode 100644 arch/arm/mach-s5p64x0/clock-s5p6440.c
create mode 100644 arch/arm/mach-s5p64x0/clock-s5p6450.c
create mode 100644 arch/arm/mach-s5p64x0/clock.c
create mode 100644 arch/arm/mach-s5p64x0/include/mach/regs-clock.h
create mode 100644 arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h
diff --git a/arch/arm/mach-s5p6440/clock.c b/arch/arm/mach-s5p6440/clock.c
deleted file mode 100644
index ca6e48d..0000000
--- a/arch/arm/mach-s5p6440/clock.c
+++ /dev/null
@@ -1,846 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/clock.c
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S5P6440 - Clock support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/sysdev.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-
-#include <plat/cpu-freq.h>
-#include <mach/regs-clock.h>
-#include <plat/clock.h>
-#include <plat/cpu.h>
-#include <plat/clock-clksrc.h>
-#include <plat/s5p-clock.h>
-#include <plat/pll.h>
-#include <plat/s5p6440.h>
-
-/* APLL Mux output clock */
-static struct clksrc_clk clk_mout_apll = {
- .clk = {
- .name = "mout_apll",
- .id = -1,
- },
- .sources = &clk_src_apll,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
-};
-
-static int s5p6440_epll_enable(struct clk *clk, int enable)
-{
- unsigned int ctrlbit = clk->ctrlbit;
- unsigned int epll_con = __raw_readl(S5P_EPLL_CON) & ~ctrlbit;
-
- if (enable)
- __raw_writel(epll_con | ctrlbit, S5P_EPLL_CON);
- else
- __raw_writel(epll_con, S5P_EPLL_CON);
-
- return 0;
-}
-
-static unsigned long s5p6440_epll_get_rate(struct clk *clk)
-{
- return clk->rate;
-}
-
-static u32 epll_div[][5] = {
- { 36000000, 0, 48, 1, 4 },
- { 48000000, 0, 32, 1, 3 },
- { 60000000, 0, 40, 1, 3 },
- { 72000000, 0, 48, 1, 3 },
- { 84000000, 0, 28, 1, 2 },
- { 96000000, 0, 32, 1, 2 },
- { 32768000, 45264, 43, 1, 4 },
- { 45158000, 6903, 30, 1, 3 },
- { 49152000, 50332, 32, 1, 3 },
- { 67738000, 10398, 45, 1, 3 },
- { 73728000, 9961, 49, 1, 3 }
-};
-
-static int s5p6440_epll_set_rate(struct clk *clk, unsigned long rate)
-{
- unsigned int epll_con, epll_con_k;
- unsigned int i;
-
- if (clk->rate == rate) /* Return if nothing changed */
- return 0;
-
- epll_con = __raw_readl(S5P_EPLL_CON);
- epll_con_k = __raw_readl(S5P_EPLL_CON_K);
-
- epll_con_k &= ~(PLL90XX_KDIV_MASK);
- epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK);
-
- for (i = 0; i < ARRAY_SIZE(epll_div); i++) {
- if (epll_div[i][0] == rate) {
- epll_con_k |= (epll_div[i][1] << PLL90XX_KDIV_SHIFT);
- epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) |
- (epll_div[i][3] << PLL90XX_PDIV_SHIFT) |
- (epll_div[i][4] << PLL90XX_SDIV_SHIFT);
- break;
- }
- }
-
- if (i == ARRAY_SIZE(epll_div)) {
- printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__);
- return -EINVAL;
- }
-
- __raw_writel(epll_con, S5P_EPLL_CON);
- __raw_writel(epll_con_k, S5P_EPLL_CON_K);
-
- clk->rate = rate;
-
- return 0;
-}
-
-static struct clk_ops s5p6440_epll_ops = {
- .get_rate = s5p6440_epll_get_rate,
- .set_rate = s5p6440_epll_set_rate,
-};
-
-static struct clksrc_clk clk_mout_epll = {
- .clk = {
- .name = "mout_epll",
- .id = -1,
- },
- .sources = &clk_src_epll,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 2, .size = 1 },
-};
-
-static struct clksrc_clk clk_mout_mpll = {
- .clk = {
- .name = "mout_mpll",
- .id = -1,
- },
- .sources = &clk_src_mpll,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 1, .size = 1 },
-};
-
-enum perf_level {
- L0 = 532*1000,
- L1 = 266*1000,
- L2 = 133*1000,
-};
-
-static const u32 clock_table[][3] = {
- /*{ARM_CLK, DIVarm, DIVhclk}*/
- {L0 * 1000, (0 << ARM_DIV_RATIO_SHIFT), (3 << S5P_CLKDIV0_HCLK_SHIFT)},
- {L1 * 1000, (1 << ARM_DIV_RATIO_SHIFT), (1 << S5P_CLKDIV0_HCLK_SHIFT)},
- {L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P_CLKDIV0_HCLK_SHIFT)},
-};
-
-static unsigned long s5p6440_armclk_get_rate(struct clk *clk)
-{
- unsigned long rate = clk_get_rate(clk->parent);
- u32 clkdiv;
-
- /* divisor mask starts at bit0, so no need to shift */
- clkdiv = __raw_readl(ARM_CLK_DIV) & ARM_DIV_MASK;
-
- return rate / (clkdiv + 1);
-}
-
-static unsigned long s5p6440_armclk_round_rate(struct clk *clk,
- unsigned long rate)
-{
- u32 iter;
-
- for (iter = 1 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
- if (rate > clock_table[iter][0])
- return clock_table[iter-1][0];
- }
-
- return clock_table[ARRAY_SIZE(clock_table) - 1][0];
-}
-
-static int s5p6440_armclk_set_rate(struct clk *clk, unsigned long rate)
-{
- u32 round_tmp;
- u32 iter;
- u32 clk_div0_tmp;
- u32 cur_rate = clk->ops->get_rate(clk);
- unsigned long flags;
-
- round_tmp = clk->ops->round_rate(clk, rate);
- if (round_tmp == cur_rate)
- return 0;
-
-
- for (iter = 0 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
- if (round_tmp == clock_table[iter][0])
- break;
- }
-
- if (iter >= ARRAY_SIZE(clock_table))
- iter = ARRAY_SIZE(clock_table) - 1;
-
- local_irq_save(flags);
- if (cur_rate > round_tmp) {
- /* Frequency Down */
- clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
- clk_div0_tmp |= clock_table[iter][1];
- __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
-
- clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
- ~(S5P_CLKDIV0_HCLK_MASK);
- clk_div0_tmp |= clock_table[iter][2];
- __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
-
-
- } else {
- /* Frequency Up */
- clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
- ~(S5P_CLKDIV0_HCLK_MASK);
- clk_div0_tmp |= clock_table[iter][2];
- __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
-
- clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
- clk_div0_tmp |= clock_table[iter][1];
- __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
- }
- local_irq_restore(flags);
-
- clk->rate = clock_table[iter][0];
-
- return 0;
-}
-
-static struct clk_ops s5p6440_clkarm_ops = {
- .get_rate = s5p6440_armclk_get_rate,
- .set_rate = s5p6440_armclk_set_rate,
- .round_rate = s5p6440_armclk_round_rate,
-};
-
-static struct clksrc_clk clk_armclk = {
- .clk = {
- .name = "armclk",
- .id = 1,
- .parent = &clk_mout_apll.clk,
- .ops = &s5p6440_clkarm_ops,
- },
- .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 4 },
-};
-
-static struct clksrc_clk clk_dout_mpll = {
- .clk = {
- .name = "dout_mpll",
- .id = -1,
- .parent = &clk_mout_mpll.clk,
- },
- .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 1 },
-};
-
-static struct clksrc_clk clk_hclk = {
- .clk = {
- .name = "clk_hclk",
- .id = -1,
- .parent = &clk_armclk.clk,
- },
- .reg_div = { .reg = S5P_CLK_DIV0, .shift = 8, .size = 4 },
-};
-
-static struct clksrc_clk clk_pclk = {
- .clk = {
- .name = "clk_pclk",
- .id = -1,
- .parent = &clk_hclk.clk,
- },
- .reg_div = { .reg = S5P_CLK_DIV0, .shift = 12, .size = 4 },
-};
-
-static struct clk *clkset_hclklow_list[] = {
- &clk_mout_apll.clk,
- &clk_mout_mpll.clk,
-};
-
-static struct clksrc_sources clkset_hclklow = {
- .sources = clkset_hclklow_list,
- .nr_sources = ARRAY_SIZE(clkset_hclklow_list),
-};
-
-static struct clksrc_clk clk_hclk_low = {
- .clk = {
- .name = "hclk_low",
- .id = -1,
- },
- .sources = &clkset_hclklow,
- .reg_src = { .reg = S5P_SYS_OTHERS, .shift = 6, .size = 1 },
- .reg_div = { .reg = S5P_CLK_DIV3, .shift = 8, .size = 4 },
-};
-
-static struct clksrc_clk clk_pclk_low = {
- .clk = {
- .name = "pclk_low",
- .id = -1,
- .parent = &clk_hclk_low.clk,
- },
- .reg_div = { .reg = S5P_CLK_DIV3, .shift = 12, .size = 4 },
-};
-
-int s5p6440_clk48m_ctrl(struct clk *clk, int enable)
-{
- unsigned long flags;
- u32 val;
-
- /* can't rely on clock lock, this register has other usages */
- local_irq_save(flags);
-
- val = __raw_readl(S5P_OTHERS);
- if (enable)
- val |= S5P_OTHERS_USB_SIG_MASK;
- else
- val &= ~S5P_OTHERS_USB_SIG_MASK;
-
- __raw_writel(val, S5P_OTHERS);
-
- local_irq_restore(flags);
-
- return 0;
-}
-
-static int s5p6440_pclk_ctrl(struct clk *clk, int enable)
-{
- return s5p_gatectrl(S5P_CLK_GATE_PCLK, clk, enable);
-}
-
-static int s5p6440_hclk0_ctrl(struct clk *clk, int enable)
-{
- return s5p_gatectrl(S5P_CLK_GATE_HCLK0, clk, enable);
-}
-
-static int s5p6440_hclk1_ctrl(struct clk *clk, int enable)
-{
- return s5p_gatectrl(S5P_CLK_GATE_HCLK1, clk, enable);
-}
-
-static int s5p6440_sclk_ctrl(struct clk *clk, int enable)
-{
- return s5p_gatectrl(S5P_CLK_GATE_SCLK0, clk, enable);
-}
-
-static int s5p6440_sclk1_ctrl(struct clk *clk, int enable)
-{
- return s5p_gatectrl(S5P_CLK_GATE_SCLK1, clk, enable);
-}
-
-static int s5p6440_mem_ctrl(struct clk *clk, int enable)
-{
- return s5p_gatectrl(S5P_CLK_GATE_MEM0, clk, enable);
-}
-
-/*
- * The following clocks will be disabled during clock initialization. It is
- * recommended to keep the following clocks disabled until the driver requests
- * for enabling the clock.
- */
-static struct clk init_clocks_disable[] = {
- {
- .name = "nand",
- .id = -1,
- .parent = &clk_hclk.clk,
- .enable = s5p6440_mem_ctrl,
- .ctrlbit = S5P_CLKCON_MEM0_HCLK_NFCON,
- }, {
- .name = "adc",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_TSADC,
- }, {
- .name = "i2c",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_IIC0,
- }, {
- .name = "i2s_v40",
- .id = 0,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_IIS2,
- }, {
- .name = "spi",
- .id = 0,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_SPI0,
- }, {
- .name = "spi",
- .id = 1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_SPI1,
- }, {
- .name = "sclk_spi_48",
- .id = 0,
- .parent = &clk_48m,
- .enable = s5p6440_sclk_ctrl,
- .ctrlbit = S5P_CLKCON_SCLK0_SPI0_48,
- }, {
- .name = "sclk_spi_48",
- .id = 1,
- .parent = &clk_48m,
- .enable = s5p6440_sclk_ctrl,
- .ctrlbit = S5P_CLKCON_SCLK0_SPI1_48,
- }, {
- .name = "mmc_48m",
- .id = 0,
- .parent = &clk_48m,
- .enable = s5p6440_sclk_ctrl,
- .ctrlbit = S5P_CLKCON_SCLK0_MMC0_48,
- }, {
- .name = "mmc_48m",
- .id = 1,
- .parent = &clk_48m,
- .enable = s5p6440_sclk_ctrl,
- .ctrlbit = S5P_CLKCON_SCLK0_MMC1_48,
- }, {
- .name = "mmc_48m",
- .id = 2,
- .parent = &clk_48m,
- .enable = s5p6440_sclk_ctrl,
- .ctrlbit = S5P_CLKCON_SCLK0_MMC2_48,
- }, {
- .name = "otg",
- .id = -1,
- .parent = &clk_hclk_low.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = S5P_CLKCON_HCLK0_USB
- }, {
- .name = "post",
- .id = -1,
- .parent = &clk_hclk_low.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = S5P_CLKCON_HCLK0_POST0
- }, {
- .name = "lcd",
- .id = -1,
- .parent = &clk_hclk_low.clk,
- .enable = s5p6440_hclk1_ctrl,
- .ctrlbit = S5P_CLKCON_HCLK1_DISPCON,
- }, {
- .name = "hsmmc",
- .id = 0,
- .parent = &clk_hclk_low.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = S5P_CLKCON_HCLK0_HSMMC0,
- }, {
- .name = "hsmmc",
- .id = 1,
- .parent = &clk_hclk_low.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = S5P_CLKCON_HCLK0_HSMMC1,
- }, {
- .name = "hsmmc",
- .id = 2,
- .parent = &clk_hclk_low.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = S5P_CLKCON_HCLK0_HSMMC2,
- }, {
- .name = "rtc",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_RTC,
- }, {
- .name = "watchdog",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_WDT,
- }, {
- .name = "timers",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_PWM,
- }, {
- .name = "hclk_fimgvg",
- .id = -1,
- .parent = &clk_hclk.clk,
- .enable = s5p6440_hclk1_ctrl,
- .ctrlbit = (1 << 2),
- }, {
- .name = "tsi",
- .id = -1,
- .parent = &clk_hclk_low.clk,
- .enable = s5p6440_hclk1_ctrl,
- .ctrlbit = (1 << 0),
- }, {
- .name = "pclk_fimgvg",
- .id = -1,
- .parent = &clk_pclk.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = (1 << 31),
- }, {
- .name = "dmc0",
- .id = -1,
- .parent = &clk_pclk.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = (1 << 30),
- }, {
- .name = "etm",
- .id = -1,
- .parent = &clk_pclk.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = (1 << 29),
- }, {
- .name = "dsim",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = (1 << 28),
- }, {
- .name = "gps",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = (1 << 25),
- }, {
- .name = "pcm",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = (1 << 8),
- }, {
- .name = "irom",
- .id = -1,
- .parent = &clk_hclk.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = (1 << 25),
- }, {
- .name = "dma",
- .id = -1,
- .parent = &clk_hclk_low.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = (1 << 12),
- }, {
- .name = "2d",
- .id = -1,
- .parent = &clk_hclk.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = (1 << 8),
- },
-};
-
-/*
- * The following clocks will be enabled during clock initialization.
- */
-static struct clk init_clocks[] = {
- {
- .name = "gpio",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_GPIO,
- }, {
- .name = "uart",
- .id = 0,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_UART0,
- }, {
- .name = "uart",
- .id = 1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_UART1,
- }, {
- .name = "uart",
- .id = 2,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_UART2,
- }, {
- .name = "uart",
- .id = 3,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_UART3,
- }, {
- .name = "mem",
- .id = -1,
- .parent = &clk_hclk.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = (1 << 21),
- }, {
- .name = "intc",
- .id = -1,
- .parent = &clk_hclk.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = (1 << 1),
- },
-};
-
-static struct clk clk_iis_cd_v40 = {
- .name = "iis_cdclk_v40",
- .id = -1,
-};
-
-static struct clk clk_pcm_cd = {
- .name = "pcm_cdclk",
- .id = -1,
-};
-
-static struct clk *clkset_group1_list[] = {
- &clk_mout_epll.clk,
- &clk_dout_mpll.clk,
- &clk_fin_epll,
-};
-
-static struct clksrc_sources clkset_group1 = {
- .sources = clkset_group1_list,
- .nr_sources = ARRAY_SIZE(clkset_group1_list),
-};
-
-static struct clk *clkset_uart_list[] = {
- &clk_mout_epll.clk,
- &clk_dout_mpll.clk,
-};
-
-static struct clksrc_sources clkset_uart = {
- .sources = clkset_uart_list,
- .nr_sources = ARRAY_SIZE(clkset_uart_list),
-};
-
-static struct clk *clkset_audio_list[] = {
- &clk_mout_epll.clk,
- &clk_dout_mpll.clk,
- &clk_fin_epll,
- &clk_iis_cd_v40,
- &clk_pcm_cd,
-};
-
-static struct clksrc_sources clkset_audio = {
- .sources = clkset_audio_list,
- .nr_sources = ARRAY_SIZE(clkset_audio_list),
-};
-
-static struct clksrc_clk clksrcs[] = {
- {
- .clk = {
- .name = "mmc_bus",
- .id = 0,
- .ctrlbit = S5P_CLKCON_SCLK0_MMC0,
- .enable = s5p6440_sclk_ctrl,
- },
- .sources = &clkset_group1,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 18, .size = 2 },
- .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 4 },
- }, {
- .clk = {
- .name = "mmc_bus",
- .id = 1,
- .ctrlbit = S5P_CLKCON_SCLK0_MMC1,
- .enable = s5p6440_sclk_ctrl,
- },
- .sources = &clkset_group1,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 20, .size = 2 },
- .reg_div = { .reg = S5P_CLK_DIV1, .shift = 4, .size = 4 },
- }, {
- .clk = {
- .name = "mmc_bus",
- .id = 2,
- .ctrlbit = S5P_CLKCON_SCLK0_MMC2,
- .enable = s5p6440_sclk_ctrl,
- },
- .sources = &clkset_group1,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 22, .size = 2 },
- .reg_div = { .reg = S5P_CLK_DIV1, .shift = 8, .size = 4 },
- }, {
- .clk = {
- .name = "uclk1",
- .id = -1,
- .ctrlbit = S5P_CLKCON_SCLK0_UART,
- .enable = s5p6440_sclk_ctrl,
- },
- .sources = &clkset_uart,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 13, .size = 1 },
- .reg_div = { .reg = S5P_CLK_DIV2, .shift = 16, .size = 4 },
- }, {
- .clk = {
- .name = "spi_epll",
- .id = 0,
- .ctrlbit = S5P_CLKCON_SCLK0_SPI0,
- .enable = s5p6440_sclk_ctrl,
- },
- .sources = &clkset_group1,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 14, .size = 2 },
- .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
- }, {
- .clk = {
- .name = "spi_epll",
- .id = 1,
- .ctrlbit = S5P_CLKCON_SCLK0_SPI1,
- .enable = s5p6440_sclk_ctrl,
- },
- .sources = &clkset_group1,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 16, .size = 2 },
- .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
- }, {
- .clk = {
- .name = "sclk_post",
- .id = -1,
- .ctrlbit = (1 << 10),
- .enable = s5p6440_sclk_ctrl,
- },
- .sources = &clkset_group1,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 26, .size = 2 },
- .reg_div = { .reg = S5P_CLK_DIV1, .shift = 12, .size = 4 },
- }, {
- .clk = {
- .name = "sclk_dispcon",
- .id = -1,
- .ctrlbit = (1 << 1),
- .enable = s5p6440_sclk1_ctrl,
- },
- .sources = &clkset_group1,
- .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 },
- .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 },
- }, {
- .clk = {
- .name = "sclk_fimgvg",
- .id = -1,
- .ctrlbit = (1 << 2),
- .enable = s5p6440_sclk1_ctrl,
- },
- .sources = &clkset_group1,
- .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 },
- .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 },
- }, {
- .clk = {
- .name = "sclk_audio2",
- .id = -1,
- .ctrlbit = (1 << 11),
- .enable = s5p6440_sclk_ctrl,
- },
- .sources = &clkset_audio,
- .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 3 },
- .reg_div = { .reg = S5P_CLK_DIV2, .shift = 24, .size = 4 },
- },
-};
-
-/* Clock initialisation code */
-static struct clksrc_clk *sysclks[] = {
- &clk_mout_apll,
- &clk_mout_epll,
- &clk_mout_mpll,
- &clk_dout_mpll,
- &clk_armclk,
- &clk_hclk,
- &clk_pclk,
- &clk_hclk_low,
- &clk_pclk_low,
-};
-
-void __init_or_cpufreq s5p6440_setup_clocks(void)
-{
- struct clk *xtal_clk;
- unsigned long xtal;
- unsigned long fclk;
- unsigned long hclk;
- unsigned long hclk_low;
- unsigned long pclk;
- unsigned long pclk_low;
- unsigned long epll;
- unsigned long apll;
- unsigned long mpll;
- unsigned int ptr;
-
- /* Set S5P6440 functions for clk_fout_epll */
- clk_fout_epll.enable = s5p6440_epll_enable;
- clk_fout_epll.ops = &s5p6440_epll_ops;
-
- clk_48m.enable = s5p6440_clk48m_ctrl;
-
- xtal_clk = clk_get(NULL, "ext_xtal");
- BUG_ON(IS_ERR(xtal_clk));
-
- xtal = clk_get_rate(xtal_clk);
- clk_put(xtal_clk);
-
- epll = s5p_get_pll90xx(xtal, __raw_readl(S5P_EPLL_CON),
- __raw_readl(S5P_EPLL_CON_K));
- mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
- apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4502);
-
- clk_fout_mpll.rate = mpll;
- clk_fout_epll.rate = epll;
- clk_fout_apll.rate = apll;
-
- printk(KERN_INFO "S5P6440: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \
- " E=%ld.%ldMHz\n",
- print_mhz(apll), print_mhz(mpll), print_mhz(epll));
-
- fclk = clk_get_rate(&clk_armclk.clk);
- hclk = clk_get_rate(&clk_hclk.clk);
- pclk = clk_get_rate(&clk_pclk.clk);
- hclk_low = clk_get_rate(&clk_hclk_low.clk);
- pclk_low = clk_get_rate(&clk_pclk_low.clk);
-
- printk(KERN_INFO "S5P6440: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \
- " PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n",
- print_mhz(hclk), print_mhz(hclk_low),
- print_mhz(pclk), print_mhz(pclk_low));
-
- clk_f.rate = fclk;
- clk_h.rate = hclk;
- clk_p.rate = pclk;
-
- for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
- s3c_set_clksrc(&clksrcs[ptr], true);
-}
-
-static struct clk *clks[] __initdata = {
- &clk_ext,
- &clk_iis_cd_v40,
- &clk_pcm_cd,
-};
-
-void __init s5p6440_register_clocks(void)
-{
- struct clk *clkp;
- int ret;
- int ptr;
-
- ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
- if (ret > 0)
- printk(KERN_ERR "Failed to register %u clocks\n", ret);
-
- for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
- s3c_register_clksrc(sysclks[ptr], 1);
-
- s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
- s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
-
- clkp = init_clocks_disable;
- for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
-
- ret = s3c24xx_register_clock(clkp);
- if (ret < 0) {
- printk(KERN_ERR "Failed to register clock %s (%d)\n",
- clkp->name, ret);
- }
- (clkp->enable)(clkp, 0);
- }
-
- s3c_pwmclk_init();
-}
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-clock.h b/arch/arm/mach-s5p6440/include/mach/regs-clock.h
deleted file mode 100644
index c783ecc..0000000
--- a/arch/arm/mach-s5p6440/include/mach/regs-clock.h
+++ /dev/null
@@ -1,130 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/regs-clock.h
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S5P6440 - Clock register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_REGS_CLOCK_H
-#define __ASM_ARCH_REGS_CLOCK_H __FILE__
-
-#include <mach/map.h>
-
-#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
-
-#define S5P_APLL_LOCK S5P_CLKREG(0x00)
-#define S5P_MPLL_LOCK S5P_CLKREG(0x04)
-#define S5P_EPLL_LOCK S5P_CLKREG(0x08)
-#define S5P_APLL_CON S5P_CLKREG(0x0C)
-#define S5P_MPLL_CON S5P_CLKREG(0x10)
-#define S5P_EPLL_CON S5P_CLKREG(0x14)
-#define S5P_EPLL_CON_K S5P_CLKREG(0x18)
-#define S5P_CLK_SRC0 S5P_CLKREG(0x1C)
-#define S5P_CLK_DIV0 S5P_CLKREG(0x20)
-#define S5P_CLK_DIV1 S5P_CLKREG(0x24)
-#define S5P_CLK_DIV2 S5P_CLKREG(0x28)
-#define S5P_CLK_OUT S5P_CLKREG(0x2C)
-#define S5P_CLK_GATE_HCLK0 S5P_CLKREG(0x30)
-#define S5P_CLK_GATE_PCLK S5P_CLKREG(0x34)
-#define S5P_CLK_GATE_SCLK0 S5P_CLKREG(0x38)
-#define S5P_CLK_GATE_MEM0 S5P_CLKREG(0x3C)
-#define S5P_CLK_DIV3 S5P_CLKREG(0x40)
-#define S5P_CLK_GATE_HCLK1 S5P_CLKREG(0x44)
-#define S5P_CLK_GATE_SCLK1 S5P_CLKREG(0x48)
-#define S5P_AHB_CON0 S5P_CLKREG(0x100)
-#define S5P_CLK_SRC1 S5P_CLKREG(0x10C)
-#define S5P_SWRESET S5P_CLKREG(0x114)
-#define S5P_SYS_ID S5P_CLKREG(0x118)
-#define S5P_SYS_OTHERS S5P_CLKREG(0x11C)
-#define S5P_MEM_CFG_STAT S5P_CLKREG(0x12C)
-#define S5P_PWR_CFG S5P_CLKREG(0x804)
-#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0x808)
-#define S5P_NORMAL_CFG S5P_CLKREG(0x810)
-#define S5P_STOP_CFG S5P_CLKREG(0x814)
-#define S5P_SLEEP_CFG S5P_CLKREG(0x818)
-#define S5P_OSC_FREQ S5P_CLKREG(0x820)
-#define S5P_OSC_STABLE S5P_CLKREG(0x824)
-#define S5P_PWR_STABLE S5P_CLKREG(0x828)
-#define S5P_MTC_STABLE S5P_CLKREG(0x830)
-#define S5P_OTHERS S5P_CLKREG(0x900)
-#define S5P_RST_STAT S5P_CLKREG(0x904)
-#define S5P_WAKEUP_STAT S5P_CLKREG(0x908)
-#define S5P_SLPEN S5P_CLKREG(0x930)
-#define S5P_INFORM0 S5P_CLKREG(0xA00)
-#define S5P_INFORM1 S5P_CLKREG(0xA04)
-#define S5P_INFORM2 S5P_CLKREG(0xA08)
-#define S5P_INFORM3 S5P_CLKREG(0xA0C)
-
-/* CLKDIV0 */
-#define S5P_CLKDIV0_PCLK_MASK (0xf << 12)
-#define S5P_CLKDIV0_PCLK_SHIFT (12)
-#define S5P_CLKDIV0_HCLK_MASK (0xf << 8)
-#define S5P_CLKDIV0_HCLK_SHIFT (8)
-#define S5P_CLKDIV0_MPLL_MASK (0x1 << 4)
-#define S5P_CLKDIV0_ARM_MASK (0xf << 0)
-#define S5P_CLKDIV0_ARM_SHIFT (0)
-
-/* CLKDIV3 */
-#define S5P_CLKDIV3_PCLK_LOW_MASK (0xf << 12)
-#define S5P_CLKDIV3_PCLK_LOW_SHIFT (12)
-#define S5P_CLKDIV3_HCLK_LOW_MASK (0xf << 8)
-#define S5P_CLKDIV3_HCLK_LOW_SHIFT (8)
-
-/* HCLK0 GATE Registers */
-#define S5P_CLKCON_HCLK0_USB (1<<20)
-#define S5P_CLKCON_HCLK0_HSMMC2 (1<<19)
-#define S5P_CLKCON_HCLK0_HSMMC1 (1<<18)
-#define S5P_CLKCON_HCLK0_HSMMC0 (1<<17)
-#define S5P_CLKCON_HCLK0_POST0 (1<<5)
-
-/* HCLK1 GATE Registers */
-#define S5P_CLKCON_HCLK1_DISPCON (1<<1)
-
-/* PCLK GATE Registers */
-#define S5P_CLKCON_PCLK_IIS2 (1<<26)
-#define S5P_CLKCON_PCLK_SPI1 (1<<22)
-#define S5P_CLKCON_PCLK_SPI0 (1<<21)
-#define S5P_CLKCON_PCLK_GPIO (1<<18)
-#define S5P_CLKCON_PCLK_IIC0 (1<<17)
-#define S5P_CLKCON_PCLK_TSADC (1<<12)
-#define S5P_CLKCON_PCLK_PWM (1<<7)
-#define S5P_CLKCON_PCLK_RTC (1<<6)
-#define S5P_CLKCON_PCLK_WDT (1<<5)
-#define S5P_CLKCON_PCLK_UART3 (1<<4)
-#define S5P_CLKCON_PCLK_UART2 (1<<3)
-#define S5P_CLKCON_PCLK_UART1 (1<<2)
-#define S5P_CLKCON_PCLK_UART0 (1<<1)
-
-/* SCLK0 GATE Registers */
-#define S5P_CLKCON_SCLK0_MMC2_48 (1<<29)
-#define S5P_CLKCON_SCLK0_MMC1_48 (1<<28)
-#define S5P_CLKCON_SCLK0_MMC0_48 (1<<27)
-#define S5P_CLKCON_SCLK0_MMC2 (1<<26)
-#define S5P_CLKCON_SCLK0_MMC1 (1<<25)
-#define S5P_CLKCON_SCLK0_MMC0 (1<<24)
-#define S5P_CLKCON_SCLK0_SPI1_48 (1<<23)
-#define S5P_CLKCON_SCLK0_SPI0_48 (1<<22)
-#define S5P_CLKCON_SCLK0_SPI1 (1<<21)
-#define S5P_CLKCON_SCLK0_SPI0 (1<<20)
-#define S5P_CLKCON_SCLK0_UART (1<<5)
-
-/* SCLK1 GATE Registers */
-
-/* MEM0 GATE Registers */
-#define S5P_CLKCON_MEM0_HCLK_NFCON (1<<2)
-
-/*OTHERS Resgister */
-#define S5P_OTHERS_USB_SIG_MASK (1<<16)
-#define S5P_OTHERS_HCLK_LOW_SEL_MPLL (1<<6)
-
-/* Compatibility defines */
-#define ARM_CLK_DIV S5P_CLK_DIV0
-#define ARM_DIV_RATIO_SHIFT 0
-#define ARM_DIV_MASK (0xf << ARM_DIV_RATIO_SHIFT)
-
-#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
new file mode 100644
index 0000000..cd36bd0
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -0,0 +1,626 @@
+/* linux/arch/arm/mach-s5p64x0/clock-s5p6440.c
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P6440 - Clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+#include <mach/s5p64x0-clock.h>
+
+#include <plat/cpu-freq.h>
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/pll.h>
+#include <plat/s5p-clock.h>
+#include <plat/clock-clksrc.h>
+#include <plat/s5p6440.h>
+
+static u32 epll_div[][5] = {
+ { 36000000, 0, 48, 1, 4 },
+ { 48000000, 0, 32, 1, 3 },
+ { 60000000, 0, 40, 1, 3 },
+ { 72000000, 0, 48, 1, 3 },
+ { 84000000, 0, 28, 1, 2 },
+ { 96000000, 0, 32, 1, 2 },
+ { 32768000, 45264, 43, 1, 4 },
+ { 45158000, 6903, 30, 1, 3 },
+ { 49152000, 50332, 32, 1, 3 },
+ { 67738000, 10398, 45, 1, 3 },
+ { 73728000, 9961, 49, 1, 3 }
+};
+
+static int s5p6440_epll_set_rate(struct clk *clk, unsigned long rate)
+{
+ unsigned int epll_con, epll_con_k;
+ unsigned int i;
+
+ if (clk->rate == rate) /* Return if nothing changed */
+ return 0;
+
+ epll_con = __raw_readl(S5P64X0_EPLL_CON);
+ epll_con_k = __raw_readl(S5P64X0_EPLL_CON_K);
+
+ epll_con_k &= ~(PLL90XX_KDIV_MASK);
+ epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK);
+
+ for (i = 0; i < ARRAY_SIZE(epll_div); i++) {
+ if (epll_div[i][0] == rate) {
+ epll_con_k |= (epll_div[i][1] << PLL90XX_KDIV_SHIFT);
+ epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) |
+ (epll_div[i][3] << PLL90XX_PDIV_SHIFT) |
+ (epll_div[i][4] << PLL90XX_SDIV_SHIFT);
+ break;
+ }
+ }
+
+ if (i == ARRAY_SIZE(epll_div)) {
+ printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__);
+ return -EINVAL;
+ }
+
+ __raw_writel(epll_con, S5P64X0_EPLL_CON);
+ __raw_writel(epll_con_k, S5P64X0_EPLL_CON_K);
+
+ clk->rate = rate;
+
+ return 0;
+}
+
+static struct clk_ops s5p6440_epll_ops = {
+ .get_rate = s5p64x0_epll_get_rate,
+ .set_rate = s5p6440_epll_set_rate,
+};
+
+static struct clksrc_clk clk_hclk = {
+ .clk = {
+ .name = "clk_hclk",
+ .id = -1,
+ .parent = &clk_armclk.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk clk_pclk = {
+ .clk = {
+ .name = "clk_pclk",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 12, .size = 4 },
+};
+static struct clksrc_clk clk_hclk_low = {
+ .clk = {
+ .name = "clk_hclk_low",
+ .id = -1,
+ },
+ .sources = &clkset_hclk_low,
+ .reg_src = { .reg = S5P64X0_SYS_OTHERS, .shift = 6, .size = 1 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk clk_pclk_low = {
+ .clk = {
+ .name = "clk_pclk_low",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 12, .size = 4 },
+};
+
+/*
+ * The following clocks will be disabled during clock initialization. It is
+ * recommended to keep the following clocks disabled until the driver requests
+ * for enabling the clock.
+ */
+static struct clk init_clocks_disable[] = {
+ {
+ .name = "nand",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ .enable = s5p64x0_mem_ctrl,
+ .ctrlbit = (1 << 2),
+ }, {
+ .name = "post",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 5)
+ }, {
+ .name = "2d",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 8),
+ }, {
+ .name = "dma",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 12),
+ }, {
+ .name = "hsmmc",
+ .id = 0,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 17),
+ }, {
+ .name = "hsmmc",
+ .id = 1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 18),
+ }, {
+ .name = "hsmmc",
+ .id = 2,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 19),
+ }, {
+ .name = "otg",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 20)
+ }, {
+ .name = "irom",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 25),
+ }, {
+ .name = "lcd",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk1_ctrl,
+ .ctrlbit = (1 << 1),
+ }, {
+ .name = "hclk_fimgvg",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ .enable = s5p64x0_hclk1_ctrl,
+ .ctrlbit = (1 << 2),
+ }, {
+ .name = "tsi",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk1_ctrl,
+ .ctrlbit = (1 << 0),
+ }, {
+ .name = "watchdog",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 5),
+ }, {
+ .name = "rtc",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 6),
+ }, {
+ .name = "timers",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 7),
+ }, {
+ .name = "pcm",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 8),
+ }, {
+ .name = "adc",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 12),
+ }, {
+ .name = "i2c",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 17),
+ }, {
+ .name = "spi",
+ .id = 0,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 21),
+ }, {
+ .name = "spi",
+ .id = 1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 22),
+ }, {
+ .name = "gps",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 25),
+ }, {
+ .name = "i2s_v40",
+ .id = 0,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 26),
+ }, {
+ .name = "dsim",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 28),
+ }, {
+ .name = "etm",
+ .id = -1,
+ .parent = &clk_pclk.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 29),
+ }, {
+ .name = "dmc0",
+ .id = -1,
+ .parent = &clk_pclk.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 30),
+ }, {
+ .name = "pclk_fimgvg",
+ .id = -1,
+ .parent = &clk_pclk.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 31),
+ }, {
+ .name = "sclk_spi_48",
+ .id = 0,
+ .parent = &clk_48m,
+ .enable = s5p64x0_sclk_ctrl,
+ .ctrlbit = (1 << 22),
+ }, {
+ .name = "sclk_spi_48",
+ .id = 1,
+ .parent = &clk_48m,
+ .enable = s5p64x0_sclk_ctrl,
+ .ctrlbit = (1 << 23),
+ }, {
+ .name = "mmc_48m",
+ .id = 0,
+ .parent = &clk_48m,
+ .enable = s5p64x0_sclk_ctrl,
+ .ctrlbit = (1 << 27),
+ }, {
+ .name = "mmc_48m",
+ .id = 1,
+ .parent = &clk_48m,
+ .enable = s5p64x0_sclk_ctrl,
+ .ctrlbit = (1 << 28),
+ }, {
+ .name = "mmc_48m",
+ .id = 2,
+ .parent = &clk_48m,
+ .enable = s5p64x0_sclk_ctrl,
+ .ctrlbit = (1 << 29),
+ },
+};
+
+/*
+ * The following clocks will be enabled during clock initialization.
+ */
+static struct clk init_clocks[] = {
+ {
+ .name = "intc",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 1),
+ }, {
+ .name = "mem",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 21),
+ }, {
+ .name = "uart",
+ .id = 0,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 1),
+ }, {
+ .name = "uart",
+ .id = 1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 2),
+ }, {
+ .name = "uart",
+ .id = 2,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 3),
+ }, {
+ .name = "uart",
+ .id = 3,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 4),
+ }, {
+ .name = "gpio",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 18),
+ },
+};
+
+static struct clk clk_iis_cd_v40 = {
+ .name = "iis_cdclk_v40",
+ .id = -1,
+};
+
+static struct clk clk_pcm_cd = {
+ .name = "pcm_cdclk",
+ .id = -1,
+};
+
+static struct clk *clkset_group1_list[] = {
+ &clk_mout_epll.clk,
+ &clk_dout_mpll.clk,
+ &clk_fin_epll,
+};
+
+static struct clksrc_sources clkset_group1 = {
+ .sources = clkset_group1_list,
+ .nr_sources = ARRAY_SIZE(clkset_group1_list),
+};
+
+static struct clk *clkset_uart_list[] = {
+ &clk_mout_epll.clk,
+ &clk_dout_mpll.clk,
+};
+
+static struct clksrc_sources clkset_uart = {
+ .sources = clkset_uart_list,
+ .nr_sources = ARRAY_SIZE(clkset_uart_list),
+};
+
+static struct clk *clkset_audio_list[] = {
+ &clk_mout_epll.clk,
+ &clk_dout_mpll.clk,
+ &clk_fin_epll,
+ &clk_iis_cd_v40,
+ &clk_pcm_cd,
+};
+
+static struct clksrc_sources clkset_audio = {
+ .sources = clkset_audio_list,
+ .nr_sources = ARRAY_SIZE(clkset_audio_list),
+};
+
+static struct clksrc_clk clksrcs[] = {
+ {
+ .clk = {
+ .name = "mmc_bus",
+ .id = 0,
+ .ctrlbit = (1 << 24),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group1,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
+ }, {
+ .clk = {
+ .name = "mmc_bus",
+ .id = 1,
+ .ctrlbit = (1 << 25),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group1,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
+ }, {
+ .clk = {
+ .name = "mmc_bus",
+ .id = 2,
+ .ctrlbit = (1 << 26),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group1,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
+ }, {
+ .clk = {
+ .name = "uclk1",
+ .id = -1,
+ .ctrlbit = (1 << 5),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_uart,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
+ }, {
+ .clk = {
+ .name = "spi_epll",
+ .id = 0,
+ .ctrlbit = (1 << 20),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group1,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
+ }, {
+ .clk = {
+ .name = "spi_epll",
+ .id = 1,
+ .ctrlbit = (1 << 21),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group1,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_post",
+ .id = -1,
+ .ctrlbit = (1 << 10),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group1,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 26, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 12, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_dispcon",
+ .id = -1,
+ .ctrlbit = (1 << 1),
+ .enable = s5p64x0_sclk1_ctrl,
+ },
+ .sources = &clkset_group1,
+ .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 4, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 0, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_fimgvg",
+ .id = -1,
+ .ctrlbit = (1 << 2),
+ .enable = s5p64x0_sclk1_ctrl,
+ },
+ .sources = &clkset_group1,
+ .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_audio2",
+ .id = -1,
+ .ctrlbit = (1 << 11),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_audio,
+ .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 },
+ },
+};
+
+/* Clock initialization code */
+static struct clksrc_clk *sysclks[] = {
+ &clk_mout_apll,
+ &clk_mout_epll,
+ &clk_mout_mpll,
+ &clk_dout_mpll,
+ &clk_armclk,
+ &clk_hclk,
+ &clk_pclk,
+ &clk_hclk_low,
+ &clk_pclk_low,
+};
+
+void __init_or_cpufreq s5p6440_setup_clocks(void)
+{
+ struct clk *xtal_clk;
+
+ unsigned long xtal;
+ unsigned long fclk;
+ unsigned long hclk;
+ unsigned long hclk_low;
+ unsigned long pclk;
+ unsigned long pclk_low;
+
+ unsigned long apll;
+ unsigned long mpll;
+ unsigned long epll;
+ unsigned int ptr;
+
+ /* Set S5P6440 functions for clk_fout_epll */
+
+ clk_fout_epll.enable = s5p64x0_epll_enable;
+ clk_fout_epll.ops = &s5p6440_epll_ops;
+
+ clk_48m.enable = s5p64x0_clk48m_ctrl;
+
+ xtal_clk = clk_get(NULL, "ext_xtal");
+ BUG_ON(IS_ERR(xtal_clk));
+
+ xtal = clk_get_rate(xtal_clk);
+ clk_put(xtal_clk);
+
+ apll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_APLL_CON), pll_4502);
+ mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_MPLL_CON), pll_4502);
+ epll = s5p_get_pll90xx(xtal, __raw_readl(S5P64X0_EPLL_CON),
+ __raw_readl(S5P64X0_EPLL_CON_K));
+
+ clk_fout_apll.rate = apll;
+ clk_fout_mpll.rate = mpll;
+ clk_fout_epll.rate = epll;
+
+ printk(KERN_INFO "S5P6440: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \
+ " E=%ld.%ldMHz\n",
+ print_mhz(apll), print_mhz(mpll), print_mhz(epll));
+
+ fclk = clk_get_rate(&clk_armclk.clk);
+ hclk = clk_get_rate(&clk_hclk.clk);
+ pclk = clk_get_rate(&clk_pclk.clk);
+ hclk_low = clk_get_rate(&clk_hclk_low.clk);
+ pclk_low = clk_get_rate(&clk_pclk_low.clk);
+
+ printk(KERN_INFO "S5P6440: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \
+ " PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n",
+ print_mhz(hclk), print_mhz(hclk_low),
+ print_mhz(pclk), print_mhz(pclk_low));
+
+ clk_f.rate = fclk;
+ clk_h.rate = hclk;
+ clk_p.rate = pclk;
+
+ for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
+ s3c_set_clksrc(&clksrcs[ptr], true);
+}
+
+static struct clk *clks[] __initdata = {
+ &clk_ext,
+ &clk_iis_cd_v40,
+ &clk_pcm_cd,
+};
+
+void __init s5p6440_register_clocks(void)
+{
+ struct clk *clkp;
+ int ret;
+ int ptr;
+
+ s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
+
+ for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
+ s3c_register_clksrc(sysclks[ptr], 1);
+
+ s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+ s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
+
+ clkp = init_clocks_disable;
+ for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
+
+ ret = s3c24xx_register_clock(clkp);
+ if (ret < 0) {
+ printk(KERN_ERR "Failed to register clock %s (%d)\n",
+ clkp->name, ret);
+ }
+ (clkp->enable)(clkp, 0);
+ }
+
+ s3c_pwmclk_init();
+}
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
new file mode 100644
index 0000000..95bab7d
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -0,0 +1,655 @@
+/* linux/arch/arm/mach-s5p64x0/clock-s5p6450.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P6450 - Clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+#include <mach/s5p64x0-clock.h>
+
+#include <plat/cpu-freq.h>
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/pll.h>
+#include <plat/s5p-clock.h>
+#include <plat/clock-clksrc.h>
+#include <plat/s5p6450.h>
+
+static struct clksrc_clk clk_mout_dpll = {
+ .clk = {
+ .name = "mout_dpll",
+ .id = -1,
+ },
+ .sources = &clk_src_dpll,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 5, .size = 1 },
+};
+
+static u32 epll_div[][5] = {
+ { 133000000, 27307, 55, 2, 2 },
+ { 100000000, 43691, 41, 2, 2 },
+ { 480000000, 0, 80, 2, 0 },
+};
+
+static int s5p6450_epll_set_rate(struct clk *clk, unsigned long rate)
+{
+ unsigned int epll_con, epll_con_k;
+ unsigned int i;
+
+ if (clk->rate == rate) /* Return if nothing changed */
+ return 0;
+
+ epll_con = __raw_readl(S5P64X0_EPLL_CON);
+ epll_con_k = __raw_readl(S5P64X0_EPLL_CON_K);
+
+ epll_con_k &= ~(PLL90XX_KDIV_MASK);
+ epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK);
+
+ for (i = 0; i < ARRAY_SIZE(epll_div); i++) {
+ if (epll_div[i][0] == rate) {
+ epll_con_k |= (epll_div[i][1] << PLL90XX_KDIV_SHIFT);
+ epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) |
+ (epll_div[i][3] << PLL90XX_PDIV_SHIFT) |
+ (epll_div[i][4] << PLL90XX_SDIV_SHIFT);
+ break;
+ }
+ }
+
+ if (i == ARRAY_SIZE(epll_div)) {
+ printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__);
+ return -EINVAL;
+ }
+
+ __raw_writel(epll_con, S5P64X0_EPLL_CON);
+ __raw_writel(epll_con_k, S5P64X0_EPLL_CON_K);
+
+ clk->rate = rate;
+
+ return 0;
+}
+
+static struct clk_ops s5p6450_epll_ops = {
+ .get_rate = s5p64x0_epll_get_rate,
+ .set_rate = s5p6450_epll_set_rate,
+};
+
+static struct clksrc_clk clk_dout_epll = {
+ .clk = {
+ .name = "dout_epll",
+ .id = -1,
+ .parent = &clk_mout_epll.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 24, .size = 4 },
+};
+
+static struct clksrc_clk clk_mout_hclk_sel = {
+ .clk = {
+ .name = "mout_hclk_sel",
+ .id = -1,
+ },
+ .sources = &clkset_hclk_low,
+ .reg_src = { .reg = S5P64X0_OTHERS, .shift = 15, .size = 1 },
+};
+
+static struct clk *clkset_hclk_list[] = {
+ &clk_mout_hclk_sel.clk,
+ &clk_armclk.clk,
+};
+
+static struct clksrc_sources clkset_hclk = {
+ .sources = clkset_hclk_list,
+ .nr_sources = ARRAY_SIZE(clkset_hclk_list),
+};
+
+static struct clksrc_clk clk_hclk = {
+ .clk = {
+ .name = "clk_hclk",
+ .id = -1,
+ },
+ .sources = &clkset_hclk,
+ .reg_src = { .reg = S5P64X0_OTHERS, .shift = 14, .size = 1 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk clk_pclk = {
+ .clk = {
+ .name = "clk_pclk",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 12, .size = 4 },
+};
+static struct clksrc_clk clk_dout_pwm_ratio0 = {
+ .clk = {
+ .name = "clk_dout_pwm_ratio0",
+ .id = -1,
+ .parent = &clk_mout_hclk_sel.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 16, .size = 4 },
+};
+
+static struct clksrc_clk clk_pclk_to_wdt_pwm = {
+ .clk = {
+ .name = "clk_pclk_to_wdt_pwm",
+ .id = -1,
+ .parent = &clk_dout_pwm_ratio0.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 20, .size = 4 },
+};
+
+static struct clksrc_clk clk_hclk_low = {
+ .clk = {
+ .name = "clk_hclk_low",
+ .id = -1,
+ },
+ .sources = &clkset_hclk_low,
+ .reg_src = { .reg = S5P64X0_OTHERS, .shift = 6, .size = 1 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk clk_pclk_low = {
+ .clk = {
+ .name = "clk_pclk_low",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 12, .size = 4 },
+};
+
+/*
+ * The following clocks will be disabled during clock initialization. It is
+ * recommended to keep the following clocks disabled until the driver requests
+ * for enabling the clock.
+ */
+static struct clk init_clocks_disable[] = {
+ {
+ .name = "usbhost",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 3),
+ }, {
+ .name = "dma",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 12),
+ }, {
+ .name = "hsmmc",
+ .id = 0,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 17),
+ }, {
+ .name = "hsmmc",
+ .id = 1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 18),
+ }, {
+ .name = "hsmmc",
+ .id = 2,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 19),
+ }, {
+ .name = "usbotg",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 20),
+ }, {
+ .name = "lcd",
+ .id = -1,
+ .parent = &clk_h,
+ .enable = s5p64x0_hclk1_ctrl,
+ .ctrlbit = (1 << 1),
+ }, {
+ .name = "watchdog",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 5),
+ }, {
+ .name = "adc",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 12),
+ }, {
+ .name = "i2c",
+ .id = 0,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 17),
+ }, {
+ .name = "spi",
+ .id = 0,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 21),
+ }, {
+ .name = "spi",
+ .id = 1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 22),
+ }, {
+ .name = "iis",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 26),
+ }, {
+ .name = "i2c",
+ .id = 1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 27),
+ }, {
+ .name = "dmc0",
+ .id = -1,
+ .parent = &clk_pclk.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 30),
+ }
+};
+
+/*
+ * The following clocks will be enabled during clock initialization.
+ */
+static struct clk init_clocks[] = {
+ {
+ .name = "intc",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 1),
+ }, {
+ .name = "mem",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 21),
+ }, {
+ .name = "uart",
+ .id = 0,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 1),
+ }, {
+ .name = "uart",
+ .id = 1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 2),
+ }, {
+ .name = "uart",
+ .id = 2,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 3),
+ }, {
+ .name = "uart",
+ .id = 3,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 4),
+ }, {
+ .name = "timers",
+ .id = -1,
+ .parent = &clk_pclk_to_wdt_pwm.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 7),
+ }, {
+ .name = "gpio",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 18),
+ },
+};
+
+static struct clk *clkset_uart_list[] = {
+ &clk_dout_epll.clk,
+ &clk_dout_mpll.clk,
+};
+
+static struct clksrc_sources clkset_uart = {
+ .sources = clkset_uart_list,
+ .nr_sources = ARRAY_SIZE(clkset_uart_list),
+};
+
+static struct clk *clkset_mali_list[] = {
+ &clk_mout_epll.clk,
+ &clk_mout_apll.clk,
+ &clk_mout_mpll.clk,
+};
+
+static struct clksrc_sources clkset_mali = {
+ .sources = clkset_mali_list,
+ .nr_sources = ARRAY_SIZE(clkset_mali_list),
+};
+
+static struct clk *clkset_group2_list[] = {
+ &clk_dout_epll.clk,
+ &clk_dout_mpll.clk,
+ &clk_ext_xtal_mux,
+};
+
+static struct clksrc_sources clkset_group2 = {
+ .sources = clkset_group2_list,
+ .nr_sources = ARRAY_SIZE(clkset_group2_list),
+};
+
+static struct clk *clkset_dispcon_list[] = {
+ &clk_dout_epll.clk,
+ &clk_dout_mpll.clk,
+ &clk_ext_xtal_mux,
+ &clk_mout_dpll.clk,
+};
+
+static struct clksrc_sources clkset_dispcon = {
+ .sources = clkset_dispcon_list,
+ .nr_sources = ARRAY_SIZE(clkset_dispcon_list),
+};
+
+static struct clk *clkset_hsmmc44_list[] = {
+ &clk_dout_epll.clk,
+ &clk_dout_mpll.clk,
+ &clk_ext_xtal_mux,
+ &s5p_clk_27m,
+ &clk_48m,
+};
+
+static struct clksrc_sources clkset_hsmmc44 = {
+ .sources = clkset_hsmmc44_list,
+ .nr_sources = ARRAY_SIZE(clkset_hsmmc44_list),
+};
+
+static struct clk *clkset_sclk_audio0_list[] = {
+ [0] = &clk_dout_epll.clk,
+ [1] = &clk_dout_mpll.clk,
+ [2] = &clk_ext_xtal_mux,
+ [3] = NULL,
+ [4] = NULL,
+};
+
+static struct clksrc_sources clkset_sclk_audio0 = {
+ .sources = clkset_sclk_audio0_list,
+ .nr_sources = ARRAY_SIZE(clkset_sclk_audio0_list),
+};
+
+static struct clksrc_clk clk_sclk_audio0 = {
+ .clk = {
+ .name = "audio-bus",
+ .id = -1,
+ .enable = s5p64x0_sclk_ctrl,
+ .ctrlbit = (1 << 8),
+ .parent = &clk_dout_epll.clk,
+ },
+ .sources = &clkset_sclk_audio0,
+ .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 10, .size = 3 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk clksrcs[] = {
+ {
+ .clk = {
+ .name = "sclk_mmc",
+ .id = 0,
+ .ctrlbit = (1 << 24),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_mmc",
+ .id = 1,
+ .ctrlbit = (1 << 25),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_mmc",
+ .id = 2,
+ .ctrlbit = (1 << 26),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
+ }, {
+ .clk = {
+ .name = "uclk1",
+ .id = -1,
+ .ctrlbit = (1 << 5),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_uart,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_spi",
+ .id = 0,
+ .ctrlbit = (1 << 20),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_spi",
+ .id = 1,
+ .ctrlbit = (1 << 21),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_fimc",
+ .id = -1,
+ .ctrlbit = (1 << 10),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 26, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 12, .size = 4 },
+ }, {
+ .clk = {
+ .name = "aclk_mali",
+ .id = -1,
+ .ctrlbit = (1 << 2),
+ .enable = s5p64x0_sclk1_ctrl,
+ },
+ .sources = &clkset_mali,
+ .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_2d",
+ .id = -1,
+ .ctrlbit = (1 << 12),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_mali,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 30, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 20, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_usi",
+ .id = -1,
+ .ctrlbit = (1 << 7),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 10, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 16, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_camif",
+ .id = -1,
+ .ctrlbit = (1 << 6),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 28, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 20, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_dispcon",
+ .id = -1,
+ .ctrlbit = (1 << 1),
+ .enable = s5p64x0_sclk1_ctrl,
+ },
+ .sources = &clkset_dispcon,
+ .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 4, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 0, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_hsmmc44",
+ .id = -1,
+ .ctrlbit = (1 << 30),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_hsmmc44,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 6, .size = 3 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 28, .size = 4 },
+ },
+};
+
+/* Clock initialization code */
+static struct clksrc_clk *sysclks[] = {
+ &clk_mout_apll,
+ &clk_mout_epll,
+ &clk_dout_epll,
+ &clk_mout_mpll,
+ &clk_dout_mpll,
+ &clk_armclk,
+ &clk_mout_hclk_sel,
+ &clk_dout_pwm_ratio0,
+ &clk_pclk_to_wdt_pwm,
+ &clk_hclk,
+ &clk_pclk,
+ &clk_hclk_low,
+ &clk_pclk_low,
+ &clk_sclk_audio0,
+};
+
+void __init_or_cpufreq s5p6450_setup_clocks(void)
+{
+ struct clk *xtal_clk;
+
+ unsigned long xtal;
+ unsigned long fclk;
+ unsigned long hclk;
+ unsigned long hclk_low;
+ unsigned long pclk;
+ unsigned long pclk_low;
+
+ unsigned long apll;
+ unsigned long mpll;
+ unsigned long epll;
+ unsigned long dpll;
+ unsigned int ptr;
+
+ /* Set S5P6450 functions for clk_fout_epll */
+
+ clk_fout_epll.enable = s5p64x0_epll_enable;
+ clk_fout_epll.ops = &s5p6450_epll_ops;
+
+ clk_48m.enable = s5p64x0_clk48m_ctrl;
+
+ xtal_clk = clk_get(NULL, "ext_xtal");
+ BUG_ON(IS_ERR(xtal_clk));
+
+ xtal = clk_get_rate(xtal_clk);
+ clk_put(xtal_clk);
+
+ apll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_APLL_CON), pll_4502);
+ mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_MPLL_CON), pll_4502);
+ epll = s5p_get_pll90xx(xtal, __raw_readl(S5P64X0_EPLL_CON),
+ __raw_readl(S5P64X0_EPLL_CON_K));
+ dpll = s5p_get_pll46xx(xtal, __raw_readl(S5P6450_DPLL_CON),
+ __raw_readl(S5P6450_DPLL_CON_K), pll_4650c);
+
+ clk_fout_apll.rate = apll;
+ clk_fout_mpll.rate = mpll;
+ clk_fout_epll.rate = epll;
+ clk_fout_dpll.rate = dpll;
+
+ printk(KERN_INFO "S5P6450: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \
+ " E=%ld.%ldMHz, D=%ld.%ldMHz\n",
+ print_mhz(apll), print_mhz(mpll), print_mhz(epll),
+ print_mhz(dpll));
+
+ fclk = clk_get_rate(&clk_armclk.clk);
+ hclk = clk_get_rate(&clk_hclk.clk);
+ pclk = clk_get_rate(&clk_pclk.clk);
+ hclk_low = clk_get_rate(&clk_hclk_low.clk);
+ pclk_low = clk_get_rate(&clk_pclk_low.clk);
+
+ printk(KERN_INFO "S5P6450: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \
+ " PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n",
+ print_mhz(hclk), print_mhz(hclk_low),
+ print_mhz(pclk), print_mhz(pclk_low));
+
+ clk_f.rate = fclk;
+ clk_h.rate = hclk;
+ clk_p.rate = pclk;
+
+ for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
+ s3c_set_clksrc(&clksrcs[ptr], true);
+}
+
+void __init s5p6450_register_clocks(void)
+{
+ struct clk *clkp;
+ int ret;
+ int ptr;
+
+ for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
+ s3c_register_clksrc(sysclks[ptr], 1);
+
+ s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+ s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
+
+ clkp = init_clocks_disable;
+ for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
+
+ ret = s3c24xx_register_clock(clkp);
+ if (ret < 0) {
+ printk(KERN_ERR "Failed to register clock %s (%d)\n",
+ clkp->name, ret);
+ }
+ (clkp->enable)(clkp, 0);
+ }
+
+ s3c_pwmclk_init();
+}
diff --git a/arch/arm/mach-s5p64x0/clock.c b/arch/arm/mach-s5p64x0/clock.c
new file mode 100644
index 0000000..523ba80
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/clock.c
@@ -0,0 +1,253 @@
+/* linux/arch/arm/mach-s5p64x0/clock.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P64X0 - Clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+
+#include <plat/cpu-freq.h>
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/pll.h>
+#include <plat/s5p-clock.h>
+#include <plat/clock-clksrc.h>
+#include <plat/s5p6440.h>
+#include <plat/s5p6450.h>
+
+struct clksrc_clk clk_mout_apll = {
+ .clk = {
+ .name = "mout_apll",
+ .id = -1,
+ },
+ .sources = &clk_src_apll,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 0, .size = 1 },
+};
+
+struct clksrc_clk clk_mout_mpll = {
+ .clk = {
+ .name = "mout_mpll",
+ .id = -1,
+ },
+ .sources = &clk_src_mpll,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 1, .size = 1 },
+};
+
+struct clksrc_clk clk_mout_epll = {
+ .clk = {
+ .name = "mout_epll",
+ .id = -1,
+ },
+ .sources = &clk_src_epll,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 2, .size = 1 },
+};
+
+enum perf_level {
+ L0 = 532*1000,
+ L1 = 266*1000,
+ L2 = 133*1000,
+};
+
+static const u32 clock_table[][3] = {
+ /*{ARM_CLK, DIVarm, DIVhclk}*/
+ {L0 * 1000, (0 << ARM_DIV_RATIO_SHIFT), (3 << S5P64X0_CLKDIV0_HCLK_SHIFT)},
+ {L1 * 1000, (1 << ARM_DIV_RATIO_SHIFT), (1 << S5P64X0_CLKDIV0_HCLK_SHIFT)},
+ {L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P64X0_CLKDIV0_HCLK_SHIFT)},
+};
+
+int s5p64x0_epll_enable(struct clk *clk, int enable)
+{
+ unsigned int ctrlbit = clk->ctrlbit;
+ unsigned int epll_con = __raw_readl(S5P64X0_EPLL_CON) & ~ctrlbit;
+
+ if (enable)
+ __raw_writel(epll_con | ctrlbit, S5P64X0_EPLL_CON);
+ else
+ __raw_writel(epll_con, S5P64X0_EPLL_CON);
+
+ return 0;
+}
+
+unsigned long s5p64x0_epll_get_rate(struct clk *clk)
+{
+ return clk->rate;
+}
+
+unsigned long s5p64x0_armclk_get_rate(struct clk *clk)
+{
+ unsigned long rate = clk_get_rate(clk->parent);
+ u32 clkdiv;
+
+ /* divisor mask starts at bit0, so no need to shift */
+ clkdiv = __raw_readl(ARM_CLK_DIV) & ARM_DIV_MASK;
+
+ return rate / (clkdiv + 1);
+}
+
+unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate)
+{
+ u32 iter;
+
+ for (iter = 1 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
+ if (rate > clock_table[iter][0])
+ return clock_table[iter-1][0];
+ }
+
+ return clock_table[ARRAY_SIZE(clock_table) - 1][0];
+}
+
+int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate)
+{
+ u32 round_tmp;
+ u32 iter;
+ u32 clk_div0_tmp;
+ u32 cur_rate = clk->ops->get_rate(clk);
+ unsigned long flags;
+
+ round_tmp = clk->ops->round_rate(clk, rate);
+ if (round_tmp == cur_rate)
+ return 0;
+
+
+ for (iter = 0 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
+ if (round_tmp == clock_table[iter][0])
+ break;
+ }
+
+ if (iter >= ARRAY_SIZE(clock_table))
+ iter = ARRAY_SIZE(clock_table) - 1;
+
+ local_irq_save(flags);
+ if (cur_rate > round_tmp) {
+ /* Frequency Down */
+ clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
+ clk_div0_tmp |= clock_table[iter][1];
+ __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
+
+ clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
+ ~(S5P64X0_CLKDIV0_HCLK_MASK);
+ clk_div0_tmp |= clock_table[iter][2];
+ __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
+
+
+ } else {
+ /* Frequency Up */
+ clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
+ ~(S5P64X0_CLKDIV0_HCLK_MASK);
+ clk_div0_tmp |= clock_table[iter][2];
+ __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
+
+ clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
+ clk_div0_tmp |= clock_table[iter][1];
+ __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
+ }
+ local_irq_restore(flags);
+
+ clk->rate = clock_table[iter][0];
+
+ return 0;
+}
+
+struct clk_ops s5p64x0_clkarm_ops = {
+ .get_rate = s5p64x0_armclk_get_rate,
+ .set_rate = s5p64x0_armclk_set_rate,
+ .round_rate = s5p64x0_armclk_round_rate,
+};
+
+struct clksrc_clk clk_armclk = {
+ .clk = {
+ .name = "armclk",
+ .id = 1,
+ .parent = &clk_mout_apll.clk,
+ .ops = &s5p64x0_clkarm_ops,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 0, .size = 4 },
+};
+
+struct clksrc_clk clk_dout_mpll = {
+ .clk = {
+ .name = "dout_mpll",
+ .id = -1,
+ .parent = &clk_mout_mpll.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 4, .size = 1 },
+};
+
+struct clk *clkset_hclk_low_list[] = {
+ &clk_mout_apll.clk,
+ &clk_mout_mpll.clk,
+};
+
+struct clksrc_sources clkset_hclk_low = {
+ .sources = clkset_hclk_low_list,
+ .nr_sources = ARRAY_SIZE(clkset_hclk_low_list),
+};
+
+int s5p64x0_pclk_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(S5P64X0_CLK_GATE_PCLK, clk, enable);
+}
+
+int s5p64x0_hclk0_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(S5P64X0_CLK_GATE_HCLK0, clk, enable);
+}
+
+int s5p64x0_hclk1_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(S5P64X0_CLK_GATE_HCLK1, clk, enable);
+}
+
+int s5p64x0_sclk_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(S5P64X0_CLK_GATE_SCLK0, clk, enable);
+}
+
+int s5p64x0_sclk1_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(S5P64X0_CLK_GATE_SCLK1, clk, enable);
+}
+
+int s5p64x0_mem_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(S5P64X0_CLK_GATE_MEM0, clk, enable);
+}
+
+int s5p64x0_clk48m_ctrl(struct clk *clk, int enable)
+{
+ unsigned long flags;
+ u32 val;
+
+ /* can't rely on clock lock, this register has other usages */
+ local_irq_save(flags);
+
+ val = __raw_readl(S5P64X0_OTHERS);
+ if (enable)
+ val |= S5P64X0_OTHERS_USB_SIG_MASK;
+ else
+ val &= ~S5P64X0_OTHERS_USB_SIG_MASK;
+
+ __raw_writel(val, S5P64X0_OTHERS);
+
+ local_irq_restore(flags);
+
+ return 0;
+}
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-clock.h b/arch/arm/mach-s5p64x0/include/mach/regs-clock.h
new file mode 100644
index 0000000..58e1bc8
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-clock.h
@@ -0,0 +1,63 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/regs-clock.h
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P64X0 - Clock register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_CLOCK_H
+#define __ASM_ARCH_REGS_CLOCK_H __FILE__
+
+#include <mach/map.h>
+
+#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
+
+#define S5P64X0_APLL_CON S5P_CLKREG(0x0C)
+#define S5P64X0_MPLL_CON S5P_CLKREG(0x10)
+#define S5P64X0_EPLL_CON S5P_CLKREG(0x14)
+#define S5P64X0_EPLL_CON_K S5P_CLKREG(0x18)
+
+#define S5P64X0_CLK_SRC0 S5P_CLKREG(0x1C)
+
+#define S5P64X0_CLK_DIV0 S5P_CLKREG(0x20)
+#define S5P64X0_CLK_DIV1 S5P_CLKREG(0x24)
+#define S5P64X0_CLK_DIV2 S5P_CLKREG(0x28)
+
+#define S5P64X0_CLK_GATE_HCLK0 S5P_CLKREG(0x30)
+#define S5P64X0_CLK_GATE_PCLK S5P_CLKREG(0x34)
+#define S5P64X0_CLK_GATE_SCLK0 S5P_CLKREG(0x38)
+#define S5P64X0_CLK_GATE_MEM0 S5P_CLKREG(0x3C)
+
+#define S5P64X0_CLK_DIV3 S5P_CLKREG(0x40)
+
+#define S5P64X0_CLK_GATE_HCLK1 S5P_CLKREG(0x44)
+#define S5P64X0_CLK_GATE_SCLK1 S5P_CLKREG(0x48)
+
+#define S5P6450_DPLL_CON S5P_CLKREG(0x50)
+#define S5P6450_DPLL_CON_K S5P_CLKREG(0x54)
+
+#define S5P64X0_CLK_SRC1 S5P_CLKREG(0x10C)
+
+#define S5P64X0_SYS_ID S5P_CLKREG(0x118)
+#define S5P64X0_SYS_OTHERS S5P_CLKREG(0x11C)
+
+#define S5P64X0_PWR_CFG S5P_CLKREG(0x804)
+#define S5P64X0_OTHERS S5P_CLKREG(0x900)
+
+#define S5P64X0_CLKDIV0_HCLK_SHIFT (8)
+#define S5P64X0_CLKDIV0_HCLK_MASK (0xF << S5P64X0_CLKDIV0_HCLK_SHIFT)
+
+#define S5P64X0_OTHERS_USB_SIG_MASK (1 << 16)
+
+/* Compatibility defines */
+
+#define ARM_CLK_DIV S5P64X0_CLK_DIV0
+#define ARM_DIV_RATIO_SHIFT 0
+#define ARM_DIV_MASK (0xF << ARM_DIV_RATIO_SHIFT)
+
+#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h b/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h
new file mode 100644
index 0000000..ff85b4b
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h
@@ -0,0 +1,46 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Header file for s5p64x0 clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_CLOCK_H
+#define __ASM_ARCH_CLOCK_H __FILE__
+
+#include <linux/clk.h>
+
+extern struct clksrc_clk clk_mout_apll;
+extern struct clksrc_clk clk_mout_mpll;
+extern struct clksrc_clk clk_mout_epll;
+
+extern int s5p64x0_epll_enable(struct clk *clk, int enable);
+extern unsigned long s5p64x0_epll_get_rate(struct clk *clk);
+
+extern unsigned long s5p64x0_armclk_get_rate(struct clk *clk);
+extern unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate);
+extern int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate);
+
+extern struct clk_ops s5p64x0_clkarm_ops;
+
+extern struct clksrc_clk clk_armclk;
+extern struct clksrc_clk clk_dout_mpll;
+
+extern struct clk *clkset_hclk_low_list[];
+extern struct clksrc_sources clkset_hclk_low;
+
+extern int s5p64x0_pclk_ctrl(struct clk *clk, int enable);
+extern int s5p64x0_hclk0_ctrl(struct clk *clk, int enable);
+extern int s5p64x0_hclk1_ctrl(struct clk *clk, int enable);
+extern int s5p64x0_sclk_ctrl(struct clk *clk, int enable);
+extern int s5p64x0_sclk1_ctrl(struct clk *clk, int enable);
+extern int s5p64x0_mem_ctrl(struct clk *clk, int enable);
+
+extern int s5p64x0_clk48m_ctrl(struct clk *clk, int enable);
+
+#endif /* __ASM_ARCH_CLOCK_H */
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
index b5e2552..8aaf4e6 100644
--- a/arch/arm/plat-s5p/clock.c
+++ b/arch/arm/plat-s5p/clock.c
@@ -74,6 +74,13 @@ struct clk clk_fout_epll = {
.ctrlbit = (1 << 31),
};
+/* DPLL clock output */
+struct clk clk_fout_dpll = {
+ .name = "fout_dpll",
+ .id = -1,
+ .ctrlbit = (1 << 31),
+};
+
/* VPLL clock output */
struct clk clk_fout_vpll = {
.name = "fout_vpll",
@@ -122,6 +129,17 @@ struct clksrc_sources clk_src_epll = {
.nr_sources = ARRAY_SIZE(clk_src_epll_list),
};
+/* Possible clock sources for DPLL Mux */
+static struct clk *clk_src_dpll_list[] = {
+ [0] = &clk_fin_dpll,
+ [1] = &clk_fout_dpll,
+};
+
+struct clksrc_sources clk_src_dpll = {
+ .sources = clk_src_dpll_list,
+ .nr_sources = ARRAY_SIZE(clk_src_dpll_list),
+};
+
struct clk clk_vpll = {
.name = "vpll",
.id = -1,
@@ -145,6 +163,7 @@ static struct clk *s5p_clks[] __initdata = {
&clk_fout_apll,
&clk_fout_mpll,
&clk_fout_epll,
+ &clk_fout_dpll,
&clk_fout_vpll,
&clk_arm,
&clk_vpll,
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-s5p/include/plat/pll.h
index 4e8fe08..bf28fad 100644
--- a/arch/arm/plat-s5p/include/plat/pll.h
+++ b/arch/arm/plat-s5p/include/plat/pll.h
@@ -47,6 +47,7 @@ static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con,
}
#define PLL46XX_KDIV_MASK (0xFFFF)
+#define PLL4650C_KDIV_MASK (0xFFF)
#define PLL46XX_MDIV_MASK (0x1FF)
#define PLL46XX_PDIV_MASK (0x3F)
#define PLL46XX_SDIV_MASK (0x7)
@@ -57,6 +58,7 @@ static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con,
enum pll46xx_type_t {
pll_4600,
pll_4650,
+ pll_4650c,
};
static inline unsigned long s5p_get_pll46xx(unsigned long baseclk,
@@ -72,6 +74,11 @@ static inline unsigned long s5p_get_pll46xx(unsigned long baseclk,
sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK;
kdiv = pll_con1 & PLL46XX_KDIV_MASK;
+ if (pll_type == pll_4650c)
+ kdiv = pll_con1 & PLL4650C_KDIV_MASK;
+ else
+ kdiv = pll_con1 & PLL46XX_KDIV_MASK;
+
tmp = baseclk;
if (pll_type == pll_4600) {
diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-s5p/include/plat/s5p-clock.h
index 09418b1..17036c8 100644
--- a/arch/arm/plat-s5p/include/plat/s5p-clock.h
+++ b/arch/arm/plat-s5p/include/plat/s5p-clock.h
@@ -1,7 +1,7 @@
/* linux/arch/arm/plat-s5p/include/plat/s5p-clock.h
*
- * Copyright 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* Header file for s5p clock support
*
@@ -20,6 +20,7 @@
#define clk_fin_apll clk_ext_xtal_mux
#define clk_fin_mpll clk_ext_xtal_mux
#define clk_fin_epll clk_ext_xtal_mux
+#define clk_fin_dpll clk_ext_xtal_mux
#define clk_fin_vpll clk_ext_xtal_mux
#define clk_fin_hpll clk_ext_xtal_mux
@@ -30,6 +31,7 @@ extern struct clk s5p_clk_27m;
extern struct clk clk_fout_apll;
extern struct clk clk_fout_mpll;
extern struct clk clk_fout_epll;
+extern struct clk clk_fout_dpll;
extern struct clk clk_fout_vpll;
extern struct clk clk_arm;
extern struct clk clk_vpll;
@@ -37,8 +39,8 @@ extern struct clk clk_vpll;
extern struct clksrc_sources clk_src_apll;
extern struct clksrc_sources clk_src_mpll;
extern struct clksrc_sources clk_src_epll;
+extern struct clksrc_sources clk_src_dpll;
-extern int s5p6440_clk48m_ctrl(struct clk *clk, int enable);
extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable);
#endif /* __ASM_PLAT_S5P_CLOCK_H */
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 04/13] ARM: S5P64X0: Update Clock for S5P6440 and S5P6450
@ 2010-09-01 7:09 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel
This patch updates regarding clock files for supporting S5P6440 and
S5P6450 with one kernel image. The mach-s5p64x0/clock.c is for common
of them and there are specific clock files for each SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/mach-s5p6440/clock.c | 846 --------------------
arch/arm/mach-s5p6440/include/mach/regs-clock.h | 130 ---
arch/arm/mach-s5p64x0/clock-s5p6440.c | 626 +++++++++++++++
arch/arm/mach-s5p64x0/clock-s5p6450.c | 655 +++++++++++++++
arch/arm/mach-s5p64x0/clock.c | 253 ++++++
arch/arm/mach-s5p64x0/include/mach/regs-clock.h | 63 ++
arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h | 46 ++
arch/arm/plat-s5p/clock.c | 19 +
arch/arm/plat-s5p/include/plat/pll.h | 7 +
arch/arm/plat-s5p/include/plat/s5p-clock.h | 8 +-
10 files changed, 1674 insertions(+), 979 deletions(-)
delete mode 100644 arch/arm/mach-s5p6440/clock.c
delete mode 100644 arch/arm/mach-s5p6440/include/mach/regs-clock.h
create mode 100644 arch/arm/mach-s5p64x0/clock-s5p6440.c
create mode 100644 arch/arm/mach-s5p64x0/clock-s5p6450.c
create mode 100644 arch/arm/mach-s5p64x0/clock.c
create mode 100644 arch/arm/mach-s5p64x0/include/mach/regs-clock.h
create mode 100644 arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h
diff --git a/arch/arm/mach-s5p6440/clock.c b/arch/arm/mach-s5p6440/clock.c
deleted file mode 100644
index ca6e48d..0000000
--- a/arch/arm/mach-s5p6440/clock.c
+++ /dev/null
@@ -1,846 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/clock.c
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S5P6440 - Clock support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#include <linux/init.h>
-#include <linux/module.h>
-#include <linux/kernel.h>
-#include <linux/list.h>
-#include <linux/errno.h>
-#include <linux/err.h>
-#include <linux/clk.h>
-#include <linux/sysdev.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <mach/map.h>
-
-#include <plat/cpu-freq.h>
-#include <mach/regs-clock.h>
-#include <plat/clock.h>
-#include <plat/cpu.h>
-#include <plat/clock-clksrc.h>
-#include <plat/s5p-clock.h>
-#include <plat/pll.h>
-#include <plat/s5p6440.h>
-
-/* APLL Mux output clock */
-static struct clksrc_clk clk_mout_apll = {
- .clk = {
- .name = "mout_apll",
- .id = -1,
- },
- .sources = &clk_src_apll,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 0, .size = 1 },
-};
-
-static int s5p6440_epll_enable(struct clk *clk, int enable)
-{
- unsigned int ctrlbit = clk->ctrlbit;
- unsigned int epll_con = __raw_readl(S5P_EPLL_CON) & ~ctrlbit;
-
- if (enable)
- __raw_writel(epll_con | ctrlbit, S5P_EPLL_CON);
- else
- __raw_writel(epll_con, S5P_EPLL_CON);
-
- return 0;
-}
-
-static unsigned long s5p6440_epll_get_rate(struct clk *clk)
-{
- return clk->rate;
-}
-
-static u32 epll_div[][5] = {
- { 36000000, 0, 48, 1, 4 },
- { 48000000, 0, 32, 1, 3 },
- { 60000000, 0, 40, 1, 3 },
- { 72000000, 0, 48, 1, 3 },
- { 84000000, 0, 28, 1, 2 },
- { 96000000, 0, 32, 1, 2 },
- { 32768000, 45264, 43, 1, 4 },
- { 45158000, 6903, 30, 1, 3 },
- { 49152000, 50332, 32, 1, 3 },
- { 67738000, 10398, 45, 1, 3 },
- { 73728000, 9961, 49, 1, 3 }
-};
-
-static int s5p6440_epll_set_rate(struct clk *clk, unsigned long rate)
-{
- unsigned int epll_con, epll_con_k;
- unsigned int i;
-
- if (clk->rate == rate) /* Return if nothing changed */
- return 0;
-
- epll_con = __raw_readl(S5P_EPLL_CON);
- epll_con_k = __raw_readl(S5P_EPLL_CON_K);
-
- epll_con_k &= ~(PLL90XX_KDIV_MASK);
- epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK);
-
- for (i = 0; i < ARRAY_SIZE(epll_div); i++) {
- if (epll_div[i][0] == rate) {
- epll_con_k |= (epll_div[i][1] << PLL90XX_KDIV_SHIFT);
- epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) |
- (epll_div[i][3] << PLL90XX_PDIV_SHIFT) |
- (epll_div[i][4] << PLL90XX_SDIV_SHIFT);
- break;
- }
- }
-
- if (i == ARRAY_SIZE(epll_div)) {
- printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__);
- return -EINVAL;
- }
-
- __raw_writel(epll_con, S5P_EPLL_CON);
- __raw_writel(epll_con_k, S5P_EPLL_CON_K);
-
- clk->rate = rate;
-
- return 0;
-}
-
-static struct clk_ops s5p6440_epll_ops = {
- .get_rate = s5p6440_epll_get_rate,
- .set_rate = s5p6440_epll_set_rate,
-};
-
-static struct clksrc_clk clk_mout_epll = {
- .clk = {
- .name = "mout_epll",
- .id = -1,
- },
- .sources = &clk_src_epll,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 2, .size = 1 },
-};
-
-static struct clksrc_clk clk_mout_mpll = {
- .clk = {
- .name = "mout_mpll",
- .id = -1,
- },
- .sources = &clk_src_mpll,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 1, .size = 1 },
-};
-
-enum perf_level {
- L0 = 532*1000,
- L1 = 266*1000,
- L2 = 133*1000,
-};
-
-static const u32 clock_table[][3] = {
- /*{ARM_CLK, DIVarm, DIVhclk}*/
- {L0 * 1000, (0 << ARM_DIV_RATIO_SHIFT), (3 << S5P_CLKDIV0_HCLK_SHIFT)},
- {L1 * 1000, (1 << ARM_DIV_RATIO_SHIFT), (1 << S5P_CLKDIV0_HCLK_SHIFT)},
- {L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P_CLKDIV0_HCLK_SHIFT)},
-};
-
-static unsigned long s5p6440_armclk_get_rate(struct clk *clk)
-{
- unsigned long rate = clk_get_rate(clk->parent);
- u32 clkdiv;
-
- /* divisor mask starts at bit0, so no need to shift */
- clkdiv = __raw_readl(ARM_CLK_DIV) & ARM_DIV_MASK;
-
- return rate / (clkdiv + 1);
-}
-
-static unsigned long s5p6440_armclk_round_rate(struct clk *clk,
- unsigned long rate)
-{
- u32 iter;
-
- for (iter = 1 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
- if (rate > clock_table[iter][0])
- return clock_table[iter-1][0];
- }
-
- return clock_table[ARRAY_SIZE(clock_table) - 1][0];
-}
-
-static int s5p6440_armclk_set_rate(struct clk *clk, unsigned long rate)
-{
- u32 round_tmp;
- u32 iter;
- u32 clk_div0_tmp;
- u32 cur_rate = clk->ops->get_rate(clk);
- unsigned long flags;
-
- round_tmp = clk->ops->round_rate(clk, rate);
- if (round_tmp == cur_rate)
- return 0;
-
-
- for (iter = 0 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
- if (round_tmp == clock_table[iter][0])
- break;
- }
-
- if (iter >= ARRAY_SIZE(clock_table))
- iter = ARRAY_SIZE(clock_table) - 1;
-
- local_irq_save(flags);
- if (cur_rate > round_tmp) {
- /* Frequency Down */
- clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
- clk_div0_tmp |= clock_table[iter][1];
- __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
-
- clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
- ~(S5P_CLKDIV0_HCLK_MASK);
- clk_div0_tmp |= clock_table[iter][2];
- __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
-
-
- } else {
- /* Frequency Up */
- clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
- ~(S5P_CLKDIV0_HCLK_MASK);
- clk_div0_tmp |= clock_table[iter][2];
- __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
-
- clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
- clk_div0_tmp |= clock_table[iter][1];
- __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
- }
- local_irq_restore(flags);
-
- clk->rate = clock_table[iter][0];
-
- return 0;
-}
-
-static struct clk_ops s5p6440_clkarm_ops = {
- .get_rate = s5p6440_armclk_get_rate,
- .set_rate = s5p6440_armclk_set_rate,
- .round_rate = s5p6440_armclk_round_rate,
-};
-
-static struct clksrc_clk clk_armclk = {
- .clk = {
- .name = "armclk",
- .id = 1,
- .parent = &clk_mout_apll.clk,
- .ops = &s5p6440_clkarm_ops,
- },
- .reg_div = { .reg = S5P_CLK_DIV0, .shift = 0, .size = 4 },
-};
-
-static struct clksrc_clk clk_dout_mpll = {
- .clk = {
- .name = "dout_mpll",
- .id = -1,
- .parent = &clk_mout_mpll.clk,
- },
- .reg_div = { .reg = S5P_CLK_DIV0, .shift = 4, .size = 1 },
-};
-
-static struct clksrc_clk clk_hclk = {
- .clk = {
- .name = "clk_hclk",
- .id = -1,
- .parent = &clk_armclk.clk,
- },
- .reg_div = { .reg = S5P_CLK_DIV0, .shift = 8, .size = 4 },
-};
-
-static struct clksrc_clk clk_pclk = {
- .clk = {
- .name = "clk_pclk",
- .id = -1,
- .parent = &clk_hclk.clk,
- },
- .reg_div = { .reg = S5P_CLK_DIV0, .shift = 12, .size = 4 },
-};
-
-static struct clk *clkset_hclklow_list[] = {
- &clk_mout_apll.clk,
- &clk_mout_mpll.clk,
-};
-
-static struct clksrc_sources clkset_hclklow = {
- .sources = clkset_hclklow_list,
- .nr_sources = ARRAY_SIZE(clkset_hclklow_list),
-};
-
-static struct clksrc_clk clk_hclk_low = {
- .clk = {
- .name = "hclk_low",
- .id = -1,
- },
- .sources = &clkset_hclklow,
- .reg_src = { .reg = S5P_SYS_OTHERS, .shift = 6, .size = 1 },
- .reg_div = { .reg = S5P_CLK_DIV3, .shift = 8, .size = 4 },
-};
-
-static struct clksrc_clk clk_pclk_low = {
- .clk = {
- .name = "pclk_low",
- .id = -1,
- .parent = &clk_hclk_low.clk,
- },
- .reg_div = { .reg = S5P_CLK_DIV3, .shift = 12, .size = 4 },
-};
-
-int s5p6440_clk48m_ctrl(struct clk *clk, int enable)
-{
- unsigned long flags;
- u32 val;
-
- /* can't rely on clock lock, this register has other usages */
- local_irq_save(flags);
-
- val = __raw_readl(S5P_OTHERS);
- if (enable)
- val |= S5P_OTHERS_USB_SIG_MASK;
- else
- val &= ~S5P_OTHERS_USB_SIG_MASK;
-
- __raw_writel(val, S5P_OTHERS);
-
- local_irq_restore(flags);
-
- return 0;
-}
-
-static int s5p6440_pclk_ctrl(struct clk *clk, int enable)
-{
- return s5p_gatectrl(S5P_CLK_GATE_PCLK, clk, enable);
-}
-
-static int s5p6440_hclk0_ctrl(struct clk *clk, int enable)
-{
- return s5p_gatectrl(S5P_CLK_GATE_HCLK0, clk, enable);
-}
-
-static int s5p6440_hclk1_ctrl(struct clk *clk, int enable)
-{
- return s5p_gatectrl(S5P_CLK_GATE_HCLK1, clk, enable);
-}
-
-static int s5p6440_sclk_ctrl(struct clk *clk, int enable)
-{
- return s5p_gatectrl(S5P_CLK_GATE_SCLK0, clk, enable);
-}
-
-static int s5p6440_sclk1_ctrl(struct clk *clk, int enable)
-{
- return s5p_gatectrl(S5P_CLK_GATE_SCLK1, clk, enable);
-}
-
-static int s5p6440_mem_ctrl(struct clk *clk, int enable)
-{
- return s5p_gatectrl(S5P_CLK_GATE_MEM0, clk, enable);
-}
-
-/*
- * The following clocks will be disabled during clock initialization. It is
- * recommended to keep the following clocks disabled until the driver requests
- * for enabling the clock.
- */
-static struct clk init_clocks_disable[] = {
- {
- .name = "nand",
- .id = -1,
- .parent = &clk_hclk.clk,
- .enable = s5p6440_mem_ctrl,
- .ctrlbit = S5P_CLKCON_MEM0_HCLK_NFCON,
- }, {
- .name = "adc",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_TSADC,
- }, {
- .name = "i2c",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_IIC0,
- }, {
- .name = "i2s_v40",
- .id = 0,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_IIS2,
- }, {
- .name = "spi",
- .id = 0,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_SPI0,
- }, {
- .name = "spi",
- .id = 1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_SPI1,
- }, {
- .name = "sclk_spi_48",
- .id = 0,
- .parent = &clk_48m,
- .enable = s5p6440_sclk_ctrl,
- .ctrlbit = S5P_CLKCON_SCLK0_SPI0_48,
- }, {
- .name = "sclk_spi_48",
- .id = 1,
- .parent = &clk_48m,
- .enable = s5p6440_sclk_ctrl,
- .ctrlbit = S5P_CLKCON_SCLK0_SPI1_48,
- }, {
- .name = "mmc_48m",
- .id = 0,
- .parent = &clk_48m,
- .enable = s5p6440_sclk_ctrl,
- .ctrlbit = S5P_CLKCON_SCLK0_MMC0_48,
- }, {
- .name = "mmc_48m",
- .id = 1,
- .parent = &clk_48m,
- .enable = s5p6440_sclk_ctrl,
- .ctrlbit = S5P_CLKCON_SCLK0_MMC1_48,
- }, {
- .name = "mmc_48m",
- .id = 2,
- .parent = &clk_48m,
- .enable = s5p6440_sclk_ctrl,
- .ctrlbit = S5P_CLKCON_SCLK0_MMC2_48,
- }, {
- .name = "otg",
- .id = -1,
- .parent = &clk_hclk_low.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = S5P_CLKCON_HCLK0_USB
- }, {
- .name = "post",
- .id = -1,
- .parent = &clk_hclk_low.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = S5P_CLKCON_HCLK0_POST0
- }, {
- .name = "lcd",
- .id = -1,
- .parent = &clk_hclk_low.clk,
- .enable = s5p6440_hclk1_ctrl,
- .ctrlbit = S5P_CLKCON_HCLK1_DISPCON,
- }, {
- .name = "hsmmc",
- .id = 0,
- .parent = &clk_hclk_low.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = S5P_CLKCON_HCLK0_HSMMC0,
- }, {
- .name = "hsmmc",
- .id = 1,
- .parent = &clk_hclk_low.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = S5P_CLKCON_HCLK0_HSMMC1,
- }, {
- .name = "hsmmc",
- .id = 2,
- .parent = &clk_hclk_low.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = S5P_CLKCON_HCLK0_HSMMC2,
- }, {
- .name = "rtc",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_RTC,
- }, {
- .name = "watchdog",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_WDT,
- }, {
- .name = "timers",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_PWM,
- }, {
- .name = "hclk_fimgvg",
- .id = -1,
- .parent = &clk_hclk.clk,
- .enable = s5p6440_hclk1_ctrl,
- .ctrlbit = (1 << 2),
- }, {
- .name = "tsi",
- .id = -1,
- .parent = &clk_hclk_low.clk,
- .enable = s5p6440_hclk1_ctrl,
- .ctrlbit = (1 << 0),
- }, {
- .name = "pclk_fimgvg",
- .id = -1,
- .parent = &clk_pclk.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = (1 << 31),
- }, {
- .name = "dmc0",
- .id = -1,
- .parent = &clk_pclk.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = (1 << 30),
- }, {
- .name = "etm",
- .id = -1,
- .parent = &clk_pclk.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = (1 << 29),
- }, {
- .name = "dsim",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = (1 << 28),
- }, {
- .name = "gps",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = (1 << 25),
- }, {
- .name = "pcm",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = (1 << 8),
- }, {
- .name = "irom",
- .id = -1,
- .parent = &clk_hclk.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = (1 << 25),
- }, {
- .name = "dma",
- .id = -1,
- .parent = &clk_hclk_low.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = (1 << 12),
- }, {
- .name = "2d",
- .id = -1,
- .parent = &clk_hclk.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = (1 << 8),
- },
-};
-
-/*
- * The following clocks will be enabled during clock initialization.
- */
-static struct clk init_clocks[] = {
- {
- .name = "gpio",
- .id = -1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_GPIO,
- }, {
- .name = "uart",
- .id = 0,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_UART0,
- }, {
- .name = "uart",
- .id = 1,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_UART1,
- }, {
- .name = "uart",
- .id = 2,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_UART2,
- }, {
- .name = "uart",
- .id = 3,
- .parent = &clk_pclk_low.clk,
- .enable = s5p6440_pclk_ctrl,
- .ctrlbit = S5P_CLKCON_PCLK_UART3,
- }, {
- .name = "mem",
- .id = -1,
- .parent = &clk_hclk.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = (1 << 21),
- }, {
- .name = "intc",
- .id = -1,
- .parent = &clk_hclk.clk,
- .enable = s5p6440_hclk0_ctrl,
- .ctrlbit = (1 << 1),
- },
-};
-
-static struct clk clk_iis_cd_v40 = {
- .name = "iis_cdclk_v40",
- .id = -1,
-};
-
-static struct clk clk_pcm_cd = {
- .name = "pcm_cdclk",
- .id = -1,
-};
-
-static struct clk *clkset_group1_list[] = {
- &clk_mout_epll.clk,
- &clk_dout_mpll.clk,
- &clk_fin_epll,
-};
-
-static struct clksrc_sources clkset_group1 = {
- .sources = clkset_group1_list,
- .nr_sources = ARRAY_SIZE(clkset_group1_list),
-};
-
-static struct clk *clkset_uart_list[] = {
- &clk_mout_epll.clk,
- &clk_dout_mpll.clk,
-};
-
-static struct clksrc_sources clkset_uart = {
- .sources = clkset_uart_list,
- .nr_sources = ARRAY_SIZE(clkset_uart_list),
-};
-
-static struct clk *clkset_audio_list[] = {
- &clk_mout_epll.clk,
- &clk_dout_mpll.clk,
- &clk_fin_epll,
- &clk_iis_cd_v40,
- &clk_pcm_cd,
-};
-
-static struct clksrc_sources clkset_audio = {
- .sources = clkset_audio_list,
- .nr_sources = ARRAY_SIZE(clkset_audio_list),
-};
-
-static struct clksrc_clk clksrcs[] = {
- {
- .clk = {
- .name = "mmc_bus",
- .id = 0,
- .ctrlbit = S5P_CLKCON_SCLK0_MMC0,
- .enable = s5p6440_sclk_ctrl,
- },
- .sources = &clkset_group1,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 18, .size = 2 },
- .reg_div = { .reg = S5P_CLK_DIV1, .shift = 0, .size = 4 },
- }, {
- .clk = {
- .name = "mmc_bus",
- .id = 1,
- .ctrlbit = S5P_CLKCON_SCLK0_MMC1,
- .enable = s5p6440_sclk_ctrl,
- },
- .sources = &clkset_group1,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 20, .size = 2 },
- .reg_div = { .reg = S5P_CLK_DIV1, .shift = 4, .size = 4 },
- }, {
- .clk = {
- .name = "mmc_bus",
- .id = 2,
- .ctrlbit = S5P_CLKCON_SCLK0_MMC2,
- .enable = s5p6440_sclk_ctrl,
- },
- .sources = &clkset_group1,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 22, .size = 2 },
- .reg_div = { .reg = S5P_CLK_DIV1, .shift = 8, .size = 4 },
- }, {
- .clk = {
- .name = "uclk1",
- .id = -1,
- .ctrlbit = S5P_CLKCON_SCLK0_UART,
- .enable = s5p6440_sclk_ctrl,
- },
- .sources = &clkset_uart,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 13, .size = 1 },
- .reg_div = { .reg = S5P_CLK_DIV2, .shift = 16, .size = 4 },
- }, {
- .clk = {
- .name = "spi_epll",
- .id = 0,
- .ctrlbit = S5P_CLKCON_SCLK0_SPI0,
- .enable = s5p6440_sclk_ctrl,
- },
- .sources = &clkset_group1,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 14, .size = 2 },
- .reg_div = { .reg = S5P_CLK_DIV2, .shift = 0, .size = 4 },
- }, {
- .clk = {
- .name = "spi_epll",
- .id = 1,
- .ctrlbit = S5P_CLKCON_SCLK0_SPI1,
- .enable = s5p6440_sclk_ctrl,
- },
- .sources = &clkset_group1,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 16, .size = 2 },
- .reg_div = { .reg = S5P_CLK_DIV2, .shift = 4, .size = 4 },
- }, {
- .clk = {
- .name = "sclk_post",
- .id = -1,
- .ctrlbit = (1 << 10),
- .enable = s5p6440_sclk_ctrl,
- },
- .sources = &clkset_group1,
- .reg_src = { .reg = S5P_CLK_SRC0, .shift = 26, .size = 2 },
- .reg_div = { .reg = S5P_CLK_DIV1, .shift = 12, .size = 4 },
- }, {
- .clk = {
- .name = "sclk_dispcon",
- .id = -1,
- .ctrlbit = (1 << 1),
- .enable = s5p6440_sclk1_ctrl,
- },
- .sources = &clkset_group1,
- .reg_src = { .reg = S5P_CLK_SRC1, .shift = 4, .size = 2 },
- .reg_div = { .reg = S5P_CLK_DIV3, .shift = 0, .size = 4 },
- }, {
- .clk = {
- .name = "sclk_fimgvg",
- .id = -1,
- .ctrlbit = (1 << 2),
- .enable = s5p6440_sclk1_ctrl,
- },
- .sources = &clkset_group1,
- .reg_src = { .reg = S5P_CLK_SRC1, .shift = 8, .size = 2 },
- .reg_div = { .reg = S5P_CLK_DIV3, .shift = 4, .size = 4 },
- }, {
- .clk = {
- .name = "sclk_audio2",
- .id = -1,
- .ctrlbit = (1 << 11),
- .enable = s5p6440_sclk_ctrl,
- },
- .sources = &clkset_audio,
- .reg_src = { .reg = S5P_CLK_SRC1, .shift = 0, .size = 3 },
- .reg_div = { .reg = S5P_CLK_DIV2, .shift = 24, .size = 4 },
- },
-};
-
-/* Clock initialisation code */
-static struct clksrc_clk *sysclks[] = {
- &clk_mout_apll,
- &clk_mout_epll,
- &clk_mout_mpll,
- &clk_dout_mpll,
- &clk_armclk,
- &clk_hclk,
- &clk_pclk,
- &clk_hclk_low,
- &clk_pclk_low,
-};
-
-void __init_or_cpufreq s5p6440_setup_clocks(void)
-{
- struct clk *xtal_clk;
- unsigned long xtal;
- unsigned long fclk;
- unsigned long hclk;
- unsigned long hclk_low;
- unsigned long pclk;
- unsigned long pclk_low;
- unsigned long epll;
- unsigned long apll;
- unsigned long mpll;
- unsigned int ptr;
-
- /* Set S5P6440 functions for clk_fout_epll */
- clk_fout_epll.enable = s5p6440_epll_enable;
- clk_fout_epll.ops = &s5p6440_epll_ops;
-
- clk_48m.enable = s5p6440_clk48m_ctrl;
-
- xtal_clk = clk_get(NULL, "ext_xtal");
- BUG_ON(IS_ERR(xtal_clk));
-
- xtal = clk_get_rate(xtal_clk);
- clk_put(xtal_clk);
-
- epll = s5p_get_pll90xx(xtal, __raw_readl(S5P_EPLL_CON),
- __raw_readl(S5P_EPLL_CON_K));
- mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502);
- apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON), pll_4502);
-
- clk_fout_mpll.rate = mpll;
- clk_fout_epll.rate = epll;
- clk_fout_apll.rate = apll;
-
- printk(KERN_INFO "S5P6440: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \
- " E=%ld.%ldMHz\n",
- print_mhz(apll), print_mhz(mpll), print_mhz(epll));
-
- fclk = clk_get_rate(&clk_armclk.clk);
- hclk = clk_get_rate(&clk_hclk.clk);
- pclk = clk_get_rate(&clk_pclk.clk);
- hclk_low = clk_get_rate(&clk_hclk_low.clk);
- pclk_low = clk_get_rate(&clk_pclk_low.clk);
-
- printk(KERN_INFO "S5P6440: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \
- " PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n",
- print_mhz(hclk), print_mhz(hclk_low),
- print_mhz(pclk), print_mhz(pclk_low));
-
- clk_f.rate = fclk;
- clk_h.rate = hclk;
- clk_p.rate = pclk;
-
- for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
- s3c_set_clksrc(&clksrcs[ptr], true);
-}
-
-static struct clk *clks[] __initdata = {
- &clk_ext,
- &clk_iis_cd_v40,
- &clk_pcm_cd,
-};
-
-void __init s5p6440_register_clocks(void)
-{
- struct clk *clkp;
- int ret;
- int ptr;
-
- ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
- if (ret > 0)
- printk(KERN_ERR "Failed to register %u clocks\n", ret);
-
- for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
- s3c_register_clksrc(sysclks[ptr], 1);
-
- s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
- s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
-
- clkp = init_clocks_disable;
- for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
-
- ret = s3c24xx_register_clock(clkp);
- if (ret < 0) {
- printk(KERN_ERR "Failed to register clock %s (%d)\n",
- clkp->name, ret);
- }
- (clkp->enable)(clkp, 0);
- }
-
- s3c_pwmclk_init();
-}
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-clock.h b/arch/arm/mach-s5p6440/include/mach/regs-clock.h
deleted file mode 100644
index c783ecc..0000000
--- a/arch/arm/mach-s5p6440/include/mach/regs-clock.h
+++ /dev/null
@@ -1,130 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/regs-clock.h
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S5P6440 - Clock register definitions
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_REGS_CLOCK_H
-#define __ASM_ARCH_REGS_CLOCK_H __FILE__
-
-#include <mach/map.h>
-
-#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
-
-#define S5P_APLL_LOCK S5P_CLKREG(0x00)
-#define S5P_MPLL_LOCK S5P_CLKREG(0x04)
-#define S5P_EPLL_LOCK S5P_CLKREG(0x08)
-#define S5P_APLL_CON S5P_CLKREG(0x0C)
-#define S5P_MPLL_CON S5P_CLKREG(0x10)
-#define S5P_EPLL_CON S5P_CLKREG(0x14)
-#define S5P_EPLL_CON_K S5P_CLKREG(0x18)
-#define S5P_CLK_SRC0 S5P_CLKREG(0x1C)
-#define S5P_CLK_DIV0 S5P_CLKREG(0x20)
-#define S5P_CLK_DIV1 S5P_CLKREG(0x24)
-#define S5P_CLK_DIV2 S5P_CLKREG(0x28)
-#define S5P_CLK_OUT S5P_CLKREG(0x2C)
-#define S5P_CLK_GATE_HCLK0 S5P_CLKREG(0x30)
-#define S5P_CLK_GATE_PCLK S5P_CLKREG(0x34)
-#define S5P_CLK_GATE_SCLK0 S5P_CLKREG(0x38)
-#define S5P_CLK_GATE_MEM0 S5P_CLKREG(0x3C)
-#define S5P_CLK_DIV3 S5P_CLKREG(0x40)
-#define S5P_CLK_GATE_HCLK1 S5P_CLKREG(0x44)
-#define S5P_CLK_GATE_SCLK1 S5P_CLKREG(0x48)
-#define S5P_AHB_CON0 S5P_CLKREG(0x100)
-#define S5P_CLK_SRC1 S5P_CLKREG(0x10C)
-#define S5P_SWRESET S5P_CLKREG(0x114)
-#define S5P_SYS_ID S5P_CLKREG(0x118)
-#define S5P_SYS_OTHERS S5P_CLKREG(0x11C)
-#define S5P_MEM_CFG_STAT S5P_CLKREG(0x12C)
-#define S5P_PWR_CFG S5P_CLKREG(0x804)
-#define S5P_EINT_WAKEUP_MASK S5P_CLKREG(0x808)
-#define S5P_NORMAL_CFG S5P_CLKREG(0x810)
-#define S5P_STOP_CFG S5P_CLKREG(0x814)
-#define S5P_SLEEP_CFG S5P_CLKREG(0x818)
-#define S5P_OSC_FREQ S5P_CLKREG(0x820)
-#define S5P_OSC_STABLE S5P_CLKREG(0x824)
-#define S5P_PWR_STABLE S5P_CLKREG(0x828)
-#define S5P_MTC_STABLE S5P_CLKREG(0x830)
-#define S5P_OTHERS S5P_CLKREG(0x900)
-#define S5P_RST_STAT S5P_CLKREG(0x904)
-#define S5P_WAKEUP_STAT S5P_CLKREG(0x908)
-#define S5P_SLPEN S5P_CLKREG(0x930)
-#define S5P_INFORM0 S5P_CLKREG(0xA00)
-#define S5P_INFORM1 S5P_CLKREG(0xA04)
-#define S5P_INFORM2 S5P_CLKREG(0xA08)
-#define S5P_INFORM3 S5P_CLKREG(0xA0C)
-
-/* CLKDIV0 */
-#define S5P_CLKDIV0_PCLK_MASK (0xf << 12)
-#define S5P_CLKDIV0_PCLK_SHIFT (12)
-#define S5P_CLKDIV0_HCLK_MASK (0xf << 8)
-#define S5P_CLKDIV0_HCLK_SHIFT (8)
-#define S5P_CLKDIV0_MPLL_MASK (0x1 << 4)
-#define S5P_CLKDIV0_ARM_MASK (0xf << 0)
-#define S5P_CLKDIV0_ARM_SHIFT (0)
-
-/* CLKDIV3 */
-#define S5P_CLKDIV3_PCLK_LOW_MASK (0xf << 12)
-#define S5P_CLKDIV3_PCLK_LOW_SHIFT (12)
-#define S5P_CLKDIV3_HCLK_LOW_MASK (0xf << 8)
-#define S5P_CLKDIV3_HCLK_LOW_SHIFT (8)
-
-/* HCLK0 GATE Registers */
-#define S5P_CLKCON_HCLK0_USB (1<<20)
-#define S5P_CLKCON_HCLK0_HSMMC2 (1<<19)
-#define S5P_CLKCON_HCLK0_HSMMC1 (1<<18)
-#define S5P_CLKCON_HCLK0_HSMMC0 (1<<17)
-#define S5P_CLKCON_HCLK0_POST0 (1<<5)
-
-/* HCLK1 GATE Registers */
-#define S5P_CLKCON_HCLK1_DISPCON (1<<1)
-
-/* PCLK GATE Registers */
-#define S5P_CLKCON_PCLK_IIS2 (1<<26)
-#define S5P_CLKCON_PCLK_SPI1 (1<<22)
-#define S5P_CLKCON_PCLK_SPI0 (1<<21)
-#define S5P_CLKCON_PCLK_GPIO (1<<18)
-#define S5P_CLKCON_PCLK_IIC0 (1<<17)
-#define S5P_CLKCON_PCLK_TSADC (1<<12)
-#define S5P_CLKCON_PCLK_PWM (1<<7)
-#define S5P_CLKCON_PCLK_RTC (1<<6)
-#define S5P_CLKCON_PCLK_WDT (1<<5)
-#define S5P_CLKCON_PCLK_UART3 (1<<4)
-#define S5P_CLKCON_PCLK_UART2 (1<<3)
-#define S5P_CLKCON_PCLK_UART1 (1<<2)
-#define S5P_CLKCON_PCLK_UART0 (1<<1)
-
-/* SCLK0 GATE Registers */
-#define S5P_CLKCON_SCLK0_MMC2_48 (1<<29)
-#define S5P_CLKCON_SCLK0_MMC1_48 (1<<28)
-#define S5P_CLKCON_SCLK0_MMC0_48 (1<<27)
-#define S5P_CLKCON_SCLK0_MMC2 (1<<26)
-#define S5P_CLKCON_SCLK0_MMC1 (1<<25)
-#define S5P_CLKCON_SCLK0_MMC0 (1<<24)
-#define S5P_CLKCON_SCLK0_SPI1_48 (1<<23)
-#define S5P_CLKCON_SCLK0_SPI0_48 (1<<22)
-#define S5P_CLKCON_SCLK0_SPI1 (1<<21)
-#define S5P_CLKCON_SCLK0_SPI0 (1<<20)
-#define S5P_CLKCON_SCLK0_UART (1<<5)
-
-/* SCLK1 GATE Registers */
-
-/* MEM0 GATE Registers */
-#define S5P_CLKCON_MEM0_HCLK_NFCON (1<<2)
-
-/*OTHERS Resgister */
-#define S5P_OTHERS_USB_SIG_MASK (1<<16)
-#define S5P_OTHERS_HCLK_LOW_SEL_MPLL (1<<6)
-
-/* Compatibility defines */
-#define ARM_CLK_DIV S5P_CLK_DIV0
-#define ARM_DIV_RATIO_SHIFT 0
-#define ARM_DIV_MASK (0xf << ARM_DIV_RATIO_SHIFT)
-
-#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c
new file mode 100644
index 0000000..cd36bd0
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c
@@ -0,0 +1,626 @@
+/* linux/arch/arm/mach-s5p64x0/clock-s5p6440.c
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P6440 - Clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+#include <mach/s5p64x0-clock.h>
+
+#include <plat/cpu-freq.h>
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/pll.h>
+#include <plat/s5p-clock.h>
+#include <plat/clock-clksrc.h>
+#include <plat/s5p6440.h>
+
+static u32 epll_div[][5] = {
+ { 36000000, 0, 48, 1, 4 },
+ { 48000000, 0, 32, 1, 3 },
+ { 60000000, 0, 40, 1, 3 },
+ { 72000000, 0, 48, 1, 3 },
+ { 84000000, 0, 28, 1, 2 },
+ { 96000000, 0, 32, 1, 2 },
+ { 32768000, 45264, 43, 1, 4 },
+ { 45158000, 6903, 30, 1, 3 },
+ { 49152000, 50332, 32, 1, 3 },
+ { 67738000, 10398, 45, 1, 3 },
+ { 73728000, 9961, 49, 1, 3 }
+};
+
+static int s5p6440_epll_set_rate(struct clk *clk, unsigned long rate)
+{
+ unsigned int epll_con, epll_con_k;
+ unsigned int i;
+
+ if (clk->rate == rate) /* Return if nothing changed */
+ return 0;
+
+ epll_con = __raw_readl(S5P64X0_EPLL_CON);
+ epll_con_k = __raw_readl(S5P64X0_EPLL_CON_K);
+
+ epll_con_k &= ~(PLL90XX_KDIV_MASK);
+ epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK);
+
+ for (i = 0; i < ARRAY_SIZE(epll_div); i++) {
+ if (epll_div[i][0] == rate) {
+ epll_con_k |= (epll_div[i][1] << PLL90XX_KDIV_SHIFT);
+ epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) |
+ (epll_div[i][3] << PLL90XX_PDIV_SHIFT) |
+ (epll_div[i][4] << PLL90XX_SDIV_SHIFT);
+ break;
+ }
+ }
+
+ if (i == ARRAY_SIZE(epll_div)) {
+ printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__);
+ return -EINVAL;
+ }
+
+ __raw_writel(epll_con, S5P64X0_EPLL_CON);
+ __raw_writel(epll_con_k, S5P64X0_EPLL_CON_K);
+
+ clk->rate = rate;
+
+ return 0;
+}
+
+static struct clk_ops s5p6440_epll_ops = {
+ .get_rate = s5p64x0_epll_get_rate,
+ .set_rate = s5p6440_epll_set_rate,
+};
+
+static struct clksrc_clk clk_hclk = {
+ .clk = {
+ .name = "clk_hclk",
+ .id = -1,
+ .parent = &clk_armclk.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk clk_pclk = {
+ .clk = {
+ .name = "clk_pclk",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 12, .size = 4 },
+};
+static struct clksrc_clk clk_hclk_low = {
+ .clk = {
+ .name = "clk_hclk_low",
+ .id = -1,
+ },
+ .sources = &clkset_hclk_low,
+ .reg_src = { .reg = S5P64X0_SYS_OTHERS, .shift = 6, .size = 1 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk clk_pclk_low = {
+ .clk = {
+ .name = "clk_pclk_low",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 12, .size = 4 },
+};
+
+/*
+ * The following clocks will be disabled during clock initialization. It is
+ * recommended to keep the following clocks disabled until the driver requests
+ * for enabling the clock.
+ */
+static struct clk init_clocks_disable[] = {
+ {
+ .name = "nand",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ .enable = s5p64x0_mem_ctrl,
+ .ctrlbit = (1 << 2),
+ }, {
+ .name = "post",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 5)
+ }, {
+ .name = "2d",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 8),
+ }, {
+ .name = "dma",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 12),
+ }, {
+ .name = "hsmmc",
+ .id = 0,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 17),
+ }, {
+ .name = "hsmmc",
+ .id = 1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 18),
+ }, {
+ .name = "hsmmc",
+ .id = 2,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 19),
+ }, {
+ .name = "otg",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 20)
+ }, {
+ .name = "irom",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 25),
+ }, {
+ .name = "lcd",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk1_ctrl,
+ .ctrlbit = (1 << 1),
+ }, {
+ .name = "hclk_fimgvg",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ .enable = s5p64x0_hclk1_ctrl,
+ .ctrlbit = (1 << 2),
+ }, {
+ .name = "tsi",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk1_ctrl,
+ .ctrlbit = (1 << 0),
+ }, {
+ .name = "watchdog",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 5),
+ }, {
+ .name = "rtc",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 6),
+ }, {
+ .name = "timers",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 7),
+ }, {
+ .name = "pcm",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 8),
+ }, {
+ .name = "adc",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 12),
+ }, {
+ .name = "i2c",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 17),
+ }, {
+ .name = "spi",
+ .id = 0,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 21),
+ }, {
+ .name = "spi",
+ .id = 1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 22),
+ }, {
+ .name = "gps",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 25),
+ }, {
+ .name = "i2s_v40",
+ .id = 0,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 26),
+ }, {
+ .name = "dsim",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 28),
+ }, {
+ .name = "etm",
+ .id = -1,
+ .parent = &clk_pclk.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 29),
+ }, {
+ .name = "dmc0",
+ .id = -1,
+ .parent = &clk_pclk.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 30),
+ }, {
+ .name = "pclk_fimgvg",
+ .id = -1,
+ .parent = &clk_pclk.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 31),
+ }, {
+ .name = "sclk_spi_48",
+ .id = 0,
+ .parent = &clk_48m,
+ .enable = s5p64x0_sclk_ctrl,
+ .ctrlbit = (1 << 22),
+ }, {
+ .name = "sclk_spi_48",
+ .id = 1,
+ .parent = &clk_48m,
+ .enable = s5p64x0_sclk_ctrl,
+ .ctrlbit = (1 << 23),
+ }, {
+ .name = "mmc_48m",
+ .id = 0,
+ .parent = &clk_48m,
+ .enable = s5p64x0_sclk_ctrl,
+ .ctrlbit = (1 << 27),
+ }, {
+ .name = "mmc_48m",
+ .id = 1,
+ .parent = &clk_48m,
+ .enable = s5p64x0_sclk_ctrl,
+ .ctrlbit = (1 << 28),
+ }, {
+ .name = "mmc_48m",
+ .id = 2,
+ .parent = &clk_48m,
+ .enable = s5p64x0_sclk_ctrl,
+ .ctrlbit = (1 << 29),
+ },
+};
+
+/*
+ * The following clocks will be enabled during clock initialization.
+ */
+static struct clk init_clocks[] = {
+ {
+ .name = "intc",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 1),
+ }, {
+ .name = "mem",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 21),
+ }, {
+ .name = "uart",
+ .id = 0,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 1),
+ }, {
+ .name = "uart",
+ .id = 1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 2),
+ }, {
+ .name = "uart",
+ .id = 2,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 3),
+ }, {
+ .name = "uart",
+ .id = 3,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 4),
+ }, {
+ .name = "gpio",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 18),
+ },
+};
+
+static struct clk clk_iis_cd_v40 = {
+ .name = "iis_cdclk_v40",
+ .id = -1,
+};
+
+static struct clk clk_pcm_cd = {
+ .name = "pcm_cdclk",
+ .id = -1,
+};
+
+static struct clk *clkset_group1_list[] = {
+ &clk_mout_epll.clk,
+ &clk_dout_mpll.clk,
+ &clk_fin_epll,
+};
+
+static struct clksrc_sources clkset_group1 = {
+ .sources = clkset_group1_list,
+ .nr_sources = ARRAY_SIZE(clkset_group1_list),
+};
+
+static struct clk *clkset_uart_list[] = {
+ &clk_mout_epll.clk,
+ &clk_dout_mpll.clk,
+};
+
+static struct clksrc_sources clkset_uart = {
+ .sources = clkset_uart_list,
+ .nr_sources = ARRAY_SIZE(clkset_uart_list),
+};
+
+static struct clk *clkset_audio_list[] = {
+ &clk_mout_epll.clk,
+ &clk_dout_mpll.clk,
+ &clk_fin_epll,
+ &clk_iis_cd_v40,
+ &clk_pcm_cd,
+};
+
+static struct clksrc_sources clkset_audio = {
+ .sources = clkset_audio_list,
+ .nr_sources = ARRAY_SIZE(clkset_audio_list),
+};
+
+static struct clksrc_clk clksrcs[] = {
+ {
+ .clk = {
+ .name = "mmc_bus",
+ .id = 0,
+ .ctrlbit = (1 << 24),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group1,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
+ }, {
+ .clk = {
+ .name = "mmc_bus",
+ .id = 1,
+ .ctrlbit = (1 << 25),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group1,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
+ }, {
+ .clk = {
+ .name = "mmc_bus",
+ .id = 2,
+ .ctrlbit = (1 << 26),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group1,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
+ }, {
+ .clk = {
+ .name = "uclk1",
+ .id = -1,
+ .ctrlbit = (1 << 5),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_uart,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
+ }, {
+ .clk = {
+ .name = "spi_epll",
+ .id = 0,
+ .ctrlbit = (1 << 20),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group1,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
+ }, {
+ .clk = {
+ .name = "spi_epll",
+ .id = 1,
+ .ctrlbit = (1 << 21),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group1,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_post",
+ .id = -1,
+ .ctrlbit = (1 << 10),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group1,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 26, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 12, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_dispcon",
+ .id = -1,
+ .ctrlbit = (1 << 1),
+ .enable = s5p64x0_sclk1_ctrl,
+ },
+ .sources = &clkset_group1,
+ .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 4, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 0, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_fimgvg",
+ .id = -1,
+ .ctrlbit = (1 << 2),
+ .enable = s5p64x0_sclk1_ctrl,
+ },
+ .sources = &clkset_group1,
+ .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_audio2",
+ .id = -1,
+ .ctrlbit = (1 << 11),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_audio,
+ .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 0, .size = 3 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 24, .size = 4 },
+ },
+};
+
+/* Clock initialization code */
+static struct clksrc_clk *sysclks[] = {
+ &clk_mout_apll,
+ &clk_mout_epll,
+ &clk_mout_mpll,
+ &clk_dout_mpll,
+ &clk_armclk,
+ &clk_hclk,
+ &clk_pclk,
+ &clk_hclk_low,
+ &clk_pclk_low,
+};
+
+void __init_or_cpufreq s5p6440_setup_clocks(void)
+{
+ struct clk *xtal_clk;
+
+ unsigned long xtal;
+ unsigned long fclk;
+ unsigned long hclk;
+ unsigned long hclk_low;
+ unsigned long pclk;
+ unsigned long pclk_low;
+
+ unsigned long apll;
+ unsigned long mpll;
+ unsigned long epll;
+ unsigned int ptr;
+
+ /* Set S5P6440 functions for clk_fout_epll */
+
+ clk_fout_epll.enable = s5p64x0_epll_enable;
+ clk_fout_epll.ops = &s5p6440_epll_ops;
+
+ clk_48m.enable = s5p64x0_clk48m_ctrl;
+
+ xtal_clk = clk_get(NULL, "ext_xtal");
+ BUG_ON(IS_ERR(xtal_clk));
+
+ xtal = clk_get_rate(xtal_clk);
+ clk_put(xtal_clk);
+
+ apll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_APLL_CON), pll_4502);
+ mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_MPLL_CON), pll_4502);
+ epll = s5p_get_pll90xx(xtal, __raw_readl(S5P64X0_EPLL_CON),
+ __raw_readl(S5P64X0_EPLL_CON_K));
+
+ clk_fout_apll.rate = apll;
+ clk_fout_mpll.rate = mpll;
+ clk_fout_epll.rate = epll;
+
+ printk(KERN_INFO "S5P6440: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \
+ " E=%ld.%ldMHz\n",
+ print_mhz(apll), print_mhz(mpll), print_mhz(epll));
+
+ fclk = clk_get_rate(&clk_armclk.clk);
+ hclk = clk_get_rate(&clk_hclk.clk);
+ pclk = clk_get_rate(&clk_pclk.clk);
+ hclk_low = clk_get_rate(&clk_hclk_low.clk);
+ pclk_low = clk_get_rate(&clk_pclk_low.clk);
+
+ printk(KERN_INFO "S5P6440: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \
+ " PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n",
+ print_mhz(hclk), print_mhz(hclk_low),
+ print_mhz(pclk), print_mhz(pclk_low));
+
+ clk_f.rate = fclk;
+ clk_h.rate = hclk;
+ clk_p.rate = pclk;
+
+ for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
+ s3c_set_clksrc(&clksrcs[ptr], true);
+}
+
+static struct clk *clks[] __initdata = {
+ &clk_ext,
+ &clk_iis_cd_v40,
+ &clk_pcm_cd,
+};
+
+void __init s5p6440_register_clocks(void)
+{
+ struct clk *clkp;
+ int ret;
+ int ptr;
+
+ s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
+
+ for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
+ s3c_register_clksrc(sysclks[ptr], 1);
+
+ s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+ s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
+
+ clkp = init_clocks_disable;
+ for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
+
+ ret = s3c24xx_register_clock(clkp);
+ if (ret < 0) {
+ printk(KERN_ERR "Failed to register clock %s (%d)\n",
+ clkp->name, ret);
+ }
+ (clkp->enable)(clkp, 0);
+ }
+
+ s3c_pwmclk_init();
+}
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6450.c b/arch/arm/mach-s5p64x0/clock-s5p6450.c
new file mode 100644
index 0000000..95bab7d
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/clock-s5p6450.c
@@ -0,0 +1,655 @@
+/* linux/arch/arm/mach-s5p64x0/clock-s5p6450.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P6450 - Clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+#include <mach/s5p64x0-clock.h>
+
+#include <plat/cpu-freq.h>
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/pll.h>
+#include <plat/s5p-clock.h>
+#include <plat/clock-clksrc.h>
+#include <plat/s5p6450.h>
+
+static struct clksrc_clk clk_mout_dpll = {
+ .clk = {
+ .name = "mout_dpll",
+ .id = -1,
+ },
+ .sources = &clk_src_dpll,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 5, .size = 1 },
+};
+
+static u32 epll_div[][5] = {
+ { 133000000, 27307, 55, 2, 2 },
+ { 100000000, 43691, 41, 2, 2 },
+ { 480000000, 0, 80, 2, 0 },
+};
+
+static int s5p6450_epll_set_rate(struct clk *clk, unsigned long rate)
+{
+ unsigned int epll_con, epll_con_k;
+ unsigned int i;
+
+ if (clk->rate == rate) /* Return if nothing changed */
+ return 0;
+
+ epll_con = __raw_readl(S5P64X0_EPLL_CON);
+ epll_con_k = __raw_readl(S5P64X0_EPLL_CON_K);
+
+ epll_con_k &= ~(PLL90XX_KDIV_MASK);
+ epll_con &= ~(PLL90XX_MDIV_MASK | PLL90XX_PDIV_MASK | PLL90XX_SDIV_MASK);
+
+ for (i = 0; i < ARRAY_SIZE(epll_div); i++) {
+ if (epll_div[i][0] == rate) {
+ epll_con_k |= (epll_div[i][1] << PLL90XX_KDIV_SHIFT);
+ epll_con |= (epll_div[i][2] << PLL90XX_MDIV_SHIFT) |
+ (epll_div[i][3] << PLL90XX_PDIV_SHIFT) |
+ (epll_div[i][4] << PLL90XX_SDIV_SHIFT);
+ break;
+ }
+ }
+
+ if (i == ARRAY_SIZE(epll_div)) {
+ printk(KERN_ERR "%s: Invalid Clock EPLL Frequency\n", __func__);
+ return -EINVAL;
+ }
+
+ __raw_writel(epll_con, S5P64X0_EPLL_CON);
+ __raw_writel(epll_con_k, S5P64X0_EPLL_CON_K);
+
+ clk->rate = rate;
+
+ return 0;
+}
+
+static struct clk_ops s5p6450_epll_ops = {
+ .get_rate = s5p64x0_epll_get_rate,
+ .set_rate = s5p6450_epll_set_rate,
+};
+
+static struct clksrc_clk clk_dout_epll = {
+ .clk = {
+ .name = "dout_epll",
+ .id = -1,
+ .parent = &clk_mout_epll.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 24, .size = 4 },
+};
+
+static struct clksrc_clk clk_mout_hclk_sel = {
+ .clk = {
+ .name = "mout_hclk_sel",
+ .id = -1,
+ },
+ .sources = &clkset_hclk_low,
+ .reg_src = { .reg = S5P64X0_OTHERS, .shift = 15, .size = 1 },
+};
+
+static struct clk *clkset_hclk_list[] = {
+ &clk_mout_hclk_sel.clk,
+ &clk_armclk.clk,
+};
+
+static struct clksrc_sources clkset_hclk = {
+ .sources = clkset_hclk_list,
+ .nr_sources = ARRAY_SIZE(clkset_hclk_list),
+};
+
+static struct clksrc_clk clk_hclk = {
+ .clk = {
+ .name = "clk_hclk",
+ .id = -1,
+ },
+ .sources = &clkset_hclk,
+ .reg_src = { .reg = S5P64X0_OTHERS, .shift = 14, .size = 1 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk clk_pclk = {
+ .clk = {
+ .name = "clk_pclk",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 12, .size = 4 },
+};
+static struct clksrc_clk clk_dout_pwm_ratio0 = {
+ .clk = {
+ .name = "clk_dout_pwm_ratio0",
+ .id = -1,
+ .parent = &clk_mout_hclk_sel.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 16, .size = 4 },
+};
+
+static struct clksrc_clk clk_pclk_to_wdt_pwm = {
+ .clk = {
+ .name = "clk_pclk_to_wdt_pwm",
+ .id = -1,
+ .parent = &clk_dout_pwm_ratio0.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 20, .size = 4 },
+};
+
+static struct clksrc_clk clk_hclk_low = {
+ .clk = {
+ .name = "clk_hclk_low",
+ .id = -1,
+ },
+ .sources = &clkset_hclk_low,
+ .reg_src = { .reg = S5P64X0_OTHERS, .shift = 6, .size = 1 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk clk_pclk_low = {
+ .clk = {
+ .name = "clk_pclk_low",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 12, .size = 4 },
+};
+
+/*
+ * The following clocks will be disabled during clock initialization. It is
+ * recommended to keep the following clocks disabled until the driver requests
+ * for enabling the clock.
+ */
+static struct clk init_clocks_disable[] = {
+ {
+ .name = "usbhost",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 3),
+ }, {
+ .name = "dma",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 12),
+ }, {
+ .name = "hsmmc",
+ .id = 0,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 17),
+ }, {
+ .name = "hsmmc",
+ .id = 1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 18),
+ }, {
+ .name = "hsmmc",
+ .id = 2,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 19),
+ }, {
+ .name = "usbotg",
+ .id = -1,
+ .parent = &clk_hclk_low.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 20),
+ }, {
+ .name = "lcd",
+ .id = -1,
+ .parent = &clk_h,
+ .enable = s5p64x0_hclk1_ctrl,
+ .ctrlbit = (1 << 1),
+ }, {
+ .name = "watchdog",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 5),
+ }, {
+ .name = "adc",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 12),
+ }, {
+ .name = "i2c",
+ .id = 0,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 17),
+ }, {
+ .name = "spi",
+ .id = 0,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 21),
+ }, {
+ .name = "spi",
+ .id = 1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 22),
+ }, {
+ .name = "iis",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 26),
+ }, {
+ .name = "i2c",
+ .id = 1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 27),
+ }, {
+ .name = "dmc0",
+ .id = -1,
+ .parent = &clk_pclk.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 30),
+ }
+};
+
+/*
+ * The following clocks will be enabled during clock initialization.
+ */
+static struct clk init_clocks[] = {
+ {
+ .name = "intc",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 1),
+ }, {
+ .name = "mem",
+ .id = -1,
+ .parent = &clk_hclk.clk,
+ .enable = s5p64x0_hclk0_ctrl,
+ .ctrlbit = (1 << 21),
+ }, {
+ .name = "uart",
+ .id = 0,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 1),
+ }, {
+ .name = "uart",
+ .id = 1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 2),
+ }, {
+ .name = "uart",
+ .id = 2,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 3),
+ }, {
+ .name = "uart",
+ .id = 3,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 4),
+ }, {
+ .name = "timers",
+ .id = -1,
+ .parent = &clk_pclk_to_wdt_pwm.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 7),
+ }, {
+ .name = "gpio",
+ .id = -1,
+ .parent = &clk_pclk_low.clk,
+ .enable = s5p64x0_pclk_ctrl,
+ .ctrlbit = (1 << 18),
+ },
+};
+
+static struct clk *clkset_uart_list[] = {
+ &clk_dout_epll.clk,
+ &clk_dout_mpll.clk,
+};
+
+static struct clksrc_sources clkset_uart = {
+ .sources = clkset_uart_list,
+ .nr_sources = ARRAY_SIZE(clkset_uart_list),
+};
+
+static struct clk *clkset_mali_list[] = {
+ &clk_mout_epll.clk,
+ &clk_mout_apll.clk,
+ &clk_mout_mpll.clk,
+};
+
+static struct clksrc_sources clkset_mali = {
+ .sources = clkset_mali_list,
+ .nr_sources = ARRAY_SIZE(clkset_mali_list),
+};
+
+static struct clk *clkset_group2_list[] = {
+ &clk_dout_epll.clk,
+ &clk_dout_mpll.clk,
+ &clk_ext_xtal_mux,
+};
+
+static struct clksrc_sources clkset_group2 = {
+ .sources = clkset_group2_list,
+ .nr_sources = ARRAY_SIZE(clkset_group2_list),
+};
+
+static struct clk *clkset_dispcon_list[] = {
+ &clk_dout_epll.clk,
+ &clk_dout_mpll.clk,
+ &clk_ext_xtal_mux,
+ &clk_mout_dpll.clk,
+};
+
+static struct clksrc_sources clkset_dispcon = {
+ .sources = clkset_dispcon_list,
+ .nr_sources = ARRAY_SIZE(clkset_dispcon_list),
+};
+
+static struct clk *clkset_hsmmc44_list[] = {
+ &clk_dout_epll.clk,
+ &clk_dout_mpll.clk,
+ &clk_ext_xtal_mux,
+ &s5p_clk_27m,
+ &clk_48m,
+};
+
+static struct clksrc_sources clkset_hsmmc44 = {
+ .sources = clkset_hsmmc44_list,
+ .nr_sources = ARRAY_SIZE(clkset_hsmmc44_list),
+};
+
+static struct clk *clkset_sclk_audio0_list[] = {
+ [0] = &clk_dout_epll.clk,
+ [1] = &clk_dout_mpll.clk,
+ [2] = &clk_ext_xtal_mux,
+ [3] = NULL,
+ [4] = NULL,
+};
+
+static struct clksrc_sources clkset_sclk_audio0 = {
+ .sources = clkset_sclk_audio0_list,
+ .nr_sources = ARRAY_SIZE(clkset_sclk_audio0_list),
+};
+
+static struct clksrc_clk clk_sclk_audio0 = {
+ .clk = {
+ .name = "audio-bus",
+ .id = -1,
+ .enable = s5p64x0_sclk_ctrl,
+ .ctrlbit = (1 << 8),
+ .parent = &clk_dout_epll.clk,
+ },
+ .sources = &clkset_sclk_audio0,
+ .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 10, .size = 3 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 8, .size = 4 },
+};
+
+static struct clksrc_clk clksrcs[] = {
+ {
+ .clk = {
+ .name = "sclk_mmc",
+ .id = 0,
+ .ctrlbit = (1 << 24),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 18, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 0, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_mmc",
+ .id = 1,
+ .ctrlbit = (1 << 25),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 20, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 4, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_mmc",
+ .id = 2,
+ .ctrlbit = (1 << 26),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 22, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 8, .size = 4 },
+ }, {
+ .clk = {
+ .name = "uclk1",
+ .id = -1,
+ .ctrlbit = (1 << 5),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_uart,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 13, .size = 1 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 16, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_spi",
+ .id = 0,
+ .ctrlbit = (1 << 20),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 14, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 0, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_spi",
+ .id = 1,
+ .ctrlbit = (1 << 21),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 16, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 4, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_fimc",
+ .id = -1,
+ .ctrlbit = (1 << 10),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 26, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 12, .size = 4 },
+ }, {
+ .clk = {
+ .name = "aclk_mali",
+ .id = -1,
+ .ctrlbit = (1 << 2),
+ .enable = s5p64x0_sclk1_ctrl,
+ },
+ .sources = &clkset_mali,
+ .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 8, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 4, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_2d",
+ .id = -1,
+ .ctrlbit = (1 << 12),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_mali,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 30, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV2, .shift = 20, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_usi",
+ .id = -1,
+ .ctrlbit = (1 << 7),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 10, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 16, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_camif",
+ .id = -1,
+ .ctrlbit = (1 << 6),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_group2,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 28, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 20, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_dispcon",
+ .id = -1,
+ .ctrlbit = (1 << 1),
+ .enable = s5p64x0_sclk1_ctrl,
+ },
+ .sources = &clkset_dispcon,
+ .reg_src = { .reg = S5P64X0_CLK_SRC1, .shift = 4, .size = 2 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV3, .shift = 0, .size = 4 },
+ }, {
+ .clk = {
+ .name = "sclk_hsmmc44",
+ .id = -1,
+ .ctrlbit = (1 << 30),
+ .enable = s5p64x0_sclk_ctrl,
+ },
+ .sources = &clkset_hsmmc44,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 6, .size = 3 },
+ .reg_div = { .reg = S5P64X0_CLK_DIV1, .shift = 28, .size = 4 },
+ },
+};
+
+/* Clock initialization code */
+static struct clksrc_clk *sysclks[] = {
+ &clk_mout_apll,
+ &clk_mout_epll,
+ &clk_dout_epll,
+ &clk_mout_mpll,
+ &clk_dout_mpll,
+ &clk_armclk,
+ &clk_mout_hclk_sel,
+ &clk_dout_pwm_ratio0,
+ &clk_pclk_to_wdt_pwm,
+ &clk_hclk,
+ &clk_pclk,
+ &clk_hclk_low,
+ &clk_pclk_low,
+ &clk_sclk_audio0,
+};
+
+void __init_or_cpufreq s5p6450_setup_clocks(void)
+{
+ struct clk *xtal_clk;
+
+ unsigned long xtal;
+ unsigned long fclk;
+ unsigned long hclk;
+ unsigned long hclk_low;
+ unsigned long pclk;
+ unsigned long pclk_low;
+
+ unsigned long apll;
+ unsigned long mpll;
+ unsigned long epll;
+ unsigned long dpll;
+ unsigned int ptr;
+
+ /* Set S5P6450 functions for clk_fout_epll */
+
+ clk_fout_epll.enable = s5p64x0_epll_enable;
+ clk_fout_epll.ops = &s5p6450_epll_ops;
+
+ clk_48m.enable = s5p64x0_clk48m_ctrl;
+
+ xtal_clk = clk_get(NULL, "ext_xtal");
+ BUG_ON(IS_ERR(xtal_clk));
+
+ xtal = clk_get_rate(xtal_clk);
+ clk_put(xtal_clk);
+
+ apll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_APLL_CON), pll_4502);
+ mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_MPLL_CON), pll_4502);
+ epll = s5p_get_pll90xx(xtal, __raw_readl(S5P64X0_EPLL_CON),
+ __raw_readl(S5P64X0_EPLL_CON_K));
+ dpll = s5p_get_pll46xx(xtal, __raw_readl(S5P6450_DPLL_CON),
+ __raw_readl(S5P6450_DPLL_CON_K), pll_4650c);
+
+ clk_fout_apll.rate = apll;
+ clk_fout_mpll.rate = mpll;
+ clk_fout_epll.rate = epll;
+ clk_fout_dpll.rate = dpll;
+
+ printk(KERN_INFO "S5P6450: PLL settings, A=%ld.%ldMHz, M=%ld.%ldMHz," \
+ " E=%ld.%ldMHz, D=%ld.%ldMHz\n",
+ print_mhz(apll), print_mhz(mpll), print_mhz(epll),
+ print_mhz(dpll));
+
+ fclk = clk_get_rate(&clk_armclk.clk);
+ hclk = clk_get_rate(&clk_hclk.clk);
+ pclk = clk_get_rate(&clk_pclk.clk);
+ hclk_low = clk_get_rate(&clk_hclk_low.clk);
+ pclk_low = clk_get_rate(&clk_pclk_low.clk);
+
+ printk(KERN_INFO "S5P6450: HCLK=%ld.%ldMHz, HCLK_LOW=%ld.%ldMHz," \
+ " PCLK=%ld.%ldMHz, PCLK_LOW=%ld.%ldMHz\n",
+ print_mhz(hclk), print_mhz(hclk_low),
+ print_mhz(pclk), print_mhz(pclk_low));
+
+ clk_f.rate = fclk;
+ clk_h.rate = hclk;
+ clk_p.rate = pclk;
+
+ for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
+ s3c_set_clksrc(&clksrcs[ptr], true);
+}
+
+void __init s5p6450_register_clocks(void)
+{
+ struct clk *clkp;
+ int ret;
+ int ptr;
+
+ for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
+ s3c_register_clksrc(sysclks[ptr], 1);
+
+ s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
+ s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
+
+ clkp = init_clocks_disable;
+ for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
+
+ ret = s3c24xx_register_clock(clkp);
+ if (ret < 0) {
+ printk(KERN_ERR "Failed to register clock %s (%d)\n",
+ clkp->name, ret);
+ }
+ (clkp->enable)(clkp, 0);
+ }
+
+ s3c_pwmclk_init();
+}
diff --git a/arch/arm/mach-s5p64x0/clock.c b/arch/arm/mach-s5p64x0/clock.c
new file mode 100644
index 0000000..523ba80
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/clock.c
@@ -0,0 +1,253 @@
+/* linux/arch/arm/mach-s5p64x0/clock.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P64X0 - Clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/sysdev.h>
+#include <linux/io.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+
+#include <plat/cpu-freq.h>
+#include <plat/clock.h>
+#include <plat/cpu.h>
+#include <plat/pll.h>
+#include <plat/s5p-clock.h>
+#include <plat/clock-clksrc.h>
+#include <plat/s5p6440.h>
+#include <plat/s5p6450.h>
+
+struct clksrc_clk clk_mout_apll = {
+ .clk = {
+ .name = "mout_apll",
+ .id = -1,
+ },
+ .sources = &clk_src_apll,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 0, .size = 1 },
+};
+
+struct clksrc_clk clk_mout_mpll = {
+ .clk = {
+ .name = "mout_mpll",
+ .id = -1,
+ },
+ .sources = &clk_src_mpll,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 1, .size = 1 },
+};
+
+struct clksrc_clk clk_mout_epll = {
+ .clk = {
+ .name = "mout_epll",
+ .id = -1,
+ },
+ .sources = &clk_src_epll,
+ .reg_src = { .reg = S5P64X0_CLK_SRC0, .shift = 2, .size = 1 },
+};
+
+enum perf_level {
+ L0 = 532*1000,
+ L1 = 266*1000,
+ L2 = 133*1000,
+};
+
+static const u32 clock_table[][3] = {
+ /*{ARM_CLK, DIVarm, DIVhclk}*/
+ {L0 * 1000, (0 << ARM_DIV_RATIO_SHIFT), (3 << S5P64X0_CLKDIV0_HCLK_SHIFT)},
+ {L1 * 1000, (1 << ARM_DIV_RATIO_SHIFT), (1 << S5P64X0_CLKDIV0_HCLK_SHIFT)},
+ {L2 * 1000, (3 << ARM_DIV_RATIO_SHIFT), (0 << S5P64X0_CLKDIV0_HCLK_SHIFT)},
+};
+
+int s5p64x0_epll_enable(struct clk *clk, int enable)
+{
+ unsigned int ctrlbit = clk->ctrlbit;
+ unsigned int epll_con = __raw_readl(S5P64X0_EPLL_CON) & ~ctrlbit;
+
+ if (enable)
+ __raw_writel(epll_con | ctrlbit, S5P64X0_EPLL_CON);
+ else
+ __raw_writel(epll_con, S5P64X0_EPLL_CON);
+
+ return 0;
+}
+
+unsigned long s5p64x0_epll_get_rate(struct clk *clk)
+{
+ return clk->rate;
+}
+
+unsigned long s5p64x0_armclk_get_rate(struct clk *clk)
+{
+ unsigned long rate = clk_get_rate(clk->parent);
+ u32 clkdiv;
+
+ /* divisor mask starts at bit0, so no need to shift */
+ clkdiv = __raw_readl(ARM_CLK_DIV) & ARM_DIV_MASK;
+
+ return rate / (clkdiv + 1);
+}
+
+unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate)
+{
+ u32 iter;
+
+ for (iter = 1 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
+ if (rate > clock_table[iter][0])
+ return clock_table[iter-1][0];
+ }
+
+ return clock_table[ARRAY_SIZE(clock_table) - 1][0];
+}
+
+int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate)
+{
+ u32 round_tmp;
+ u32 iter;
+ u32 clk_div0_tmp;
+ u32 cur_rate = clk->ops->get_rate(clk);
+ unsigned long flags;
+
+ round_tmp = clk->ops->round_rate(clk, rate);
+ if (round_tmp == cur_rate)
+ return 0;
+
+
+ for (iter = 0 ; iter < ARRAY_SIZE(clock_table) ; iter++) {
+ if (round_tmp == clock_table[iter][0])
+ break;
+ }
+
+ if (iter >= ARRAY_SIZE(clock_table))
+ iter = ARRAY_SIZE(clock_table) - 1;
+
+ local_irq_save(flags);
+ if (cur_rate > round_tmp) {
+ /* Frequency Down */
+ clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
+ clk_div0_tmp |= clock_table[iter][1];
+ __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
+
+ clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
+ ~(S5P64X0_CLKDIV0_HCLK_MASK);
+ clk_div0_tmp |= clock_table[iter][2];
+ __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
+
+
+ } else {
+ /* Frequency Up */
+ clk_div0_tmp = __raw_readl(ARM_CLK_DIV) &
+ ~(S5P64X0_CLKDIV0_HCLK_MASK);
+ clk_div0_tmp |= clock_table[iter][2];
+ __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
+
+ clk_div0_tmp = __raw_readl(ARM_CLK_DIV) & ~(ARM_DIV_MASK);
+ clk_div0_tmp |= clock_table[iter][1];
+ __raw_writel(clk_div0_tmp, ARM_CLK_DIV);
+ }
+ local_irq_restore(flags);
+
+ clk->rate = clock_table[iter][0];
+
+ return 0;
+}
+
+struct clk_ops s5p64x0_clkarm_ops = {
+ .get_rate = s5p64x0_armclk_get_rate,
+ .set_rate = s5p64x0_armclk_set_rate,
+ .round_rate = s5p64x0_armclk_round_rate,
+};
+
+struct clksrc_clk clk_armclk = {
+ .clk = {
+ .name = "armclk",
+ .id = 1,
+ .parent = &clk_mout_apll.clk,
+ .ops = &s5p64x0_clkarm_ops,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 0, .size = 4 },
+};
+
+struct clksrc_clk clk_dout_mpll = {
+ .clk = {
+ .name = "dout_mpll",
+ .id = -1,
+ .parent = &clk_mout_mpll.clk,
+ },
+ .reg_div = { .reg = S5P64X0_CLK_DIV0, .shift = 4, .size = 1 },
+};
+
+struct clk *clkset_hclk_low_list[] = {
+ &clk_mout_apll.clk,
+ &clk_mout_mpll.clk,
+};
+
+struct clksrc_sources clkset_hclk_low = {
+ .sources = clkset_hclk_low_list,
+ .nr_sources = ARRAY_SIZE(clkset_hclk_low_list),
+};
+
+int s5p64x0_pclk_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(S5P64X0_CLK_GATE_PCLK, clk, enable);
+}
+
+int s5p64x0_hclk0_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(S5P64X0_CLK_GATE_HCLK0, clk, enable);
+}
+
+int s5p64x0_hclk1_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(S5P64X0_CLK_GATE_HCLK1, clk, enable);
+}
+
+int s5p64x0_sclk_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(S5P64X0_CLK_GATE_SCLK0, clk, enable);
+}
+
+int s5p64x0_sclk1_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(S5P64X0_CLK_GATE_SCLK1, clk, enable);
+}
+
+int s5p64x0_mem_ctrl(struct clk *clk, int enable)
+{
+ return s5p_gatectrl(S5P64X0_CLK_GATE_MEM0, clk, enable);
+}
+
+int s5p64x0_clk48m_ctrl(struct clk *clk, int enable)
+{
+ unsigned long flags;
+ u32 val;
+
+ /* can't rely on clock lock, this register has other usages */
+ local_irq_save(flags);
+
+ val = __raw_readl(S5P64X0_OTHERS);
+ if (enable)
+ val |= S5P64X0_OTHERS_USB_SIG_MASK;
+ else
+ val &= ~S5P64X0_OTHERS_USB_SIG_MASK;
+
+ __raw_writel(val, S5P64X0_OTHERS);
+
+ local_irq_restore(flags);
+
+ return 0;
+}
diff --git a/arch/arm/mach-s5p64x0/include/mach/regs-clock.h b/arch/arm/mach-s5p64x0/include/mach/regs-clock.h
new file mode 100644
index 0000000..58e1bc8
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-clock.h
@@ -0,0 +1,63 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/regs-clock.h
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P64X0 - Clock register definitions
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_REGS_CLOCK_H
+#define __ASM_ARCH_REGS_CLOCK_H __FILE__
+
+#include <mach/map.h>
+
+#define S5P_CLKREG(x) (S3C_VA_SYS + (x))
+
+#define S5P64X0_APLL_CON S5P_CLKREG(0x0C)
+#define S5P64X0_MPLL_CON S5P_CLKREG(0x10)
+#define S5P64X0_EPLL_CON S5P_CLKREG(0x14)
+#define S5P64X0_EPLL_CON_K S5P_CLKREG(0x18)
+
+#define S5P64X0_CLK_SRC0 S5P_CLKREG(0x1C)
+
+#define S5P64X0_CLK_DIV0 S5P_CLKREG(0x20)
+#define S5P64X0_CLK_DIV1 S5P_CLKREG(0x24)
+#define S5P64X0_CLK_DIV2 S5P_CLKREG(0x28)
+
+#define S5P64X0_CLK_GATE_HCLK0 S5P_CLKREG(0x30)
+#define S5P64X0_CLK_GATE_PCLK S5P_CLKREG(0x34)
+#define S5P64X0_CLK_GATE_SCLK0 S5P_CLKREG(0x38)
+#define S5P64X0_CLK_GATE_MEM0 S5P_CLKREG(0x3C)
+
+#define S5P64X0_CLK_DIV3 S5P_CLKREG(0x40)
+
+#define S5P64X0_CLK_GATE_HCLK1 S5P_CLKREG(0x44)
+#define S5P64X0_CLK_GATE_SCLK1 S5P_CLKREG(0x48)
+
+#define S5P6450_DPLL_CON S5P_CLKREG(0x50)
+#define S5P6450_DPLL_CON_K S5P_CLKREG(0x54)
+
+#define S5P64X0_CLK_SRC1 S5P_CLKREG(0x10C)
+
+#define S5P64X0_SYS_ID S5P_CLKREG(0x118)
+#define S5P64X0_SYS_OTHERS S5P_CLKREG(0x11C)
+
+#define S5P64X0_PWR_CFG S5P_CLKREG(0x804)
+#define S5P64X0_OTHERS S5P_CLKREG(0x900)
+
+#define S5P64X0_CLKDIV0_HCLK_SHIFT (8)
+#define S5P64X0_CLKDIV0_HCLK_MASK (0xF << S5P64X0_CLKDIV0_HCLK_SHIFT)
+
+#define S5P64X0_OTHERS_USB_SIG_MASK (1 << 16)
+
+/* Compatibility defines */
+
+#define ARM_CLK_DIV S5P64X0_CLK_DIV0
+#define ARM_DIV_RATIO_SHIFT 0
+#define ARM_DIV_MASK (0xF << ARM_DIV_RATIO_SHIFT)
+
+#endif /* __ASM_ARCH_REGS_CLOCK_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h b/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h
new file mode 100644
index 0000000..ff85b4b
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h
@@ -0,0 +1,46 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/s5p64x0-clock.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Header file for s5p64x0 clock support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_CLOCK_H
+#define __ASM_ARCH_CLOCK_H __FILE__
+
+#include <linux/clk.h>
+
+extern struct clksrc_clk clk_mout_apll;
+extern struct clksrc_clk clk_mout_mpll;
+extern struct clksrc_clk clk_mout_epll;
+
+extern int s5p64x0_epll_enable(struct clk *clk, int enable);
+extern unsigned long s5p64x0_epll_get_rate(struct clk *clk);
+
+extern unsigned long s5p64x0_armclk_get_rate(struct clk *clk);
+extern unsigned long s5p64x0_armclk_round_rate(struct clk *clk, unsigned long rate);
+extern int s5p64x0_armclk_set_rate(struct clk *clk, unsigned long rate);
+
+extern struct clk_ops s5p64x0_clkarm_ops;
+
+extern struct clksrc_clk clk_armclk;
+extern struct clksrc_clk clk_dout_mpll;
+
+extern struct clk *clkset_hclk_low_list[];
+extern struct clksrc_sources clkset_hclk_low;
+
+extern int s5p64x0_pclk_ctrl(struct clk *clk, int enable);
+extern int s5p64x0_hclk0_ctrl(struct clk *clk, int enable);
+extern int s5p64x0_hclk1_ctrl(struct clk *clk, int enable);
+extern int s5p64x0_sclk_ctrl(struct clk *clk, int enable);
+extern int s5p64x0_sclk1_ctrl(struct clk *clk, int enable);
+extern int s5p64x0_mem_ctrl(struct clk *clk, int enable);
+
+extern int s5p64x0_clk48m_ctrl(struct clk *clk, int enable);
+
+#endif /* __ASM_ARCH_CLOCK_H */
diff --git a/arch/arm/plat-s5p/clock.c b/arch/arm/plat-s5p/clock.c
index b5e2552..8aaf4e6 100644
--- a/arch/arm/plat-s5p/clock.c
+++ b/arch/arm/plat-s5p/clock.c
@@ -74,6 +74,13 @@ struct clk clk_fout_epll = {
.ctrlbit = (1 << 31),
};
+/* DPLL clock output */
+struct clk clk_fout_dpll = {
+ .name = "fout_dpll",
+ .id = -1,
+ .ctrlbit = (1 << 31),
+};
+
/* VPLL clock output */
struct clk clk_fout_vpll = {
.name = "fout_vpll",
@@ -122,6 +129,17 @@ struct clksrc_sources clk_src_epll = {
.nr_sources = ARRAY_SIZE(clk_src_epll_list),
};
+/* Possible clock sources for DPLL Mux */
+static struct clk *clk_src_dpll_list[] = {
+ [0] = &clk_fin_dpll,
+ [1] = &clk_fout_dpll,
+};
+
+struct clksrc_sources clk_src_dpll = {
+ .sources = clk_src_dpll_list,
+ .nr_sources = ARRAY_SIZE(clk_src_dpll_list),
+};
+
struct clk clk_vpll = {
.name = "vpll",
.id = -1,
@@ -145,6 +163,7 @@ static struct clk *s5p_clks[] __initdata = {
&clk_fout_apll,
&clk_fout_mpll,
&clk_fout_epll,
+ &clk_fout_dpll,
&clk_fout_vpll,
&clk_arm,
&clk_vpll,
diff --git a/arch/arm/plat-s5p/include/plat/pll.h b/arch/arm/plat-s5p/include/plat/pll.h
index 4e8fe08..bf28fad 100644
--- a/arch/arm/plat-s5p/include/plat/pll.h
+++ b/arch/arm/plat-s5p/include/plat/pll.h
@@ -47,6 +47,7 @@ static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con,
}
#define PLL46XX_KDIV_MASK (0xFFFF)
+#define PLL4650C_KDIV_MASK (0xFFF)
#define PLL46XX_MDIV_MASK (0x1FF)
#define PLL46XX_PDIV_MASK (0x3F)
#define PLL46XX_SDIV_MASK (0x7)
@@ -57,6 +58,7 @@ static inline unsigned long s5p_get_pll45xx(unsigned long baseclk, u32 pll_con,
enum pll46xx_type_t {
pll_4600,
pll_4650,
+ pll_4650c,
};
static inline unsigned long s5p_get_pll46xx(unsigned long baseclk,
@@ -72,6 +74,11 @@ static inline unsigned long s5p_get_pll46xx(unsigned long baseclk,
sdiv = (pll_con0 >> PLL46XX_SDIV_SHIFT) & PLL46XX_SDIV_MASK;
kdiv = pll_con1 & PLL46XX_KDIV_MASK;
+ if (pll_type == pll_4650c)
+ kdiv = pll_con1 & PLL4650C_KDIV_MASK;
+ else
+ kdiv = pll_con1 & PLL46XX_KDIV_MASK;
+
tmp = baseclk;
if (pll_type == pll_4600) {
diff --git a/arch/arm/plat-s5p/include/plat/s5p-clock.h b/arch/arm/plat-s5p/include/plat/s5p-clock.h
index 09418b1..17036c8 100644
--- a/arch/arm/plat-s5p/include/plat/s5p-clock.h
+++ b/arch/arm/plat-s5p/include/plat/s5p-clock.h
@@ -1,7 +1,7 @@
/* linux/arch/arm/plat-s5p/include/plat/s5p-clock.h
*
- * Copyright 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* Header file for s5p clock support
*
@@ -20,6 +20,7 @@
#define clk_fin_apll clk_ext_xtal_mux
#define clk_fin_mpll clk_ext_xtal_mux
#define clk_fin_epll clk_ext_xtal_mux
+#define clk_fin_dpll clk_ext_xtal_mux
#define clk_fin_vpll clk_ext_xtal_mux
#define clk_fin_hpll clk_ext_xtal_mux
@@ -30,6 +31,7 @@ extern struct clk s5p_clk_27m;
extern struct clk clk_fout_apll;
extern struct clk clk_fout_mpll;
extern struct clk clk_fout_epll;
+extern struct clk clk_fout_dpll;
extern struct clk clk_fout_vpll;
extern struct clk clk_arm;
extern struct clk clk_vpll;
@@ -37,8 +39,8 @@ extern struct clk clk_vpll;
extern struct clksrc_sources clk_src_apll;
extern struct clksrc_sources clk_src_mpll;
extern struct clksrc_sources clk_src_epll;
+extern struct clksrc_sources clk_src_dpll;
-extern int s5p6440_clk48m_ctrl(struct clk *clk, int enable);
extern int s5p_gatectrl(void __iomem *reg, struct clk *clk, int enable);
#endif /* __ASM_PLAT_S5P_CLOCK_H */
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 05/13] ARM: S5P64X0: Update IRQ support
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 7:09 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel, linux-samsung-soc; +Cc: ben-linux, Kukjin Kim
This patch updates IRQ support for S5P6440 and S5P6450 SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
.../include/mach/irqs.h | 48 +++++++++++++++-----
.../include/mach/regs-irq.h | 8 ++--
2 files changed, 40 insertions(+), 16 deletions(-)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/irqs.h (71%)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/regs-irq.h (66%)
diff --git a/arch/arm/mach-s5p6440/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h
similarity index 71%
rename from arch/arm/mach-s5p6440/include/mach/irqs.h
rename to arch/arm/mach-s5p64x0/include/mach/irqs.h
index 16a7612..513abff 100644
--- a/arch/arm/mach-s5p6440/include/mach/irqs.h
+++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
@@ -1,17 +1,17 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/irqs.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/irqs.h
*
- * Copyright 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5P6440 - IRQ definitions
+ * S5P64X0 - IRQ definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-#ifndef __ASM_ARCH_S5P_IRQS_H
-#define __ASM_ARCH_S5P_IRQS_H __FILE__
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H __FILE__
#include <plat/irqs.h>
@@ -20,10 +20,12 @@
#define IRQ_EINT0_3 S5P_IRQ_VIC0(0)
#define IRQ_EINT4_11 S5P_IRQ_VIC0(1)
#define IRQ_RTC_TIC S5P_IRQ_VIC0(2)
+#define IRQ_IIS1 S5P_IRQ_VIC0(3) /* for only S5P6450 */
+#define IRQ_IIS2 S5P_IRQ_VIC0(4) /* for only S5P6450 */
#define IRQ_IIC1 S5P_IRQ_VIC0(5)
#define IRQ_I2SV40 S5P_IRQ_VIC0(6)
-#define IRQ_GPS S5P_IRQ_VIC0(7)
-#define IRQ_POST0 S5P_IRQ_VIC0(9)
+#define IRQ_GPS S5P_IRQ_VIC0(7) /* for only S5P6450 */
+
#define IRQ_2D S5P_IRQ_VIC0(11)
#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(23)
#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(24)
@@ -39,22 +41,26 @@
#define IRQ_EINT12_15 S5P_IRQ_VIC1(0)
#define IRQ_PCM0 S5P_IRQ_VIC1(2)
+#define IRQ_PCM1 S5P_IRQ_VIC1(3) /* for only S5P6450 */
+#define IRQ_PCM2 S5P_IRQ_VIC1(4) /* for only S5P6450 */
#define IRQ_UART0 S5P_IRQ_VIC1(5)
#define IRQ_UART1 S5P_IRQ_VIC1(6)
#define IRQ_UART2 S5P_IRQ_VIC1(7)
#define IRQ_UART3 S5P_IRQ_VIC1(8)
#define IRQ_DMA0 S5P_IRQ_VIC1(9)
+#define IRQ_UART4 S5P_IRQ_VIC1(10) /* S5P6450 */
+#define IRQ_UART5 S5P_IRQ_VIC1(11) /* S5P6450 */
#define IRQ_NFC S5P_IRQ_VIC1(13)
+#define IRQ_USI S5P_IRQ_VIC1(15) /* S5P6450 */
#define IRQ_SPI0 S5P_IRQ_VIC1(16)
#define IRQ_SPI1 S5P_IRQ_VIC1(17)
+#define IRQ_HSMMC2 S5P_IRQ_VIC1(17) /* Shared */
#define IRQ_IIC S5P_IRQ_VIC1(18)
#define IRQ_DISPCON3 S5P_IRQ_VIC1(19)
-#define IRQ_FIMGVG S5P_IRQ_VIC1(20)
#define IRQ_EINT_GROUPS S5P_IRQ_VIC1(21)
-#define IRQ_PMU S5P_IRQ_VIC1(23)
+#define IRQ_PMU S5P_IRQ_VIC1(23) /* S5P6440 */
#define IRQ_HSMMC0 S5P_IRQ_VIC1(24)
#define IRQ_HSMMC1 S5P_IRQ_VIC1(25)
-#define IRQ_HSMMC2 IRQ_SPI1 /* shared with SPI1 */
#define IRQ_OTG S5P_IRQ_VIC1(26)
#define IRQ_DSI S5P_IRQ_VIC1(27)
#define IRQ_RTC_ALARM S5P_IRQ_VIC1(28)
@@ -63,6 +69,24 @@
#define IRQ_TC IRQ_PENDN
#define IRQ_ADC S5P_IRQ_VIC1(31)
+/* UART interrupts, S5P6450 has 5 UARTs */
+#define IRQ_S5P_UART_BASE4 (96)
+#define IRQ_S5P_UART_BASE5 (100)
+
+#define IRQ_S5P_UART_RX4 (IRQ_S5P_UART_BASE4 + UART_IRQ_RXD)
+#define IRQ_S5P_UART_TX4 (IRQ_S5P_UART_BASE4 + UART_IRQ_TXD)
+#define IRQ_S5P_UART_ERR4 (IRQ_S5P_UART_BASE4 + UART_IRQ_ERR)
+
+#define IRQ_S5P_UART_RX5 (IRQ_S5P_UART_BASE5 + UART_IRQ_RXD)
+#define IRQ_S5P_UART_TX5 (IRQ_S5P_UART_BASE5 + UART_IRQ_TXD)
+#define IRQ_S5P_UART_ERR5 (IRQ_S5P_UART_BASE5 + UART_IRQ_ERR)
+
+/* S3C compatibilty defines */
+#define IRQ_S3CUART_RX4 IRQ_S5P_UART_RX4
+#define IRQ_S3CUART_RX5 IRQ_S5P_UART_RX5
+
+/* S5P6450 EINT feature will be added */
+
/*
* Since the IRQ_EINT(x) are a linear mapping on s5p6440 we just defined
* them as an IRQ_EINT(x) macro from S5P_IRQ_EINT_BASE which we place
@@ -115,4 +139,4 @@
#define NR_IRQS (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
-#endif /* __ASM_ARCH_S5P_IRQS_H */
+#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-irq.h b/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
similarity index 66%
rename from arch/arm/mach-s5p6440/include/mach/regs-irq.h
rename to arch/arm/mach-s5p64x0/include/mach/regs-irq.h
index a961f4b..4aaebda 100644
--- a/arch/arm/mach-s5p6440/include/mach/regs-irq.h
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/regs-irq.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5P6440 - IRQ register definitions
+ * S5P64X0 - IRQ register definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 05/13] ARM: S5P64X0: Update IRQ support
@ 2010-09-01 7:09 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel
This patch updates IRQ support for S5P6440 and S5P6450 SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
.../include/mach/irqs.h | 48 +++++++++++++++-----
.../include/mach/regs-irq.h | 8 ++--
2 files changed, 40 insertions(+), 16 deletions(-)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/irqs.h (71%)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/regs-irq.h (66%)
diff --git a/arch/arm/mach-s5p6440/include/mach/irqs.h b/arch/arm/mach-s5p64x0/include/mach/irqs.h
similarity index 71%
rename from arch/arm/mach-s5p6440/include/mach/irqs.h
rename to arch/arm/mach-s5p64x0/include/mach/irqs.h
index 16a7612..513abff 100644
--- a/arch/arm/mach-s5p6440/include/mach/irqs.h
+++ b/arch/arm/mach-s5p64x0/include/mach/irqs.h
@@ -1,17 +1,17 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/irqs.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/irqs.h
*
- * Copyright 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5P6440 - IRQ definitions
+ * S5P64X0 - IRQ definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-#ifndef __ASM_ARCH_S5P_IRQS_H
-#define __ASM_ARCH_S5P_IRQS_H __FILE__
+#ifndef __ASM_ARCH_IRQS_H
+#define __ASM_ARCH_IRQS_H __FILE__
#include <plat/irqs.h>
@@ -20,10 +20,12 @@
#define IRQ_EINT0_3 S5P_IRQ_VIC0(0)
#define IRQ_EINT4_11 S5P_IRQ_VIC0(1)
#define IRQ_RTC_TIC S5P_IRQ_VIC0(2)
+#define IRQ_IIS1 S5P_IRQ_VIC0(3) /* for only S5P6450 */
+#define IRQ_IIS2 S5P_IRQ_VIC0(4) /* for only S5P6450 */
#define IRQ_IIC1 S5P_IRQ_VIC0(5)
#define IRQ_I2SV40 S5P_IRQ_VIC0(6)
-#define IRQ_GPS S5P_IRQ_VIC0(7)
-#define IRQ_POST0 S5P_IRQ_VIC0(9)
+#define IRQ_GPS S5P_IRQ_VIC0(7) /* for only S5P6450 */
+
#define IRQ_2D S5P_IRQ_VIC0(11)
#define IRQ_TIMER0_VIC S5P_IRQ_VIC0(23)
#define IRQ_TIMER1_VIC S5P_IRQ_VIC0(24)
@@ -39,22 +41,26 @@
#define IRQ_EINT12_15 S5P_IRQ_VIC1(0)
#define IRQ_PCM0 S5P_IRQ_VIC1(2)
+#define IRQ_PCM1 S5P_IRQ_VIC1(3) /* for only S5P6450 */
+#define IRQ_PCM2 S5P_IRQ_VIC1(4) /* for only S5P6450 */
#define IRQ_UART0 S5P_IRQ_VIC1(5)
#define IRQ_UART1 S5P_IRQ_VIC1(6)
#define IRQ_UART2 S5P_IRQ_VIC1(7)
#define IRQ_UART3 S5P_IRQ_VIC1(8)
#define IRQ_DMA0 S5P_IRQ_VIC1(9)
+#define IRQ_UART4 S5P_IRQ_VIC1(10) /* S5P6450 */
+#define IRQ_UART5 S5P_IRQ_VIC1(11) /* S5P6450 */
#define IRQ_NFC S5P_IRQ_VIC1(13)
+#define IRQ_USI S5P_IRQ_VIC1(15) /* S5P6450 */
#define IRQ_SPI0 S5P_IRQ_VIC1(16)
#define IRQ_SPI1 S5P_IRQ_VIC1(17)
+#define IRQ_HSMMC2 S5P_IRQ_VIC1(17) /* Shared */
#define IRQ_IIC S5P_IRQ_VIC1(18)
#define IRQ_DISPCON3 S5P_IRQ_VIC1(19)
-#define IRQ_FIMGVG S5P_IRQ_VIC1(20)
#define IRQ_EINT_GROUPS S5P_IRQ_VIC1(21)
-#define IRQ_PMU S5P_IRQ_VIC1(23)
+#define IRQ_PMU S5P_IRQ_VIC1(23) /* S5P6440 */
#define IRQ_HSMMC0 S5P_IRQ_VIC1(24)
#define IRQ_HSMMC1 S5P_IRQ_VIC1(25)
-#define IRQ_HSMMC2 IRQ_SPI1 /* shared with SPI1 */
#define IRQ_OTG S5P_IRQ_VIC1(26)
#define IRQ_DSI S5P_IRQ_VIC1(27)
#define IRQ_RTC_ALARM S5P_IRQ_VIC1(28)
@@ -63,6 +69,24 @@
#define IRQ_TC IRQ_PENDN
#define IRQ_ADC S5P_IRQ_VIC1(31)
+/* UART interrupts, S5P6450 has 5 UARTs */
+#define IRQ_S5P_UART_BASE4 (96)
+#define IRQ_S5P_UART_BASE5 (100)
+
+#define IRQ_S5P_UART_RX4 (IRQ_S5P_UART_BASE4 + UART_IRQ_RXD)
+#define IRQ_S5P_UART_TX4 (IRQ_S5P_UART_BASE4 + UART_IRQ_TXD)
+#define IRQ_S5P_UART_ERR4 (IRQ_S5P_UART_BASE4 + UART_IRQ_ERR)
+
+#define IRQ_S5P_UART_RX5 (IRQ_S5P_UART_BASE5 + UART_IRQ_RXD)
+#define IRQ_S5P_UART_TX5 (IRQ_S5P_UART_BASE5 + UART_IRQ_TXD)
+#define IRQ_S5P_UART_ERR5 (IRQ_S5P_UART_BASE5 + UART_IRQ_ERR)
+
+/* S3C compatibilty defines */
+#define IRQ_S3CUART_RX4 IRQ_S5P_UART_RX4
+#define IRQ_S3CUART_RX5 IRQ_S5P_UART_RX5
+
+/* S5P6450 EINT feature will be added */
+
/*
* Since the IRQ_EINT(x) are a linear mapping on s5p6440 we just defined
* them as an IRQ_EINT(x) macro from S5P_IRQ_EINT_BASE which we place
@@ -115,4 +139,4 @@
#define NR_IRQS (IRQ_EINT_GROUP8_BASE + IRQ_EINT_GROUP8_NR + 1)
-#endif /* __ASM_ARCH_S5P_IRQS_H */
+#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-irq.h b/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
similarity index 66%
rename from arch/arm/mach-s5p6440/include/mach/regs-irq.h
rename to arch/arm/mach-s5p64x0/include/mach/regs-irq.h
index a961f4b..4aaebda 100644
--- a/arch/arm/mach-s5p6440/include/mach/regs-irq.h
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
@@ -1,9 +1,9 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/regs-irq.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/regs-irq.h
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5P6440 - IRQ register definitions
+ * S5P64X0 - IRQ register definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 06/13] ARM: S5P64X0: Update Timer support
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 7:09 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel, linux-samsung-soc; +Cc: ben-linux, Kukjin Kim
This patch updates timer support for S5P6440 and S5P6450 SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
.../include/mach/pwm-clock.h | 10 ++++------
.../include/mach/tick.h | 13 +++++++++----
2 files changed, 13 insertions(+), 10 deletions(-)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/pwm-clock.h (86%)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/tick.h (60%)
diff --git a/arch/arm/mach-s5p6440/include/mach/pwm-clock.h b/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
similarity index 86%
rename from arch/arm/mach-s5p6440/include/mach/pwm-clock.h
rename to arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
index 6a2a02f..19fff8b 100644
--- a/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
+++ b/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
@@ -1,16 +1,14 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* http://armlinux.simtec.co.uk/
*
- * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
- *
- * S5P6440 - pwm clock and timer support
+ * S5P64X0 - pwm clock and timer support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5p6440/include/mach/tick.h b/arch/arm/mach-s5p64x0/include/mach/tick.h
similarity index 60%
rename from arch/arm/mach-s5p6440/include/mach/tick.h
rename to arch/arm/mach-s5p64x0/include/mach/tick.h
index 2f25c7f..00aa7f1 100644
--- a/arch/arm/mach-s5p6440/include/mach/tick.h
+++ b/arch/arm/mach-s5p64x0/include/mach/tick.h
@@ -1,9 +1,14 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/tick.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/tick.h
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5P6440 - Timer tick support definitions
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ * http://armlinux.simtec.co.uk/
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * S5P64X0 - Timer tick support definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 06/13] ARM: S5P64X0: Update Timer support
@ 2010-09-01 7:09 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel
This patch updates timer support for S5P6440 and S5P6450 SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
.../include/mach/pwm-clock.h | 10 ++++------
.../include/mach/tick.h | 13 +++++++++----
2 files changed, 13 insertions(+), 10 deletions(-)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/pwm-clock.h (86%)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/tick.h (60%)
diff --git a/arch/arm/mach-s5p6440/include/mach/pwm-clock.h b/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
similarity index 86%
rename from arch/arm/mach-s5p6440/include/mach/pwm-clock.h
rename to arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
index 6a2a02f..19fff8b 100644
--- a/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
+++ b/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
@@ -1,16 +1,14 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/pwm-clock.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/pwm-clock.h
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* Copyright 2008 Openmoko, Inc.
* Copyright 2008 Simtec Electronics
* Ben Dooks <ben@simtec.co.uk>
* http://armlinux.simtec.co.uk/
*
- * Based on arch/arm/mach-s3c64xx/include/mach/pwm-clock.h
- *
- * S5P6440 - pwm clock and timer support
+ * S5P64X0 - pwm clock and timer support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
diff --git a/arch/arm/mach-s5p6440/include/mach/tick.h b/arch/arm/mach-s5p64x0/include/mach/tick.h
similarity index 60%
rename from arch/arm/mach-s5p6440/include/mach/tick.h
rename to arch/arm/mach-s5p64x0/include/mach/tick.h
index 2f25c7f..00aa7f1 100644
--- a/arch/arm/mach-s5p6440/include/mach/tick.h
+++ b/arch/arm/mach-s5p64x0/include/mach/tick.h
@@ -1,9 +1,14 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/tick.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/tick.h
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5P6440 - Timer tick support definitions
+ * Copyright 2008 Openmoko, Inc.
+ * Copyright 2008 Simtec Electronics
+ * http://armlinux.simtec.co.uk/
+ * Ben Dooks <ben@simtec.co.uk>
+ *
+ * S5P64X0 - Timer tick support definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 07/13] ARM: S5P64X0: Update Audio support
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 7:09 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel, linux-samsung-soc; +Cc: ben-linux, Kukjin Kim, Jassi Brar
This patch updates Audio and SPI for S5P6440 and S5P6450 SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Jassi Brar <jassi.brar@samsung.com>
---
arch/arm/mach-s5p6440/dev-audio.c | 127 -----------
arch/arm/mach-s5p6440/dev-spi.c | 176 ---------------
arch/arm/mach-s5p6440/include/mach/spi-clocks.h | 17 --
arch/arm/mach-s5p64x0/dev-audio.c | 164 ++++++++++++++
arch/arm/mach-s5p64x0/dev-spi.c | 275 +++++++++++++++++++++++
arch/arm/mach-s5p64x0/include/mach/spi-clocks.h | 20 ++
arch/arm/plat-samsung/include/plat/devs.h | 5 +
7 files changed, 464 insertions(+), 320 deletions(-)
delete mode 100644 arch/arm/mach-s5p6440/dev-audio.c
delete mode 100644 arch/arm/mach-s5p6440/dev-spi.c
delete mode 100644 arch/arm/mach-s5p6440/include/mach/spi-clocks.h
create mode 100644 arch/arm/mach-s5p64x0/dev-audio.c
create mode 100644 arch/arm/mach-s5p64x0/dev-spi.c
create mode 100644 arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
diff --git a/arch/arm/mach-s5p6440/dev-audio.c b/arch/arm/mach-s5p6440/dev-audio.c
deleted file mode 100644
index 3ca0d2b..0000000
--- a/arch/arm/mach-s5p6440/dev-audio.c
+++ /dev/null
@@ -1,127 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/dev-audio.c
- *
- * Copyright (c) 2010 Samsung Electronics Co. Ltd
- * Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-
-#include <plat/gpio-cfg.h>
-#include <plat/audio.h>
-
-#include <mach/map.h>
-#include <mach/dma.h>
-#include <mach/irqs.h>
-
-static int s5p6440_cfg_i2s(struct platform_device *pdev)
-{
- /* configure GPIO for i2s port */
- switch (pdev->id) {
- case -1:
- s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5));
- s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5));
- s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5));
- s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5));
- s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5));
- s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5));
- s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5));
- break;
-
- default:
- printk(KERN_ERR "Invalid Device %d\n", pdev->id);
- return -EINVAL;
- }
-
- return 0;
-}
-
-static struct s3c_audio_pdata s3c_i2s_pdata = {
- .cfg_gpio = s5p6440_cfg_i2s,
-};
-
-static struct resource s5p6440_iis0_resource[] = {
- [0] = {
- .start = S5P6440_PA_I2S,
- .end = S5P6440_PA_I2S + 0x100 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = DMACH_I2S0_TX,
- .end = DMACH_I2S0_TX,
- .flags = IORESOURCE_DMA,
- },
- [2] = {
- .start = DMACH_I2S0_RX,
- .end = DMACH_I2S0_RX,
- .flags = IORESOURCE_DMA,
- },
-};
-
-struct platform_device s5p6440_device_iis = {
- .name = "s3c64xx-iis-v4",
- .id = -1,
- .num_resources = ARRAY_SIZE(s5p6440_iis0_resource),
- .resource = s5p6440_iis0_resource,
- .dev = {
- .platform_data = &s3c_i2s_pdata,
- },
-};
-
-/* PCM Controller platform_devices */
-
-static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev)
-{
- switch (pdev->id) {
- case 0:
- s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2));
- break;
-
- default:
- printk(KERN_DEBUG "Invalid PCM Controller number!");
- return -EINVAL;
- }
-
- return 0;
-}
-
-static struct s3c_audio_pdata s3c_pcm_pdata = {
- .cfg_gpio = s5p6440_pcm_cfg_gpio,
-};
-
-static struct resource s5p6440_pcm0_resource[] = {
- [0] = {
- .start = S5P6440_PA_PCM,
- .end = S5P6440_PA_PCM + 0x100 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = DMACH_PCM0_TX,
- .end = DMACH_PCM0_TX,
- .flags = IORESOURCE_DMA,
- },
- [2] = {
- .start = DMACH_PCM0_RX,
- .end = DMACH_PCM0_RX,
- .flags = IORESOURCE_DMA,
- },
-};
-
-struct platform_device s5p6440_device_pcm = {
- .name = "samsung-pcm",
- .id = 0,
- .num_resources = ARRAY_SIZE(s5p6440_pcm0_resource),
- .resource = s5p6440_pcm0_resource,
- .dev = {
- .platform_data = &s3c_pcm_pdata,
- },
-};
diff --git a/arch/arm/mach-s5p6440/dev-spi.c b/arch/arm/mach-s5p6440/dev-spi.c
deleted file mode 100644
index 510af44..0000000
--- a/arch/arm/mach-s5p6440/dev-spi.c
+++ /dev/null
@@ -1,176 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/dev-spi.c
- *
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- * Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-
-#include <mach/dma.h>
-#include <mach/map.h>
-#include <mach/irqs.h>
-#include <mach/spi-clocks.h>
-
-#include <plat/s3c64xx-spi.h>
-#include <plat/gpio-cfg.h>
-
-static char *spi_src_clks[] = {
- [S5P6440_SPI_SRCCLK_PCLK] = "pclk",
- [S5P6440_SPI_SRCCLK_SCLK] = "spi_epll",
-};
-
-/* SPI Controller platform_devices */
-
-/* Since we emulate multi-cs capability, we do not touch the CS.
- * The emulated CS is toggled by board specific mechanism, as it can
- * be either some immediate GPIO or some signal out of some other
- * chip in between ... or some yet another way.
- * We simply do not assume anything about CS.
- */
-static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
-{
- switch (pdev->id) {
- case 0:
- s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2));
- s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP);
- s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP);
- s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP);
- break;
-
- case 1:
- s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2));
- s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP);
- s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP);
- s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP);
- break;
-
- default:
- dev_err(&pdev->dev, "Invalid SPI Controller number!");
- return -EINVAL;
- }
-
- return 0;
-}
-
-static struct resource s5p6440_spi0_resource[] = {
- [0] = {
- .start = S5P6440_PA_SPI0,
- .end = S5P6440_PA_SPI0 + 0x100 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = DMACH_SPI0_TX,
- .end = DMACH_SPI0_TX,
- .flags = IORESOURCE_DMA,
- },
- [2] = {
- .start = DMACH_SPI0_RX,
- .end = DMACH_SPI0_RX,
- .flags = IORESOURCE_DMA,
- },
- [3] = {
- .start = IRQ_SPI0,
- .end = IRQ_SPI0,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct s3c64xx_spi_info s5p6440_spi0_pdata = {
- .cfg_gpio = s5p6440_spi_cfg_gpio,
- .fifo_lvl_mask = 0x1ff,
- .rx_lvl_offset = 15,
-};
-
-static u64 spi_dmamask = DMA_BIT_MASK(32);
-
-struct platform_device s5p6440_device_spi0 = {
- .name = "s3c64xx-spi",
- .id = 0,
- .num_resources = ARRAY_SIZE(s5p6440_spi0_resource),
- .resource = s5p6440_spi0_resource,
- .dev = {
- .dma_mask = &spi_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = &s5p6440_spi0_pdata,
- },
-};
-
-static struct resource s5p6440_spi1_resource[] = {
- [0] = {
- .start = S5P6440_PA_SPI1,
- .end = S5P6440_PA_SPI1 + 0x100 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = DMACH_SPI1_TX,
- .end = DMACH_SPI1_TX,
- .flags = IORESOURCE_DMA,
- },
- [2] = {
- .start = DMACH_SPI1_RX,
- .end = DMACH_SPI1_RX,
- .flags = IORESOURCE_DMA,
- },
- [3] = {
- .start = IRQ_SPI1,
- .end = IRQ_SPI1,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct s3c64xx_spi_info s5p6440_spi1_pdata = {
- .cfg_gpio = s5p6440_spi_cfg_gpio,
- .fifo_lvl_mask = 0x7f,
- .rx_lvl_offset = 15,
-};
-
-struct platform_device s5p6440_device_spi1 = {
- .name = "s3c64xx-spi",
- .id = 1,
- .num_resources = ARRAY_SIZE(s5p6440_spi1_resource),
- .resource = s5p6440_spi1_resource,
- .dev = {
- .dma_mask = &spi_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = &s5p6440_spi1_pdata,
- },
-};
-
-void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
-{
- struct s3c64xx_spi_info *pd;
-
- /* Reject invalid configuration */
- if (!num_cs || src_clk_nr < 0
- || src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) {
- printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
- return;
- }
-
- switch (cntrlr) {
- case 0:
- pd = &s5p6440_spi0_pdata;
- break;
- case 1:
- pd = &s5p6440_spi1_pdata;
- break;
- default:
- printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
- __func__, cntrlr);
- return;
- }
-
- pd->num_cs = num_cs;
- pd->src_clk_nr = src_clk_nr;
- pd->src_clk_name = spi_src_clks[src_clk_nr];
-}
diff --git a/arch/arm/mach-s5p6440/include/mach/spi-clocks.h b/arch/arm/mach-s5p6440/include/mach/spi-clocks.h
deleted file mode 100644
index 5fbca50..0000000
--- a/arch/arm/mach-s5p6440/include/mach/spi-clocks.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/spi-clocks.h
- *
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- * Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __S5P6440_PLAT_SPI_CLKS_H
-#define __S5P6440_PLAT_SPI_CLKS_H __FILE__
-
-#define S5P6440_SPI_SRCCLK_PCLK 0
-#define S5P6440_SPI_SRCCLK_SCLK 1
-
-#endif /* __S5P6440_PLAT_SPI_CLKS_H */
diff --git a/arch/arm/mach-s5p64x0/dev-audio.c b/arch/arm/mach-s5p64x0/dev-audio.c
new file mode 100644
index 0000000..ac7cfce
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/dev-audio.c
@@ -0,0 +1,164 @@
+/* linux/arch/arm/mach-s5p64x0/dev-audio.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co. Ltd
+ * Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/gpio.h>
+
+#include <plat/gpio-cfg.h>
+#include <plat/audio.h>
+
+#include <mach/map.h>
+#include <mach/dma.h>
+#include <mach/irqs.h>
+
+static int s5p6440_cfg_i2s(struct platform_device *pdev)
+{
+ /* configure GPIO for i2s port */
+ switch (pdev->id) {
+ case -1:
+ s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5));
+ break;
+
+ default:
+ printk(KERN_ERR "Invalid Device %d\n", pdev->id);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int s5p6450_cfg_i2s(struct platform_device *pdev)
+{
+ /* configure GPIO for i2s port */
+ switch (pdev->id) {
+ case -1:
+ s3c_gpio_cfgpin(S5P6450_GPB(4), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6450_GPR(4), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6450_GPR(5), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6450_GPR(6), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6450_GPR(7), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6450_GPR(8), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6450_GPR(13), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6450_GPR(14), S3C_GPIO_SFN(5));
+ break;
+
+ default:
+ printk(KERN_ERR "Invalid Device %d\n", pdev->id);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static struct s3c_audio_pdata s5p6440_i2s_pdata = {
+ .cfg_gpio = s5p6440_cfg_i2s,
+};
+
+static struct s3c_audio_pdata s5p6450_i2s_pdata = {
+ .cfg_gpio = s5p6450_cfg_i2s,
+};
+
+static struct resource s5p64x0_iis0_resource[] = {
+ [0] = {
+ .start = S5P64X0_PA_I2S,
+ .end = S5P64X0_PA_I2S + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = DMACH_I2S0_TX,
+ .end = DMACH_I2S0_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = DMACH_I2S0_RX,
+ .end = DMACH_I2S0_RX,
+ .flags = IORESOURCE_DMA,
+ },
+};
+
+struct platform_device s5p6440_device_iis = {
+ .name = "s3c64x0-iis-v4",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource),
+ .resource = s5p64x0_iis0_resource,
+ .dev = {
+ .platform_data = &s5p6440_i2s_pdata,
+ },
+};
+
+struct platform_device s5p6450_device_iis0 = {
+ .name = "s3c64x0-iis-v4",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource),
+ .resource = s5p64x0_iis0_resource,
+ .dev = {
+ .platform_data = &s5p6450_i2s_pdata,
+ },
+};
+
+/* PCM Controller platform_devices */
+
+static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev)
+{
+ switch (pdev->id) {
+ case 0:
+ s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2));
+ break;
+
+ default:
+ printk(KERN_DEBUG "Invalid PCM Controller number!");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static struct s3c_audio_pdata s5p6440_pcm_pdata = {
+ .cfg_gpio = s5p6440_pcm_cfg_gpio,
+};
+
+static struct resource s5p6440_pcm0_resource[] = {
+ [0] = {
+ .start = S5P64X0_PA_PCM,
+ .end = S5P64X0_PA_PCM + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = DMACH_PCM0_TX,
+ .end = DMACH_PCM0_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = DMACH_PCM0_RX,
+ .end = DMACH_PCM0_RX,
+ .flags = IORESOURCE_DMA,
+ },
+};
+
+struct platform_device s5p6440_device_pcm = {
+ .name = "samsung-pcm",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(s5p6440_pcm0_resource),
+ .resource = s5p6440_pcm0_resource,
+ .dev = {
+ .platform_data = &s5p6440_pcm_pdata,
+ },
+};
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c
new file mode 100644
index 0000000..7303d3a
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/dev-spi.c
@@ -0,0 +1,275 @@
+/* linux/arch/arm/mach-s5p64x0/dev-spi.c
+ *
+ * Copyright (C) 2010 Samsung Electronics Co. Ltd.
+ * Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/gpio.h>
+
+#include <mach/dma.h>
+#include <mach/map.h>
+#include <mach/irqs.h>
+#include <mach/spi-clocks.h>
+
+#include <plat/s3c64x0-spi.h>
+#include <plat/gpio-cfg.h>
+
+static char *s5p6440_spi_src_clks[] = {
+ [S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
+ [S5P64X0_SPI_SRCCLK_SCLK] = "spi_epll",
+};
+
+static char *s5p6450_spi_src_clks[] = {
+ [S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
+ [S5P64X0_SPI_SRCCLK_SCLK] = "sclk_spi",
+};
+
+/* SPI Controller platform_devices */
+
+/* Since we emulate multi-cs capability, we do not touch the CS.
+ * The emulated CS is toggled by board specific mechanism, as it can
+ * be either some immediate GPIO or some signal out of some other
+ * chip in between ... or some yet another way.
+ * We simply do not assume anything about CS.
+ */
+static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
+{
+ switch (pdev->id) {
+ case 0:
+ s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP);
+ break;
+
+ case 1:
+ s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP);
+ break;
+
+ default:
+ dev_err(&pdev->dev, "Invalid SPI Controller number!");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int s5p6450_spi_cfg_gpio(struct platform_device *pdev)
+{
+ switch (pdev->id) {
+ case 0:
+ s3c_gpio_cfgpin(S5P6450_GPC(0), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6450_GPC(1), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6450_GPC(2), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(S5P6450_GPC(0), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6450_GPC(1), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6450_GPC(2), S3C_GPIO_PULL_UP);
+ break;
+
+ case 1:
+ s3c_gpio_cfgpin(S5P6450_GPC(4), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6450_GPC(5), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6450_GPC(6), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(S5P6450_GPC(4), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6450_GPC(5), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6450_GPC(6), S3C_GPIO_PULL_UP);
+ break;
+
+ default:
+ dev_err(&pdev->dev, "Invalid SPI Controller number!");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static struct resource s5p64x0_spi0_resource[] = {
+ [0] = {
+ .start = S5P64X0_PA_SPI0,
+ .end = S5P64X0_PA_SPI0 + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = DMACH_SPI0_TX,
+ .end = DMACH_SPI0_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = DMACH_SPI0_RX,
+ .end = DMACH_SPI0_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .start = IRQ_SPI0,
+ .end = IRQ_SPI0,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct s3c64x0_spi_info s5p6440_spi0_pdata = {
+ .cfg_gpio = s5p6440_spi_cfg_gpio,
+ .fifo_lvl_mask = 0x1ff,
+ .rx_lvl_offset = 15,
+};
+
+static struct s3c64x0_spi_info s5p6450_spi0_pdata = {
+ .cfg_gpio = s5p6450_spi_cfg_gpio,
+ .fifo_lvl_mask = 0x1ff,
+ .rx_lvl_offset = 15,
+};
+
+static u64 spi_dmamask = DMA_BIT_MASK(32);
+
+struct platform_device s5p6440_device_spi0 = {
+ .name = "s3c64x0-spi",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource),
+ .resource = s5p64x0_spi0_resource,
+ .dev = {
+ .dma_mask = &spi_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &s5p6440_spi0_pdata,
+ },
+};
+
+struct platform_device s5p6450_device_spi0 = {
+ .name = "s3c64x0-spi",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource),
+ .resource = s5p64x0_spi0_resource,
+ .dev = {
+ .dma_mask = &spi_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &s5p6450_spi0_pdata,
+ },
+};
+
+static struct resource s5p64x0_spi1_resource[] = {
+ [0] = {
+ .start = S5P64X0_PA_SPI1,
+ .end = S5P64X0_PA_SPI1 + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = DMACH_SPI1_TX,
+ .end = DMACH_SPI1_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = DMACH_SPI1_RX,
+ .end = DMACH_SPI1_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .start = IRQ_SPI1,
+ .end = IRQ_SPI1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct s3c64x0_spi_info s5p6440_spi1_pdata = {
+ .cfg_gpio = s5p6440_spi_cfg_gpio,
+ .fifo_lvl_mask = 0x7f,
+ .rx_lvl_offset = 15,
+};
+
+static struct s3c64x0_spi_info s5p6450_spi1_pdata = {
+ .cfg_gpio = s5p6450_spi_cfg_gpio,
+ .fifo_lvl_mask = 0x7f,
+ .rx_lvl_offset = 15,
+};
+
+struct platform_device s5p6440_device_spi1 = {
+ .name = "s3c64x0-spi",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource),
+ .resource = s5p64x0_spi1_resource,
+ .dev = {
+ .dma_mask = &spi_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &s5p6440_spi1_pdata,
+ },
+};
+
+struct platform_device s5p6450_device_spi1 = {
+ .name = "s3c64x0-spi",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource),
+ .resource = s5p64x0_spi1_resource,
+ .dev = {
+ .dma_mask = &spi_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &s5p6450_spi1_pdata,
+ },
+};
+
+void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
+{
+ struct s3c64x0_spi_info *pd;
+
+ /* Reject invalid configuration */
+ if (!num_cs || src_clk_nr < 0
+ || src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) {
+ printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
+ return;
+ }
+
+ switch (cntrlr) {
+ case 0:
+ pd = &s5p6440_spi0_pdata;
+ break;
+ case 1:
+ pd = &s5p6440_spi1_pdata;
+ break;
+ default:
+ printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
+ __func__, cntrlr);
+ return;
+ }
+
+ pd->num_cs = num_cs;
+ pd->src_clk_nr = src_clk_nr;
+ pd->src_clk_name = s5p6440_spi_src_clks[src_clk_nr];
+}
+
+void __init s5p6450_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
+{
+ struct s3c64x0_spi_info *pd;
+
+ /* Reject invalid configuration */
+ if (!num_cs || src_clk_nr < 0
+ || src_clk_nr > S5P6450_SPI_SRCCLK_SCLK) {
+ printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
+ return;
+ }
+
+ switch (cntrlr) {
+ case 0:
+ pd = &s5p6450_spi0_pdata;
+ break;
+ case 1:
+ pd = &s5p6450_spi1_pdata;
+ break;
+ default:
+ printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
+ __func__, cntrlr);
+ return;
+ }
+
+ pd->num_cs = num_cs;
+ pd->src_clk_nr = src_clk_nr;
+ pd->src_clk_name = s5p6450_spi_src_clks[src_clk_nr];
+}
diff --git a/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
new file mode 100644
index 0000000..170a20a
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
@@ -0,0 +1,20 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Copyright (C) 2010 Samsung Electronics Co. Ltd.
+ * Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_SPI_CLKS_H
+#define __ASM_ARCH_SPI_CLKS_H __FILE__
+
+#define S5P64X0_SPI_SRCCLK_PCLK 0
+#define S5P64X0_SPI_SRCCLK_SCLK 1
+
+#endif /* __ASM_ARCH_SPI_CLKS_H */
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 85f6f23..10d0d3c 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -67,6 +67,8 @@ extern struct platform_device s5pv210_device_spi0;
extern struct platform_device s5pv210_device_spi1;
extern struct platform_device s5p6440_device_spi0;
extern struct platform_device s5p6440_device_spi1;
+extern struct platform_device s5p6450_device_spi0;
+extern struct platform_device s5p6450_device_spi1;
extern struct platform_device s3c_device_hwmon;
@@ -95,6 +97,9 @@ extern struct platform_device s5p6442_device_spi;
extern struct platform_device s5p6440_device_pcm;
extern struct platform_device s5p6440_device_iis;
+extern struct platform_device s5p6450_device_iis0;
+extern struct platform_device s5p6450_device_pcm0;
+
extern struct platform_device s5pc100_device_ac97;
extern struct platform_device s5pc100_device_pcm0;
extern struct platform_device s5pc100_device_pcm1;
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 07/13] ARM: S5P64X0: Update Audio support
@ 2010-09-01 7:09 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel
This patch updates Audio and SPI for S5P6440 and S5P6450 SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Jassi Brar <jassi.brar@samsung.com>
---
arch/arm/mach-s5p6440/dev-audio.c | 127 -----------
arch/arm/mach-s5p6440/dev-spi.c | 176 ---------------
arch/arm/mach-s5p6440/include/mach/spi-clocks.h | 17 --
arch/arm/mach-s5p64x0/dev-audio.c | 164 ++++++++++++++
arch/arm/mach-s5p64x0/dev-spi.c | 275 +++++++++++++++++++++++
arch/arm/mach-s5p64x0/include/mach/spi-clocks.h | 20 ++
arch/arm/plat-samsung/include/plat/devs.h | 5 +
7 files changed, 464 insertions(+), 320 deletions(-)
delete mode 100644 arch/arm/mach-s5p6440/dev-audio.c
delete mode 100644 arch/arm/mach-s5p6440/dev-spi.c
delete mode 100644 arch/arm/mach-s5p6440/include/mach/spi-clocks.h
create mode 100644 arch/arm/mach-s5p64x0/dev-audio.c
create mode 100644 arch/arm/mach-s5p64x0/dev-spi.c
create mode 100644 arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
diff --git a/arch/arm/mach-s5p6440/dev-audio.c b/arch/arm/mach-s5p6440/dev-audio.c
deleted file mode 100644
index 3ca0d2b..0000000
--- a/arch/arm/mach-s5p6440/dev-audio.c
+++ /dev/null
@@ -1,127 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/dev-audio.c
- *
- * Copyright (c) 2010 Samsung Electronics Co. Ltd
- * Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-
-#include <plat/gpio-cfg.h>
-#include <plat/audio.h>
-
-#include <mach/map.h>
-#include <mach/dma.h>
-#include <mach/irqs.h>
-
-static int s5p6440_cfg_i2s(struct platform_device *pdev)
-{
- /* configure GPIO for i2s port */
- switch (pdev->id) {
- case -1:
- s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5));
- s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5));
- s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5));
- s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5));
- s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5));
- s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5));
- s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5));
- break;
-
- default:
- printk(KERN_ERR "Invalid Device %d\n", pdev->id);
- return -EINVAL;
- }
-
- return 0;
-}
-
-static struct s3c_audio_pdata s3c_i2s_pdata = {
- .cfg_gpio = s5p6440_cfg_i2s,
-};
-
-static struct resource s5p6440_iis0_resource[] = {
- [0] = {
- .start = S5P6440_PA_I2S,
- .end = S5P6440_PA_I2S + 0x100 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = DMACH_I2S0_TX,
- .end = DMACH_I2S0_TX,
- .flags = IORESOURCE_DMA,
- },
- [2] = {
- .start = DMACH_I2S0_RX,
- .end = DMACH_I2S0_RX,
- .flags = IORESOURCE_DMA,
- },
-};
-
-struct platform_device s5p6440_device_iis = {
- .name = "s3c64xx-iis-v4",
- .id = -1,
- .num_resources = ARRAY_SIZE(s5p6440_iis0_resource),
- .resource = s5p6440_iis0_resource,
- .dev = {
- .platform_data = &s3c_i2s_pdata,
- },
-};
-
-/* PCM Controller platform_devices */
-
-static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev)
-{
- switch (pdev->id) {
- case 0:
- s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2));
- break;
-
- default:
- printk(KERN_DEBUG "Invalid PCM Controller number!");
- return -EINVAL;
- }
-
- return 0;
-}
-
-static struct s3c_audio_pdata s3c_pcm_pdata = {
- .cfg_gpio = s5p6440_pcm_cfg_gpio,
-};
-
-static struct resource s5p6440_pcm0_resource[] = {
- [0] = {
- .start = S5P6440_PA_PCM,
- .end = S5P6440_PA_PCM + 0x100 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = DMACH_PCM0_TX,
- .end = DMACH_PCM0_TX,
- .flags = IORESOURCE_DMA,
- },
- [2] = {
- .start = DMACH_PCM0_RX,
- .end = DMACH_PCM0_RX,
- .flags = IORESOURCE_DMA,
- },
-};
-
-struct platform_device s5p6440_device_pcm = {
- .name = "samsung-pcm",
- .id = 0,
- .num_resources = ARRAY_SIZE(s5p6440_pcm0_resource),
- .resource = s5p6440_pcm0_resource,
- .dev = {
- .platform_data = &s3c_pcm_pdata,
- },
-};
diff --git a/arch/arm/mach-s5p6440/dev-spi.c b/arch/arm/mach-s5p6440/dev-spi.c
deleted file mode 100644
index 510af44..0000000
--- a/arch/arm/mach-s5p6440/dev-spi.c
+++ /dev/null
@@ -1,176 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/dev-spi.c
- *
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- * Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-#include <linux/gpio.h>
-
-#include <mach/dma.h>
-#include <mach/map.h>
-#include <mach/irqs.h>
-#include <mach/spi-clocks.h>
-
-#include <plat/s3c64xx-spi.h>
-#include <plat/gpio-cfg.h>
-
-static char *spi_src_clks[] = {
- [S5P6440_SPI_SRCCLK_PCLK] = "pclk",
- [S5P6440_SPI_SRCCLK_SCLK] = "spi_epll",
-};
-
-/* SPI Controller platform_devices */
-
-/* Since we emulate multi-cs capability, we do not touch the CS.
- * The emulated CS is toggled by board specific mechanism, as it can
- * be either some immediate GPIO or some signal out of some other
- * chip in between ... or some yet another way.
- * We simply do not assume anything about CS.
- */
-static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
-{
- switch (pdev->id) {
- case 0:
- s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2));
- s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP);
- s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP);
- s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP);
- break;
-
- case 1:
- s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2));
- s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2));
- s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP);
- s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP);
- s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP);
- break;
-
- default:
- dev_err(&pdev->dev, "Invalid SPI Controller number!");
- return -EINVAL;
- }
-
- return 0;
-}
-
-static struct resource s5p6440_spi0_resource[] = {
- [0] = {
- .start = S5P6440_PA_SPI0,
- .end = S5P6440_PA_SPI0 + 0x100 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = DMACH_SPI0_TX,
- .end = DMACH_SPI0_TX,
- .flags = IORESOURCE_DMA,
- },
- [2] = {
- .start = DMACH_SPI0_RX,
- .end = DMACH_SPI0_RX,
- .flags = IORESOURCE_DMA,
- },
- [3] = {
- .start = IRQ_SPI0,
- .end = IRQ_SPI0,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct s3c64xx_spi_info s5p6440_spi0_pdata = {
- .cfg_gpio = s5p6440_spi_cfg_gpio,
- .fifo_lvl_mask = 0x1ff,
- .rx_lvl_offset = 15,
-};
-
-static u64 spi_dmamask = DMA_BIT_MASK(32);
-
-struct platform_device s5p6440_device_spi0 = {
- .name = "s3c64xx-spi",
- .id = 0,
- .num_resources = ARRAY_SIZE(s5p6440_spi0_resource),
- .resource = s5p6440_spi0_resource,
- .dev = {
- .dma_mask = &spi_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = &s5p6440_spi0_pdata,
- },
-};
-
-static struct resource s5p6440_spi1_resource[] = {
- [0] = {
- .start = S5P6440_PA_SPI1,
- .end = S5P6440_PA_SPI1 + 0x100 - 1,
- .flags = IORESOURCE_MEM,
- },
- [1] = {
- .start = DMACH_SPI1_TX,
- .end = DMACH_SPI1_TX,
- .flags = IORESOURCE_DMA,
- },
- [2] = {
- .start = DMACH_SPI1_RX,
- .end = DMACH_SPI1_RX,
- .flags = IORESOURCE_DMA,
- },
- [3] = {
- .start = IRQ_SPI1,
- .end = IRQ_SPI1,
- .flags = IORESOURCE_IRQ,
- },
-};
-
-static struct s3c64xx_spi_info s5p6440_spi1_pdata = {
- .cfg_gpio = s5p6440_spi_cfg_gpio,
- .fifo_lvl_mask = 0x7f,
- .rx_lvl_offset = 15,
-};
-
-struct platform_device s5p6440_device_spi1 = {
- .name = "s3c64xx-spi",
- .id = 1,
- .num_resources = ARRAY_SIZE(s5p6440_spi1_resource),
- .resource = s5p6440_spi1_resource,
- .dev = {
- .dma_mask = &spi_dmamask,
- .coherent_dma_mask = DMA_BIT_MASK(32),
- .platform_data = &s5p6440_spi1_pdata,
- },
-};
-
-void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
-{
- struct s3c64xx_spi_info *pd;
-
- /* Reject invalid configuration */
- if (!num_cs || src_clk_nr < 0
- || src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) {
- printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
- return;
- }
-
- switch (cntrlr) {
- case 0:
- pd = &s5p6440_spi0_pdata;
- break;
- case 1:
- pd = &s5p6440_spi1_pdata;
- break;
- default:
- printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
- __func__, cntrlr);
- return;
- }
-
- pd->num_cs = num_cs;
- pd->src_clk_nr = src_clk_nr;
- pd->src_clk_name = spi_src_clks[src_clk_nr];
-}
diff --git a/arch/arm/mach-s5p6440/include/mach/spi-clocks.h b/arch/arm/mach-s5p6440/include/mach/spi-clocks.h
deleted file mode 100644
index 5fbca50..0000000
--- a/arch/arm/mach-s5p6440/include/mach/spi-clocks.h
+++ /dev/null
@@ -1,17 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/spi-clocks.h
- *
- * Copyright (C) 2010 Samsung Electronics Co. Ltd.
- * Jaswinder Singh <jassi.brar@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __S5P6440_PLAT_SPI_CLKS_H
-#define __S5P6440_PLAT_SPI_CLKS_H __FILE__
-
-#define S5P6440_SPI_SRCCLK_PCLK 0
-#define S5P6440_SPI_SRCCLK_SCLK 1
-
-#endif /* __S5P6440_PLAT_SPI_CLKS_H */
diff --git a/arch/arm/mach-s5p64x0/dev-audio.c b/arch/arm/mach-s5p64x0/dev-audio.c
new file mode 100644
index 0000000..ac7cfce
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/dev-audio.c
@@ -0,0 +1,164 @@
+/* linux/arch/arm/mach-s5p64x0/dev-audio.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co. Ltd
+ * Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/gpio.h>
+
+#include <plat/gpio-cfg.h>
+#include <plat/audio.h>
+
+#include <mach/map.h>
+#include <mach/dma.h>
+#include <mach/irqs.h>
+
+static int s5p6440_cfg_i2s(struct platform_device *pdev)
+{
+ /* configure GPIO for i2s port */
+ switch (pdev->id) {
+ case -1:
+ s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5));
+ break;
+
+ default:
+ printk(KERN_ERR "Invalid Device %d\n", pdev->id);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int s5p6450_cfg_i2s(struct platform_device *pdev)
+{
+ /* configure GPIO for i2s port */
+ switch (pdev->id) {
+ case -1:
+ s3c_gpio_cfgpin(S5P6450_GPB(4), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6450_GPR(4), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6450_GPR(5), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6450_GPR(6), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6450_GPR(7), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6450_GPR(8), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6450_GPR(13), S3C_GPIO_SFN(5));
+ s3c_gpio_cfgpin(S5P6450_GPR(14), S3C_GPIO_SFN(5));
+ break;
+
+ default:
+ printk(KERN_ERR "Invalid Device %d\n", pdev->id);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static struct s3c_audio_pdata s5p6440_i2s_pdata = {
+ .cfg_gpio = s5p6440_cfg_i2s,
+};
+
+static struct s3c_audio_pdata s5p6450_i2s_pdata = {
+ .cfg_gpio = s5p6450_cfg_i2s,
+};
+
+static struct resource s5p64x0_iis0_resource[] = {
+ [0] = {
+ .start = S5P64X0_PA_I2S,
+ .end = S5P64X0_PA_I2S + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = DMACH_I2S0_TX,
+ .end = DMACH_I2S0_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = DMACH_I2S0_RX,
+ .end = DMACH_I2S0_RX,
+ .flags = IORESOURCE_DMA,
+ },
+};
+
+struct platform_device s5p6440_device_iis = {
+ .name = "s3c64x0-iis-v4",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource),
+ .resource = s5p64x0_iis0_resource,
+ .dev = {
+ .platform_data = &s5p6440_i2s_pdata,
+ },
+};
+
+struct platform_device s5p6450_device_iis0 = {
+ .name = "s3c64x0-iis-v4",
+ .id = -1,
+ .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource),
+ .resource = s5p64x0_iis0_resource,
+ .dev = {
+ .platform_data = &s5p6450_i2s_pdata,
+ },
+};
+
+/* PCM Controller platform_devices */
+
+static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev)
+{
+ switch (pdev->id) {
+ case 0:
+ s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2));
+ break;
+
+ default:
+ printk(KERN_DEBUG "Invalid PCM Controller number!");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static struct s3c_audio_pdata s5p6440_pcm_pdata = {
+ .cfg_gpio = s5p6440_pcm_cfg_gpio,
+};
+
+static struct resource s5p6440_pcm0_resource[] = {
+ [0] = {
+ .start = S5P64X0_PA_PCM,
+ .end = S5P64X0_PA_PCM + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = DMACH_PCM0_TX,
+ .end = DMACH_PCM0_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = DMACH_PCM0_RX,
+ .end = DMACH_PCM0_RX,
+ .flags = IORESOURCE_DMA,
+ },
+};
+
+struct platform_device s5p6440_device_pcm = {
+ .name = "samsung-pcm",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(s5p6440_pcm0_resource),
+ .resource = s5p6440_pcm0_resource,
+ .dev = {
+ .platform_data = &s5p6440_pcm_pdata,
+ },
+};
diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c
new file mode 100644
index 0000000..7303d3a
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/dev-spi.c
@@ -0,0 +1,275 @@
+/* linux/arch/arm/mach-s5p64x0/dev-spi.c
+ *
+ * Copyright (C) 2010 Samsung Electronics Co. Ltd.
+ * Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/platform_device.h>
+#include <linux/dma-mapping.h>
+#include <linux/gpio.h>
+
+#include <mach/dma.h>
+#include <mach/map.h>
+#include <mach/irqs.h>
+#include <mach/spi-clocks.h>
+
+#include <plat/s3c64x0-spi.h>
+#include <plat/gpio-cfg.h>
+
+static char *s5p6440_spi_src_clks[] = {
+ [S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
+ [S5P64X0_SPI_SRCCLK_SCLK] = "spi_epll",
+};
+
+static char *s5p6450_spi_src_clks[] = {
+ [S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
+ [S5P64X0_SPI_SRCCLK_SCLK] = "sclk_spi",
+};
+
+/* SPI Controller platform_devices */
+
+/* Since we emulate multi-cs capability, we do not touch the CS.
+ * The emulated CS is toggled by board specific mechanism, as it can
+ * be either some immediate GPIO or some signal out of some other
+ * chip in between ... or some yet another way.
+ * We simply do not assume anything about CS.
+ */
+static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
+{
+ switch (pdev->id) {
+ case 0:
+ s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP);
+ break;
+
+ case 1:
+ s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP);
+ break;
+
+ default:
+ dev_err(&pdev->dev, "Invalid SPI Controller number!");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int s5p6450_spi_cfg_gpio(struct platform_device *pdev)
+{
+ switch (pdev->id) {
+ case 0:
+ s3c_gpio_cfgpin(S5P6450_GPC(0), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6450_GPC(1), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6450_GPC(2), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(S5P6450_GPC(0), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6450_GPC(1), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6450_GPC(2), S3C_GPIO_PULL_UP);
+ break;
+
+ case 1:
+ s3c_gpio_cfgpin(S5P6450_GPC(4), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6450_GPC(5), S3C_GPIO_SFN(2));
+ s3c_gpio_cfgpin(S5P6450_GPC(6), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(S5P6450_GPC(4), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6450_GPC(5), S3C_GPIO_PULL_UP);
+ s3c_gpio_setpull(S5P6450_GPC(6), S3C_GPIO_PULL_UP);
+ break;
+
+ default:
+ dev_err(&pdev->dev, "Invalid SPI Controller number!");
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static struct resource s5p64x0_spi0_resource[] = {
+ [0] = {
+ .start = S5P64X0_PA_SPI0,
+ .end = S5P64X0_PA_SPI0 + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = DMACH_SPI0_TX,
+ .end = DMACH_SPI0_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = DMACH_SPI0_RX,
+ .end = DMACH_SPI0_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .start = IRQ_SPI0,
+ .end = IRQ_SPI0,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct s3c64x0_spi_info s5p6440_spi0_pdata = {
+ .cfg_gpio = s5p6440_spi_cfg_gpio,
+ .fifo_lvl_mask = 0x1ff,
+ .rx_lvl_offset = 15,
+};
+
+static struct s3c64x0_spi_info s5p6450_spi0_pdata = {
+ .cfg_gpio = s5p6450_spi_cfg_gpio,
+ .fifo_lvl_mask = 0x1ff,
+ .rx_lvl_offset = 15,
+};
+
+static u64 spi_dmamask = DMA_BIT_MASK(32);
+
+struct platform_device s5p6440_device_spi0 = {
+ .name = "s3c64x0-spi",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource),
+ .resource = s5p64x0_spi0_resource,
+ .dev = {
+ .dma_mask = &spi_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &s5p6440_spi0_pdata,
+ },
+};
+
+struct platform_device s5p6450_device_spi0 = {
+ .name = "s3c64x0-spi",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource),
+ .resource = s5p64x0_spi0_resource,
+ .dev = {
+ .dma_mask = &spi_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &s5p6450_spi0_pdata,
+ },
+};
+
+static struct resource s5p64x0_spi1_resource[] = {
+ [0] = {
+ .start = S5P64X0_PA_SPI1,
+ .end = S5P64X0_PA_SPI1 + 0x100 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = DMACH_SPI1_TX,
+ .end = DMACH_SPI1_TX,
+ .flags = IORESOURCE_DMA,
+ },
+ [2] = {
+ .start = DMACH_SPI1_RX,
+ .end = DMACH_SPI1_RX,
+ .flags = IORESOURCE_DMA,
+ },
+ [3] = {
+ .start = IRQ_SPI1,
+ .end = IRQ_SPI1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct s3c64x0_spi_info s5p6440_spi1_pdata = {
+ .cfg_gpio = s5p6440_spi_cfg_gpio,
+ .fifo_lvl_mask = 0x7f,
+ .rx_lvl_offset = 15,
+};
+
+static struct s3c64x0_spi_info s5p6450_spi1_pdata = {
+ .cfg_gpio = s5p6450_spi_cfg_gpio,
+ .fifo_lvl_mask = 0x7f,
+ .rx_lvl_offset = 15,
+};
+
+struct platform_device s5p6440_device_spi1 = {
+ .name = "s3c64x0-spi",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource),
+ .resource = s5p64x0_spi1_resource,
+ .dev = {
+ .dma_mask = &spi_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &s5p6440_spi1_pdata,
+ },
+};
+
+struct platform_device s5p6450_device_spi1 = {
+ .name = "s3c64x0-spi",
+ .id = 1,
+ .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource),
+ .resource = s5p64x0_spi1_resource,
+ .dev = {
+ .dma_mask = &spi_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &s5p6450_spi1_pdata,
+ },
+};
+
+void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
+{
+ struct s3c64x0_spi_info *pd;
+
+ /* Reject invalid configuration */
+ if (!num_cs || src_clk_nr < 0
+ || src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) {
+ printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
+ return;
+ }
+
+ switch (cntrlr) {
+ case 0:
+ pd = &s5p6440_spi0_pdata;
+ break;
+ case 1:
+ pd = &s5p6440_spi1_pdata;
+ break;
+ default:
+ printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
+ __func__, cntrlr);
+ return;
+ }
+
+ pd->num_cs = num_cs;
+ pd->src_clk_nr = src_clk_nr;
+ pd->src_clk_name = s5p6440_spi_src_clks[src_clk_nr];
+}
+
+void __init s5p6450_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
+{
+ struct s3c64x0_spi_info *pd;
+
+ /* Reject invalid configuration */
+ if (!num_cs || src_clk_nr < 0
+ || src_clk_nr > S5P6450_SPI_SRCCLK_SCLK) {
+ printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
+ return;
+ }
+
+ switch (cntrlr) {
+ case 0:
+ pd = &s5p6450_spi0_pdata;
+ break;
+ case 1:
+ pd = &s5p6450_spi1_pdata;
+ break;
+ default:
+ printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
+ __func__, cntrlr);
+ return;
+ }
+
+ pd->num_cs = num_cs;
+ pd->src_clk_nr = src_clk_nr;
+ pd->src_clk_name = s5p6450_spi_src_clks[src_clk_nr];
+}
diff --git a/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
new file mode 100644
index 0000000..170a20a
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
@@ -0,0 +1,20 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * Copyright (C) 2010 Samsung Electronics Co. Ltd.
+ * Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_SPI_CLKS_H
+#define __ASM_ARCH_SPI_CLKS_H __FILE__
+
+#define S5P64X0_SPI_SRCCLK_PCLK 0
+#define S5P64X0_SPI_SRCCLK_SCLK 1
+
+#endif /* __ASM_ARCH_SPI_CLKS_H */
diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
index 85f6f23..10d0d3c 100644
--- a/arch/arm/plat-samsung/include/plat/devs.h
+++ b/arch/arm/plat-samsung/include/plat/devs.h
@@ -67,6 +67,8 @@ extern struct platform_device s5pv210_device_spi0;
extern struct platform_device s5pv210_device_spi1;
extern struct platform_device s5p6440_device_spi0;
extern struct platform_device s5p6440_device_spi1;
+extern struct platform_device s5p6450_device_spi0;
+extern struct platform_device s5p6450_device_spi1;
extern struct platform_device s3c_device_hwmon;
@@ -95,6 +97,9 @@ extern struct platform_device s5p6442_device_spi;
extern struct platform_device s5p6440_device_pcm;
extern struct platform_device s5p6440_device_iis;
+extern struct platform_device s5p6450_device_iis0;
+extern struct platform_device s5p6450_device_pcm0;
+
extern struct platform_device s5pc100_device_ac97;
extern struct platform_device s5pc100_device_pcm0;
extern struct platform_device s5pc100_device_pcm1;
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 08/13] ARM: S5P64X0: Move DMA support for S5P64X0
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 7:09 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel, linux-samsung-soc; +Cc: ben-linux, Kukjin Kim, Jassi Brar
This patch moves DMA support files in the mach-s5p64x0
for S5P6440 and S5P6450 SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Jassi Brar <jassi.brar@samsung.com>
---
arch/arm/{mach-s5p6440 => mach-s5p64x0}/dma.c | 75 ++++++++++++++++---
.../include/mach/dma.h | 0
arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h | 28 +++++++
3 files changed, 91 insertions(+), 12 deletions(-)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/dma.c (56%)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/dma.h (100%)
diff --git a/arch/arm/mach-s5p6440/dma.c b/arch/arm/mach-s5p64x0/dma.c
similarity index 56%
rename from arch/arm/mach-s5p6440/dma.c
rename to arch/arm/mach-s5p64x0/dma.c
index 07606ad..bc84678 100644
--- a/arch/arm/mach-s5p6440/dma.c
+++ b/arch/arm/mach-s5p64x0/dma.c
@@ -1,4 +1,5 @@
-/*
+/* linux/arch/arm/mach-s5p64x0/dma.c
+ *
* Copyright (C) 2010 Samsung Electronics Co. Ltd.
* Jaswinder Singh <jassi.brar@samsung.com>
*
@@ -15,7 +16,7 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
+*/
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
@@ -30,11 +31,11 @@
static u64 dma_dmamask = DMA_BIT_MASK(32);
-static struct resource s5p6440_pdma_resource[] = {
+static struct resource s5p64x0_pdma_resource[] = {
[0] = {
- .start = S5P6440_PA_PDMA,
- .end = S5P6440_PA_PDMA + SZ_4K,
- .flags = IORESOURCE_MEM,
+ .start = S5P64X0_PA_PDMA,
+ .end = S5P64X0_PA_PDMA + SZ_4K,
+ .flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_DMA0,
@@ -80,11 +81,48 @@ static struct s3c_pl330_platdata s5p6440_pdma_pdata = {
},
};
+static struct s3c_pl330_platdata s5p6450_pdma_pdata = {
+ .peri = {
+ [0] = DMACH_UART0_RX,
+ [1] = DMACH_UART0_TX,
+ [2] = DMACH_UART1_RX,
+ [3] = DMACH_UART1_TX,
+ [4] = DMACH_UART2_RX,
+ [5] = DMACH_UART2_TX,
+ [6] = DMACH_UART3_RX,
+ [7] = DMACH_UART3_TX,
+ [8] = DMACH_UART4_RX,
+ [9] = DMACH_UART4_TX,
+ [10] = DMACH_PCM0_TX,
+ [11] = DMACH_PCM0_RX,
+ [12] = DMACH_I2S0_TX,
+ [13] = DMACH_I2S0_RX,
+ [14] = DMACH_SPI0_TX,
+ [15] = DMACH_SPI0_RX,
+ [16] = DMACH_PCM1_TX,
+ [17] = DMACH_PCM1_RX,
+ [18] = DMACH_PCM2_TX,
+ [19] = DMACH_PCM2_RX,
+ [20] = DMACH_SPI1_TX,
+ [21] = DMACH_SPI1_RX,
+ [22] = DMACH_USI_TX,
+ [23] = DMACH_USI_RX,
+ [24] = DMACH_MAX,
+ [25] = DMACH_I2S1_TX,
+ [26] = DMACH_I2S1_RX,
+ [27] = DMACH_I2S2_TX,
+ [28] = DMACH_I2S2_RX,
+ [29] = DMACH_PWM,
+ [30] = DMACH_UART5_RX,
+ [31] = DMACH_UART5_TX,
+ },
+};
+
static struct platform_device s5p6440_device_pdma = {
.name = "s3c-pl330",
.id = 1,
- .num_resources = ARRAY_SIZE(s5p6440_pdma_resource),
- .resource = s5p6440_pdma_resource,
+ .num_resources = ARRAY_SIZE(s5p64x0_pdma_resource),
+ .resource = s5p64x0_pdma_resource,
.dev = {
.dma_mask = &dma_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
@@ -92,14 +130,27 @@ static struct platform_device s5p6440_device_pdma = {
},
};
-static struct platform_device *s5p6440_dmacs[] __initdata = {
+static struct platform_device s5p6450_device_pdma = {
+ .name = "s3c-pl330",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(s5p64x0_pdma_resource),
+ .resource = s5p64x0_pdma_resource,
+ .dev = {
+ .dma_mask = &dma_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &s5p6450_pdma_pdata,
+ },
+};
+
+static struct platform_device *s5p64x0_dmacs[] __initdata = {
&s5p6440_device_pdma,
+ /* &s5p6450_device_pdma will be added */
};
-static int __init s5p6440_dma_init(void)
+static int __init s5p64x0_dma_init(void)
{
- platform_add_devices(s5p6440_dmacs, ARRAY_SIZE(s5p6440_dmacs));
+ platform_add_devices(s5p64x0_dmacs, ARRAY_SIZE(s5p64x0_dmacs));
return 0;
}
-arch_initcall(s5p6440_dma_init);
+arch_initcall(s5p64x0_dma_init);
diff --git a/arch/arm/mach-s5p6440/include/mach/dma.h b/arch/arm/mach-s5p64x0/include/mach/dma.h
similarity index 100%
rename from arch/arm/mach-s5p6440/include/mach/dma.h
rename to arch/arm/mach-s5p64x0/include/mach/dma.h
diff --git a/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h b/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h
index 5fe6721..333e381 100644
--- a/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h
+++ b/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h
@@ -32,6 +32,12 @@ enum dma_ch {
DMACH_UART2_TX,
DMACH_UART3_RX,
DMACH_UART3_TX,
+ DMACH_UART4_RX,
+ DMACH_UART4_TX,
+ DMACH_UART5_RX,
+ DMACH_UART5_TX,
+ DMACH_USI_RX,
+ DMACH_USI_TX,
DMACH_IRDA,
DMACH_I2S0_RX,
DMACH_I2S0_TX,
@@ -64,6 +70,28 @@ enum dma_ch {
DMACH_MSM_REQ2,
DMACH_MSM_REQ1,
DMACH_MSM_REQ0,
+ DMACH_SLIMBUS0_RX,
+ DMACH_SLIMBUS0_TX,
+ DMACH_SLIMBUS0AUX_RX,
+ DMACH_SLIMBUS0AUX_TX,
+ DMACH_SLIMBUS1_RX,
+ DMACH_SLIMBUS1_TX,
+ DMACH_SLIMBUS2_RX,
+ DMACH_SLIMBUS2_TX,
+ DMACH_SLIMBUS3_RX,
+ DMACH_SLIMBUS3_TX,
+ DMACH_SLIMBUS4_RX,
+ DMACH_SLIMBUS4_TX,
+ DMACH_SLIMBUS5_RX,
+ DMACH_SLIMBUS5_TX,
+ DMACH_MTOM_0,
+ DMACH_MTOM_1,
+ DMACH_MTOM_2,
+ DMACH_MTOM_3,
+ DMACH_MTOM_4,
+ DMACH_MTOM_5,
+ DMACH_MTOM_6,
+ DMACH_MTOM_7,
/* END Marker, also used to denote a reserved channel */
DMACH_MAX,
};
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 08/13] ARM: S5P64X0: Move DMA support for S5P64X0
@ 2010-09-01 7:09 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel
This patch moves DMA support files in the mach-s5p64x0
for S5P6440 and S5P6450 SoCs.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Jassi Brar <jassi.brar@samsung.com>
---
arch/arm/{mach-s5p6440 => mach-s5p64x0}/dma.c | 75 ++++++++++++++++---
.../include/mach/dma.h | 0
arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h | 28 +++++++
3 files changed, 91 insertions(+), 12 deletions(-)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/dma.c (56%)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/dma.h (100%)
diff --git a/arch/arm/mach-s5p6440/dma.c b/arch/arm/mach-s5p64x0/dma.c
similarity index 56%
rename from arch/arm/mach-s5p6440/dma.c
rename to arch/arm/mach-s5p64x0/dma.c
index 07606ad..bc84678 100644
--- a/arch/arm/mach-s5p6440/dma.c
+++ b/arch/arm/mach-s5p64x0/dma.c
@@ -1,4 +1,5 @@
-/*
+/* linux/arch/arm/mach-s5p64x0/dma.c
+ *
* Copyright (C) 2010 Samsung Electronics Co. Ltd.
* Jaswinder Singh <jassi.brar@samsung.com>
*
@@ -15,7 +16,7 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- */
+*/
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
@@ -30,11 +31,11 @@
static u64 dma_dmamask = DMA_BIT_MASK(32);
-static struct resource s5p6440_pdma_resource[] = {
+static struct resource s5p64x0_pdma_resource[] = {
[0] = {
- .start = S5P6440_PA_PDMA,
- .end = S5P6440_PA_PDMA + SZ_4K,
- .flags = IORESOURCE_MEM,
+ .start = S5P64X0_PA_PDMA,
+ .end = S5P64X0_PA_PDMA + SZ_4K,
+ .flags = IORESOURCE_MEM,
},
[1] = {
.start = IRQ_DMA0,
@@ -80,11 +81,48 @@ static struct s3c_pl330_platdata s5p6440_pdma_pdata = {
},
};
+static struct s3c_pl330_platdata s5p6450_pdma_pdata = {
+ .peri = {
+ [0] = DMACH_UART0_RX,
+ [1] = DMACH_UART0_TX,
+ [2] = DMACH_UART1_RX,
+ [3] = DMACH_UART1_TX,
+ [4] = DMACH_UART2_RX,
+ [5] = DMACH_UART2_TX,
+ [6] = DMACH_UART3_RX,
+ [7] = DMACH_UART3_TX,
+ [8] = DMACH_UART4_RX,
+ [9] = DMACH_UART4_TX,
+ [10] = DMACH_PCM0_TX,
+ [11] = DMACH_PCM0_RX,
+ [12] = DMACH_I2S0_TX,
+ [13] = DMACH_I2S0_RX,
+ [14] = DMACH_SPI0_TX,
+ [15] = DMACH_SPI0_RX,
+ [16] = DMACH_PCM1_TX,
+ [17] = DMACH_PCM1_RX,
+ [18] = DMACH_PCM2_TX,
+ [19] = DMACH_PCM2_RX,
+ [20] = DMACH_SPI1_TX,
+ [21] = DMACH_SPI1_RX,
+ [22] = DMACH_USI_TX,
+ [23] = DMACH_USI_RX,
+ [24] = DMACH_MAX,
+ [25] = DMACH_I2S1_TX,
+ [26] = DMACH_I2S1_RX,
+ [27] = DMACH_I2S2_TX,
+ [28] = DMACH_I2S2_RX,
+ [29] = DMACH_PWM,
+ [30] = DMACH_UART5_RX,
+ [31] = DMACH_UART5_TX,
+ },
+};
+
static struct platform_device s5p6440_device_pdma = {
.name = "s3c-pl330",
.id = 1,
- .num_resources = ARRAY_SIZE(s5p6440_pdma_resource),
- .resource = s5p6440_pdma_resource,
+ .num_resources = ARRAY_SIZE(s5p64x0_pdma_resource),
+ .resource = s5p64x0_pdma_resource,
.dev = {
.dma_mask = &dma_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
@@ -92,14 +130,27 @@ static struct platform_device s5p6440_device_pdma = {
},
};
-static struct platform_device *s5p6440_dmacs[] __initdata = {
+static struct platform_device s5p6450_device_pdma = {
+ .name = "s3c-pl330",
+ .id = 0,
+ .num_resources = ARRAY_SIZE(s5p64x0_pdma_resource),
+ .resource = s5p64x0_pdma_resource,
+ .dev = {
+ .dma_mask = &dma_dmamask,
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ .platform_data = &s5p6450_pdma_pdata,
+ },
+};
+
+static struct platform_device *s5p64x0_dmacs[] __initdata = {
&s5p6440_device_pdma,
+ /* &s5p6450_device_pdma will be added */
};
-static int __init s5p6440_dma_init(void)
+static int __init s5p64x0_dma_init(void)
{
- platform_add_devices(s5p6440_dmacs, ARRAY_SIZE(s5p6440_dmacs));
+ platform_add_devices(s5p64x0_dmacs, ARRAY_SIZE(s5p64x0_dmacs));
return 0;
}
-arch_initcall(s5p6440_dma_init);
+arch_initcall(s5p64x0_dma_init);
diff --git a/arch/arm/mach-s5p6440/include/mach/dma.h b/arch/arm/mach-s5p64x0/include/mach/dma.h
similarity index 100%
rename from arch/arm/mach-s5p6440/include/mach/dma.h
rename to arch/arm/mach-s5p64x0/include/mach/dma.h
diff --git a/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h b/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h
index 5fe6721..333e381 100644
--- a/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h
+++ b/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h
@@ -32,6 +32,12 @@ enum dma_ch {
DMACH_UART2_TX,
DMACH_UART3_RX,
DMACH_UART3_TX,
+ DMACH_UART4_RX,
+ DMACH_UART4_TX,
+ DMACH_UART5_RX,
+ DMACH_UART5_TX,
+ DMACH_USI_RX,
+ DMACH_USI_TX,
DMACH_IRDA,
DMACH_I2S0_RX,
DMACH_I2S0_TX,
@@ -64,6 +70,28 @@ enum dma_ch {
DMACH_MSM_REQ2,
DMACH_MSM_REQ1,
DMACH_MSM_REQ0,
+ DMACH_SLIMBUS0_RX,
+ DMACH_SLIMBUS0_TX,
+ DMACH_SLIMBUS0AUX_RX,
+ DMACH_SLIMBUS0AUX_TX,
+ DMACH_SLIMBUS1_RX,
+ DMACH_SLIMBUS1_TX,
+ DMACH_SLIMBUS2_RX,
+ DMACH_SLIMBUS2_TX,
+ DMACH_SLIMBUS3_RX,
+ DMACH_SLIMBUS3_TX,
+ DMACH_SLIMBUS4_RX,
+ DMACH_SLIMBUS4_TX,
+ DMACH_SLIMBUS5_RX,
+ DMACH_SLIMBUS5_TX,
+ DMACH_MTOM_0,
+ DMACH_MTOM_1,
+ DMACH_MTOM_2,
+ DMACH_MTOM_3,
+ DMACH_MTOM_4,
+ DMACH_MTOM_5,
+ DMACH_MTOM_6,
+ DMACH_MTOM_7,
/* END Marker, also used to denote a reserved channel */
DMACH_MAX,
};
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 09/13] ARM: S5P64X0: Add S5P6450 I2C support
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 7:09 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel, linux-samsung-soc; +Cc: ben-linux, Kukjin Kim
This patch adds S5P6450 I2C support in the ARCH_S5P64X0. And
moves S5P6440 I2C support files into the mach-s5p64x0 together.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/mach-s5p64x0/include/mach/i2c.h | 17 ++++++++++++++
.../{mach-s5p6440 => mach-s5p64x0}/setup-i2c0.c | 24 +++++++++++++++-----
.../{mach-s5p6440 => mach-s5p64x0}/setup-i2c1.c | 20 +++++++++++++---
3 files changed, 51 insertions(+), 10 deletions(-)
create mode 100644 arch/arm/mach-s5p64x0/include/mach/i2c.h
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/setup-i2c0.c (52%)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/setup-i2c1.c (55%)
diff --git a/arch/arm/mach-s5p64x0/include/mach/i2c.h b/arch/arm/mach-s5p64x0/include/mach/i2c.h
new file mode 100644
index 0000000..887d252
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/i2c.h
@@ -0,0 +1,17 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/i2c.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P64X0 I2C configuration
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+extern void s5p6440_i2c0_cfg_gpio(struct platform_device *dev);
+extern void s5p6440_i2c1_cfg_gpio(struct platform_device *dev);
+
+extern void s5p6450_i2c0_cfg_gpio(struct platform_device *dev);
+extern void s5p6450_i2c1_cfg_gpio(struct platform_device *dev);
diff --git a/arch/arm/mach-s5p6440/setup-i2c0.c b/arch/arm/mach-s5p64x0/setup-i2c0.c
similarity index 52%
rename from arch/arm/mach-s5p6440/setup-i2c0.c
rename to arch/arm/mach-s5p64x0/setup-i2c0.c
index 2c99d14..dc4cc65 100644
--- a/arch/arm/mach-s5p6440/setup-i2c0.c
+++ b/arch/arm/mach-s5p64x0/setup-i2c0.c
@@ -1,11 +1,11 @@
-/* linux/arch/arm/mach-s5p6440/setup-i2c0.c
+/* linux/arch/arm/mach-s5p64x0/setup-i2c0.c
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* I2C0 GPIO configuration.
*
- * Based on plat-s3c64xx/setup-i2c0.c
+ * Based on plat-s3c64x0/setup-i2c0.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -14,17 +14,29 @@
#include <linux/kernel.h>
#include <linux/types.h>
+#include <linux/gpio.h>
struct platform_device; /* don't need the contents */
-#include <linux/gpio.h>
#include <plat/gpio-cfg.h>
#include <plat/iic.h>
-void s3c_i2c0_cfg_gpio(struct platform_device *dev)
+#include <mach/i2c.h>
+
+void s5p6440_i2c0_cfg_gpio(struct platform_device *dev)
{
s3c_gpio_cfgpin(S5P6440_GPB(5), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5P6440_GPB(5), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5P6440_GPB(6), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5P6440_GPB(6), S3C_GPIO_PULL_UP);
}
+
+void s5p6450_i2c0_cfg_gpio(struct platform_device *dev)
+{
+ s3c_gpio_cfgpin(S5P6450_GPB(5), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(S5P6450_GPB(5), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgpin(S5P6450_GPB(6), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(S5P6450_GPB(6), S3C_GPIO_PULL_UP);
+}
+
+void s3c_i2c0_cfg_gpio(struct platform_device *dev) { }
diff --git a/arch/arm/mach-s5p6440/setup-i2c1.c b/arch/arm/mach-s5p64x0/setup-i2c1.c
similarity index 55%
rename from arch/arm/mach-s5p6440/setup-i2c1.c
rename to arch/arm/mach-s5p64x0/setup-i2c1.c
index 9a1537f..2edd791 100644
--- a/arch/arm/mach-s5p6440/setup-i2c1.c
+++ b/arch/arm/mach-s5p64x0/setup-i2c1.c
@@ -1,7 +1,7 @@
-/* linux/arch/arm/mach-s5p6440/setup-i2c1.c
+/* linux/arch/arm/mach-s5p64xx/setup-i2c1.c
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* I2C1 GPIO configuration.
*
@@ -21,10 +21,22 @@ struct platform_device; /* don't need the contents */
#include <plat/gpio-cfg.h>
#include <plat/iic.h>
-void s3c_i2c1_cfg_gpio(struct platform_device *dev)
+#include <mach/i2c.h>
+
+void s5p6440_i2c1_cfg_gpio(struct platform_device *dev)
{
s3c_gpio_cfgpin(S5P6440_GPR(9), S3C_GPIO_SFN(6));
s3c_gpio_setpull(S5P6440_GPR(9), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5P6440_GPR(10), S3C_GPIO_SFN(6));
s3c_gpio_setpull(S5P6440_GPR(10), S3C_GPIO_PULL_UP);
}
+
+void s5p6450_i2c1_cfg_gpio(struct platform_device *dev)
+{
+ s3c_gpio_cfgpin(S5P6450_GPR(9), S3C_GPIO_SFN(6));
+ s3c_gpio_setpull(S5P6450_GPR(9), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgpin(S5P6450_GPR(10), S3C_GPIO_SFN(6));
+ s3c_gpio_setpull(S5P6450_GPR(10), S3C_GPIO_PULL_UP);
+}
+
+void s3c_i2c1_cfg_gpio(struct platform_device *dev) { }
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 09/13] ARM: S5P64X0: Add S5P6450 I2C support
@ 2010-09-01 7:09 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds S5P6450 I2C support in the ARCH_S5P64X0. And
moves S5P6440 I2C support files into the mach-s5p64x0 together.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/mach-s5p64x0/include/mach/i2c.h | 17 ++++++++++++++
.../{mach-s5p6440 => mach-s5p64x0}/setup-i2c0.c | 24 +++++++++++++++-----
.../{mach-s5p6440 => mach-s5p64x0}/setup-i2c1.c | 20 +++++++++++++---
3 files changed, 51 insertions(+), 10 deletions(-)
create mode 100644 arch/arm/mach-s5p64x0/include/mach/i2c.h
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/setup-i2c0.c (52%)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/setup-i2c1.c (55%)
diff --git a/arch/arm/mach-s5p64x0/include/mach/i2c.h b/arch/arm/mach-s5p64x0/include/mach/i2c.h
new file mode 100644
index 0000000..887d252
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/i2c.h
@@ -0,0 +1,17 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/i2c.h
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P64X0 I2C configuration
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+extern void s5p6440_i2c0_cfg_gpio(struct platform_device *dev);
+extern void s5p6440_i2c1_cfg_gpio(struct platform_device *dev);
+
+extern void s5p6450_i2c0_cfg_gpio(struct platform_device *dev);
+extern void s5p6450_i2c1_cfg_gpio(struct platform_device *dev);
diff --git a/arch/arm/mach-s5p6440/setup-i2c0.c b/arch/arm/mach-s5p64x0/setup-i2c0.c
similarity index 52%
rename from arch/arm/mach-s5p6440/setup-i2c0.c
rename to arch/arm/mach-s5p64x0/setup-i2c0.c
index 2c99d14..dc4cc65 100644
--- a/arch/arm/mach-s5p6440/setup-i2c0.c
+++ b/arch/arm/mach-s5p64x0/setup-i2c0.c
@@ -1,11 +1,11 @@
-/* linux/arch/arm/mach-s5p6440/setup-i2c0.c
+/* linux/arch/arm/mach-s5p64x0/setup-i2c0.c
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* I2C0 GPIO configuration.
*
- * Based on plat-s3c64xx/setup-i2c0.c
+ * Based on plat-s3c64x0/setup-i2c0.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -14,17 +14,29 @@
#include <linux/kernel.h>
#include <linux/types.h>
+#include <linux/gpio.h>
struct platform_device; /* don't need the contents */
-#include <linux/gpio.h>
#include <plat/gpio-cfg.h>
#include <plat/iic.h>
-void s3c_i2c0_cfg_gpio(struct platform_device *dev)
+#include <mach/i2c.h>
+
+void s5p6440_i2c0_cfg_gpio(struct platform_device *dev)
{
s3c_gpio_cfgpin(S5P6440_GPB(5), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5P6440_GPB(5), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5P6440_GPB(6), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5P6440_GPB(6), S3C_GPIO_PULL_UP);
}
+
+void s5p6450_i2c0_cfg_gpio(struct platform_device *dev)
+{
+ s3c_gpio_cfgpin(S5P6450_GPB(5), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(S5P6450_GPB(5), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgpin(S5P6450_GPB(6), S3C_GPIO_SFN(2));
+ s3c_gpio_setpull(S5P6450_GPB(6), S3C_GPIO_PULL_UP);
+}
+
+void s3c_i2c0_cfg_gpio(struct platform_device *dev) { }
diff --git a/arch/arm/mach-s5p6440/setup-i2c1.c b/arch/arm/mach-s5p64x0/setup-i2c1.c
similarity index 55%
rename from arch/arm/mach-s5p6440/setup-i2c1.c
rename to arch/arm/mach-s5p64x0/setup-i2c1.c
index 9a1537f..2edd791 100644
--- a/arch/arm/mach-s5p6440/setup-i2c1.c
+++ b/arch/arm/mach-s5p64x0/setup-i2c1.c
@@ -1,7 +1,7 @@
-/* linux/arch/arm/mach-s5p6440/setup-i2c1.c
+/* linux/arch/arm/mach-s5p64xx/setup-i2c1.c
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* I2C1 GPIO configuration.
*
@@ -21,10 +21,22 @@ struct platform_device; /* don't need the contents */
#include <plat/gpio-cfg.h>
#include <plat/iic.h>
-void s3c_i2c1_cfg_gpio(struct platform_device *dev)
+#include <mach/i2c.h>
+
+void s5p6440_i2c1_cfg_gpio(struct platform_device *dev)
{
s3c_gpio_cfgpin(S5P6440_GPR(9), S3C_GPIO_SFN(6));
s3c_gpio_setpull(S5P6440_GPR(9), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5P6440_GPR(10), S3C_GPIO_SFN(6));
s3c_gpio_setpull(S5P6440_GPR(10), S3C_GPIO_PULL_UP);
}
+
+void s5p6450_i2c1_cfg_gpio(struct platform_device *dev)
+{
+ s3c_gpio_cfgpin(S5P6450_GPR(9), S3C_GPIO_SFN(6));
+ s3c_gpio_setpull(S5P6450_GPR(9), S3C_GPIO_PULL_UP);
+ s3c_gpio_cfgpin(S5P6450_GPR(10), S3C_GPIO_SFN(6));
+ s3c_gpio_setpull(S5P6450_GPR(10), S3C_GPIO_PULL_UP);
+}
+
+void s3c_i2c1_cfg_gpio(struct platform_device *dev) { }
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 10/13] ARM: S5P64X0: Move GPIO support files for merge S5P64X0
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 7:09 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel, linux-samsung-soc; +Cc: ben-linux, Kukjin Kim
This patch moves S5P6440 GPIO support files from mach-s5p6440
into the new mach-s5p64x0 for merge S5P6440 and S5P6450 SocS.
NOTE: Not supported S5P6450 GPIO yet. Will be supported soon.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/mach-s5p6440/gpio.c | 344 --------------------
arch/arm/mach-s5p6440/include/mach/gpio.h | 80 -----
arch/arm/mach-s5p64x0/include/mach/gpio.h | 139 ++++++++
.../include/mach/regs-gpio.h | 28 +-
4 files changed, 157 insertions(+), 434 deletions(-)
delete mode 100644 arch/arm/mach-s5p6440/gpio.c
delete mode 100644 arch/arm/mach-s5p6440/include/mach/gpio.h
create mode 100644 arch/arm/mach-s5p64x0/include/mach/gpio.h
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/regs-gpio.h (79%)
diff --git a/arch/arm/mach-s5p6440/gpio.c b/arch/arm/mach-s5p6440/gpio.c
deleted file mode 100644
index 8bf6e0c..0000000
--- a/arch/arm/mach-s5p6440/gpio.c
+++ /dev/null
@@ -1,344 +0,0 @@
-/* arch/arm/mach-s5p6440/gpio.c
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S5P6440 - GPIOlib support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/gpio.h>
-
-#include <mach/map.h>
-#include <mach/regs-gpio.h>
-
-#include <plat/gpio-core.h>
-#include <plat/gpio-cfg.h>
-#include <plat/gpio-cfg-helpers.h>
-
-/* GPIO bank summary:
-*
-* Bank GPIOs Style SlpCon ExtInt Group
-* A 6 4Bit Yes 1
-* B 7 4Bit Yes 1
-* C 8 4Bit Yes 2
-* F 2 2Bit Yes 4 [1]
-* G 7 4Bit Yes 5
-* H 10 4Bit[2] Yes 6
-* I 16 2Bit Yes None
-* J 12 2Bit Yes None
-* N 16 2Bit No IRQ_EINT
-* P 8 2Bit Yes 8
-* R 15 4Bit[2] Yes 8
-*
-* [1] BANKF pins 14,15 do not form part of the external interrupt sources
-* [2] BANK has two control registers, GPxCON0 and GPxCON1
-*/
-
-static int s5p6440_gpiolib_rbank_4bit2_input(struct gpio_chip *chip,
- unsigned int offset)
-{
- struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
- void __iomem *base = ourchip->base;
- void __iomem *regcon = base;
- unsigned long con;
- unsigned long flags;
-
- switch (offset) {
- case 6:
- offset += 1;
- case 0:
- case 1:
- case 2:
- case 3:
- case 4:
- case 5:
- regcon -= 4;
- break;
- default:
- offset -= 7;
- break;
- }
-
- s3c_gpio_lock(ourchip, flags);
-
- con = __raw_readl(regcon);
- con &= ~(0xf << con_4bit_shift(offset));
- __raw_writel(con, regcon);
-
- s3c_gpio_unlock(ourchip, flags);
-
- return 0;
-}
-
-static int s5p6440_gpiolib_rbank_4bit2_output(struct gpio_chip *chip,
- unsigned int offset, int value)
-{
- struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
- void __iomem *base = ourchip->base;
- void __iomem *regcon = base;
- unsigned long con;
- unsigned long dat;
- unsigned long flags;
- unsigned con_offset = offset;
-
- switch (con_offset) {
- case 6:
- con_offset += 1;
- case 0:
- case 1:
- case 2:
- case 3:
- case 4:
- case 5:
- regcon -= 4;
- break;
- default:
- con_offset -= 7;
- break;
- }
-
- s3c_gpio_lock(ourchip, flags);
-
- con = __raw_readl(regcon);
- con &= ~(0xf << con_4bit_shift(con_offset));
- con |= 0x1 << con_4bit_shift(con_offset);
-
- dat = __raw_readl(base + GPIODAT_OFF);
- if (value)
- dat |= 1 << offset;
- else
- dat &= ~(1 << offset);
-
- __raw_writel(con, regcon);
- __raw_writel(dat, base + GPIODAT_OFF);
-
- s3c_gpio_unlock(ourchip, flags);
-
- return 0;
-}
-
-int s5p6440_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip,
- unsigned int off, unsigned int cfg)
-{
- void __iomem *reg = chip->base;
- unsigned int shift;
- unsigned long flags;
- u32 con;
-
- switch (off) {
- case 0:
- case 1:
- case 2:
- case 3:
- case 4:
- case 5:
- shift = (off & 7) * 4;
- reg -= 4;
- break;
- case 6:
- shift = ((off + 1) & 7) * 4;
- reg -= 4;
- default:
- shift = ((off + 1) & 7) * 4;
- break;
- }
-
- if (s3c_gpio_is_cfg_special(cfg)) {
- cfg &= 0xf;
- cfg <<= shift;
- }
-
- s3c_gpio_lock(chip, flags);
-
- con = __raw_readl(reg);
- con &= ~(0xf << shift);
- con |= cfg;
- __raw_writel(con, reg);
-
- s3c_gpio_unlock(chip, flags);
-
- return 0;
-}
-
-static struct s3c_gpio_cfg s5p6440_gpio_cfgs[] = {
- {
- .cfg_eint = 0,
- }, {
- .cfg_eint = 7,
- }, {
- .cfg_eint = 3,
- .set_config = s5p6440_gpio_setcfg_4bit_rbank,
- }, {
- .cfg_eint = 0,
- .set_config = s3c_gpio_setcfg_s3c24xx,
- .get_config = s3c_gpio_getcfg_s3c24xx,
- }, {
- .cfg_eint = 2,
- .set_config = s3c_gpio_setcfg_s3c24xx,
- .get_config = s3c_gpio_getcfg_s3c24xx,
- }, {
- .cfg_eint = 3,
- .set_config = s3c_gpio_setcfg_s3c24xx,
- .get_config = s3c_gpio_getcfg_s3c24xx,
- },
-};
-
-static struct s3c_gpio_chip s5p6440_gpio_4bit[] = {
- {
- .base = S5P6440_GPA_BASE,
- .config = &s5p6440_gpio_cfgs[1],
- .chip = {
- .base = S5P6440_GPA(0),
- .ngpio = S5P6440_GPIO_A_NR,
- .label = "GPA",
- },
- }, {
- .base = S5P6440_GPB_BASE,
- .config = &s5p6440_gpio_cfgs[1],
- .chip = {
- .base = S5P6440_GPB(0),
- .ngpio = S5P6440_GPIO_B_NR,
- .label = "GPB",
- },
- }, {
- .base = S5P6440_GPC_BASE,
- .config = &s5p6440_gpio_cfgs[1],
- .chip = {
- .base = S5P6440_GPC(0),
- .ngpio = S5P6440_GPIO_C_NR,
- .label = "GPC",
- },
- }, {
- .base = S5P6440_GPG_BASE,
- .config = &s5p6440_gpio_cfgs[1],
- .chip = {
- .base = S5P6440_GPG(0),
- .ngpio = S5P6440_GPIO_G_NR,
- .label = "GPG",
- },
- },
-};
-
-static struct s3c_gpio_chip s5p6440_gpio_4bit2[] = {
- {
- .base = S5P6440_GPH_BASE + 0x4,
- .config = &s5p6440_gpio_cfgs[1],
- .chip = {
- .base = S5P6440_GPH(0),
- .ngpio = S5P6440_GPIO_H_NR,
- .label = "GPH",
- },
- },
-};
-
-static struct s3c_gpio_chip gpio_rbank_4bit2[] = {
- {
- .base = S5P6440_GPR_BASE + 0x4,
- .config = &s5p6440_gpio_cfgs[2],
- .chip = {
- .base = S5P6440_GPR(0),
- .ngpio = S5P6440_GPIO_R_NR,
- .label = "GPR",
- },
- },
-};
-
-static struct s3c_gpio_chip s5p6440_gpio_2bit[] = {
- {
- .base = S5P6440_GPF_BASE,
- .config = &s5p6440_gpio_cfgs[5],
- .chip = {
- .base = S5P6440_GPF(0),
- .ngpio = S5P6440_GPIO_F_NR,
- .label = "GPF",
- },
- }, {
- .base = S5P6440_GPI_BASE,
- .config = &s5p6440_gpio_cfgs[3],
- .chip = {
- .base = S5P6440_GPI(0),
- .ngpio = S5P6440_GPIO_I_NR,
- .label = "GPI",
- },
- }, {
- .base = S5P6440_GPJ_BASE,
- .config = &s5p6440_gpio_cfgs[3],
- .chip = {
- .base = S5P6440_GPJ(0),
- .ngpio = S5P6440_GPIO_J_NR,
- .label = "GPJ",
- },
- }, {
- .base = S5P6440_GPN_BASE,
- .config = &s5p6440_gpio_cfgs[4],
- .chip = {
- .base = S5P6440_GPN(0),
- .ngpio = S5P6440_GPIO_N_NR,
- .label = "GPN",
- },
- }, {
- .base = S5P6440_GPP_BASE,
- .config = &s5p6440_gpio_cfgs[5],
- .chip = {
- .base = S5P6440_GPP(0),
- .ngpio = S5P6440_GPIO_P_NR,
- .label = "GPP",
- },
- },
-};
-
-void __init s5p6440_gpiolib_set_cfg(struct s3c_gpio_cfg *chipcfg, int nr_chips)
-{
- for (; nr_chips > 0; nr_chips--, chipcfg++) {
- if (!chipcfg->set_config)
- chipcfg->set_config = s3c_gpio_setcfg_s3c64xx_4bit;
- if (!chipcfg->get_config)
- chipcfg->get_config = s3c_gpio_getcfg_s3c64xx_4bit;
- if (!chipcfg->set_pull)
- chipcfg->set_pull = s3c_gpio_setpull_updown;
- if (!chipcfg->get_pull)
- chipcfg->get_pull = s3c_gpio_getpull_updown;
- }
-}
-
-static void __init s5p6440_gpio_add_rbank_4bit2(struct s3c_gpio_chip *chip,
- int nr_chips)
-{
- for (; nr_chips > 0; nr_chips--, chip++) {
- chip->chip.direction_input = s5p6440_gpiolib_rbank_4bit2_input;
- chip->chip.direction_output =
- s5p6440_gpiolib_rbank_4bit2_output;
- s3c_gpiolib_add(chip);
- }
-}
-
-static int __init s5p6440_gpiolib_init(void)
-{
- struct s3c_gpio_chip *chips = s5p6440_gpio_2bit;
- int nr_chips = ARRAY_SIZE(s5p6440_gpio_2bit);
-
- s5p6440_gpiolib_set_cfg(s5p6440_gpio_cfgs,
- ARRAY_SIZE(s5p6440_gpio_cfgs));
-
- for (; nr_chips > 0; nr_chips--, chips++)
- s3c_gpiolib_add(chips);
-
- samsung_gpiolib_add_4bit_chips(s5p6440_gpio_4bit,
- ARRAY_SIZE(s5p6440_gpio_4bit));
-
- samsung_gpiolib_add_4bit2_chips(s5p6440_gpio_4bit2,
- ARRAY_SIZE(s5p6440_gpio_4bit2));
-
- s5p6440_gpio_add_rbank_4bit2(gpio_rbank_4bit2,
- ARRAY_SIZE(gpio_rbank_4bit2));
-
- return 0;
-}
-arch_initcall(s5p6440_gpiolib_init);
diff --git a/arch/arm/mach-s5p6440/include/mach/gpio.h b/arch/arm/mach-s5p6440/include/mach/gpio.h
deleted file mode 100644
index 2178383..0000000
--- a/arch/arm/mach-s5p6440/include/mach/gpio.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/gpio.h
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S5P6440 - GPIO lib support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_GPIO_H
-#define __ASM_ARCH_GPIO_H __FILE__
-
-#define gpio_get_value __gpio_get_value
-#define gpio_set_value __gpio_set_value
-#define gpio_cansleep __gpio_cansleep
-#define gpio_to_irq __gpio_to_irq
-
-/* GPIO bank sizes */
-#define S5P6440_GPIO_A_NR (6)
-#define S5P6440_GPIO_B_NR (7)
-#define S5P6440_GPIO_C_NR (8)
-#define S5P6440_GPIO_F_NR (2)
-#define S5P6440_GPIO_G_NR (7)
-#define S5P6440_GPIO_H_NR (10)
-#define S5P6440_GPIO_I_NR (16)
-#define S5P6440_GPIO_J_NR (12)
-#define S5P6440_GPIO_N_NR (16)
-#define S5P6440_GPIO_P_NR (8)
-#define S5P6440_GPIO_R_NR (15)
-
-/* GPIO bank numbers */
-
-/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
- * space for debugging purposes so that any accidental
- * change from one gpio bank to another can be caught.
-*/
-#define S5P6440_GPIO_NEXT(__gpio) \
- ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
-
-enum s5p_gpio_number {
- S5P6440_GPIO_A_START = 0,
- S5P6440_GPIO_B_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_A),
- S5P6440_GPIO_C_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_B),
- S5P6440_GPIO_F_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_C),
- S5P6440_GPIO_G_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_F),
- S5P6440_GPIO_H_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_G),
- S5P6440_GPIO_I_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_H),
- S5P6440_GPIO_J_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_I),
- S5P6440_GPIO_N_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_J),
- S5P6440_GPIO_P_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_N),
- S5P6440_GPIO_R_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_P),
-};
-
-/* S5P6440 GPIO number definitions. */
-#define S5P6440_GPA(_nr) (S5P6440_GPIO_A_START + (_nr))
-#define S5P6440_GPB(_nr) (S5P6440_GPIO_B_START + (_nr))
-#define S5P6440_GPC(_nr) (S5P6440_GPIO_C_START + (_nr))
-#define S5P6440_GPF(_nr) (S5P6440_GPIO_F_START + (_nr))
-#define S5P6440_GPG(_nr) (S5P6440_GPIO_G_START + (_nr))
-#define S5P6440_GPH(_nr) (S5P6440_GPIO_H_START + (_nr))
-#define S5P6440_GPI(_nr) (S5P6440_GPIO_I_START + (_nr))
-#define S5P6440_GPJ(_nr) (S5P6440_GPIO_J_START + (_nr))
-#define S5P6440_GPN(_nr) (S5P6440_GPIO_N_START + (_nr))
-#define S5P6440_GPP(_nr) (S5P6440_GPIO_P_START + (_nr))
-#define S5P6440_GPR(_nr) (S5P6440_GPIO_R_START + (_nr))
-
-/* the end of the S5P6440 specific gpios */
-#define S5P6440_GPIO_END (S5P6440_GPR(S5P6440_GPIO_R_NR) + 1)
-#define S3C_GPIO_END S5P6440_GPIO_END
-
-/* define the number of gpios we need to the one after the GPR() range */
-#define ARCH_NR_GPIOS (S5P6440_GPR(S5P6440_GPIO_R_NR) + \
- CONFIG_SAMSUNG_GPIO_EXTRA + 1)
-
-#include <asm-generic/gpio.h>
-
-#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/gpio.h b/arch/arm/mach-s5p64x0/include/mach/gpio.h
new file mode 100644
index 0000000..5486c8f
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/gpio.h
@@ -0,0 +1,139 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/gpio.h
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P64X0 - GPIO lib support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H __FILE__
+
+#define gpio_get_value __gpio_get_value
+#define gpio_set_value __gpio_set_value
+#define gpio_cansleep __gpio_cansleep
+#define gpio_to_irq __gpio_to_irq
+
+/* GPIO bank sizes */
+
+#define S5P6440_GPIO_A_NR (6)
+#define S5P6440_GPIO_B_NR (7)
+#define S5P6440_GPIO_C_NR (8)
+#define S5P6440_GPIO_F_NR (2)
+#define S5P6440_GPIO_G_NR (7)
+#define S5P6440_GPIO_H_NR (10)
+#define S5P6440_GPIO_I_NR (16)
+#define S5P6440_GPIO_J_NR (12)
+#define S5P6440_GPIO_N_NR (16)
+#define S5P6440_GPIO_P_NR (8)
+#define S5P6440_GPIO_R_NR (15)
+
+#define S5P6450_GPIO_A_NR (6)
+#define S5P6450_GPIO_B_NR (7)
+#define S5P6450_GPIO_C_NR (8)
+#define S5P6450_GPIO_D_NR (8)
+#define S5P6450_GPIO_F_NR (2)
+#define S5P6450_GPIO_G_NR (14)
+#define S5P6450_GPIO_H_NR (10)
+#define S5P6450_GPIO_I_NR (16)
+#define S5P6450_GPIO_J_NR (12)
+#define S5P6450_GPIO_K_NR (5)
+#define S5P6450_GPIO_N_NR (16)
+#define S5P6450_GPIO_P_NR (11)
+#define S5P6450_GPIO_Q_NR (14)
+#define S5P6450_GPIO_R_NR (15)
+#define S5P6450_GPIO_S_NR (8)
+
+/* GPIO bank numbers */
+
+/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
+ * space for debugging purposes so that any accidental
+ * change from one gpio bank to another can be caught.
+*/
+
+#define S5P64X0_GPIO_NEXT(__gpio) \
+ ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
+
+enum s5p6440_gpio_number {
+ S5P6440_GPIO_A_START = 0,
+ S5P6440_GPIO_B_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_A),
+ S5P6440_GPIO_C_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_B),
+ S5P6440_GPIO_F_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_C),
+ S5P6440_GPIO_G_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_F),
+ S5P6440_GPIO_H_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_G),
+ S5P6440_GPIO_I_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_H),
+ S5P6440_GPIO_J_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_I),
+ S5P6440_GPIO_N_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_J),
+ S5P6440_GPIO_P_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_N),
+ S5P6440_GPIO_R_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_P),
+};
+
+enum s5p6450_gpio_number {
+ S5P6450_GPIO_A_START = 0,
+ S5P6450_GPIO_B_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_A),
+ S5P6450_GPIO_C_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_B),
+ S5P6450_GPIO_D_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_C),
+ S5P6450_GPIO_F_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_D),
+ S5P6450_GPIO_G_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_F),
+ S5P6450_GPIO_H_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_G),
+ S5P6450_GPIO_I_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_H),
+ S5P6450_GPIO_J_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_I),
+ S5P6450_GPIO_K_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_J),
+ S5P6450_GPIO_N_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_K),
+ S5P6450_GPIO_P_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_N),
+ S5P6450_GPIO_Q_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_P),
+ S5P6450_GPIO_R_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_Q),
+ S5P6450_GPIO_S_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_R),
+};
+
+/* GPIO number definitions */
+
+#define S5P6440_GPA(_nr) (S5P6440_GPIO_A_START + (_nr))
+#define S5P6440_GPB(_nr) (S5P6440_GPIO_B_START + (_nr))
+#define S5P6440_GPC(_nr) (S5P6440_GPIO_C_START + (_nr))
+#define S5P6440_GPF(_nr) (S5P6440_GPIO_F_START + (_nr))
+#define S5P6440_GPG(_nr) (S5P6440_GPIO_G_START + (_nr))
+#define S5P6440_GPH(_nr) (S5P6440_GPIO_H_START + (_nr))
+#define S5P6440_GPI(_nr) (S5P6440_GPIO_I_START + (_nr))
+#define S5P6440_GPJ(_nr) (S5P6440_GPIO_J_START + (_nr))
+#define S5P6440_GPN(_nr) (S5P6440_GPIO_N_START + (_nr))
+#define S5P6440_GPP(_nr) (S5P6440_GPIO_P_START + (_nr))
+#define S5P6440_GPR(_nr) (S5P6440_GPIO_R_START + (_nr))
+
+#define S5P6450_GPA(_nr) (S5P6450_GPIO_A_START + (_nr))
+#define S5P6450_GPB(_nr) (S5P6450_GPIO_B_START + (_nr))
+#define S5P6450_GPC(_nr) (S5P6450_GPIO_C_START + (_nr))
+#define S5P6450_GPD(_nr) (S5P6450_GPIO_D_START + (_nr))
+#define S5P6450_GPF(_nr) (S5P6450_GPIO_F_START + (_nr))
+#define S5P6450_GPG(_nr) (S5P6450_GPIO_G_START + (_nr))
+#define S5P6450_GPH(_nr) (S5P6450_GPIO_H_START + (_nr))
+#define S5P6450_GPI(_nr) (S5P6450_GPIO_I_START + (_nr))
+#define S5P6450_GPJ(_nr) (S5P6450_GPIO_J_START + (_nr))
+#define S5P6450_GPK(_nr) (S5P6450_GPIO_K_START + (_nr))
+#define S5P6450_GPN(_nr) (S5P6450_GPIO_N_START + (_nr))
+#define S5P6450_GPP(_nr) (S5P6450_GPIO_P_START + (_nr))
+#define S5P6450_GPQ(_nr) (S5P6450_GPIO_Q_START + (_nr))
+#define S5P6450_GPR(_nr) (S5P6450_GPIO_R_START + (_nr))
+#define S5P6450_GPS(_nr) (S5P6450_GPIO_S_START + (_nr))
+
+/* the end of the S5P64X0 specific gpios */
+
+#define S5P6440_GPIO_END (S5P6440_GPR(S5P6440_GPIO_R_NR) + 1)
+#define S5P6450_GPIO_END (S5P6450_GPS(S5P6450_GPIO_S_NR) + 1)
+
+#define S5P64X0_GPIO_END (S5P6440_GPIO_END > S5P6450_GPIO_END ? \
+ S5P6440_GPIO_END : S5P6450_GPIO_END)
+
+#define S3C_GPIO_END S5P64X0_GPIO_END
+
+/* define the number of gpios we need to the one after the last GPIO range */
+
+#define ARCH_NR_GPIOS (S5P64X0_GPIO_END + CONFIG_SAMSUNG_GPIO_EXTRA)
+
+#include <asm-generic/gpio.h>
+
+#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-gpio.h b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
similarity index 79%
rename from arch/arm/mach-s5p6440/include/mach/regs-gpio.h
rename to arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
index 82ff753..85f448e 100644
--- a/arch/arm/mach-s5p6440/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
@@ -1,21 +1,24 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/regs-gpio.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5P6440 - GPIO register definitions
+ * S5P64X0 - GPIO register definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
- */
+*/
#ifndef __ASM_ARCH_REGS_GPIO_H
#define __ASM_ARCH_REGS_GPIO_H __FILE__
#include <mach/map.h>
+/* Will be implemented S5P6442 GPIOlib */
+
/* Base addresses for each of the banks */
+
#define S5P6440_GPA_BASE (S5P_VA_GPIO + 0x0000)
#define S5P6440_GPB_BASE (S5P_VA_GPIO + 0x0020)
#define S5P6440_GPC_BASE (S5P_VA_GPIO + 0x0040)
@@ -27,6 +30,7 @@
#define S5P6440_GPN_BASE (S5P_VA_GPIO + 0x0830)
#define S5P6440_GPP_BASE (S5P_VA_GPIO + 0x0160)
#define S5P6440_GPR_BASE (S5P_VA_GPIO + 0x0290)
+
#define S5P6440_EINT0CON0 (S5P_VA_GPIO + 0x900)
#define S5P6440_EINT0FLTCON0 (S5P_VA_GPIO + 0x910)
#define S5P6440_EINT0FLTCON1 (S5P_VA_GPIO + 0x914)
@@ -34,19 +38,23 @@
#define S5P6440_EINT0PEND (S5P_VA_GPIO + 0x924)
/* for LCD */
+
#define S5P6440_SPCON_LCD_SEL_RGB (1 << 0)
#define S5P6440_SPCON_LCD_SEL_MASK (3 << 0)
-/* These set of macros are not really useful for the
- * GPF/GPI/GPJ/GPN/GPP,
- * useful for others set of GPIO's (4 bit)
+/*
+ * These set of macros are not really useful for the
+ * GPF/GPI/GPJ/GPN/GPP, useful for others set of GPIO's (4 bit)
*/
+
#define S5P6440_GPIO_CONMASK(__gpio) (0xf << ((__gpio) * 4))
#define S5P6440_GPIO_INPUT(__gpio) (0x0 << ((__gpio) * 4))
#define S5P6440_GPIO_OUTPUT(__gpio) (0x1 << ((__gpio) * 4))
-/* Use these macros for GPF/GPI/GPJ/GPN/GPP set of GPIO (2 bit)
- * */
+/*
+ * Use these macros for GPF/GPI/GPJ/GPN/GPP set of GPIO (2 bit)
+ */
+
#define S5P6440_GPIO2_CONMASK(__gpio) (0x3 << ((__gpio) * 2))
#define S5P6440_GPIO2_INPUT(__gpio) (0x0 << ((__gpio) * 2))
#define S5P6440_GPIO2_OUTPUT(__gpio) (0x1 << ((__gpio) * 2))
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 10/13] ARM: S5P64X0: Move GPIO support files for merge S5P64X0
@ 2010-09-01 7:09 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel
This patch moves S5P6440 GPIO support files from mach-s5p6440
into the new mach-s5p64x0 for merge S5P6440 and S5P6450 SocS.
NOTE: Not supported S5P6450 GPIO yet. Will be supported soon.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
arch/arm/mach-s5p6440/gpio.c | 344 --------------------
arch/arm/mach-s5p6440/include/mach/gpio.h | 80 -----
arch/arm/mach-s5p64x0/include/mach/gpio.h | 139 ++++++++
.../include/mach/regs-gpio.h | 28 +-
4 files changed, 157 insertions(+), 434 deletions(-)
delete mode 100644 arch/arm/mach-s5p6440/gpio.c
delete mode 100644 arch/arm/mach-s5p6440/include/mach/gpio.h
create mode 100644 arch/arm/mach-s5p64x0/include/mach/gpio.h
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/regs-gpio.h (79%)
diff --git a/arch/arm/mach-s5p6440/gpio.c b/arch/arm/mach-s5p6440/gpio.c
deleted file mode 100644
index 8bf6e0c..0000000
--- a/arch/arm/mach-s5p6440/gpio.c
+++ /dev/null
@@ -1,344 +0,0 @@
-/* arch/arm/mach-s5p6440/gpio.c
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S5P6440 - GPIOlib support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/kernel.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-#include <linux/gpio.h>
-
-#include <mach/map.h>
-#include <mach/regs-gpio.h>
-
-#include <plat/gpio-core.h>
-#include <plat/gpio-cfg.h>
-#include <plat/gpio-cfg-helpers.h>
-
-/* GPIO bank summary:
-*
-* Bank GPIOs Style SlpCon ExtInt Group
-* A 6 4Bit Yes 1
-* B 7 4Bit Yes 1
-* C 8 4Bit Yes 2
-* F 2 2Bit Yes 4 [1]
-* G 7 4Bit Yes 5
-* H 10 4Bit[2] Yes 6
-* I 16 2Bit Yes None
-* J 12 2Bit Yes None
-* N 16 2Bit No IRQ_EINT
-* P 8 2Bit Yes 8
-* R 15 4Bit[2] Yes 8
-*
-* [1] BANKF pins 14,15 do not form part of the external interrupt sources
-* [2] BANK has two control registers, GPxCON0 and GPxCON1
-*/
-
-static int s5p6440_gpiolib_rbank_4bit2_input(struct gpio_chip *chip,
- unsigned int offset)
-{
- struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
- void __iomem *base = ourchip->base;
- void __iomem *regcon = base;
- unsigned long con;
- unsigned long flags;
-
- switch (offset) {
- case 6:
- offset += 1;
- case 0:
- case 1:
- case 2:
- case 3:
- case 4:
- case 5:
- regcon -= 4;
- break;
- default:
- offset -= 7;
- break;
- }
-
- s3c_gpio_lock(ourchip, flags);
-
- con = __raw_readl(regcon);
- con &= ~(0xf << con_4bit_shift(offset));
- __raw_writel(con, regcon);
-
- s3c_gpio_unlock(ourchip, flags);
-
- return 0;
-}
-
-static int s5p6440_gpiolib_rbank_4bit2_output(struct gpio_chip *chip,
- unsigned int offset, int value)
-{
- struct s3c_gpio_chip *ourchip = to_s3c_gpio(chip);
- void __iomem *base = ourchip->base;
- void __iomem *regcon = base;
- unsigned long con;
- unsigned long dat;
- unsigned long flags;
- unsigned con_offset = offset;
-
- switch (con_offset) {
- case 6:
- con_offset += 1;
- case 0:
- case 1:
- case 2:
- case 3:
- case 4:
- case 5:
- regcon -= 4;
- break;
- default:
- con_offset -= 7;
- break;
- }
-
- s3c_gpio_lock(ourchip, flags);
-
- con = __raw_readl(regcon);
- con &= ~(0xf << con_4bit_shift(con_offset));
- con |= 0x1 << con_4bit_shift(con_offset);
-
- dat = __raw_readl(base + GPIODAT_OFF);
- if (value)
- dat |= 1 << offset;
- else
- dat &= ~(1 << offset);
-
- __raw_writel(con, regcon);
- __raw_writel(dat, base + GPIODAT_OFF);
-
- s3c_gpio_unlock(ourchip, flags);
-
- return 0;
-}
-
-int s5p6440_gpio_setcfg_4bit_rbank(struct s3c_gpio_chip *chip,
- unsigned int off, unsigned int cfg)
-{
- void __iomem *reg = chip->base;
- unsigned int shift;
- unsigned long flags;
- u32 con;
-
- switch (off) {
- case 0:
- case 1:
- case 2:
- case 3:
- case 4:
- case 5:
- shift = (off & 7) * 4;
- reg -= 4;
- break;
- case 6:
- shift = ((off + 1) & 7) * 4;
- reg -= 4;
- default:
- shift = ((off + 1) & 7) * 4;
- break;
- }
-
- if (s3c_gpio_is_cfg_special(cfg)) {
- cfg &= 0xf;
- cfg <<= shift;
- }
-
- s3c_gpio_lock(chip, flags);
-
- con = __raw_readl(reg);
- con &= ~(0xf << shift);
- con |= cfg;
- __raw_writel(con, reg);
-
- s3c_gpio_unlock(chip, flags);
-
- return 0;
-}
-
-static struct s3c_gpio_cfg s5p6440_gpio_cfgs[] = {
- {
- .cfg_eint = 0,
- }, {
- .cfg_eint = 7,
- }, {
- .cfg_eint = 3,
- .set_config = s5p6440_gpio_setcfg_4bit_rbank,
- }, {
- .cfg_eint = 0,
- .set_config = s3c_gpio_setcfg_s3c24xx,
- .get_config = s3c_gpio_getcfg_s3c24xx,
- }, {
- .cfg_eint = 2,
- .set_config = s3c_gpio_setcfg_s3c24xx,
- .get_config = s3c_gpio_getcfg_s3c24xx,
- }, {
- .cfg_eint = 3,
- .set_config = s3c_gpio_setcfg_s3c24xx,
- .get_config = s3c_gpio_getcfg_s3c24xx,
- },
-};
-
-static struct s3c_gpio_chip s5p6440_gpio_4bit[] = {
- {
- .base = S5P6440_GPA_BASE,
- .config = &s5p6440_gpio_cfgs[1],
- .chip = {
- .base = S5P6440_GPA(0),
- .ngpio = S5P6440_GPIO_A_NR,
- .label = "GPA",
- },
- }, {
- .base = S5P6440_GPB_BASE,
- .config = &s5p6440_gpio_cfgs[1],
- .chip = {
- .base = S5P6440_GPB(0),
- .ngpio = S5P6440_GPIO_B_NR,
- .label = "GPB",
- },
- }, {
- .base = S5P6440_GPC_BASE,
- .config = &s5p6440_gpio_cfgs[1],
- .chip = {
- .base = S5P6440_GPC(0),
- .ngpio = S5P6440_GPIO_C_NR,
- .label = "GPC",
- },
- }, {
- .base = S5P6440_GPG_BASE,
- .config = &s5p6440_gpio_cfgs[1],
- .chip = {
- .base = S5P6440_GPG(0),
- .ngpio = S5P6440_GPIO_G_NR,
- .label = "GPG",
- },
- },
-};
-
-static struct s3c_gpio_chip s5p6440_gpio_4bit2[] = {
- {
- .base = S5P6440_GPH_BASE + 0x4,
- .config = &s5p6440_gpio_cfgs[1],
- .chip = {
- .base = S5P6440_GPH(0),
- .ngpio = S5P6440_GPIO_H_NR,
- .label = "GPH",
- },
- },
-};
-
-static struct s3c_gpio_chip gpio_rbank_4bit2[] = {
- {
- .base = S5P6440_GPR_BASE + 0x4,
- .config = &s5p6440_gpio_cfgs[2],
- .chip = {
- .base = S5P6440_GPR(0),
- .ngpio = S5P6440_GPIO_R_NR,
- .label = "GPR",
- },
- },
-};
-
-static struct s3c_gpio_chip s5p6440_gpio_2bit[] = {
- {
- .base = S5P6440_GPF_BASE,
- .config = &s5p6440_gpio_cfgs[5],
- .chip = {
- .base = S5P6440_GPF(0),
- .ngpio = S5P6440_GPIO_F_NR,
- .label = "GPF",
- },
- }, {
- .base = S5P6440_GPI_BASE,
- .config = &s5p6440_gpio_cfgs[3],
- .chip = {
- .base = S5P6440_GPI(0),
- .ngpio = S5P6440_GPIO_I_NR,
- .label = "GPI",
- },
- }, {
- .base = S5P6440_GPJ_BASE,
- .config = &s5p6440_gpio_cfgs[3],
- .chip = {
- .base = S5P6440_GPJ(0),
- .ngpio = S5P6440_GPIO_J_NR,
- .label = "GPJ",
- },
- }, {
- .base = S5P6440_GPN_BASE,
- .config = &s5p6440_gpio_cfgs[4],
- .chip = {
- .base = S5P6440_GPN(0),
- .ngpio = S5P6440_GPIO_N_NR,
- .label = "GPN",
- },
- }, {
- .base = S5P6440_GPP_BASE,
- .config = &s5p6440_gpio_cfgs[5],
- .chip = {
- .base = S5P6440_GPP(0),
- .ngpio = S5P6440_GPIO_P_NR,
- .label = "GPP",
- },
- },
-};
-
-void __init s5p6440_gpiolib_set_cfg(struct s3c_gpio_cfg *chipcfg, int nr_chips)
-{
- for (; nr_chips > 0; nr_chips--, chipcfg++) {
- if (!chipcfg->set_config)
- chipcfg->set_config = s3c_gpio_setcfg_s3c64xx_4bit;
- if (!chipcfg->get_config)
- chipcfg->get_config = s3c_gpio_getcfg_s3c64xx_4bit;
- if (!chipcfg->set_pull)
- chipcfg->set_pull = s3c_gpio_setpull_updown;
- if (!chipcfg->get_pull)
- chipcfg->get_pull = s3c_gpio_getpull_updown;
- }
-}
-
-static void __init s5p6440_gpio_add_rbank_4bit2(struct s3c_gpio_chip *chip,
- int nr_chips)
-{
- for (; nr_chips > 0; nr_chips--, chip++) {
- chip->chip.direction_input = s5p6440_gpiolib_rbank_4bit2_input;
- chip->chip.direction_output =
- s5p6440_gpiolib_rbank_4bit2_output;
- s3c_gpiolib_add(chip);
- }
-}
-
-static int __init s5p6440_gpiolib_init(void)
-{
- struct s3c_gpio_chip *chips = s5p6440_gpio_2bit;
- int nr_chips = ARRAY_SIZE(s5p6440_gpio_2bit);
-
- s5p6440_gpiolib_set_cfg(s5p6440_gpio_cfgs,
- ARRAY_SIZE(s5p6440_gpio_cfgs));
-
- for (; nr_chips > 0; nr_chips--, chips++)
- s3c_gpiolib_add(chips);
-
- samsung_gpiolib_add_4bit_chips(s5p6440_gpio_4bit,
- ARRAY_SIZE(s5p6440_gpio_4bit));
-
- samsung_gpiolib_add_4bit2_chips(s5p6440_gpio_4bit2,
- ARRAY_SIZE(s5p6440_gpio_4bit2));
-
- s5p6440_gpio_add_rbank_4bit2(gpio_rbank_4bit2,
- ARRAY_SIZE(gpio_rbank_4bit2));
-
- return 0;
-}
-arch_initcall(s5p6440_gpiolib_init);
diff --git a/arch/arm/mach-s5p6440/include/mach/gpio.h b/arch/arm/mach-s5p6440/include/mach/gpio.h
deleted file mode 100644
index 2178383..0000000
--- a/arch/arm/mach-s5p6440/include/mach/gpio.h
+++ /dev/null
@@ -1,80 +0,0 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/gpio.h
- *
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
- *
- * S5P6440 - GPIO lib support
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
-*/
-
-#ifndef __ASM_ARCH_GPIO_H
-#define __ASM_ARCH_GPIO_H __FILE__
-
-#define gpio_get_value __gpio_get_value
-#define gpio_set_value __gpio_set_value
-#define gpio_cansleep __gpio_cansleep
-#define gpio_to_irq __gpio_to_irq
-
-/* GPIO bank sizes */
-#define S5P6440_GPIO_A_NR (6)
-#define S5P6440_GPIO_B_NR (7)
-#define S5P6440_GPIO_C_NR (8)
-#define S5P6440_GPIO_F_NR (2)
-#define S5P6440_GPIO_G_NR (7)
-#define S5P6440_GPIO_H_NR (10)
-#define S5P6440_GPIO_I_NR (16)
-#define S5P6440_GPIO_J_NR (12)
-#define S5P6440_GPIO_N_NR (16)
-#define S5P6440_GPIO_P_NR (8)
-#define S5P6440_GPIO_R_NR (15)
-
-/* GPIO bank numbers */
-
-/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
- * space for debugging purposes so that any accidental
- * change from one gpio bank to another can be caught.
-*/
-#define S5P6440_GPIO_NEXT(__gpio) \
- ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
-
-enum s5p_gpio_number {
- S5P6440_GPIO_A_START = 0,
- S5P6440_GPIO_B_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_A),
- S5P6440_GPIO_C_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_B),
- S5P6440_GPIO_F_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_C),
- S5P6440_GPIO_G_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_F),
- S5P6440_GPIO_H_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_G),
- S5P6440_GPIO_I_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_H),
- S5P6440_GPIO_J_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_I),
- S5P6440_GPIO_N_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_J),
- S5P6440_GPIO_P_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_N),
- S5P6440_GPIO_R_START = S5P6440_GPIO_NEXT(S5P6440_GPIO_P),
-};
-
-/* S5P6440 GPIO number definitions. */
-#define S5P6440_GPA(_nr) (S5P6440_GPIO_A_START + (_nr))
-#define S5P6440_GPB(_nr) (S5P6440_GPIO_B_START + (_nr))
-#define S5P6440_GPC(_nr) (S5P6440_GPIO_C_START + (_nr))
-#define S5P6440_GPF(_nr) (S5P6440_GPIO_F_START + (_nr))
-#define S5P6440_GPG(_nr) (S5P6440_GPIO_G_START + (_nr))
-#define S5P6440_GPH(_nr) (S5P6440_GPIO_H_START + (_nr))
-#define S5P6440_GPI(_nr) (S5P6440_GPIO_I_START + (_nr))
-#define S5P6440_GPJ(_nr) (S5P6440_GPIO_J_START + (_nr))
-#define S5P6440_GPN(_nr) (S5P6440_GPIO_N_START + (_nr))
-#define S5P6440_GPP(_nr) (S5P6440_GPIO_P_START + (_nr))
-#define S5P6440_GPR(_nr) (S5P6440_GPIO_R_START + (_nr))
-
-/* the end of the S5P6440 specific gpios */
-#define S5P6440_GPIO_END (S5P6440_GPR(S5P6440_GPIO_R_NR) + 1)
-#define S3C_GPIO_END S5P6440_GPIO_END
-
-/* define the number of gpios we need to the one after the GPR() range */
-#define ARCH_NR_GPIOS (S5P6440_GPR(S5P6440_GPIO_R_NR) + \
- CONFIG_SAMSUNG_GPIO_EXTRA + 1)
-
-#include <asm-generic/gpio.h>
-
-#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p64x0/include/mach/gpio.h b/arch/arm/mach-s5p64x0/include/mach/gpio.h
new file mode 100644
index 0000000..5486c8f
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/include/mach/gpio.h
@@ -0,0 +1,139 @@
+/* linux/arch/arm/mach-s5p64x0/include/mach/gpio.h
+ *
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * S5P64X0 - GPIO lib support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H __FILE__
+
+#define gpio_get_value __gpio_get_value
+#define gpio_set_value __gpio_set_value
+#define gpio_cansleep __gpio_cansleep
+#define gpio_to_irq __gpio_to_irq
+
+/* GPIO bank sizes */
+
+#define S5P6440_GPIO_A_NR (6)
+#define S5P6440_GPIO_B_NR (7)
+#define S5P6440_GPIO_C_NR (8)
+#define S5P6440_GPIO_F_NR (2)
+#define S5P6440_GPIO_G_NR (7)
+#define S5P6440_GPIO_H_NR (10)
+#define S5P6440_GPIO_I_NR (16)
+#define S5P6440_GPIO_J_NR (12)
+#define S5P6440_GPIO_N_NR (16)
+#define S5P6440_GPIO_P_NR (8)
+#define S5P6440_GPIO_R_NR (15)
+
+#define S5P6450_GPIO_A_NR (6)
+#define S5P6450_GPIO_B_NR (7)
+#define S5P6450_GPIO_C_NR (8)
+#define S5P6450_GPIO_D_NR (8)
+#define S5P6450_GPIO_F_NR (2)
+#define S5P6450_GPIO_G_NR (14)
+#define S5P6450_GPIO_H_NR (10)
+#define S5P6450_GPIO_I_NR (16)
+#define S5P6450_GPIO_J_NR (12)
+#define S5P6450_GPIO_K_NR (5)
+#define S5P6450_GPIO_N_NR (16)
+#define S5P6450_GPIO_P_NR (11)
+#define S5P6450_GPIO_Q_NR (14)
+#define S5P6450_GPIO_R_NR (15)
+#define S5P6450_GPIO_S_NR (8)
+
+/* GPIO bank numbers */
+
+/* CONFIG_S3C_GPIO_SPACE allows the user to select extra
+ * space for debugging purposes so that any accidental
+ * change from one gpio bank to another can be caught.
+*/
+
+#define S5P64X0_GPIO_NEXT(__gpio) \
+ ((__gpio##_START) + (__gpio##_NR) + CONFIG_S3C_GPIO_SPACE + 1)
+
+enum s5p6440_gpio_number {
+ S5P6440_GPIO_A_START = 0,
+ S5P6440_GPIO_B_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_A),
+ S5P6440_GPIO_C_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_B),
+ S5P6440_GPIO_F_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_C),
+ S5P6440_GPIO_G_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_F),
+ S5P6440_GPIO_H_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_G),
+ S5P6440_GPIO_I_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_H),
+ S5P6440_GPIO_J_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_I),
+ S5P6440_GPIO_N_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_J),
+ S5P6440_GPIO_P_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_N),
+ S5P6440_GPIO_R_START = S5P64X0_GPIO_NEXT(S5P6440_GPIO_P),
+};
+
+enum s5p6450_gpio_number {
+ S5P6450_GPIO_A_START = 0,
+ S5P6450_GPIO_B_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_A),
+ S5P6450_GPIO_C_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_B),
+ S5P6450_GPIO_D_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_C),
+ S5P6450_GPIO_F_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_D),
+ S5P6450_GPIO_G_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_F),
+ S5P6450_GPIO_H_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_G),
+ S5P6450_GPIO_I_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_H),
+ S5P6450_GPIO_J_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_I),
+ S5P6450_GPIO_K_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_J),
+ S5P6450_GPIO_N_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_K),
+ S5P6450_GPIO_P_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_N),
+ S5P6450_GPIO_Q_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_P),
+ S5P6450_GPIO_R_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_Q),
+ S5P6450_GPIO_S_START = S5P64X0_GPIO_NEXT(S5P6450_GPIO_R),
+};
+
+/* GPIO number definitions */
+
+#define S5P6440_GPA(_nr) (S5P6440_GPIO_A_START + (_nr))
+#define S5P6440_GPB(_nr) (S5P6440_GPIO_B_START + (_nr))
+#define S5P6440_GPC(_nr) (S5P6440_GPIO_C_START + (_nr))
+#define S5P6440_GPF(_nr) (S5P6440_GPIO_F_START + (_nr))
+#define S5P6440_GPG(_nr) (S5P6440_GPIO_G_START + (_nr))
+#define S5P6440_GPH(_nr) (S5P6440_GPIO_H_START + (_nr))
+#define S5P6440_GPI(_nr) (S5P6440_GPIO_I_START + (_nr))
+#define S5P6440_GPJ(_nr) (S5P6440_GPIO_J_START + (_nr))
+#define S5P6440_GPN(_nr) (S5P6440_GPIO_N_START + (_nr))
+#define S5P6440_GPP(_nr) (S5P6440_GPIO_P_START + (_nr))
+#define S5P6440_GPR(_nr) (S5P6440_GPIO_R_START + (_nr))
+
+#define S5P6450_GPA(_nr) (S5P6450_GPIO_A_START + (_nr))
+#define S5P6450_GPB(_nr) (S5P6450_GPIO_B_START + (_nr))
+#define S5P6450_GPC(_nr) (S5P6450_GPIO_C_START + (_nr))
+#define S5P6450_GPD(_nr) (S5P6450_GPIO_D_START + (_nr))
+#define S5P6450_GPF(_nr) (S5P6450_GPIO_F_START + (_nr))
+#define S5P6450_GPG(_nr) (S5P6450_GPIO_G_START + (_nr))
+#define S5P6450_GPH(_nr) (S5P6450_GPIO_H_START + (_nr))
+#define S5P6450_GPI(_nr) (S5P6450_GPIO_I_START + (_nr))
+#define S5P6450_GPJ(_nr) (S5P6450_GPIO_J_START + (_nr))
+#define S5P6450_GPK(_nr) (S5P6450_GPIO_K_START + (_nr))
+#define S5P6450_GPN(_nr) (S5P6450_GPIO_N_START + (_nr))
+#define S5P6450_GPP(_nr) (S5P6450_GPIO_P_START + (_nr))
+#define S5P6450_GPQ(_nr) (S5P6450_GPIO_Q_START + (_nr))
+#define S5P6450_GPR(_nr) (S5P6450_GPIO_R_START + (_nr))
+#define S5P6450_GPS(_nr) (S5P6450_GPIO_S_START + (_nr))
+
+/* the end of the S5P64X0 specific gpios */
+
+#define S5P6440_GPIO_END (S5P6440_GPR(S5P6440_GPIO_R_NR) + 1)
+#define S5P6450_GPIO_END (S5P6450_GPS(S5P6450_GPIO_S_NR) + 1)
+
+#define S5P64X0_GPIO_END (S5P6440_GPIO_END > S5P6450_GPIO_END ? \
+ S5P6440_GPIO_END : S5P6450_GPIO_END)
+
+#define S3C_GPIO_END S5P64X0_GPIO_END
+
+/* define the number of gpios we need to the one after the last GPIO range */
+
+#define ARCH_NR_GPIOS (S5P64X0_GPIO_END + CONFIG_SAMSUNG_GPIO_EXTRA)
+
+#include <asm-generic/gpio.h>
+
+#endif /* __ASM_ARCH_GPIO_H */
diff --git a/arch/arm/mach-s5p6440/include/mach/regs-gpio.h b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
similarity index 79%
rename from arch/arm/mach-s5p6440/include/mach/regs-gpio.h
rename to arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
index 82ff753..85f448e 100644
--- a/arch/arm/mach-s5p6440/include/mach/regs-gpio.h
+++ b/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
@@ -1,21 +1,24 @@
-/* linux/arch/arm/mach-s5p6440/include/mach/regs-gpio.h
+/* linux/arch/arm/mach-s5p64x0/include/mach/regs-gpio.h
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
- * S5P6440 - GPIO register definitions
+ * S5P64X0 - GPIO register definitions
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
- */
+*/
#ifndef __ASM_ARCH_REGS_GPIO_H
#define __ASM_ARCH_REGS_GPIO_H __FILE__
#include <mach/map.h>
+/* Will be implemented S5P6442 GPIOlib */
+
/* Base addresses for each of the banks */
+
#define S5P6440_GPA_BASE (S5P_VA_GPIO + 0x0000)
#define S5P6440_GPB_BASE (S5P_VA_GPIO + 0x0020)
#define S5P6440_GPC_BASE (S5P_VA_GPIO + 0x0040)
@@ -27,6 +30,7 @@
#define S5P6440_GPN_BASE (S5P_VA_GPIO + 0x0830)
#define S5P6440_GPP_BASE (S5P_VA_GPIO + 0x0160)
#define S5P6440_GPR_BASE (S5P_VA_GPIO + 0x0290)
+
#define S5P6440_EINT0CON0 (S5P_VA_GPIO + 0x900)
#define S5P6440_EINT0FLTCON0 (S5P_VA_GPIO + 0x910)
#define S5P6440_EINT0FLTCON1 (S5P_VA_GPIO + 0x914)
@@ -34,19 +38,23 @@
#define S5P6440_EINT0PEND (S5P_VA_GPIO + 0x924)
/* for LCD */
+
#define S5P6440_SPCON_LCD_SEL_RGB (1 << 0)
#define S5P6440_SPCON_LCD_SEL_MASK (3 << 0)
-/* These set of macros are not really useful for the
- * GPF/GPI/GPJ/GPN/GPP,
- * useful for others set of GPIO's (4 bit)
+/*
+ * These set of macros are not really useful for the
+ * GPF/GPI/GPJ/GPN/GPP, useful for others set of GPIO's (4 bit)
*/
+
#define S5P6440_GPIO_CONMASK(__gpio) (0xf << ((__gpio) * 4))
#define S5P6440_GPIO_INPUT(__gpio) (0x0 << ((__gpio) * 4))
#define S5P6440_GPIO_OUTPUT(__gpio) (0x1 << ((__gpio) * 4))
-/* Use these macros for GPF/GPI/GPJ/GPN/GPP set of GPIO (2 bit)
- * */
+/*
+ * Use these macros for GPF/GPI/GPJ/GPN/GPP set of GPIO (2 bit)
+ */
+
#define S5P6440_GPIO2_CONMASK(__gpio) (0x3 << ((__gpio) * 2))
#define S5P6440_GPIO2_INPUT(__gpio) (0x0 << ((__gpio) * 2))
#define S5P6440_GPIO2_OUTPUT(__gpio) (0x1 << ((__gpio) * 2))
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 11/13] ARM: S5P64X0: Move SMDK6440 board file and Add SMDK6450 board file
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 7:09 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel, linux-samsung-soc; +Cc: ben-linux, Kukjin Kim
This patch moves smdk6440 board file from mach-s5p6440 into the new
mach-s5p64x0 directory and adds smdk6450 board file.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
.../{mach-s5p6440 => mach-s5p64x0}/mach-smdk6440.c | 87 ++++++----
arch/arm/mach-s5p64x0/mach-smdk6450.c | 182 ++++++++++++++++++++
2 files changed, 234 insertions(+), 35 deletions(-)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/mach-smdk6440.c (66%)
create mode 100644 arch/arm/mach-s5p64x0/mach-smdk6450.c
diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
similarity index 66%
rename from arch/arm/mach-s5p6440/mach-smdk6440.c
rename to arch/arm/mach-s5p64x0/mach-smdk6440.c
index 9202aaa..28de0a5 100644
--- a/arch/arm/mach-s5p6440/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -1,7 +1,7 @@
-/* linux/arch/arm/mach-s5p6440/mach-smdk6440.c
+/* linux/arch/arm/mach-s5p64x0/mach-smdk6440.c
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -21,21 +21,22 @@
#include <linux/io.h>
#include <linux/module.h>
#include <linux/clk.h>
+#include <linux/gpio.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
+#include <asm/irq.h>
+#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <mach/map.h>
-
-#include <asm/irq.h>
-#include <asm/mach-types.h>
+#include <mach/regs-clock.h>
+#include <mach/i2c.h>
#include <plat/regs-serial.h>
-
+#include <plat/gpio-cfg.h>
#include <plat/s5p6440.h>
#include <plat/clock.h>
-#include <mach/regs-clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/iic.h>
@@ -58,43 +59,60 @@
static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
[0] = {
- .hwport = 0,
- .flags = 0,
- .ucon = SMDK6440_UCON_DEFAULT,
- .ulcon = SMDK6440_ULCON_DEFAULT,
- .ufcon = SMDK6440_UFCON_DEFAULT,
+ .hwport = 0,
+ .flags = 0,
+ .ucon = SMDK6440_UCON_DEFAULT,
+ .ulcon = SMDK6440_ULCON_DEFAULT,
+ .ufcon = SMDK6440_UFCON_DEFAULT,
},
[1] = {
- .hwport = 1,
- .flags = 0,
- .ucon = SMDK6440_UCON_DEFAULT,
- .ulcon = SMDK6440_ULCON_DEFAULT,
- .ufcon = SMDK6440_UFCON_DEFAULT,
+ .hwport = 1,
+ .flags = 0,
+ .ucon = SMDK6440_UCON_DEFAULT,
+ .ulcon = SMDK6440_ULCON_DEFAULT,
+ .ufcon = SMDK6440_UFCON_DEFAULT,
},
[2] = {
- .hwport = 2,
- .flags = 0,
- .ucon = SMDK6440_UCON_DEFAULT,
- .ulcon = SMDK6440_ULCON_DEFAULT,
- .ufcon = SMDK6440_UFCON_DEFAULT,
+ .hwport = 2,
+ .flags = 0,
+ .ucon = SMDK6440_UCON_DEFAULT,
+ .ulcon = SMDK6440_ULCON_DEFAULT,
+ .ufcon = SMDK6440_UFCON_DEFAULT,
},
[3] = {
- .hwport = 3,
- .flags = 0,
- .ucon = SMDK6440_UCON_DEFAULT,
- .ulcon = SMDK6440_ULCON_DEFAULT,
- .ufcon = SMDK6440_UFCON_DEFAULT,
+ .hwport = 3,
+ .flags = 0,
+ .ucon = SMDK6440_UCON_DEFAULT,
+ .ulcon = SMDK6440_ULCON_DEFAULT,
+ .ufcon = SMDK6440_UFCON_DEFAULT,
},
};
static struct platform_device *smdk6440_devices[] __initdata = {
- &s5p6440_device_iis,
&s3c_device_adc,
&s3c_device_rtc,
&s3c_device_i2c0,
&s3c_device_i2c1,
&s3c_device_ts,
&s3c_device_wdt,
+ &s5p6440_device_iis,
+};
+
+static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = {
+ .flags = 0,
+ .slave_addr = 0x10,
+ .frequency = 100*1000,
+ .sda_delay = 100,
+ .cfg_gpio = s5p6440_i2c0_cfg_gpio,
+};
+
+static struct s3c2410_platform_i2c s5p6440_i2c1_data __initdata = {
+ .flags = 0,
+ .bus_num = 1,
+ .slave_addr = 0x10,
+ .frequency = 100*1000,
+ .sda_delay = 100,
+ .cfg_gpio = s5p6440_i2c1_cfg_gpio,
};
static struct i2c_board_info smdk6440_i2c_devs0[] __initdata = {
@@ -113,7 +131,7 @@ static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
static void __init smdk6440_map_io(void)
{
- s5p_init_io(NULL, 0, S5P_SYS_ID);
+ s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
s3c24xx_init_clocks(12000000);
s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
}
@@ -122,9 +140,8 @@ static void __init smdk6440_machine_init(void)
{
s3c24xx_ts_set_platdata(&s3c_ts_platform);
- /* I2C */
- s3c_i2c0_set_platdata(NULL);
- s3c_i2c1_set_platdata(NULL);
+ s3c_i2c0_set_platdata(&s5p6440_i2c0_data);
+ s3c_i2c1_set_platdata(&s5p6440_i2c1_data);
i2c_register_board_info(0, smdk6440_i2c_devs0,
ARRAY_SIZE(smdk6440_i2c_devs0));
i2c_register_board_info(1, smdk6440_i2c_devs1,
@@ -135,9 +152,9 @@ static void __init smdk6440_machine_init(void)
MACHINE_START(SMDK6440, "SMDK6440")
/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
- .phys_io = S3C_PA_UART & 0xfff00000,
+ .phys_io = S5P6440_PA_UART(0) & 0xfff00000,
.io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
- .boot_params = S5P_PA_SDRAM + 0x100,
+ .boot_params = S5P64X0_PA_SDRAM + 0x100,
.init_irq = s5p6440_init_irq,
.map_io = smdk6440_map_io,
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
new file mode 100644
index 0000000..8e98217
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -0,0 +1,182 @@
+/* linux/arch/arm/mach-s5p64x0/mach-smdk6450.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/clk.h>
+#include <linux/gpio.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/irq.h>
+#include <asm/mach-types.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+#include <mach/i2c.h>
+
+#include <plat/regs-serial.h>
+#include <plat/gpio-cfg.h>
+#include <plat/s5p6450.h>
+#include <plat/clock.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+#include <plat/iic.h>
+#include <plat/pll.h>
+#include <plat/adc.h>
+#include <plat/ts.h>
+
+#define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
+ S3C2410_UCON_RXILEVEL | \
+ S3C2410_UCON_TXIRQMODE | \
+ S3C2410_UCON_RXIRQMODE | \
+ S3C2410_UCON_RXFIFO_TOI | \
+ S3C2443_UCON_RXERR_IRQEN)
+
+#define SMDK6450_ULCON_DEFAULT S3C2410_LCON_CS8
+
+#define SMDK6450_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
+ S3C2440_UFCON_TXTRIG16 | \
+ S3C2410_UFCON_RXTRIG8)
+
+static struct s3c2410_uartcfg smdk6450_uartcfgs[] __initdata = {
+ [0] = {
+ .hwport = 0,
+ .flags = 0,
+ .ucon = SMDK6450_UCON_DEFAULT,
+ .ulcon = SMDK6450_ULCON_DEFAULT,
+ .ufcon = SMDK6450_UFCON_DEFAULT,
+ },
+ [1] = {
+ .hwport = 1,
+ .flags = 0,
+ .ucon = SMDK6450_UCON_DEFAULT,
+ .ulcon = SMDK6450_ULCON_DEFAULT,
+ .ufcon = SMDK6450_UFCON_DEFAULT,
+ },
+ [2] = {
+ .hwport = 2,
+ .flags = 0,
+ .ucon = SMDK6450_UCON_DEFAULT,
+ .ulcon = SMDK6450_ULCON_DEFAULT,
+ .ufcon = SMDK6450_UFCON_DEFAULT,
+ },
+ [3] = {
+ .hwport = 3,
+ .flags = 0,
+ .ucon = SMDK6450_UCON_DEFAULT,
+ .ulcon = SMDK6450_ULCON_DEFAULT,
+ .ufcon = SMDK6450_UFCON_DEFAULT,
+ },
+#if CONFIG_SERIAL_SAMSUNG_UARTS > 4
+ [4] = {
+ .hwport = 4,
+ .flags = 0,
+ .ucon = SMDK6450_UCON_DEFAULT,
+ .ulcon = SMDK6450_ULCON_DEFAULT,
+ .ufcon = SMDK6450_UFCON_DEFAULT,
+ },
+#endif
+#if CONFIG_SERIAL_SAMSUNG_UARTS > 5
+ [5] = {
+ .hwport = 5,
+ .flags = 0,
+ .ucon = SMDK6450_UCON_DEFAULT,
+ .ulcon = SMDK6450_ULCON_DEFAULT,
+ .ufcon = SMDK6450_UFCON_DEFAULT,
+ },
+#endif
+};
+
+static struct platform_device *smdk6450_devices[] __initdata = {
+ &s3c_device_adc,
+ &s3c_device_rtc,
+ &s3c_device_i2c0,
+ &s3c_device_i2c1,
+ &s3c_device_ts,
+ &s3c_device_wdt,
+ &s5p6450_device_iis0,
+ /* s5p6450_device_spi0 will be added */
+};
+
+static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = {
+ .flags = 0,
+ .slave_addr = 0x10,
+ .frequency = 100*1000,
+ .sda_delay = 100,
+ .cfg_gpio = s5p6450_i2c0_cfg_gpio,
+};
+
+static struct s3c2410_platform_i2c s5p6450_i2c1_data __initdata = {
+ .flags = 0,
+ .bus_num = 1,
+ .slave_addr = 0x10,
+ .frequency = 100*1000,
+ .sda_delay = 100,
+ .cfg_gpio = s5p6450_i2c1_cfg_gpio,
+};
+
+static struct i2c_board_info smdk6450_i2c_devs0[] __initdata = {
+ { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung KS24C080C EEPROM */
+};
+
+static struct i2c_board_info smdk6450_i2c_devs1[] __initdata = {
+ { I2C_BOARD_INFO("24c128", 0x57), },/* Samsung S524AD0XD1 EEPROM */
+};
+
+static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
+ .delay = 10000,
+ .presc = 49,
+ .oversampling_shift = 2,
+};
+
+static void __init smdk6450_map_io(void)
+{
+ s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
+ s3c24xx_init_clocks(19200000);
+ s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs));
+}
+
+static void __init smdk6450_machine_init(void)
+{
+ s3c24xx_ts_set_platdata(&s3c_ts_platform);
+
+ s3c_i2c0_set_platdata(&s5p6450_i2c0_data);
+ s3c_i2c1_set_platdata(&s5p6450_i2c1_data);
+ i2c_register_board_info(0, smdk6450_i2c_devs0,
+ ARRAY_SIZE(smdk6450_i2c_devs0));
+ i2c_register_board_info(1, smdk6450_i2c_devs1,
+ ARRAY_SIZE(smdk6450_i2c_devs1));
+
+ platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
+}
+
+MACHINE_START(SMDK6450, "SMDK6450")
+ /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
+ .phys_io = S5P6450_PA_UART(0) & 0xfff00000,
+ .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+ .boot_params = S5P64X0_PA_SDRAM + 0x100,
+
+ .init_irq = s5p6450_init_irq,
+ .map_io = smdk6450_map_io,
+ .init_machine = smdk6450_machine_init,
+ .timer = &s3c24xx_timer,
+MACHINE_END
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 11/13] ARM: S5P64X0: Move SMDK6440 board file and Add SMDK6450 board file
@ 2010-09-01 7:09 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel
This patch moves smdk6440 board file from mach-s5p6440 into the new
mach-s5p64x0 directory and adds smdk6450 board file.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
.../{mach-s5p6440 => mach-s5p64x0}/mach-smdk6440.c | 87 ++++++----
arch/arm/mach-s5p64x0/mach-smdk6450.c | 182 ++++++++++++++++++++
2 files changed, 234 insertions(+), 35 deletions(-)
rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/mach-smdk6440.c (66%)
create mode 100644 arch/arm/mach-s5p64x0/mach-smdk6450.c
diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
similarity index 66%
rename from arch/arm/mach-s5p6440/mach-smdk6440.c
rename to arch/arm/mach-s5p64x0/mach-smdk6440.c
index 9202aaa..28de0a5 100644
--- a/arch/arm/mach-s5p6440/mach-smdk6440.c
+++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
@@ -1,7 +1,7 @@
-/* linux/arch/arm/mach-s5p6440/mach-smdk6440.c
+/* linux/arch/arm/mach-s5p64x0/mach-smdk6440.c
*
- * Copyright (c) 2009 Samsung Electronics Co., Ltd.
- * http://www.samsung.com/
+ * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -21,21 +21,22 @@
#include <linux/io.h>
#include <linux/module.h>
#include <linux/clk.h>
+#include <linux/gpio.h>
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
+#include <asm/irq.h>
+#include <asm/mach-types.h>
#include <mach/hardware.h>
#include <mach/map.h>
-
-#include <asm/irq.h>
-#include <asm/mach-types.h>
+#include <mach/regs-clock.h>
+#include <mach/i2c.h>
#include <plat/regs-serial.h>
-
+#include <plat/gpio-cfg.h>
#include <plat/s5p6440.h>
#include <plat/clock.h>
-#include <mach/regs-clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/iic.h>
@@ -58,43 +59,60 @@
static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
[0] = {
- .hwport = 0,
- .flags = 0,
- .ucon = SMDK6440_UCON_DEFAULT,
- .ulcon = SMDK6440_ULCON_DEFAULT,
- .ufcon = SMDK6440_UFCON_DEFAULT,
+ .hwport = 0,
+ .flags = 0,
+ .ucon = SMDK6440_UCON_DEFAULT,
+ .ulcon = SMDK6440_ULCON_DEFAULT,
+ .ufcon = SMDK6440_UFCON_DEFAULT,
},
[1] = {
- .hwport = 1,
- .flags = 0,
- .ucon = SMDK6440_UCON_DEFAULT,
- .ulcon = SMDK6440_ULCON_DEFAULT,
- .ufcon = SMDK6440_UFCON_DEFAULT,
+ .hwport = 1,
+ .flags = 0,
+ .ucon = SMDK6440_UCON_DEFAULT,
+ .ulcon = SMDK6440_ULCON_DEFAULT,
+ .ufcon = SMDK6440_UFCON_DEFAULT,
},
[2] = {
- .hwport = 2,
- .flags = 0,
- .ucon = SMDK6440_UCON_DEFAULT,
- .ulcon = SMDK6440_ULCON_DEFAULT,
- .ufcon = SMDK6440_UFCON_DEFAULT,
+ .hwport = 2,
+ .flags = 0,
+ .ucon = SMDK6440_UCON_DEFAULT,
+ .ulcon = SMDK6440_ULCON_DEFAULT,
+ .ufcon = SMDK6440_UFCON_DEFAULT,
},
[3] = {
- .hwport = 3,
- .flags = 0,
- .ucon = SMDK6440_UCON_DEFAULT,
- .ulcon = SMDK6440_ULCON_DEFAULT,
- .ufcon = SMDK6440_UFCON_DEFAULT,
+ .hwport = 3,
+ .flags = 0,
+ .ucon = SMDK6440_UCON_DEFAULT,
+ .ulcon = SMDK6440_ULCON_DEFAULT,
+ .ufcon = SMDK6440_UFCON_DEFAULT,
},
};
static struct platform_device *smdk6440_devices[] __initdata = {
- &s5p6440_device_iis,
&s3c_device_adc,
&s3c_device_rtc,
&s3c_device_i2c0,
&s3c_device_i2c1,
&s3c_device_ts,
&s3c_device_wdt,
+ &s5p6440_device_iis,
+};
+
+static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = {
+ .flags = 0,
+ .slave_addr = 0x10,
+ .frequency = 100*1000,
+ .sda_delay = 100,
+ .cfg_gpio = s5p6440_i2c0_cfg_gpio,
+};
+
+static struct s3c2410_platform_i2c s5p6440_i2c1_data __initdata = {
+ .flags = 0,
+ .bus_num = 1,
+ .slave_addr = 0x10,
+ .frequency = 100*1000,
+ .sda_delay = 100,
+ .cfg_gpio = s5p6440_i2c1_cfg_gpio,
};
static struct i2c_board_info smdk6440_i2c_devs0[] __initdata = {
@@ -113,7 +131,7 @@ static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
static void __init smdk6440_map_io(void)
{
- s5p_init_io(NULL, 0, S5P_SYS_ID);
+ s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
s3c24xx_init_clocks(12000000);
s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
}
@@ -122,9 +140,8 @@ static void __init smdk6440_machine_init(void)
{
s3c24xx_ts_set_platdata(&s3c_ts_platform);
- /* I2C */
- s3c_i2c0_set_platdata(NULL);
- s3c_i2c1_set_platdata(NULL);
+ s3c_i2c0_set_platdata(&s5p6440_i2c0_data);
+ s3c_i2c1_set_platdata(&s5p6440_i2c1_data);
i2c_register_board_info(0, smdk6440_i2c_devs0,
ARRAY_SIZE(smdk6440_i2c_devs0));
i2c_register_board_info(1, smdk6440_i2c_devs1,
@@ -135,9 +152,9 @@ static void __init smdk6440_machine_init(void)
MACHINE_START(SMDK6440, "SMDK6440")
/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
- .phys_io = S3C_PA_UART & 0xfff00000,
+ .phys_io = S5P6440_PA_UART(0) & 0xfff00000,
.io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
- .boot_params = S5P_PA_SDRAM + 0x100,
+ .boot_params = S5P64X0_PA_SDRAM + 0x100,
.init_irq = s5p6440_init_irq,
.map_io = smdk6440_map_io,
diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
new file mode 100644
index 0000000..8e98217
--- /dev/null
+++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
@@ -0,0 +1,182 @@
+/* linux/arch/arm/mach-s5p64x0/mach-smdk6450.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ * http://www.samsung.com
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/list.h>
+#include <linux/timer.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/serial_core.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/clk.h>
+#include <linux/gpio.h>
+
+#include <asm/mach/arch.h>
+#include <asm/mach/map.h>
+#include <asm/irq.h>
+#include <asm/mach-types.h>
+
+#include <mach/hardware.h>
+#include <mach/map.h>
+#include <mach/regs-clock.h>
+#include <mach/i2c.h>
+
+#include <plat/regs-serial.h>
+#include <plat/gpio-cfg.h>
+#include <plat/s5p6450.h>
+#include <plat/clock.h>
+#include <plat/devs.h>
+#include <plat/cpu.h>
+#include <plat/iic.h>
+#include <plat/pll.h>
+#include <plat/adc.h>
+#include <plat/ts.h>
+
+#define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
+ S3C2410_UCON_RXILEVEL | \
+ S3C2410_UCON_TXIRQMODE | \
+ S3C2410_UCON_RXIRQMODE | \
+ S3C2410_UCON_RXFIFO_TOI | \
+ S3C2443_UCON_RXERR_IRQEN)
+
+#define SMDK6450_ULCON_DEFAULT S3C2410_LCON_CS8
+
+#define SMDK6450_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
+ S3C2440_UFCON_TXTRIG16 | \
+ S3C2410_UFCON_RXTRIG8)
+
+static struct s3c2410_uartcfg smdk6450_uartcfgs[] __initdata = {
+ [0] = {
+ .hwport = 0,
+ .flags = 0,
+ .ucon = SMDK6450_UCON_DEFAULT,
+ .ulcon = SMDK6450_ULCON_DEFAULT,
+ .ufcon = SMDK6450_UFCON_DEFAULT,
+ },
+ [1] = {
+ .hwport = 1,
+ .flags = 0,
+ .ucon = SMDK6450_UCON_DEFAULT,
+ .ulcon = SMDK6450_ULCON_DEFAULT,
+ .ufcon = SMDK6450_UFCON_DEFAULT,
+ },
+ [2] = {
+ .hwport = 2,
+ .flags = 0,
+ .ucon = SMDK6450_UCON_DEFAULT,
+ .ulcon = SMDK6450_ULCON_DEFAULT,
+ .ufcon = SMDK6450_UFCON_DEFAULT,
+ },
+ [3] = {
+ .hwport = 3,
+ .flags = 0,
+ .ucon = SMDK6450_UCON_DEFAULT,
+ .ulcon = SMDK6450_ULCON_DEFAULT,
+ .ufcon = SMDK6450_UFCON_DEFAULT,
+ },
+#if CONFIG_SERIAL_SAMSUNG_UARTS > 4
+ [4] = {
+ .hwport = 4,
+ .flags = 0,
+ .ucon = SMDK6450_UCON_DEFAULT,
+ .ulcon = SMDK6450_ULCON_DEFAULT,
+ .ufcon = SMDK6450_UFCON_DEFAULT,
+ },
+#endif
+#if CONFIG_SERIAL_SAMSUNG_UARTS > 5
+ [5] = {
+ .hwport = 5,
+ .flags = 0,
+ .ucon = SMDK6450_UCON_DEFAULT,
+ .ulcon = SMDK6450_ULCON_DEFAULT,
+ .ufcon = SMDK6450_UFCON_DEFAULT,
+ },
+#endif
+};
+
+static struct platform_device *smdk6450_devices[] __initdata = {
+ &s3c_device_adc,
+ &s3c_device_rtc,
+ &s3c_device_i2c0,
+ &s3c_device_i2c1,
+ &s3c_device_ts,
+ &s3c_device_wdt,
+ &s5p6450_device_iis0,
+ /* s5p6450_device_spi0 will be added */
+};
+
+static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = {
+ .flags = 0,
+ .slave_addr = 0x10,
+ .frequency = 100*1000,
+ .sda_delay = 100,
+ .cfg_gpio = s5p6450_i2c0_cfg_gpio,
+};
+
+static struct s3c2410_platform_i2c s5p6450_i2c1_data __initdata = {
+ .flags = 0,
+ .bus_num = 1,
+ .slave_addr = 0x10,
+ .frequency = 100*1000,
+ .sda_delay = 100,
+ .cfg_gpio = s5p6450_i2c1_cfg_gpio,
+};
+
+static struct i2c_board_info smdk6450_i2c_devs0[] __initdata = {
+ { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung KS24C080C EEPROM */
+};
+
+static struct i2c_board_info smdk6450_i2c_devs1[] __initdata = {
+ { I2C_BOARD_INFO("24c128", 0x57), },/* Samsung S524AD0XD1 EEPROM */
+};
+
+static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
+ .delay = 10000,
+ .presc = 49,
+ .oversampling_shift = 2,
+};
+
+static void __init smdk6450_map_io(void)
+{
+ s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
+ s3c24xx_init_clocks(19200000);
+ s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs));
+}
+
+static void __init smdk6450_machine_init(void)
+{
+ s3c24xx_ts_set_platdata(&s3c_ts_platform);
+
+ s3c_i2c0_set_platdata(&s5p6450_i2c0_data);
+ s3c_i2c1_set_platdata(&s5p6450_i2c1_data);
+ i2c_register_board_info(0, smdk6450_i2c_devs0,
+ ARRAY_SIZE(smdk6450_i2c_devs0));
+ i2c_register_board_info(1, smdk6450_i2c_devs1,
+ ARRAY_SIZE(smdk6450_i2c_devs1));
+
+ platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
+}
+
+MACHINE_START(SMDK6450, "SMDK6450")
+ /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
+ .phys_io = S5P6450_PA_UART(0) & 0xfff00000,
+ .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
+ .boot_params = S5P64X0_PA_SDRAM + 0x100,
+
+ .init_irq = s5p6450_init_irq,
+ .map_io = smdk6450_map_io,
+ .init_machine = smdk6450_machine_init,
+ .timer = &s3c24xx_timer,
+MACHINE_END
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 12/13] ARM: S5P64X0: Add UART serial support for S5P6450
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 7:09 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel, linux-samsung-soc; +Cc: ben-linux, Kukjin Kim
This patch adds UART serial port support for S5P6450 SoC.
The S5P6450 has 6 UARTs, so adds resource of UART4 and UART5.
And to fix membase which is in serial/samsung.c is from Ben Dooks.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
---
arch/arm/plat-s5p/dev-uart.c | 58 ++++++++++++++++++++++++++++++++++++++++++
drivers/serial/Kconfig | 7 +++--
drivers/serial/samsung.c | 2 +-
3 files changed, 63 insertions(+), 4 deletions(-)
diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-s5p/dev-uart.c
index a89331e..6a73428 100644
--- a/arch/arm/plat-s5p/dev-uart.c
+++ b/arch/arm/plat-s5p/dev-uart.c
@@ -119,6 +119,56 @@ static struct resource s5p_uart3_resource[] = {
#endif
};
+static struct resource s5p_uart4_resource[] = {
+#if CONFIG_SERIAL_SAMSUNG_UARTS > 4
+ [0] = {
+ .start = S5P_PA_UART4,
+ .end = S5P_PA_UART4 + S5P_SZ_UART,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_S5P_UART_RX4,
+ .end = IRQ_S5P_UART_RX4,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = IRQ_S5P_UART_TX4,
+ .end = IRQ_S5P_UART_TX4,
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ .start = IRQ_S5P_UART_ERR4,
+ .end = IRQ_S5P_UART_ERR4,
+ .flags = IORESOURCE_IRQ,
+ },
+#endif
+};
+
+static struct resource s5p_uart5_resource[] = {
+#if CONFIG_SERIAL_SAMSUNG_UARTS > 5
+ [0] = {
+ .start = S5P_PA_UART5,
+ .end = S5P_PA_UART5 + S5P_SZ_UART,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_S5P_UART_RX5,
+ .end = IRQ_S5P_UART_RX5,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = IRQ_S5P_UART_TX5,
+ .end = IRQ_S5P_UART_TX5,
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ .start = IRQ_S5P_UART_ERR5,
+ .end = IRQ_S5P_UART_ERR5,
+ .flags = IORESOURCE_IRQ,
+ },
+#endif
+};
+
struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = {
[0] = {
.resources = s5p_uart0_resource,
@@ -136,4 +186,12 @@ struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = {
.resources = s5p_uart3_resource,
.nr_resources = ARRAY_SIZE(s5p_uart3_resource),
},
+ [4] = {
+ .resources = s5p_uart4_resource,
+ .nr_resources = ARRAY_SIZE(s5p_uart4_resource),
+ },
+ [5] = {
+ .resources = s5p_uart5_resource,
+ .nr_resources = ARRAY_SIZE(s5p_uart5_resource),
+ },
};
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 12900f7..3198c53 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -458,6 +458,7 @@ config SERIAL_SAMSUNG_UARTS
int
depends on ARM && PLAT_SAMSUNG
default 2 if ARCH_S3C2400
+ default 6 if ARCH_S5P6450
default 4 if SERIAL_SAMSUNG_UARTS_4
default 3
help
@@ -526,12 +527,12 @@ config SERIAL_S3C24A0
Serial port support for the Samsung S3C24A0 SoC
config SERIAL_S3C6400
- tristate "Samsung S3C6400/S3C6410/S5P6440/S5PC100 Serial port support"
- depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5PC100)
+ tristate "Samsung S3C6400/S3C6410/S5P6440/S5P6450/S5PC100 Serial port support"
+ depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5P6450 || CPU_S5PC100)
select SERIAL_SAMSUNG_UARTS_4
default y
help
- Serial port support for the Samsung S3C6400, S3C6410, S5P6440
+ Serial port support for the Samsung S3C6400, S3C6410, S5P6440, S5P6450
and S5PC100 SoCs
config SERIAL_S5PV210
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c
index b1156ba..7ac2bf5 100644
--- a/drivers/serial/samsung.c
+++ b/drivers/serial/samsung.c
@@ -1101,7 +1101,7 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
dbg("resource %p (%lx..%lx)\n", res, res->start, res->end);
port->mapbase = res->start;
- port->membase = S3C_VA_UART + res->start - (S3C_PA_UART & 0xfff00000);
+ port->membase = S3C_VA_UART + (res->start & 0xfffff);
ret = platform_get_irq(platdev, 0);
if (ret < 0)
port->irq = 0;
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 12/13] ARM: S5P64X0: Add UART serial support for S5P6450
@ 2010-09-01 7:09 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds UART serial port support for S5P6450 SoC.
The S5P6450 has 6 UARTs, so adds resource of UART4 and UART5.
And to fix membase which is in serial/samsung.c is from Ben Dooks.
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Cc: Ben Dooks <ben-linux@fluff.org>
---
arch/arm/plat-s5p/dev-uart.c | 58 ++++++++++++++++++++++++++++++++++++++++++
drivers/serial/Kconfig | 7 +++--
drivers/serial/samsung.c | 2 +-
3 files changed, 63 insertions(+), 4 deletions(-)
diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-s5p/dev-uart.c
index a89331e..6a73428 100644
--- a/arch/arm/plat-s5p/dev-uart.c
+++ b/arch/arm/plat-s5p/dev-uart.c
@@ -119,6 +119,56 @@ static struct resource s5p_uart3_resource[] = {
#endif
};
+static struct resource s5p_uart4_resource[] = {
+#if CONFIG_SERIAL_SAMSUNG_UARTS > 4
+ [0] = {
+ .start = S5P_PA_UART4,
+ .end = S5P_PA_UART4 + S5P_SZ_UART,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_S5P_UART_RX4,
+ .end = IRQ_S5P_UART_RX4,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = IRQ_S5P_UART_TX4,
+ .end = IRQ_S5P_UART_TX4,
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ .start = IRQ_S5P_UART_ERR4,
+ .end = IRQ_S5P_UART_ERR4,
+ .flags = IORESOURCE_IRQ,
+ },
+#endif
+};
+
+static struct resource s5p_uart5_resource[] = {
+#if CONFIG_SERIAL_SAMSUNG_UARTS > 5
+ [0] = {
+ .start = S5P_PA_UART5,
+ .end = S5P_PA_UART5 + S5P_SZ_UART,
+ .flags = IORESOURCE_MEM,
+ },
+ [1] = {
+ .start = IRQ_S5P_UART_RX5,
+ .end = IRQ_S5P_UART_RX5,
+ .flags = IORESOURCE_IRQ,
+ },
+ [2] = {
+ .start = IRQ_S5P_UART_TX5,
+ .end = IRQ_S5P_UART_TX5,
+ .flags = IORESOURCE_IRQ,
+ },
+ [3] = {
+ .start = IRQ_S5P_UART_ERR5,
+ .end = IRQ_S5P_UART_ERR5,
+ .flags = IORESOURCE_IRQ,
+ },
+#endif
+};
+
struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = {
[0] = {
.resources = s5p_uart0_resource,
@@ -136,4 +186,12 @@ struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = {
.resources = s5p_uart3_resource,
.nr_resources = ARRAY_SIZE(s5p_uart3_resource),
},
+ [4] = {
+ .resources = s5p_uart4_resource,
+ .nr_resources = ARRAY_SIZE(s5p_uart4_resource),
+ },
+ [5] = {
+ .resources = s5p_uart5_resource,
+ .nr_resources = ARRAY_SIZE(s5p_uart5_resource),
+ },
};
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 12900f7..3198c53 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -458,6 +458,7 @@ config SERIAL_SAMSUNG_UARTS
int
depends on ARM && PLAT_SAMSUNG
default 2 if ARCH_S3C2400
+ default 6 if ARCH_S5P6450
default 4 if SERIAL_SAMSUNG_UARTS_4
default 3
help
@@ -526,12 +527,12 @@ config SERIAL_S3C24A0
Serial port support for the Samsung S3C24A0 SoC
config SERIAL_S3C6400
- tristate "Samsung S3C6400/S3C6410/S5P6440/S5PC100 Serial port support"
- depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5PC100)
+ tristate "Samsung S3C6400/S3C6410/S5P6440/S5P6450/S5PC100 Serial port support"
+ depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5P6450 || CPU_S5PC100)
select SERIAL_SAMSUNG_UARTS_4
default y
help
- Serial port support for the Samsung S3C6400, S3C6410, S5P6440
+ Serial port support for the Samsung S3C6400, S3C6410, S5P6440, S5P6450
and S5PC100 SoCs
config SERIAL_S5PV210
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c
index b1156ba..7ac2bf5 100644
--- a/drivers/serial/samsung.c
+++ b/drivers/serial/samsung.c
@@ -1101,7 +1101,7 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
dbg("resource %p (%lx..%lx)\n", res, res->start, res->end);
port->mapbase = res->start;
- port->membase = S3C_VA_UART + res->start - (S3C_PA_UART & 0xfff00000);
+ port->membase = S3C_VA_UART + (res->start & 0xfffff);
ret = platform_get_irq(platdev, 0);
if (ret < 0)
port->irq = 0;
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 13/13] ARM: s5p64x0_defconfig: Update for support S5P6440 and S5P6450
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 7:09 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel, linux-samsung-soc; +Cc: ben-linux, Kukjin Kim
This patch updates s5p64x0_defconfig and changes the name from
s5p6440_defconfig so that can support S5P6440 and S5P6450 with
one kernel.
Tested on SMDK6440(S5P6440) and SMDK6450(S5P6450).
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
.../{s5p6440_defconfig => s5p64x0_defconfig} | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
rename arch/arm/configs/{s5p6440_defconfig => s5p64x0_defconfig} (97%)
diff --git a/arch/arm/configs/s5p6440_defconfig b/arch/arm/configs/s5p64x0_defconfig
similarity index 97%
rename from arch/arm/configs/s5p6440_defconfig
rename to arch/arm/configs/s5p64x0_defconfig
index 0b0266c..2993ecd 100644
--- a/arch/arm/configs/s5p6440_defconfig
+++ b/arch/arm/configs/s5p64x0_defconfig
@@ -5,10 +5,11 @@ CONFIG_KALLSYMS_ALL=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_S5P6440=y
+CONFIG_ARCH_S5P64X0=y
CONFIG_S3C_BOOT_ERROR_RESET=y
CONFIG_S3C_LOWLEVEL_UART_PORT=1
CONFIG_MACH_SMDK6440=y
+CONFIG_MACH_SMDK6450=y
CONFIG_CPU_32v6K=y
CONFIG_AEABI=y
CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* [PATCH 13/13] ARM: s5p64x0_defconfig: Update for support S5P6440 and S5P6450
@ 2010-09-01 7:09 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-01 7:09 UTC (permalink / raw)
To: linux-arm-kernel
This patch updates s5p64x0_defconfig and changes the name from
s5p6440_defconfig so that can support S5P6440 and S5P6450 with
one kernel.
Tested on SMDK6440(S5P6440) and SMDK6450(S5P6450).
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---
.../{s5p6440_defconfig => s5p64x0_defconfig} | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
rename arch/arm/configs/{s5p6440_defconfig => s5p64x0_defconfig} (97%)
diff --git a/arch/arm/configs/s5p6440_defconfig b/arch/arm/configs/s5p64x0_defconfig
similarity index 97%
rename from arch/arm/configs/s5p6440_defconfig
rename to arch/arm/configs/s5p64x0_defconfig
index 0b0266c..2993ecd 100644
--- a/arch/arm/configs/s5p6440_defconfig
+++ b/arch/arm/configs/s5p64x0_defconfig
@@ -5,10 +5,11 @@ CONFIG_KALLSYMS_ALL=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
-CONFIG_ARCH_S5P6440=y
+CONFIG_ARCH_S5P64X0=y
CONFIG_S3C_BOOT_ERROR_RESET=y
CONFIG_S3C_LOWLEVEL_UART_PORT=1
CONFIG_MACH_SMDK6440=y
+CONFIG_MACH_SMDK6450=y
CONFIG_CPU_32v6K=y
CONFIG_AEABI=y
CONFIG_CMDLINE="root=/dev/ram0 rw ramdisk=8192 initrd=0x20800000,8M console=ttySAC1,115200 init=/linuxrc"
--
1.6.2.5
^ permalink raw reply related [flat|nested] 52+ messages in thread
* Re: [PATCH 01/13] ARM: S5P: Moves initial map for merging S5P64X0
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 9:42 ` Kyungmin Park
-1 siblings, 0 replies; 52+ messages in thread
From: Kyungmin Park @ 2010-09-01 9:42 UTC (permalink / raw)
To: Kukjin Kim; +Cc: linux-arm-kernel, linux-samsung-soc, ben-linux
For long time you insist to use the S5P prefix, but it's changed to
each SoC name.
anyway good move.
On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> This patch moves some initial maps from plat-s5p to machine,
> so that can merge mach-s5p6440 and mach-s5p6450.
>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
> arch/arm/mach-s5p6440/cpu.c | 37 ++++++++++++++++++++++++++---
> arch/arm/mach-s5p6440/include/mach/map.h | 7 +-----
> arch/arm/mach-s5p6442/cpu.c | 27 +++++++++++++++++++--
> arch/arm/mach-s5p6442/include/mach/map.h | 6 -----
> arch/arm/mach-s5pc100/cpu.c | 25 +++++++++++++++++++-
> arch/arm/mach-s5pc100/include/mach/map.h | 11 +++-----
> arch/arm/mach-s5pv210/cpu.c | 22 +++++++++++++++++-
> arch/arm/mach-s5pv210/include/mach/map.h | 8 ------
> arch/arm/mach-s5pv310/cpu.c | 26 ++++++++++++++------
> arch/arm/plat-s5p/cpu.c | 22 -----------------
> 10 files changed, 125 insertions(+), 66 deletions(-)
>
> diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c
> index 526f33a..a3c33d9 100644
> --- a/arch/arm/mach-s5p6440/cpu.c
> +++ b/arch/arm/mach-s5p6440/cpu.c
> @@ -1,7 +1,7 @@
> /* linux/arch/arm/mach-s5p6440/cpu.c
> *
> - * Copyright (c) 2009 Samsung Electronics Co., Ltd.
> - * http://www.samsung.com/
> + * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> *
> * This program is free software; you can redistribute it and/or modify
> * it under the terms of the GNU General Public License version 2 as
> @@ -39,6 +39,32 @@
> #include <plat/s5p6440.h>
> #include <plat/adc-core.h>
>
> +/* Initial IO mappings */
> +
> +static struct map_desc s5p6440_iodesc[] __initdata = {
> + {
> + .virtual = (unsigned long)S5P_VA_GPIO,
> + .pfn = __phys_to_pfn(S5P6440_PA_GPIO),
> + .length = SZ_4K,
> + .type = MT_DEVICE,
> + }, {
> + .virtual = (unsigned long)VA_VIC0,
> + .pfn = __phys_to_pfn(S5P6440_PA_VIC0),
> + .length = SZ_16K,
> + .type = MT_DEVICE,
> + }, {
> + .virtual = (unsigned long)VA_VIC1,
> + .pfn = __phys_to_pfn(S5P6440_PA_VIC1),
> + .length = SZ_16K,
> + .type = MT_DEVICE,
> + }, {
> + .virtual = (unsigned long)S3C_VA_UART,
> + .pfn = __phys_to_pfn(S3C_PA_UART),
> + .length = SZ_512K,
Yes it's just move to each SoCs. but It's too big some SoCs which has
0x400 offset. I think 8K is enough to cover uart.
> + .type = MT_DEVICE,
> + }
> +};
> +
> static void s5p6440_idle(void)
> {
> unsigned long val;
> @@ -54,15 +80,18 @@ static void s5p6440_idle(void)
> local_irq_enable();
> }
>
> -/* s5p6440_map_io
> +/*
> + * s5p6440_map_io
> *
> * register the standard cpu IO areas
> -*/
> + */
>
> void __init s5p6440_map_io(void)
> {
> /* initialize any device information early */
> s3c_adc_setname("s3c64xx-adc");
> +
> + iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
> }
>
> void __init s5p6440_init_clocks(int xtal)
> diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h
> index 6cc5cbc..11d31fe 100644
> --- a/arch/arm/mach-s5p6440/include/mach/map.h
> +++ b/arch/arm/mach-s5p6440/include/mach/map.h
> @@ -24,23 +24,18 @@
> #define S5P_PA_SYSCON S5P6440_PA_SYSCON
>
> #define S5P6440_PA_GPIO (0xE0308000)
> -#define S5P_PA_GPIO S5P6440_PA_GPIO
>
> #define S5P6440_PA_VIC0 (0xE4000000)
> -#define S5P_PA_VIC0 S5P6440_PA_VIC0
> +#define S5P6440_PA_VIC1 (0xE4100000)
>
> #define S5P6440_PA_PDMA 0xE9000000
>
> -#define S5P6440_PA_VIC1 (0xE4100000)
> -#define S5P_PA_VIC1 S5P6440_PA_VIC1
> -
> #define S5P6440_PA_TIMER (0xEA000000)
> #define S5P_PA_TIMER S5P6440_PA_TIMER
>
> #define S5P6440_PA_RTC (0xEA100000)
>
> #define S5P6440_PA_WDT (0xEA200000)
> -#define S5P_PA_WDT S5P6440_PA_WDT
>
> #define S5P6440_PA_UART (0xEC000000)
>
> diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c
> index a48fb55..d3ab268 100644
> --- a/arch/arm/mach-s5p6442/cpu.c
> +++ b/arch/arm/mach-s5p6442/cpu.c
> @@ -1,7 +1,7 @@
> /* linux/arch/arm/mach-s5p6442/cpu.c
> *
> * Copyright (c) 2010 Samsung Electronics Co., Ltd.
> - * http://www.samsung.com/
> + * http://www.samsung.com
> *
> * This program is free software; you can redistribute it and/or modify
> * it under the terms of the GNU General Public License version 2 as
> @@ -47,10 +47,30 @@ static struct map_desc s5p6442_iodesc[] __initdata = {
> .length = SZ_16K,
> .type = MT_DEVICE,
> }, {
> + .virtual = (unsigned long)S5P_VA_GPIO,
> + .pfn = __phys_to_pfn(S5P6442_PA_GPIO),
> + .length = SZ_4K,
> + .type = MT_DEVICE,
> + }, {
> + .virtual = (unsigned long)VA_VIC0,
> + .pfn = __phys_to_pfn(S5P6442_PA_VIC0),
> + .length = SZ_16K,
> + .type = MT_DEVICE,
> + }, {
> + .virtual = (unsigned long)VA_VIC1,
> + .pfn = __phys_to_pfn(S5P6442_PA_VIC1),
> + .length = SZ_16K,
> + .type = MT_DEVICE,
> + }, {
> .virtual = (unsigned long)VA_VIC2,
> .pfn = __phys_to_pfn(S5P6442_PA_VIC2),
> .length = SZ_16K,
> .type = MT_DEVICE,
> + }, {
> + .virtual = (unsigned long)S3C_VA_UART,
> + .pfn = __phys_to_pfn(S3C_PA_UART),
> + .length = SZ_512K,
> + .type = MT_DEVICE,
> }
> };
>
> @@ -62,10 +82,11 @@ static void s5p6442_idle(void)
> local_irq_enable();
> }
>
> -/* s5p6442_map_io
> +/*
> + * s5p6442_map_io
> *
> * register the standard cpu IO areas
> -*/
> + */
>
> void __init s5p6442_map_io(void)
> {
> diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
> index 281d256..31fb2e6 100644
> --- a/arch/arm/mach-s5p6442/include/mach/map.h
> +++ b/arch/arm/mach-s5p6442/include/mach/map.h
> @@ -23,16 +23,10 @@
> #define S5P_PA_SYSCON S5P6442_PA_SYSCON
>
> #define S5P6442_PA_GPIO (0xE0200000)
> -#define S5P_PA_GPIO S5P6442_PA_GPIO
>
> #define S5P6442_PA_VIC0 (0xE4000000)
> -#define S5P_PA_VIC0 S5P6442_PA_VIC0
> -
> #define S5P6442_PA_VIC1 (0xE4100000)
> -#define S5P_PA_VIC1 S5P6442_PA_VIC1
> -
> #define S5P6442_PA_VIC2 (0xE4200000)
> -#define S5P_PA_VIC2 S5P6442_PA_VIC2
>
> #define S5P6442_PA_MDMA 0xE8000000
> #define S5P6442_PA_PDMA 0xE9000000
> diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/cpu.c
> index 251c92a..d13552c 100644
> --- a/arch/arm/mach-s5pc100/cpu.c
> +++ b/arch/arm/mach-s5pc100/cpu.c
> @@ -1,5 +1,8 @@
> /* linux/arch/arm/mach-s5pc100/cpu.c
> *
> + * Copyright (c) 2010 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + *
> * Copyright 2009 Samsung Electronics Co.
> * Byungho Min <bhmin@samsung.com>
> *
> @@ -56,11 +59,31 @@ static struct map_desc s5pc100_iodesc[] __initdata = {
> .length = SZ_16K,
> .type = MT_DEVICE,
> }, {
> + .virtual = (unsigned long)S5P_VA_GPIO,
> + .pfn = __phys_to_pfn(S5PC100_PA_GPIO),
> + .length = SZ_4K,
> + .type = MT_DEVICE,
> + }, {
> + .virtual = (unsigned long)VA_VIC0,
> + .pfn = __phys_to_pfn(S5PC100_PA_VIC0),
> + .length = SZ_16K,
> + .type = MT_DEVICE,
> + }, {
> + .virtual = (unsigned long)VA_VIC1,
> + .pfn = __phys_to_pfn(S5PC100_PA_VIC1),
> + .length = SZ_16K,
> + .type = MT_DEVICE,
> + }, {
> .virtual = (unsigned long)VA_VIC2,
> - .pfn = __phys_to_pfn(S5P_PA_VIC2),
> + .pfn = __phys_to_pfn(S5PC100_PA_VIC2),
> .length = SZ_16K,
> .type = MT_DEVICE,
> }, {
> + .virtual = (unsigned long)S3C_VA_UART,
> + .pfn = __phys_to_pfn(S3C_PA_UART),
> + .length = SZ_512K,
> + .type = MT_DEVICE,
> + }, {
> .virtual = (unsigned long)S5PC100_VA_OTHERS,
> .pfn = __phys_to_pfn(S5PC100_PA_OTHERS),
> .length = SZ_4K,
> diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
> index 01b9134..8751ef4 100644
> --- a/arch/arm/mach-s5pc100/include/mach/map.h
> +++ b/arch/arm/mach-s5pc100/include/mach/map.h
> @@ -44,19 +44,16 @@
> #define S5PC100_PA_OTHERS (0xE0200000)
> #define S5PC100_VA_OTHERS (S3C_VA_SYS + 0x10000)
>
> -#define S5P_PA_GPIO (0xE0300000)
> +#define S5PC100_PA_GPIO (0xE0300000)
> #define S5PC1XX_VA_GPIO S3C_ADDR(0x00500000)
>
> /* Interrupt */
> -#define S5PC100_PA_VIC (0xE4000000)
> +#define S5PC100_PA_VIC0 (0xE4000000)
> +#define S5PC100_PA_VIC1 (0xE4100000)
> +#define S5PC100_PA_VIC2 (0xE4200000)
> #define S5PC100_VA_VIC S3C_VA_IRQ
> -#define S5PC100_PA_VIC_OFFSET 0x100000
> #define S5PC100_VA_VIC_OFFSET 0x10000
> -#define S5PC1XX_PA_VIC(x) (S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET))
> #define S5PC1XX_VA_VIC(x) (S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET))
> -#define S5P_PA_VIC0 S5PC1XX_PA_VIC(0)
> -#define S5P_PA_VIC1 S5PC1XX_PA_VIC(1)
> -#define S5P_PA_VIC2 S5PC1XX_PA_VIC(2)
>
>
> #define S5PC100_PA_ONENAND (0xE7100000)
> diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
> index b9f4d67..00f9ca1 100644
> --- a/arch/arm/mach-s5pv210/cpu.c
> +++ b/arch/arm/mach-s5pv210/cpu.c
> @@ -1,7 +1,7 @@
> /* linux/arch/arm/mach-s5pv210/cpu.c
> *
> * Copyright (c) 2010 Samsung Electronics Co., Ltd.
> - * http://www.samsung.com/
> + * http://www.samsung.com
> *
> * This program is free software; you can redistribute it and/or modify
> * it under the terms of the GNU General Public License version 2 as
> @@ -50,6 +50,21 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
> .length = SZ_1M,
> .type = MT_DEVICE,
> }, {
> + .virtual = (unsigned long)S5P_VA_GPIO,
> + .pfn = __phys_to_pfn(S5PV210_PA_GPIO),
> + .length = SZ_4K,
> + .type = MT_DEVICE,
> + }, {
> + .virtual = (unsigned long)VA_VIC0,
> + .pfn = __phys_to_pfn(S5PV210_PA_VIC0),
> + .length = SZ_16K,
> + .type = MT_DEVICE,
> + }, {
> + .virtual = (unsigned long)VA_VIC1,
> + .pfn = __phys_to_pfn(S5PV210_PA_VIC1),
> + .length = SZ_16K,
> + .type = MT_DEVICE,
> + }, {
> .virtual = (unsigned long)VA_VIC2,
> .pfn = __phys_to_pfn(S5PV210_PA_VIC2),
> .length = SZ_16K,
> @@ -60,6 +75,11 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
> .length = SZ_16K,
> .type = MT_DEVICE,
> }, {
> + .virtual = (unsigned long)S3C_VA_UART,
> + .pfn = __phys_to_pfn(S3C_PA_UART),
> + .length = SZ_512K,
> + .type = MT_DEVICE,
> + }, {
> .virtual = (unsigned long)S5P_VA_SROMC,
> .pfn = __phys_to_pfn(S5PV210_PA_SROMC),
> .length = SZ_4K,
> diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
> index dd4fb6b..cc50541 100644
> --- a/arch/arm/mach-s5pv210/include/mach/map.h
> +++ b/arch/arm/mach-s5pv210/include/mach/map.h
> @@ -26,7 +26,6 @@
> #define S5P_PA_SYSCON S5PV210_PA_SYSCON
>
> #define S5PV210_PA_GPIO (0xE0200000)
> -#define S5P_PA_GPIO S5PV210_PA_GPIO
>
> /* SPI */
> #define S5PV210_PA_SPI0 0xE1300000
> @@ -72,16 +71,9 @@
> #define S5PV210_PA_HSMMC(x) (0xEB000000 + ((x) * 0x100000))
>
> #define S5PV210_PA_VIC0 (0xF2000000)
> -#define S5P_PA_VIC0 S5PV210_PA_VIC0
> -
> #define S5PV210_PA_VIC1 (0xF2100000)
> -#define S5P_PA_VIC1 S5PV210_PA_VIC1
> -
> #define S5PV210_PA_VIC2 (0xF2200000)
> -#define S5P_PA_VIC2 S5PV210_PA_VIC2
> -
> #define S5PV210_PA_VIC3 (0xF2300000)
> -#define S5P_PA_VIC3 S5PV210_PA_VIC3
>
> #define S5PV210_PA_SDRAM (0x20000000)
> #define S5P_PA_SDRAM S5PV210_PA_SDRAM
> diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c
> index e5b261a..3b9c872 100644
> --- a/arch/arm/mach-s5pv310/cpu.c
> +++ b/arch/arm/mach-s5pv310/cpu.c
> @@ -31,9 +31,14 @@ extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
> /* Initial IO mappings */
> static struct map_desc s5pv310_iodesc[] __initdata = {
> {
> - .virtual = (unsigned long)S5P_VA_COREPERI_BASE,
> - .pfn = __phys_to_pfn(S5PV310_PA_COREPERI),
> - .length = SZ_8K,
> + .virtual = (unsigned long)S5P_VA_SYSRAM,
> + .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM),
> + .length = SZ_4K,
> + .type = MT_DEVICE,
> + }, {
> + .virtual = (unsigned long)S5P_VA_CMU,
> + .pfn = __phys_to_pfn(S5PV310_PA_CMU),
> + .length = SZ_128K,
> .type = MT_DEVICE,
> }, {
> .virtual = (unsigned long)S5P_VA_COMBINER_BASE,
> @@ -41,19 +46,24 @@ static struct map_desc s5pv310_iodesc[] __initdata = {
> .length = SZ_4K,
> .type = MT_DEVICE,
> }, {
> + .virtual = (unsigned long)S5P_VA_COREPERI_BASE,
> + .pfn = __phys_to_pfn(S5PV310_PA_COREPERI),
> + .length = SZ_8K,
> + .type = MT_DEVICE,
> + }, {
> .virtual = (unsigned long)S5P_VA_L2CC,
> .pfn = __phys_to_pfn(S5PV310_PA_L2CC),
> .length = SZ_4K,
> .type = MT_DEVICE,
> }, {
> - .virtual = (unsigned long)S5P_VA_SYSRAM,
> - .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM),
> + .virtual = (unsigned long)S5P_VA_GPIO,
> + .pfn = __phys_to_pfn(S5PV310_PA_GPIO),
> .length = SZ_4K,
> .type = MT_DEVICE,
> }, {
> - .virtual = (unsigned long)S5P_VA_CMU,
> - .pfn = __phys_to_pfn(S5PV310_PA_CMU),
> - .length = SZ_128K,
> + .virtual = (unsigned long)S3C_VA_UART,
> + .pfn = __phys_to_pfn(S3C_PA_UART),
> + .length = SZ_512K,
> .type = MT_DEVICE,
> },
> };
> diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
> index b07a078..57f08ee 100644
> --- a/arch/arm/plat-s5p/cpu.c
> +++ b/arch/arm/plat-s5p/cpu.c
> @@ -89,33 +89,11 @@ static struct map_desc s5p_iodesc[] __initdata = {
> .length = SZ_64K,
> .type = MT_DEVICE,
> }, {
> - .virtual = (unsigned long)S3C_VA_UART,
> - .pfn = __phys_to_pfn(S3C_PA_UART),
> - .length = SZ_512K,
> - .type = MT_DEVICE,
> -#ifdef CONFIG_ARM_VIC
> - }, {
> - .virtual = (unsigned long)VA_VIC0,
> - .pfn = __phys_to_pfn(S5P_PA_VIC0),
> - .length = SZ_16K,
> - .type = MT_DEVICE,
> - }, {
> - .virtual = (unsigned long)VA_VIC1,
> - .pfn = __phys_to_pfn(S5P_PA_VIC1),
> - .length = SZ_16K,
> - .type = MT_DEVICE,
> -#endif
> - }, {
> .virtual = (unsigned long)S3C_VA_TIMER,
> .pfn = __phys_to_pfn(S5P_PA_TIMER),
> .length = SZ_16K,
> .type = MT_DEVICE,
> }, {
> - .virtual = (unsigned long)S5P_VA_GPIO,
> - .pfn = __phys_to_pfn(S5P_PA_GPIO),
> - .length = SZ_4K,
> - .type = MT_DEVICE,
> - }, {
> .virtual = (unsigned long)S3C_VA_WATCHDOG,
> .pfn = __phys_to_pfn(S3C_PA_WDT),
> .length = SZ_4K,
> --
> 1.6.2.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH 01/13] ARM: S5P: Moves initial map for merging S5P64X0
@ 2010-09-01 9:42 ` Kyungmin Park
0 siblings, 0 replies; 52+ messages in thread
From: Kyungmin Park @ 2010-09-01 9:42 UTC (permalink / raw)
To: linux-arm-kernel
For long time you insist to use the S5P prefix, but it's changed to
each SoC name.
anyway good move.
On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> This patch moves some initial maps from plat-s5p to machine,
> so that can merge mach-s5p6440 and mach-s5p6450.
>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
> ?arch/arm/mach-s5p6440/cpu.c ? ? ? ? ? ? ?| ? 37 ++++++++++++++++++++++++++---
> ?arch/arm/mach-s5p6440/include/mach/map.h | ? ?7 +-----
> ?arch/arm/mach-s5p6442/cpu.c ? ? ? ? ? ? ?| ? 27 +++++++++++++++++++--
> ?arch/arm/mach-s5p6442/include/mach/map.h | ? ?6 -----
> ?arch/arm/mach-s5pc100/cpu.c ? ? ? ? ? ? ?| ? 25 +++++++++++++++++++-
> ?arch/arm/mach-s5pc100/include/mach/map.h | ? 11 +++-----
> ?arch/arm/mach-s5pv210/cpu.c ? ? ? ? ? ? ?| ? 22 +++++++++++++++++-
> ?arch/arm/mach-s5pv210/include/mach/map.h | ? ?8 ------
> ?arch/arm/mach-s5pv310/cpu.c ? ? ? ? ? ? ?| ? 26 ++++++++++++++------
> ?arch/arm/plat-s5p/cpu.c ? ? ? ? ? ? ? ? ?| ? 22 -----------------
> ?10 files changed, 125 insertions(+), 66 deletions(-)
>
> diff --git a/arch/arm/mach-s5p6440/cpu.c b/arch/arm/mach-s5p6440/cpu.c
> index 526f33a..a3c33d9 100644
> --- a/arch/arm/mach-s5p6440/cpu.c
> +++ b/arch/arm/mach-s5p6440/cpu.c
> @@ -1,7 +1,7 @@
> ?/* linux/arch/arm/mach-s5p6440/cpu.c
> ?*
> - * Copyright (c) 2009 Samsung Electronics Co., Ltd.
> - * ? ? ? ? ? ? http://www.samsung.com/
> + * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
> + * ? ? ? ? ? ? http://www.samsung.com
> ?*
> ?* This program is free software; you can redistribute it and/or modify
> ?* it under the terms of the GNU General Public License version 2 as
> @@ -39,6 +39,32 @@
> ?#include <plat/s5p6440.h>
> ?#include <plat/adc-core.h>
>
> +/* Initial IO mappings */
> +
> +static struct map_desc s5p6440_iodesc[] __initdata = {
> + ? ? ? {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S5P_VA_GPIO,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5P6440_PA_GPIO),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_4K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)VA_VIC0,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5P6440_PA_VIC0),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_16K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)VA_VIC1,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5P6440_PA_VIC1),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_16K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S3C_VA_UART,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S3C_PA_UART),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_512K,
Yes it's just move to each SoCs. but It's too big some SoCs which has
0x400 offset. I think 8K is enough to cover uart.
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }
> +};
> +
> ?static void s5p6440_idle(void)
> ?{
> ? ? ? ?unsigned long val;
> @@ -54,15 +80,18 @@ static void s5p6440_idle(void)
> ? ? ? ?local_irq_enable();
> ?}
>
> -/* s5p6440_map_io
> +/*
> + * s5p6440_map_io
> ?*
> ?* register the standard cpu IO areas
> -*/
> + */
>
> ?void __init s5p6440_map_io(void)
> ?{
> ? ? ? ?/* initialize any device information early */
> ? ? ? ?s3c_adc_setname("s3c64xx-adc");
> +
> + ? ? ? iotable_init(s5p6440_iodesc, ARRAY_SIZE(s5p6440_iodesc));
> ?}
>
> ?void __init s5p6440_init_clocks(int xtal)
> diff --git a/arch/arm/mach-s5p6440/include/mach/map.h b/arch/arm/mach-s5p6440/include/mach/map.h
> index 6cc5cbc..11d31fe 100644
> --- a/arch/arm/mach-s5p6440/include/mach/map.h
> +++ b/arch/arm/mach-s5p6440/include/mach/map.h
> @@ -24,23 +24,18 @@
> ?#define S5P_PA_SYSCON ? ? ? ? ?S5P6440_PA_SYSCON
>
> ?#define S5P6440_PA_GPIO ? ? ? ? ? ? ? ?(0xE0308000)
> -#define S5P_PA_GPIO ? ? ? ? ? ?S5P6440_PA_GPIO
>
> ?#define S5P6440_PA_VIC0 ? ? ? ? ? ? ? ?(0xE4000000)
> -#define S5P_PA_VIC0 ? ? ? ? ? ?S5P6440_PA_VIC0
> +#define S5P6440_PA_VIC1 ? ? ? ? ? ? ? ?(0xE4100000)
>
> ?#define S5P6440_PA_PDMA ? ? ? ? ? ? ? ?0xE9000000
>
> -#define S5P6440_PA_VIC1 ? ? ? ? ? ? ? ?(0xE4100000)
> -#define S5P_PA_VIC1 ? ? ? ? ? ?S5P6440_PA_VIC1
> -
> ?#define S5P6440_PA_TIMER ? ? ? (0xEA000000)
> ?#define S5P_PA_TIMER ? ? ? ? ? S5P6440_PA_TIMER
>
> ?#define S5P6440_PA_RTC ? ? ? ? (0xEA100000)
>
> ?#define S5P6440_PA_WDT ? ? ? ? (0xEA200000)
> -#define S5P_PA_WDT ? ? ? ? ? ? S5P6440_PA_WDT
>
> ?#define S5P6440_PA_UART ? ? ? ? ? ? ? ?(0xEC000000)
>
> diff --git a/arch/arm/mach-s5p6442/cpu.c b/arch/arm/mach-s5p6442/cpu.c
> index a48fb55..d3ab268 100644
> --- a/arch/arm/mach-s5p6442/cpu.c
> +++ b/arch/arm/mach-s5p6442/cpu.c
> @@ -1,7 +1,7 @@
> ?/* linux/arch/arm/mach-s5p6442/cpu.c
> ?*
> ?* Copyright (c) 2010 Samsung Electronics Co., Ltd.
> - * ? ? ? ? ? ? http://www.samsung.com/
> + * ? ? ? ? ? ? http://www.samsung.com
> ?*
> ?* This program is free software; you can redistribute it and/or modify
> ?* it under the terms of the GNU General Public License version 2 as
> @@ -47,10 +47,30 @@ static struct map_desc s5p6442_iodesc[] __initdata = {
> ? ? ? ? ? ? ? ?.length ? ? ? ? = SZ_16K,
> ? ? ? ? ? ? ? ?.type ? ? ? ? ? = MT_DEVICE,
> ? ? ? ?}, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S5P_VA_GPIO,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5P6442_PA_GPIO),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_4K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)VA_VIC0,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5P6442_PA_VIC0),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_16K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)VA_VIC1,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5P6442_PA_VIC1),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_16K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> ? ? ? ? ? ? ? ?.virtual ? ? ? ?= (unsigned long)VA_VIC2,
> ? ? ? ? ? ? ? ?.pfn ? ? ? ? ? ?= __phys_to_pfn(S5P6442_PA_VIC2),
> ? ? ? ? ? ? ? ?.length ? ? ? ? = SZ_16K,
> ? ? ? ? ? ? ? ?.type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S3C_VA_UART,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S3C_PA_UART),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_512K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> ? ? ? ?}
> ?};
>
> @@ -62,10 +82,11 @@ static void s5p6442_idle(void)
> ? ? ? ?local_irq_enable();
> ?}
>
> -/* s5p6442_map_io
> +/*
> + * s5p6442_map_io
> ?*
> ?* register the standard cpu IO areas
> -*/
> + */
>
> ?void __init s5p6442_map_io(void)
> ?{
> diff --git a/arch/arm/mach-s5p6442/include/mach/map.h b/arch/arm/mach-s5p6442/include/mach/map.h
> index 281d256..31fb2e6 100644
> --- a/arch/arm/mach-s5p6442/include/mach/map.h
> +++ b/arch/arm/mach-s5p6442/include/mach/map.h
> @@ -23,16 +23,10 @@
> ?#define S5P_PA_SYSCON ? ? ? ? ?S5P6442_PA_SYSCON
>
> ?#define S5P6442_PA_GPIO ? ? ? ? ? ? ? ?(0xE0200000)
> -#define S5P_PA_GPIO ? ? ? ? ? ?S5P6442_PA_GPIO
>
> ?#define S5P6442_PA_VIC0 ? ? ? ? ? ? ? ?(0xE4000000)
> -#define S5P_PA_VIC0 ? ? ? ? ? ?S5P6442_PA_VIC0
> -
> ?#define S5P6442_PA_VIC1 ? ? ? ? ? ? ? ?(0xE4100000)
> -#define S5P_PA_VIC1 ? ? ? ? ? ?S5P6442_PA_VIC1
> -
> ?#define S5P6442_PA_VIC2 ? ? ? ? ? ? ? ?(0xE4200000)
> -#define S5P_PA_VIC2 ? ? ? ? ? ?S5P6442_PA_VIC2
>
> ?#define S5P6442_PA_MDMA ? ? ? ? ? ? ? ?0xE8000000
> ?#define S5P6442_PA_PDMA ? ? ? ? ? ? ? ?0xE9000000
> diff --git a/arch/arm/mach-s5pc100/cpu.c b/arch/arm/mach-s5pc100/cpu.c
> index 251c92a..d13552c 100644
> --- a/arch/arm/mach-s5pc100/cpu.c
> +++ b/arch/arm/mach-s5pc100/cpu.c
> @@ -1,5 +1,8 @@
> ?/* linux/arch/arm/mach-s5pc100/cpu.c
> ?*
> + * Copyright (c) 2010 Samsung Electronics Co., Ltd.
> + * ? ? ? ? ? ? http://www.samsung.com
> + *
> ?* Copyright 2009 Samsung Electronics Co.
> ?* ? ? Byungho Min <bhmin@samsung.com>
> ?*
> @@ -56,11 +59,31 @@ static struct map_desc s5pc100_iodesc[] __initdata = {
> ? ? ? ? ? ? ? ?.length ? ? ? ? = SZ_16K,
> ? ? ? ? ? ? ? ?.type ? ? ? ? ? = MT_DEVICE,
> ? ? ? ?}, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S5P_VA_GPIO,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5PC100_PA_GPIO),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_4K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)VA_VIC0,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5PC100_PA_VIC0),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_16K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)VA_VIC1,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5PC100_PA_VIC1),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_16K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> ? ? ? ? ? ? ? ?.virtual ? ? ? ?= (unsigned long)VA_VIC2,
> - ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5P_PA_VIC2),
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5PC100_PA_VIC2),
> ? ? ? ? ? ? ? ?.length ? ? ? ? = SZ_16K,
> ? ? ? ? ? ? ? ?.type ? ? ? ? ? = MT_DEVICE,
> ? ? ? ?}, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S3C_VA_UART,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S3C_PA_UART),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_512K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> ? ? ? ? ? ? ? ?.virtual ? ? ? ?= (unsigned long)S5PC100_VA_OTHERS,
> ? ? ? ? ? ? ? ?.pfn ? ? ? ? ? ?= __phys_to_pfn(S5PC100_PA_OTHERS),
> ? ? ? ? ? ? ? ?.length ? ? ? ? = SZ_4K,
> diff --git a/arch/arm/mach-s5pc100/include/mach/map.h b/arch/arm/mach-s5pc100/include/mach/map.h
> index 01b9134..8751ef4 100644
> --- a/arch/arm/mach-s5pc100/include/mach/map.h
> +++ b/arch/arm/mach-s5pc100/include/mach/map.h
> @@ -44,19 +44,16 @@
> ?#define S5PC100_PA_OTHERS ? ? ?(0xE0200000)
> ?#define S5PC100_VA_OTHERS ? ? ?(S3C_VA_SYS + 0x10000)
>
> -#define S5P_PA_GPIO ? ? ? ? ? ?(0xE0300000)
> +#define S5PC100_PA_GPIO ? ? ? ? ? ? ? ?(0xE0300000)
> ?#define S5PC1XX_VA_GPIO ? ? ? ? ? ? ? ?S3C_ADDR(0x00500000)
>
> ?/* Interrupt */
> -#define S5PC100_PA_VIC ? ? ? ? (0xE4000000)
> +#define S5PC100_PA_VIC0 ? ? ? ? ? ? ? ?(0xE4000000)
> +#define S5PC100_PA_VIC1 ? ? ? ? ? ? ? ?(0xE4100000)
> +#define S5PC100_PA_VIC2 ? ? ? ? ? ? ? ?(0xE4200000)
> ?#define S5PC100_VA_VIC ? ? ? ? S3C_VA_IRQ
> -#define S5PC100_PA_VIC_OFFSET ?0x100000
> ?#define S5PC100_VA_VIC_OFFSET ?0x10000
> -#define S5PC1XX_PA_VIC(x) ? ? ?(S5PC100_PA_VIC + ((x) * S5PC100_PA_VIC_OFFSET))
> ?#define S5PC1XX_VA_VIC(x) ? ? ?(S5PC100_VA_VIC + ((x) * S5PC100_VA_VIC_OFFSET))
> -#define S5P_PA_VIC0 ? ? ? ? ? ?S5PC1XX_PA_VIC(0)
> -#define S5P_PA_VIC1 ? ? ? ? ? ?S5PC1XX_PA_VIC(1)
> -#define S5P_PA_VIC2 ? ? ? ? ? ?S5PC1XX_PA_VIC(2)
>
>
> ?#define S5PC100_PA_ONENAND ? ? (0xE7100000)
> diff --git a/arch/arm/mach-s5pv210/cpu.c b/arch/arm/mach-s5pv210/cpu.c
> index b9f4d67..00f9ca1 100644
> --- a/arch/arm/mach-s5pv210/cpu.c
> +++ b/arch/arm/mach-s5pv210/cpu.c
> @@ -1,7 +1,7 @@
> ?/* linux/arch/arm/mach-s5pv210/cpu.c
> ?*
> ?* Copyright (c) 2010 Samsung Electronics Co., Ltd.
> - * ? ? ? ? ? ? http://www.samsung.com/
> + * ? ? ? ? ? ? http://www.samsung.com
> ?*
> ?* This program is free software; you can redistribute it and/or modify
> ?* it under the terms of the GNU General Public License version 2 as
> @@ -50,6 +50,21 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
> ? ? ? ? ? ? ? ?.length ? ? ? ? = SZ_1M,
> ? ? ? ? ? ? ? ?.type ? ? ? ? ? = MT_DEVICE,
> ? ? ? ?}, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S5P_VA_GPIO,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5PV210_PA_GPIO),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_4K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)VA_VIC0,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5PV210_PA_VIC0),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_16K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)VA_VIC1,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5PV210_PA_VIC1),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_16K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> ? ? ? ? ? ? ? ?.virtual ? ? ? ?= (unsigned long)VA_VIC2,
> ? ? ? ? ? ? ? ?.pfn ? ? ? ? ? ?= __phys_to_pfn(S5PV210_PA_VIC2),
> ? ? ? ? ? ? ? ?.length ? ? ? ? = SZ_16K,
> @@ -60,6 +75,11 @@ static struct map_desc s5pv210_iodesc[] __initdata = {
> ? ? ? ? ? ? ? ?.length ? ? ? ? = SZ_16K,
> ? ? ? ? ? ? ? ?.type ? ? ? ? ? = MT_DEVICE,
> ? ? ? ?}, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S3C_VA_UART,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S3C_PA_UART),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_512K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> ? ? ? ? ? ? ? ?.virtual ? ? ? ?= (unsigned long)S5P_VA_SROMC,
> ? ? ? ? ? ? ? ?.pfn ? ? ? ? ? ?= __phys_to_pfn(S5PV210_PA_SROMC),
> ? ? ? ? ? ? ? ?.length ? ? ? ? = SZ_4K,
> diff --git a/arch/arm/mach-s5pv210/include/mach/map.h b/arch/arm/mach-s5pv210/include/mach/map.h
> index dd4fb6b..cc50541 100644
> --- a/arch/arm/mach-s5pv210/include/mach/map.h
> +++ b/arch/arm/mach-s5pv210/include/mach/map.h
> @@ -26,7 +26,6 @@
> ?#define S5P_PA_SYSCON ? ? ? ? ?S5PV210_PA_SYSCON
>
> ?#define S5PV210_PA_GPIO ? ? ? ? ? ? ? ?(0xE0200000)
> -#define S5P_PA_GPIO ? ? ? ? ? ?S5PV210_PA_GPIO
>
> ?/* SPI */
> ?#define S5PV210_PA_SPI0 ? ? ? ? ? ? ? ?0xE1300000
> @@ -72,16 +71,9 @@
> ?#define S5PV210_PA_HSMMC(x) ? ?(0xEB000000 + ((x) * 0x100000))
>
> ?#define S5PV210_PA_VIC0 ? ? ? ? ? ? ? ?(0xF2000000)
> -#define S5P_PA_VIC0 ? ? ? ? ? ?S5PV210_PA_VIC0
> -
> ?#define S5PV210_PA_VIC1 ? ? ? ? ? ? ? ?(0xF2100000)
> -#define S5P_PA_VIC1 ? ? ? ? ? ?S5PV210_PA_VIC1
> -
> ?#define S5PV210_PA_VIC2 ? ? ? ? ? ? ? ?(0xF2200000)
> -#define S5P_PA_VIC2 ? ? ? ? ? ?S5PV210_PA_VIC2
> -
> ?#define S5PV210_PA_VIC3 ? ? ? ? ? ? ? ?(0xF2300000)
> -#define S5P_PA_VIC3 ? ? ? ? ? ?S5PV210_PA_VIC3
>
> ?#define S5PV210_PA_SDRAM ? ? ? (0x20000000)
> ?#define S5P_PA_SDRAM ? ? ? ? ? S5PV210_PA_SDRAM
> diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c
> index e5b261a..3b9c872 100644
> --- a/arch/arm/mach-s5pv310/cpu.c
> +++ b/arch/arm/mach-s5pv310/cpu.c
> @@ -31,9 +31,14 @@ extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
> ?/* Initial IO mappings */
> ?static struct map_desc s5pv310_iodesc[] __initdata = {
> ? ? ? ?{
> - ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S5P_VA_COREPERI_BASE,
> - ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5PV310_PA_COREPERI),
> - ? ? ? ? ? ? ? .length ? ? ? ? = SZ_8K,
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S5P_VA_SYSRAM,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5PV310_PA_SYSRAM),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_4K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S5P_VA_CMU,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5PV310_PA_CMU),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_128K,
> ? ? ? ? ? ? ? ?.type ? ? ? ? ? = MT_DEVICE,
> ? ? ? ?}, {
> ? ? ? ? ? ? ? ?.virtual ? ? ? ?= (unsigned long)S5P_VA_COMBINER_BASE,
> @@ -41,19 +46,24 @@ static struct map_desc s5pv310_iodesc[] __initdata = {
> ? ? ? ? ? ? ? ?.length ? ? ? ? = SZ_4K,
> ? ? ? ? ? ? ? ?.type ? ? ? ? ? = MT_DEVICE,
> ? ? ? ?}, {
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S5P_VA_COREPERI_BASE,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5PV310_PA_COREPERI),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_8K,
> + ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> + ? ? ? }, {
> ? ? ? ? ? ? ? ?.virtual ? ? ? ?= (unsigned long)S5P_VA_L2CC,
> ? ? ? ? ? ? ? ?.pfn ? ? ? ? ? ?= __phys_to_pfn(S5PV310_PA_L2CC),
> ? ? ? ? ? ? ? ?.length ? ? ? ? = SZ_4K,
> ? ? ? ? ? ? ? ?.type ? ? ? ? ? = MT_DEVICE,
> ? ? ? ?}, {
> - ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S5P_VA_SYSRAM,
> - ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5PV310_PA_SYSRAM),
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S5P_VA_GPIO,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5PV310_PA_GPIO),
> ? ? ? ? ? ? ? ?.length ? ? ? ? = SZ_4K,
> ? ? ? ? ? ? ? ?.type ? ? ? ? ? = MT_DEVICE,
> ? ? ? ?}, {
> - ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S5P_VA_CMU,
> - ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5PV310_PA_CMU),
> - ? ? ? ? ? ? ? .length ? ? ? ? = SZ_128K,
> + ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S3C_VA_UART,
> + ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S3C_PA_UART),
> + ? ? ? ? ? ? ? .length ? ? ? ? = SZ_512K,
> ? ? ? ? ? ? ? ?.type ? ? ? ? ? = MT_DEVICE,
> ? ? ? ?},
> ?};
> diff --git a/arch/arm/plat-s5p/cpu.c b/arch/arm/plat-s5p/cpu.c
> index b07a078..57f08ee 100644
> --- a/arch/arm/plat-s5p/cpu.c
> +++ b/arch/arm/plat-s5p/cpu.c
> @@ -89,33 +89,11 @@ static struct map_desc s5p_iodesc[] __initdata = {
> ? ? ? ? ? ? ? ?.length ? ? ? ? = SZ_64K,
> ? ? ? ? ? ? ? ?.type ? ? ? ? ? = MT_DEVICE,
> ? ? ? ?}, {
> - ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S3C_VA_UART,
> - ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S3C_PA_UART),
> - ? ? ? ? ? ? ? .length ? ? ? ? = SZ_512K,
> - ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> -#ifdef CONFIG_ARM_VIC
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)VA_VIC0,
> - ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5P_PA_VIC0),
> - ? ? ? ? ? ? ? .length ? ? ? ? = SZ_16K,
> - ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> - ? ? ? }, {
> - ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)VA_VIC1,
> - ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5P_PA_VIC1),
> - ? ? ? ? ? ? ? .length ? ? ? ? = SZ_16K,
> - ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> -#endif
> - ? ? ? }, {
> ? ? ? ? ? ? ? ?.virtual ? ? ? ?= (unsigned long)S3C_VA_TIMER,
> ? ? ? ? ? ? ? ?.pfn ? ? ? ? ? ?= __phys_to_pfn(S5P_PA_TIMER),
> ? ? ? ? ? ? ? ?.length ? ? ? ? = SZ_16K,
> ? ? ? ? ? ? ? ?.type ? ? ? ? ? = MT_DEVICE,
> ? ? ? ?}, {
> - ? ? ? ? ? ? ? .virtual ? ? ? ?= (unsigned long)S5P_VA_GPIO,
> - ? ? ? ? ? ? ? .pfn ? ? ? ? ? ?= __phys_to_pfn(S5P_PA_GPIO),
> - ? ? ? ? ? ? ? .length ? ? ? ? = SZ_4K,
> - ? ? ? ? ? ? ? .type ? ? ? ? ? = MT_DEVICE,
> - ? ? ? }, {
> ? ? ? ? ? ? ? ?.virtual ? ? ? ?= (unsigned long)S3C_VA_WATCHDOG,
> ? ? ? ? ? ? ? ?.pfn ? ? ? ? ? ?= __phys_to_pfn(S3C_PA_WDT),
> ? ? ? ? ? ? ? ?.length ? ? ? ? = SZ_4K,
> --
> 1.6.2.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH 02/13] ARM: S5P64X0: Update Kconfig and Makefile
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 9:47 ` Kyungmin Park
-1 siblings, 0 replies; 52+ messages in thread
From: Kyungmin Park @ 2010-09-01 9:47 UTC (permalink / raw)
To: Kukjin Kim; +Cc: linux-arm-kernel, linux-samsung-soc, ben-linux
On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> This patch updates the Kconfig and Makefile for the S5P6440 and S5P6450
> machines. It also updates arch/arm/ Kconfig and Makefile to include for
> support ARCH_S5P64X0 with one kernel image.
>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
> arch/arm/Kconfig | 16 +++---
> arch/arm/Makefile | 2 +-
> arch/arm/mach-s5p6440/Kconfig | 33 ------------
> arch/arm/mach-s5p6440/Makefile | 25 ---------
> arch/arm/mach-s5p64x0/Kconfig | 55 ++++++++++++++++++++
> arch/arm/mach-s5p64x0/Makefile | 30 +++++++++++
> .../{mach-s5p6440 => mach-s5p64x0}/Makefile.boot | 0
> arch/arm/plat-s5p/Kconfig | 4 +-
> 8 files changed, 95 insertions(+), 70 deletions(-)
> delete mode 100644 arch/arm/mach-s5p6440/Kconfig
> delete mode 100644 arch/arm/mach-s5p6440/Makefile
> create mode 100644 arch/arm/mach-s5p64x0/Kconfig
> create mode 100644 arch/arm/mach-s5p64x0/Makefile
> rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/Makefile.boot (100%)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index a7ed21f..40e75b3 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -679,17 +679,15 @@ config ARCH_S3C64XX
> help
> Samsung S3C64XX series based systems
>
> -config ARCH_S5P6440
> - bool "Samsung S5P6440"
> +config ARCH_S5P64X0
> + bool "Samsung S5P6440 S5P6450"
> select CPU_V6
> select GENERIC_GPIO
> select HAVE_CLK
> - select HAVE_S3C2410_WATCHDOG
> select ARCH_USES_GETTIMEOFFSET
> - select HAVE_S3C2410_I2C
> - select HAVE_S3C_RTC
Why HAVE_* is deleted?
> help
> - Samsung S5P6440 CPU based systems
> + Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
> + SMDK6450.
>
> config ARCH_S5P6442
> bool "Samsung S5P6442"
> @@ -929,7 +927,7 @@ if ARCH_S3C64XX
> source "arch/arm/mach-s3c64xx/Kconfig"
> endif
>
> -source "arch/arm/mach-s5p6440/Kconfig"
> +source "arch/arm/mach-s5p64x0/Kconfig"
>
> source "arch/arm/mach-s5p6442/Kconfig"
>
> @@ -1232,7 +1230,7 @@ source kernel/Kconfig.preempt
>
> config HZ
> int
> - default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \
> + default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
> ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
> default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
> default AT91_TIMER_HZ if ARCH_AT91
> @@ -1609,7 +1607,7 @@ config ZRELADDR
> default 0x10008000 if ARCH_MSM ||\
> ARCH_OMAP1 ||\
> ARCH_RPC
> - default 0x20008000 if ARCH_S5P6440 ||\
> + default 0x20008000 if ARCH_S5P64X0 ||\
> ARCH_S5P6442 ||\
> ARCH_S5PC100 ||\
> ARCH_S5PV210
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index 59c1ce8..8420f21 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -173,7 +173,7 @@ machine-$(CONFIG_ARCH_RPC) := rpc
> machine-$(CONFIG_ARCH_S3C2410) := s3c2410 s3c2400 s3c2412 s3c2416 s3c2440 s3c2443
> machine-$(CONFIG_ARCH_S3C24A0) := s3c24a0
> machine-$(CONFIG_ARCH_S3C64XX) := s3c64xx
> -machine-$(CONFIG_ARCH_S5P6440) := s5p6440
> +machine-$(CONFIG_ARCH_S5P64X0) := s5p64x0
> machine-$(CONFIG_ARCH_S5P6442) := s5p6442
> machine-$(CONFIG_ARCH_S5PC100) := s5pc100
> machine-$(CONFIG_ARCH_S5PV210) := s5pv210
> diff --git a/arch/arm/mach-s5p6440/Kconfig b/arch/arm/mach-s5p6440/Kconfig
> deleted file mode 100644
> index 6a4af7f..0000000
> --- a/arch/arm/mach-s5p6440/Kconfig
> +++ /dev/null
> @@ -1,33 +0,0 @@
> -# arch/arm/mach-s5p6440/Kconfig
> -#
> -# Copyright (c) 2009 Samsung Electronics Co., Ltd.
> -# http://www.samsung.com/
> -#
> -# Licensed under GPLv2
> -
> -if ARCH_S5P6440
> -
> -config CPU_S5P6440
> - bool
> - select S3C_PL330_DMA
> - help
> - Enable S5P6440 CPU support
> -
> -config S5P6440_SETUP_I2C1
> - bool
> - help
> - Common setup code for i2c bus 1.
> -
> -config MACH_SMDK6440
> - bool "SMDK6440"
> - select CPU_S5P6440
> - select S3C_DEV_I2C1
> - select S3C_DEV_RTC
> - select S3C_DEV_WDT
> - select SAMSUNG_DEV_ADC
> - select SAMSUNG_DEV_TS
> - select S5P6440_SETUP_I2C1
> - help
> - Machine support for the Samsung SMDK6440
> -
> -endif
> diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile
> deleted file mode 100644
> index c3fe4d3..0000000
> --- a/arch/arm/mach-s5p6440/Makefile
> +++ /dev/null
> @@ -1,25 +0,0 @@
> -# arch/arm/mach-s5p6440/Makefile
> -#
> -# Copyright (c) 2009 Samsung Electronics Co., Ltd.
> -# http://www.samsung.com/
> -#
> -# Licensed under GPLv2
> -
> -obj-y :=
> -obj-m :=
> -obj-n :=
> -obj- :=
> -
> -# Core support for S5P6440 system
> -
> -obj-$(CONFIG_CPU_S5P6440) += cpu.o init.o clock.o gpio.o dma.o
> -obj-$(CONFIG_CPU_S5P6440) += setup-i2c0.o
> -
> -# machine support
> -
> -obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o
> -
> -# device support
> -obj-y += dev-audio.o
> -obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
> -obj-$(CONFIG_S5P6440_SETUP_I2C1) += setup-i2c1.o
> diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
> new file mode 100644
> index 0000000..488375c
> --- /dev/null
> +++ b/arch/arm/mach-s5p64x0/Kconfig
> @@ -0,0 +1,55 @@
> +# arch/arm/mach-s5p64x0/Kconfig
> +#
> +# Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
> +# http://www.samsung.com/
> +#
> +# Licensed under GPLv2
> +
> +if ARCH_S5P64X0
> +
> +config CPU_S5P6440
> + bool
> + select PLAT_S5P
> + select S3C_PL330_DMA
> + help
> + Enable S5P6440 CPU support
> +
> +config CPU_S5P6450
> + bool
> + select PLAT_S5P
> + select S3C_PL330_DMA
> + help
> + Enable S5P6450 CPU support
> +
> +config S5P64X0_SETUP_I2C1
> + bool
> + help
> + Common setup code for i2c bus 1.
> +
> +# machine support
> +
> +config MACH_SMDK6440
> + bool "SMDK6440"
> + select CPU_S5P6440
> + select S3C_DEV_I2C1
> + select S3C_DEV_RTC
> + select S3C_DEV_WDT
> + select SAMSUNG_DEV_ADC
> + select SAMSUNG_DEV_TS
> + select S5P64X0_SETUP_I2C1
> + help
> + Machine support for the Samsung SMDK6440
> +
> +config MACH_SMDK6450
> + bool "SMDK6450"
> + select CPU_S5P6450
> + select S3C_DEV_I2C1
> + select S3C_DEV_RTC
> + select S3C_DEV_WDT
> + select SAMSUNG_DEV_ADC
> + select SAMSUNG_DEV_TS
> + select S5P64X0_SETUP_I2C1
> + help
> + Machine support for the Samsung SMDK6450
In most case SMDK has almost same functionality. make a common select
e.g., SMDK_COMMON and each board just select it.
> +
> +endif
> diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
> new file mode 100644
> index 0000000..2655829
> --- /dev/null
> +++ b/arch/arm/mach-s5p64x0/Makefile
> @@ -0,0 +1,30 @@
> +# arch/arm/mach-s5p64x0/Makefile
> +#
> +# Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
> +# http://www.samsung.com
> +#
> +# Licensed under GPLv2
> +
> +obj-y :=
> +obj-m :=
> +obj-n :=
> +obj- :=
> +
> +# Core support for S5P64X0 system
> +
> +obj-$(CONFIG_ARCH_S5P64X0) += cpu.o init.o clock.o dma.o
> +obj-$(CONFIG_ARCH_S5P64X0) += setup-i2c0.o
> +obj-$(CONFIG_CPU_S5P6440) += clock-s5p6440.o gpio.o
> +obj-$(CONFIG_CPU_S5P6450) += clock-s5p6450.o
> +
> +# machine support
> +
> +obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o
> +obj-$(CONFIG_MACH_SMDK6450) += mach-smdk6450.o
Are there difference between smdk6440 and smdk6450 except the SOC?
If no, how about to make a single file as pxa or omap does?
Thank you,
Kyungmin Park
> +
> +# device support
> +
> +obj-y += dev-audio.o
> +obj-$(CONFIG_S3C64XX_DEV_SPI) += dev-spi.o
> +
> +obj-$(CONFIG_S5P64X0_SETUP_I2C1) += setup-i2c1.o
> diff --git a/arch/arm/mach-s5p6440/Makefile.boot b/arch/arm/mach-s5p64x0/Makefile.boot
> similarity index 100%
> rename from arch/arm/mach-s5p6440/Makefile.boot
> rename to arch/arm/mach-s5p64x0/Makefile.boot
> diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
> index c6a855d..90f97d6 100644
> --- a/arch/arm/plat-s5p/Kconfig
> +++ b/arch/arm/plat-s5p/Kconfig
> @@ -7,7 +7,7 @@
>
> config PLAT_S5P
> bool
> - depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310)
> + depends on (ARCH_S5P64X0 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310)
> default y
> select ARM_VIC if !ARCH_S5PV310
> select ARM_GIC if ARCH_S5PV310
> @@ -30,7 +30,7 @@ config S5P_EXT_INT
> bool
> help
> Use the external interrupts (other than GPIO interrupts.)
> - Note: Do not choose this for S5P6440.
> + Note: Do not choose this for S5P6440 and S5P6450.
>
> config S5P_DEV_FIMC0
> bool
> --
> 1.6.2.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH 02/13] ARM: S5P64X0: Update Kconfig and Makefile
@ 2010-09-01 9:47 ` Kyungmin Park
0 siblings, 0 replies; 52+ messages in thread
From: Kyungmin Park @ 2010-09-01 9:47 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> This patch updates the Kconfig and Makefile for the S5P6440 and S5P6450
> machines. It also updates arch/arm/ Kconfig and Makefile to include for
> support ARCH_S5P64X0 with one kernel image.
>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
> ?arch/arm/Kconfig ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? 16 +++---
> ?arch/arm/Makefile ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?2 +-
> ?arch/arm/mach-s5p6440/Kconfig ? ? ? ? ? ? ? ? ? ? ?| ? 33 ------------
> ?arch/arm/mach-s5p6440/Makefile ? ? ? ? ? ? ? ? ? ? | ? 25 ---------
> ?arch/arm/mach-s5p64x0/Kconfig ? ? ? ? ? ? ? ? ? ? ?| ? 55 ++++++++++++++++++++
> ?arch/arm/mach-s5p64x0/Makefile ? ? ? ? ? ? ? ? ? ? | ? 30 +++++++++++
> ?.../{mach-s5p6440 => mach-s5p64x0}/Makefile.boot ? | ? ?0
> ?arch/arm/plat-s5p/Kconfig ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?4 +-
> ?8 files changed, 95 insertions(+), 70 deletions(-)
> ?delete mode 100644 arch/arm/mach-s5p6440/Kconfig
> ?delete mode 100644 arch/arm/mach-s5p6440/Makefile
> ?create mode 100644 arch/arm/mach-s5p64x0/Kconfig
> ?create mode 100644 arch/arm/mach-s5p64x0/Makefile
> ?rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/Makefile.boot (100%)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index a7ed21f..40e75b3 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -679,17 +679,15 @@ config ARCH_S3C64XX
> ? ? ? ?help
> ? ? ? ? ?Samsung S3C64XX series based systems
>
> -config ARCH_S5P6440
> - ? ? ? bool "Samsung S5P6440"
> +config ARCH_S5P64X0
> + ? ? ? bool "Samsung S5P6440 S5P6450"
> ? ? ? ?select CPU_V6
> ? ? ? ?select GENERIC_GPIO
> ? ? ? ?select HAVE_CLK
> - ? ? ? select HAVE_S3C2410_WATCHDOG
> ? ? ? ?select ARCH_USES_GETTIMEOFFSET
> - ? ? ? select HAVE_S3C2410_I2C
> - ? ? ? select HAVE_S3C_RTC
Why HAVE_* is deleted?
> ? ? ? ?help
> - ? ? ? ? Samsung S5P6440 CPU based systems
> + ? ? ? ? Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
> + ? ? ? ? SMDK6450.
>
> ?config ARCH_S5P6442
> ? ? ? ?bool "Samsung S5P6442"
> @@ -929,7 +927,7 @@ if ARCH_S3C64XX
> ?source "arch/arm/mach-s3c64xx/Kconfig"
> ?endif
>
> -source "arch/arm/mach-s5p6440/Kconfig"
> +source "arch/arm/mach-s5p64x0/Kconfig"
>
> ?source "arch/arm/mach-s5p6442/Kconfig"
>
> @@ -1232,7 +1230,7 @@ source kernel/Kconfig.preempt
>
> ?config HZ
> ? ? ? ?int
> - ? ? ? default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P6440 || \
> + ? ? ? default 200 if ARCH_EBSA110 || ARCH_S3C2410 || ARCH_S5P64X0 || \
> ? ? ? ? ? ? ? ?ARCH_S5P6442 || ARCH_S5PV210 || ARCH_S5PV310
> ? ? ? ?default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
> ? ? ? ?default AT91_TIMER_HZ if ARCH_AT91
> @@ -1609,7 +1607,7 @@ config ZRELADDR
> ? ? ? ?default 0x10008000 if ARCH_MSM ||\
> ? ? ? ? ? ? ? ?ARCH_OMAP1 ||\
> ? ? ? ? ? ? ? ?ARCH_RPC
> - ? ? ? default 0x20008000 if ARCH_S5P6440 ||\
> + ? ? ? default 0x20008000 if ARCH_S5P64X0 ||\
> ? ? ? ? ? ? ? ?ARCH_S5P6442 ||\
> ? ? ? ? ? ? ? ?ARCH_S5PC100 ||\
> ? ? ? ? ? ? ? ?ARCH_S5PV210
> diff --git a/arch/arm/Makefile b/arch/arm/Makefile
> index 59c1ce8..8420f21 100644
> --- a/arch/arm/Makefile
> +++ b/arch/arm/Makefile
> @@ -173,7 +173,7 @@ machine-$(CONFIG_ARCH_RPC) ? ? ? ? ?:= rpc
> ?machine-$(CONFIG_ARCH_S3C2410) ? ? ? ? := s3c2410 s3c2400 s3c2412 s3c2416 s3c2440 s3c2443
> ?machine-$(CONFIG_ARCH_S3C24A0) ? ? ? ? := s3c24a0
> ?machine-$(CONFIG_ARCH_S3C64XX) ? ? ? ? := s3c64xx
> -machine-$(CONFIG_ARCH_S5P6440) ? ? ? ? := s5p6440
> +machine-$(CONFIG_ARCH_S5P64X0) ? ? ? ? := s5p64x0
> ?machine-$(CONFIG_ARCH_S5P6442) ? ? ? ? := s5p6442
> ?machine-$(CONFIG_ARCH_S5PC100) ? ? ? ? := s5pc100
> ?machine-$(CONFIG_ARCH_S5PV210) ? ? ? ? := s5pv210
> diff --git a/arch/arm/mach-s5p6440/Kconfig b/arch/arm/mach-s5p6440/Kconfig
> deleted file mode 100644
> index 6a4af7f..0000000
> --- a/arch/arm/mach-s5p6440/Kconfig
> +++ /dev/null
> @@ -1,33 +0,0 @@
> -# arch/arm/mach-s5p6440/Kconfig
> -#
> -# Copyright (c) 2009 Samsung Electronics Co., Ltd.
> -# ? ? ? ? ? ? ?http://www.samsung.com/
> -#
> -# Licensed under GPLv2
> -
> -if ARCH_S5P6440
> -
> -config CPU_S5P6440
> - ? ? ? bool
> - ? ? ? select S3C_PL330_DMA
> - ? ? ? help
> - ? ? ? ? Enable S5P6440 CPU support
> -
> -config S5P6440_SETUP_I2C1
> - ? ? ? bool
> - ? ? ? help
> - ? ? ? ? Common setup code for i2c bus 1.
> -
> -config MACH_SMDK6440
> - ? ? ? bool "SMDK6440"
> - ? ? ? select CPU_S5P6440
> - ? ? ? select S3C_DEV_I2C1
> - ? ? ? select S3C_DEV_RTC
> - ? ? ? select S3C_DEV_WDT
> - ? ? ? select SAMSUNG_DEV_ADC
> - ? ? ? select SAMSUNG_DEV_TS
> - ? ? ? select S5P6440_SETUP_I2C1
> - ? ? ? help
> - ? ? ? ? Machine support for the Samsung SMDK6440
> -
> -endif
> diff --git a/arch/arm/mach-s5p6440/Makefile b/arch/arm/mach-s5p6440/Makefile
> deleted file mode 100644
> index c3fe4d3..0000000
> --- a/arch/arm/mach-s5p6440/Makefile
> +++ /dev/null
> @@ -1,25 +0,0 @@
> -# arch/arm/mach-s5p6440/Makefile
> -#
> -# Copyright (c) 2009 Samsung Electronics Co., Ltd.
> -# ? ? ? ? ? ? ?http://www.samsung.com/
> -#
> -# Licensed under GPLv2
> -
> -obj-y ? ? ? ? ? ? ? ? ? ? ? ? ?:=
> -obj-m ? ? ? ? ? ? ? ? ? ? ? ? ?:=
> -obj-n ? ? ? ? ? ? ? ? ? ? ? ? ?:=
> -obj- ? ? ? ? ? ? ? ? ? ? ? ? ? :=
> -
> -# Core support for S5P6440 system
> -
> -obj-$(CONFIG_CPU_S5P6440) ? ? ?+= cpu.o init.o clock.o gpio.o dma.o
> -obj-$(CONFIG_CPU_S5P6440) ? ? ?+= setup-i2c0.o
> -
> -# machine support
> -
> -obj-$(CONFIG_MACH_SMDK6440) ? ?+= mach-smdk6440.o
> -
> -# device support
> -obj-y ? ? ? ? ? ? ? ? ? ? ? ? ?+= dev-audio.o
> -obj-$(CONFIG_S3C64XX_DEV_SPI) ?+= dev-spi.o
> -obj-$(CONFIG_S5P6440_SETUP_I2C1) ? ? ? += setup-i2c1.o
> diff --git a/arch/arm/mach-s5p64x0/Kconfig b/arch/arm/mach-s5p64x0/Kconfig
> new file mode 100644
> index 0000000..488375c
> --- /dev/null
> +++ b/arch/arm/mach-s5p64x0/Kconfig
> @@ -0,0 +1,55 @@
> +# arch/arm/mach-s5p64x0/Kconfig
> +#
> +# Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
> +# ? ? ? ? ? ? ?http://www.samsung.com/
> +#
> +# Licensed under GPLv2
> +
> +if ARCH_S5P64X0
> +
> +config CPU_S5P6440
> + ? ? ? bool
> + ? ? ? select PLAT_S5P
> + ? ? ? select S3C_PL330_DMA
> + ? ? ? help
> + ? ? ? ? Enable S5P6440 CPU support
> +
> +config CPU_S5P6450
> + ? ? ? bool
> + ? ? ? select PLAT_S5P
> + ? ? ? select S3C_PL330_DMA
> + ? ? ? help
> + ? ? ? ? Enable S5P6450 CPU support
> +
> +config S5P64X0_SETUP_I2C1
> + ? ? ? bool
> + ? ? ? help
> + ? ? ? ? Common setup code for i2c bus 1.
> +
> +# machine support
> +
> +config MACH_SMDK6440
> + ? ? ? bool "SMDK6440"
> + ? ? ? select CPU_S5P6440
> + ? ? ? select S3C_DEV_I2C1
> + ? ? ? select S3C_DEV_RTC
> + ? ? ? select S3C_DEV_WDT
> + ? ? ? select SAMSUNG_DEV_ADC
> + ? ? ? select SAMSUNG_DEV_TS
> + ? ? ? select S5P64X0_SETUP_I2C1
> + ? ? ? help
> + ? ? ? ? Machine support for the Samsung SMDK6440
> +
> +config MACH_SMDK6450
> + ? ? ? bool "SMDK6450"
> + ? ? ? select CPU_S5P6450
> + ? ? ? select S3C_DEV_I2C1
> + ? ? ? select S3C_DEV_RTC
> + ? ? ? select S3C_DEV_WDT
> + ? ? ? select SAMSUNG_DEV_ADC
> + ? ? ? select SAMSUNG_DEV_TS
> + ? ? ? select S5P64X0_SETUP_I2C1
> + ? ? ? help
> + ? ? ? ? Machine support for the Samsung SMDK6450
In most case SMDK has almost same functionality. make a common select
e.g., SMDK_COMMON and each board just select it.
> +
> +endif
> diff --git a/arch/arm/mach-s5p64x0/Makefile b/arch/arm/mach-s5p64x0/Makefile
> new file mode 100644
> index 0000000..2655829
> --- /dev/null
> +++ b/arch/arm/mach-s5p64x0/Makefile
> @@ -0,0 +1,30 @@
> +# arch/arm/mach-s5p64x0/Makefile
> +#
> +# Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
> +# ? ? ? ? ? ? ?http://www.samsung.com
> +#
> +# Licensed under GPLv2
> +
> +obj-y ? ? ? ? ? ? ? ? ? ? ? ? ?:=
> +obj-m ? ? ? ? ? ? ? ? ? ? ? ? ?:=
> +obj-n ? ? ? ? ? ? ? ? ? ? ? ? ?:=
> +obj- ? ? ? ? ? ? ? ? ? ? ? ? ? :=
> +
> +# Core support for S5P64X0 system
> +
> +obj-$(CONFIG_ARCH_S5P64X0) ? ? += cpu.o init.o clock.o dma.o
> +obj-$(CONFIG_ARCH_S5P64X0) ? ? += setup-i2c0.o
> +obj-$(CONFIG_CPU_S5P6440) ? ? ?+= clock-s5p6440.o gpio.o
> +obj-$(CONFIG_CPU_S5P6450) ? ? ?+= clock-s5p6450.o
> +
> +# machine support
> +
> +obj-$(CONFIG_MACH_SMDK6440) ? ?+= mach-smdk6440.o
> +obj-$(CONFIG_MACH_SMDK6450) ? ?+= mach-smdk6450.o
Are there difference between smdk6440 and smdk6450 except the SOC?
If no, how about to make a single file as pxa or omap does?
Thank you,
Kyungmin Park
> +
> +# device support
> +
> +obj-y ? ? ? ? ? ? ? ? ? ? ? ? ?+= dev-audio.o
> +obj-$(CONFIG_S3C64XX_DEV_SPI) ?+= dev-spi.o
> +
> +obj-$(CONFIG_S5P64X0_SETUP_I2C1) ? ? ? += setup-i2c1.o
> diff --git a/arch/arm/mach-s5p6440/Makefile.boot b/arch/arm/mach-s5p64x0/Makefile.boot
> similarity index 100%
> rename from arch/arm/mach-s5p6440/Makefile.boot
> rename to arch/arm/mach-s5p64x0/Makefile.boot
> diff --git a/arch/arm/plat-s5p/Kconfig b/arch/arm/plat-s5p/Kconfig
> index c6a855d..90f97d6 100644
> --- a/arch/arm/plat-s5p/Kconfig
> +++ b/arch/arm/plat-s5p/Kconfig
> @@ -7,7 +7,7 @@
>
> ?config PLAT_S5P
> ? ? ? ?bool
> - ? ? ? depends on (ARCH_S5P6440 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310)
> + ? ? ? depends on (ARCH_S5P64X0 || ARCH_S5P6442 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_S5PV310)
> ? ? ? ?default y
> ? ? ? ?select ARM_VIC if !ARCH_S5PV310
> ? ? ? ?select ARM_GIC if ARCH_S5PV310
> @@ -30,7 +30,7 @@ config S5P_EXT_INT
> ? ? ? ?bool
> ? ? ? ?help
> ? ? ? ? ?Use the external interrupts (other than GPIO interrupts.)
> - ? ? ? ? Note: Do not choose this for S5P6440.
> + ? ? ? ? Note: Do not choose this for S5P6440 and S5P6450.
>
> ?config S5P_DEV_FIMC0
> ? ? ? ?bool
> --
> 1.6.2.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH 11/13] ARM: S5P64X0: Move SMDK6440 board file and Add SMDK6450 board file
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 10:00 ` Kyungmin Park
-1 siblings, 0 replies; 52+ messages in thread
From: Kyungmin Park @ 2010-09-01 10:00 UTC (permalink / raw)
To: Kukjin Kim; +Cc: linux-arm-kernel, linux-samsung-soc, ben-linux
On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> This patch moves smdk6440 board file from mach-s5p6440 into the new
> mach-s5p64x0 directory and adds smdk6450 board file.
>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
> .../{mach-s5p6440 => mach-s5p64x0}/mach-smdk6440.c | 87 ++++++----
> arch/arm/mach-s5p64x0/mach-smdk6450.c | 182 ++++++++++++++++++++
> 2 files changed, 234 insertions(+), 35 deletions(-)
> rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/mach-smdk6440.c (66%)
> create mode 100644 arch/arm/mach-s5p64x0/mach-smdk6450.c
>
> diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
> similarity index 66%
> rename from arch/arm/mach-s5p6440/mach-smdk6440.c
> rename to arch/arm/mach-s5p64x0/mach-smdk6440.c
> index 9202aaa..28de0a5 100644
> --- a/arch/arm/mach-s5p6440/mach-smdk6440.c
> +++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
> @@ -1,7 +1,7 @@
> -/* linux/arch/arm/mach-s5p6440/mach-smdk6440.c
> +/* linux/arch/arm/mach-s5p64x0/mach-smdk6440.c
> *
> - * Copyright (c) 2009 Samsung Electronics Co., Ltd.
> - * http://www.samsung.com/
> + * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> *
> * This program is free software; you can redistribute it and/or modify
> * it under the terms of the GNU General Public License version 2 as
> @@ -21,21 +21,22 @@
> #include <linux/io.h>
> #include <linux/module.h>
> #include <linux/clk.h>
> +#include <linux/gpio.h>
>
> #include <asm/mach/arch.h>
> #include <asm/mach/map.h>
> +#include <asm/irq.h>
> +#include <asm/mach-types.h>
>
> #include <mach/hardware.h>
> #include <mach/map.h>
> -
> -#include <asm/irq.h>
> -#include <asm/mach-types.h>
> +#include <mach/regs-clock.h>
> +#include <mach/i2c.h>
>
> #include <plat/regs-serial.h>
> -
> +#include <plat/gpio-cfg.h>
> #include <plat/s5p6440.h>
> #include <plat/clock.h>
> -#include <mach/regs-clock.h>
> #include <plat/devs.h>
> #include <plat/cpu.h>
> #include <plat/iic.h>
> @@ -58,43 +59,60 @@
>
> static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
> [0] = {
> - .hwport = 0,
> - .flags = 0,
> - .ucon = SMDK6440_UCON_DEFAULT,
> - .ulcon = SMDK6440_ULCON_DEFAULT,
> - .ufcon = SMDK6440_UFCON_DEFAULT,
> + .hwport = 0,
> + .flags = 0,
There's no place to use this flags, it's posted for long time. but you
don't listen it.
I hope delete it if not used.
> + .ucon = SMDK6440_UCON_DEFAULT,
> + .ulcon = SMDK6440_ULCON_DEFAULT,
> + .ufcon = SMDK6440_UFCON_DEFAULT,
> },
> [1] = {
> - .hwport = 1,
> - .flags = 0,
> - .ucon = SMDK6440_UCON_DEFAULT,
> - .ulcon = SMDK6440_ULCON_DEFAULT,
> - .ufcon = SMDK6440_UFCON_DEFAULT,
> + .hwport = 1,
> + .flags = 0,
> + .ucon = SMDK6440_UCON_DEFAULT,
> + .ulcon = SMDK6440_ULCON_DEFAULT,
> + .ufcon = SMDK6440_UFCON_DEFAULT,
> },
> [2] = {
> - .hwport = 2,
> - .flags = 0,
> - .ucon = SMDK6440_UCON_DEFAULT,
> - .ulcon = SMDK6440_ULCON_DEFAULT,
> - .ufcon = SMDK6440_UFCON_DEFAULT,
> + .hwport = 2,
> + .flags = 0,
> + .ucon = SMDK6440_UCON_DEFAULT,
> + .ulcon = SMDK6440_ULCON_DEFAULT,
> + .ufcon = SMDK6440_UFCON_DEFAULT,
> },
> [3] = {
> - .hwport = 3,
> - .flags = 0,
> - .ucon = SMDK6440_UCON_DEFAULT,
> - .ulcon = SMDK6440_ULCON_DEFAULT,
> - .ufcon = SMDK6440_UFCON_DEFAULT,
> + .hwport = 3,
> + .flags = 0,
> + .ucon = SMDK6440_UCON_DEFAULT,
> + .ulcon = SMDK6440_ULCON_DEFAULT,
> + .ufcon = SMDK6440_UFCON_DEFAULT,
> },
> };
>
> static struct platform_device *smdk6440_devices[] __initdata = {
> - &s5p6440_device_iis,
> &s3c_device_adc,
> &s3c_device_rtc,
> &s3c_device_i2c0,
> &s3c_device_i2c1,
> &s3c_device_ts,
> &s3c_device_wdt,
> + &s5p6440_device_iis,
> +};
> +
> +static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = {
> + .flags = 0,
> + .slave_addr = 0x10,
> + .frequency = 100*1000,
> + .sda_delay = 100,
> + .cfg_gpio = s5p6440_i2c0_cfg_gpio,
> +};
> +
> +static struct s3c2410_platform_i2c s5p6440_i2c1_data __initdata = {
> + .flags = 0,
> + .bus_num = 1,
> + .slave_addr = 0x10,
> + .frequency = 100*1000,
> + .sda_delay = 100,
> + .cfg_gpio = s5p6440_i2c1_cfg_gpio,
> };
>
> static struct i2c_board_info smdk6440_i2c_devs0[] __initdata = {
> @@ -113,7 +131,7 @@ static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
>
> static void __init smdk6440_map_io(void)
> {
> - s5p_init_io(NULL, 0, S5P_SYS_ID);
> + s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
> s3c24xx_init_clocks(12000000);
> s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
> }
> @@ -122,9 +140,8 @@ static void __init smdk6440_machine_init(void)
> {
> s3c24xx_ts_set_platdata(&s3c_ts_platform);
>
> - /* I2C */
> - s3c_i2c0_set_platdata(NULL);
> - s3c_i2c1_set_platdata(NULL);
> + s3c_i2c0_set_platdata(&s5p6440_i2c0_data);
> + s3c_i2c1_set_platdata(&s5p6440_i2c1_data);
> i2c_register_board_info(0, smdk6440_i2c_devs0,
> ARRAY_SIZE(smdk6440_i2c_devs0));
> i2c_register_board_info(1, smdk6440_i2c_devs1,
> @@ -135,9 +152,9 @@ static void __init smdk6440_machine_init(void)
>
> MACHINE_START(SMDK6440, "SMDK6440")
> /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
> - .phys_io = S3C_PA_UART & 0xfff00000,
> + .phys_io = S5P6440_PA_UART(0) & 0xfff00000,
> .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
> - .boot_params = S5P_PA_SDRAM + 0x100,
> + .boot_params = S5P64X0_PA_SDRAM + 0x100,
>
> .init_irq = s5p6440_init_irq,
> .map_io = smdk6440_map_io,
> diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
> new file mode 100644
> index 0000000..8e98217
> --- /dev/null
> +++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
> @@ -0,0 +1,182 @@
> +/* linux/arch/arm/mach-s5p64x0/mach-smdk6450.c
> + *
> + * Copyright (c) 2010 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/interrupt.h>
> +#include <linux/list.h>
> +#include <linux/timer.h>
> +#include <linux/delay.h>
> +#include <linux/init.h>
> +#include <linux/i2c.h>
> +#include <linux/serial_core.h>
> +#include <linux/platform_device.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/clk.h>
> +#include <linux/gpio.h>
> +
> +#include <asm/mach/arch.h>
> +#include <asm/mach/map.h>
> +#include <asm/irq.h>
> +#include <asm/mach-types.h>
> +
> +#include <mach/hardware.h>
> +#include <mach/map.h>
> +#include <mach/regs-clock.h>
> +#include <mach/i2c.h>
> +
> +#include <plat/regs-serial.h>
> +#include <plat/gpio-cfg.h>
> +#include <plat/s5p6450.h>
> +#include <plat/clock.h>
> +#include <plat/devs.h>
> +#include <plat/cpu.h>
> +#include <plat/iic.h>
> +#include <plat/pll.h>
> +#include <plat/adc.h>
> +#include <plat/ts.h>
> +
> +#define SMDK6450_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
> + S3C2410_UCON_RXILEVEL | \
> + S3C2410_UCON_TXIRQMODE | \
> + S3C2410_UCON_RXIRQMODE | \
> + S3C2410_UCON_RXFIFO_TOI | \
> + S3C2443_UCON_RXERR_IRQEN)
> +
> +#define SMDK6450_ULCON_DEFAULT S3C2410_LCON_CS8
> +
> +#define SMDK6450_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
> + S3C2440_UFCON_TXTRIG16 | \
> + S3C2410_UFCON_RXTRIG8)
> +
> +static struct s3c2410_uartcfg smdk6450_uartcfgs[] __initdata = {
> + [0] = {
> + .hwport = 0,
> + .flags = 0,
> + .ucon = SMDK6450_UCON_DEFAULT,
> + .ulcon = SMDK6450_ULCON_DEFAULT,
> + .ufcon = SMDK6450_UFCON_DEFAULT,
> + },
> + [1] = {
> + .hwport = 1,
> + .flags = 0,
> + .ucon = SMDK6450_UCON_DEFAULT,
> + .ulcon = SMDK6450_ULCON_DEFAULT,
> + .ufcon = SMDK6450_UFCON_DEFAULT,
> + },
> + [2] = {
> + .hwport = 2,
> + .flags = 0,
> + .ucon = SMDK6450_UCON_DEFAULT,
> + .ulcon = SMDK6450_ULCON_DEFAULT,
> + .ufcon = SMDK6450_UFCON_DEFAULT,
> + },
> + [3] = {
> + .hwport = 3,
> + .flags = 0,
> + .ucon = SMDK6450_UCON_DEFAULT,
> + .ulcon = SMDK6450_ULCON_DEFAULT,
> + .ufcon = SMDK6450_UFCON_DEFAULT,
> + },
> +#if CONFIG_SERIAL_SAMSUNG_UARTS > 4
> + [4] = {
> + .hwport = 4,
> + .flags = 0,
> + .ucon = SMDK6450_UCON_DEFAULT,
> + .ulcon = SMDK6450_ULCON_DEFAULT,
> + .ufcon = SMDK6450_UFCON_DEFAULT,
> + },
> +#endif
> +#if CONFIG_SERIAL_SAMSUNG_UARTS > 5
> + [5] = {
> + .hwport = 5,
> + .flags = 0,
> + .ucon = SMDK6450_UCON_DEFAULT,
> + .ulcon = SMDK6450_ULCON_DEFAULT,
> + .ufcon = SMDK6450_UFCON_DEFAULT,
> + },
> +#endif
> +};
> +
> +static struct platform_device *smdk6450_devices[] __initdata = {
> + &s3c_device_adc,
> + &s3c_device_rtc,
> + &s3c_device_i2c0,
> + &s3c_device_i2c1,
> + &s3c_device_ts,
> + &s3c_device_wdt,
> + &s5p6450_device_iis0,
> + /* s5p6450_device_spi0 will be added */
> +};
> +
> +static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = {
> + .flags = 0,
> + .slave_addr = 0x10,
> + .frequency = 100*1000,
> + .sda_delay = 100,
> + .cfg_gpio = s5p6450_i2c0_cfg_gpio,
> +};
> +
> +static struct s3c2410_platform_i2c s5p6450_i2c1_data __initdata = {
> + .flags = 0,
> + .bus_num = 1,
> + .slave_addr = 0x10,
> + .frequency = 100*1000,
> + .sda_delay = 100,
> + .cfg_gpio = s5p6450_i2c1_cfg_gpio,
> +};
> +
> +static struct i2c_board_info smdk6450_i2c_devs0[] __initdata = {
> + { I2C_BOARD_INFO("24c08", 0x50), }, /* Samsung KS24C080C EEPROM */
> +};
> +
> +static struct i2c_board_info smdk6450_i2c_devs1[] __initdata = {
> + { I2C_BOARD_INFO("24c128", 0x57), },/* Samsung S524AD0XD1 EEPROM */
> +};
> +
> +static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
> + .delay = 10000,
> + .presc = 49,
> + .oversampling_shift = 2,
> +};
> +
> +static void __init smdk6450_map_io(void)
> +{
> + s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
> + s3c24xx_init_clocks(19200000);
> + s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs));
> +}
> +
> +static void __init smdk6450_machine_init(void)
> +{
> + s3c24xx_ts_set_platdata(&s3c_ts_platform);
> +
> + s3c_i2c0_set_platdata(&s5p6450_i2c0_data);
> + s3c_i2c1_set_platdata(&s5p6450_i2c1_data);
> + i2c_register_board_info(0, smdk6450_i2c_devs0,
> + ARRAY_SIZE(smdk6450_i2c_devs0));
> + i2c_register_board_info(1, smdk6450_i2c_devs1,
> + ARRAY_SIZE(smdk6450_i2c_devs1));
> +
> + platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
> +}
> +
> +MACHINE_START(SMDK6450, "SMDK6450")
I think you can make a single SMDK file.
> + /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
> + .phys_io = S5P6450_PA_UART(0) & 0xfff00000,
> + .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
> + .boot_params = S5P64X0_PA_SDRAM + 0x100,
> +
> + .init_irq = s5p6450_init_irq,
> + .map_io = smdk6450_map_io,
> + .init_machine = smdk6450_machine_init,
> + .timer = &s3c24xx_timer,
> +MACHINE_END
> --
> 1.6.2.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH 11/13] ARM: S5P64X0: Move SMDK6440 board file and Add SMDK6450 board file
@ 2010-09-01 10:00 ` Kyungmin Park
0 siblings, 0 replies; 52+ messages in thread
From: Kyungmin Park @ 2010-09-01 10:00 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> This patch moves smdk6440 board file from mach-s5p6440 into the new
> mach-s5p64x0 directory and adds smdk6450 board file.
>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> ---
> ?.../{mach-s5p6440 => mach-s5p64x0}/mach-smdk6440.c | ? 87 ++++++----
> ?arch/arm/mach-s5p64x0/mach-smdk6450.c ? ? ? ? ? ? ?| ?182 ++++++++++++++++++++
> ?2 files changed, 234 insertions(+), 35 deletions(-)
> ?rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/mach-smdk6440.c (66%)
> ?create mode 100644 arch/arm/mach-s5p64x0/mach-smdk6450.c
>
> diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-s5p64x0/mach-smdk6440.c
> similarity index 66%
> rename from arch/arm/mach-s5p6440/mach-smdk6440.c
> rename to arch/arm/mach-s5p64x0/mach-smdk6440.c
> index 9202aaa..28de0a5 100644
> --- a/arch/arm/mach-s5p6440/mach-smdk6440.c
> +++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
> @@ -1,7 +1,7 @@
> -/* linux/arch/arm/mach-s5p6440/mach-smdk6440.c
> +/* linux/arch/arm/mach-s5p64x0/mach-smdk6440.c
> ?*
> - * Copyright (c) 2009 Samsung Electronics Co., Ltd.
> - * ? ? ? ? ? ? http://www.samsung.com/
> + * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
> + * ? ? ? ? ? ? http://www.samsung.com
> ?*
> ?* This program is free software; you can redistribute it and/or modify
> ?* it under the terms of the GNU General Public License version 2 as
> @@ -21,21 +21,22 @@
> ?#include <linux/io.h>
> ?#include <linux/module.h>
> ?#include <linux/clk.h>
> +#include <linux/gpio.h>
>
> ?#include <asm/mach/arch.h>
> ?#include <asm/mach/map.h>
> +#include <asm/irq.h>
> +#include <asm/mach-types.h>
>
> ?#include <mach/hardware.h>
> ?#include <mach/map.h>
> -
> -#include <asm/irq.h>
> -#include <asm/mach-types.h>
> +#include <mach/regs-clock.h>
> +#include <mach/i2c.h>
>
> ?#include <plat/regs-serial.h>
> -
> +#include <plat/gpio-cfg.h>
> ?#include <plat/s5p6440.h>
> ?#include <plat/clock.h>
> -#include <mach/regs-clock.h>
> ?#include <plat/devs.h>
> ?#include <plat/cpu.h>
> ?#include <plat/iic.h>
> @@ -58,43 +59,60 @@
>
> ?static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
> ? ? ? ?[0] = {
> - ? ? ? ? ? ? ? .hwport ? ? ?= 0,
> - ? ? ? ? ? ? ? .flags ? ? ? = 0,
> - ? ? ? ? ? ? ? .ucon ? ? ? ?= SMDK6440_UCON_DEFAULT,
> - ? ? ? ? ? ? ? .ulcon ? ? ? = SMDK6440_ULCON_DEFAULT,
> - ? ? ? ? ? ? ? .ufcon ? ? ? = SMDK6440_UFCON_DEFAULT,
> + ? ? ? ? ? ? ? .hwport ? ? ? ? = 0,
> + ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0,
There's no place to use this flags, it's posted for long time. but you
don't listen it.
I hope delete it if not used.
> + ? ? ? ? ? ? ? .ucon ? ? ? ? ? = SMDK6440_UCON_DEFAULT,
> + ? ? ? ? ? ? ? .ulcon ? ? ? ? ?= SMDK6440_ULCON_DEFAULT,
> + ? ? ? ? ? ? ? .ufcon ? ? ? ? ?= SMDK6440_UFCON_DEFAULT,
> ? ? ? ?},
> ? ? ? ?[1] = {
> - ? ? ? ? ? ? ? .hwport ? ? ?= 1,
> - ? ? ? ? ? ? ? .flags ? ? ? = 0,
> - ? ? ? ? ? ? ? .ucon ? ? ? ?= SMDK6440_UCON_DEFAULT,
> - ? ? ? ? ? ? ? .ulcon ? ? ? = SMDK6440_ULCON_DEFAULT,
> - ? ? ? ? ? ? ? .ufcon ? ? ? = SMDK6440_UFCON_DEFAULT,
> + ? ? ? ? ? ? ? .hwport ? ? ? ? = 1,
> + ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? ? ? ? ? .ucon ? ? ? ? ? = SMDK6440_UCON_DEFAULT,
> + ? ? ? ? ? ? ? .ulcon ? ? ? ? ?= SMDK6440_ULCON_DEFAULT,
> + ? ? ? ? ? ? ? .ufcon ? ? ? ? ?= SMDK6440_UFCON_DEFAULT,
> ? ? ? ?},
> ? ? ? ?[2] = {
> - ? ? ? ? ? ? ? .hwport ? ? ?= 2,
> - ? ? ? ? ? ? ? .flags ? ? ? = 0,
> - ? ? ? ? ? ? ? .ucon ? ? ? ?= SMDK6440_UCON_DEFAULT,
> - ? ? ? ? ? ? ? .ulcon ? ? ? = SMDK6440_ULCON_DEFAULT,
> - ? ? ? ? ? ? ? .ufcon ? ? ? = SMDK6440_UFCON_DEFAULT,
> + ? ? ? ? ? ? ? .hwport ? ? ? ? = 2,
> + ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? ? ? ? ? .ucon ? ? ? ? ? = SMDK6440_UCON_DEFAULT,
> + ? ? ? ? ? ? ? .ulcon ? ? ? ? ?= SMDK6440_ULCON_DEFAULT,
> + ? ? ? ? ? ? ? .ufcon ? ? ? ? ?= SMDK6440_UFCON_DEFAULT,
> ? ? ? ?},
> ? ? ? ?[3] = {
> - ? ? ? ? ? ? ? .hwport ? ? ?= 3,
> - ? ? ? ? ? ? ? .flags ? ? ? = 0,
> - ? ? ? ? ? ? ? .ucon ? ? ? ?= SMDK6440_UCON_DEFAULT,
> - ? ? ? ? ? ? ? .ulcon ? ? ? = SMDK6440_ULCON_DEFAULT,
> - ? ? ? ? ? ? ? .ufcon ? ? ? = SMDK6440_UFCON_DEFAULT,
> + ? ? ? ? ? ? ? .hwport ? ? ? ? = 3,
> + ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? ? ? ? ? .ucon ? ? ? ? ? = SMDK6440_UCON_DEFAULT,
> + ? ? ? ? ? ? ? .ulcon ? ? ? ? ?= SMDK6440_ULCON_DEFAULT,
> + ? ? ? ? ? ? ? .ufcon ? ? ? ? ?= SMDK6440_UFCON_DEFAULT,
> ? ? ? ?},
> ?};
>
> ?static struct platform_device *smdk6440_devices[] __initdata = {
> - ? ? ? &s5p6440_device_iis,
> ? ? ? ?&s3c_device_adc,
> ? ? ? ?&s3c_device_rtc,
> ? ? ? ?&s3c_device_i2c0,
> ? ? ? ?&s3c_device_i2c1,
> ? ? ? ?&s3c_device_ts,
> ? ? ? ?&s3c_device_wdt,
> + ? ? ? &s5p6440_device_iis,
> +};
> +
> +static struct s3c2410_platform_i2c s5p6440_i2c0_data __initdata = {
> + ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? .slave_addr ? ? = 0x10,
> + ? ? ? .frequency ? ? ?= 100*1000,
> + ? ? ? .sda_delay ? ? ?= 100,
> + ? ? ? .cfg_gpio ? ? ? = s5p6440_i2c0_cfg_gpio,
> +};
> +
> +static struct s3c2410_platform_i2c s5p6440_i2c1_data __initdata = {
> + ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? .bus_num ? ? ? ?= 1,
> + ? ? ? .slave_addr ? ? = 0x10,
> + ? ? ? .frequency ? ? ?= 100*1000,
> + ? ? ? .sda_delay ? ? ?= 100,
> + ? ? ? .cfg_gpio ? ? ? = s5p6440_i2c1_cfg_gpio,
> ?};
>
> ?static struct i2c_board_info smdk6440_i2c_devs0[] __initdata = {
> @@ -113,7 +131,7 @@ static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
>
> ?static void __init smdk6440_map_io(void)
> ?{
> - ? ? ? s5p_init_io(NULL, 0, S5P_SYS_ID);
> + ? ? ? s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
> ? ? ? ?s3c24xx_init_clocks(12000000);
> ? ? ? ?s3c24xx_init_uarts(smdk6440_uartcfgs, ARRAY_SIZE(smdk6440_uartcfgs));
> ?}
> @@ -122,9 +140,8 @@ static void __init smdk6440_machine_init(void)
> ?{
> ? ? ? ?s3c24xx_ts_set_platdata(&s3c_ts_platform);
>
> - ? ? ? /* I2C */
> - ? ? ? s3c_i2c0_set_platdata(NULL);
> - ? ? ? s3c_i2c1_set_platdata(NULL);
> + ? ? ? s3c_i2c0_set_platdata(&s5p6440_i2c0_data);
> + ? ? ? s3c_i2c1_set_platdata(&s5p6440_i2c1_data);
> ? ? ? ?i2c_register_board_info(0, smdk6440_i2c_devs0,
> ? ? ? ? ? ? ? ? ? ? ? ?ARRAY_SIZE(smdk6440_i2c_devs0));
> ? ? ? ?i2c_register_board_info(1, smdk6440_i2c_devs1,
> @@ -135,9 +152,9 @@ static void __init smdk6440_machine_init(void)
>
> ?MACHINE_START(SMDK6440, "SMDK6440")
> ? ? ? ?/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
> - ? ? ? .phys_io ? ? ? ?= S3C_PA_UART & 0xfff00000,
> + ? ? ? .phys_io ? ? ? ?= S5P6440_PA_UART(0) & 0xfff00000,
> ? ? ? ?.io_pg_offst ? ?= (((u32)S3C_VA_UART) >> 18) & 0xfffc,
> - ? ? ? .boot_params ? ?= S5P_PA_SDRAM + 0x100,
> + ? ? ? .boot_params ? ?= S5P64X0_PA_SDRAM + 0x100,
>
> ? ? ? ?.init_irq ? ? ? = s5p6440_init_irq,
> ? ? ? ?.map_io ? ? ? ? = smdk6440_map_io,
> diff --git a/arch/arm/mach-s5p64x0/mach-smdk6450.c b/arch/arm/mach-s5p64x0/mach-smdk6450.c
> new file mode 100644
> index 0000000..8e98217
> --- /dev/null
> +++ b/arch/arm/mach-s5p64x0/mach-smdk6450.c
> @@ -0,0 +1,182 @@
> +/* linux/arch/arm/mach-s5p64x0/mach-smdk6450.c
> + *
> + * Copyright (c) 2010 Samsung Electronics Co., Ltd.
> + * ? ? ? ? ? ? http://www.samsung.com
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#include <linux/kernel.h>
> +#include <linux/types.h>
> +#include <linux/interrupt.h>
> +#include <linux/list.h>
> +#include <linux/timer.h>
> +#include <linux/delay.h>
> +#include <linux/init.h>
> +#include <linux/i2c.h>
> +#include <linux/serial_core.h>
> +#include <linux/platform_device.h>
> +#include <linux/io.h>
> +#include <linux/module.h>
> +#include <linux/clk.h>
> +#include <linux/gpio.h>
> +
> +#include <asm/mach/arch.h>
> +#include <asm/mach/map.h>
> +#include <asm/irq.h>
> +#include <asm/mach-types.h>
> +
> +#include <mach/hardware.h>
> +#include <mach/map.h>
> +#include <mach/regs-clock.h>
> +#include <mach/i2c.h>
> +
> +#include <plat/regs-serial.h>
> +#include <plat/gpio-cfg.h>
> +#include <plat/s5p6450.h>
> +#include <plat/clock.h>
> +#include <plat/devs.h>
> +#include <plat/cpu.h>
> +#include <plat/iic.h>
> +#include <plat/pll.h>
> +#include <plat/adc.h>
> +#include <plat/ts.h>
> +
> +#define SMDK6450_UCON_DEFAULT ?(S3C2410_UCON_TXILEVEL | ? ? ? ?\
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? S3C2410_UCON_RXILEVEL | ? ? ? ? \
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? S3C2410_UCON_TXIRQMODE | ? ? ? ?\
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? S3C2410_UCON_RXIRQMODE | ? ? ? ?\
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? S3C2410_UCON_RXFIFO_TOI | ? ? ? \
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? S3C2443_UCON_RXERR_IRQEN)
> +
> +#define SMDK6450_ULCON_DEFAULT S3C2410_LCON_CS8
> +
> +#define SMDK6450_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | ? ? ? \
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? S3C2440_UFCON_TXTRIG16 | ? ? ? ?\
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? S3C2410_UFCON_RXTRIG8)
> +
> +static struct s3c2410_uartcfg smdk6450_uartcfgs[] __initdata = {
> + ? ? ? [0] = {
> + ? ? ? ? ? ? ? .hwport ? ? ? ? = 0,
> + ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? ? ? ? ? .ucon ? ? ? ? ? = SMDK6450_UCON_DEFAULT,
> + ? ? ? ? ? ? ? .ulcon ? ? ? ? ?= SMDK6450_ULCON_DEFAULT,
> + ? ? ? ? ? ? ? .ufcon ? ? ? ? ?= SMDK6450_UFCON_DEFAULT,
> + ? ? ? },
> + ? ? ? [1] = {
> + ? ? ? ? ? ? ? .hwport ? ? ? ? = 1,
> + ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? ? ? ? ? .ucon ? ? ? ? ? = SMDK6450_UCON_DEFAULT,
> + ? ? ? ? ? ? ? .ulcon ? ? ? ? ?= SMDK6450_ULCON_DEFAULT,
> + ? ? ? ? ? ? ? .ufcon ? ? ? ? ?= SMDK6450_UFCON_DEFAULT,
> + ? ? ? },
> + ? ? ? [2] = {
> + ? ? ? ? ? ? ? .hwport ? ? ? ? = 2,
> + ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? ? ? ? ? .ucon ? ? ? ? ? = SMDK6450_UCON_DEFAULT,
> + ? ? ? ? ? ? ? .ulcon ? ? ? ? ?= SMDK6450_ULCON_DEFAULT,
> + ? ? ? ? ? ? ? .ufcon ? ? ? ? ?= SMDK6450_UFCON_DEFAULT,
> + ? ? ? },
> + ? ? ? [3] = {
> + ? ? ? ? ? ? ? .hwport ? ? ? ? = 3,
> + ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? ? ? ? ? .ucon ? ? ? ? ? = SMDK6450_UCON_DEFAULT,
> + ? ? ? ? ? ? ? .ulcon ? ? ? ? ?= SMDK6450_ULCON_DEFAULT,
> + ? ? ? ? ? ? ? .ufcon ? ? ? ? ?= SMDK6450_UFCON_DEFAULT,
> + ? ? ? },
> +#if CONFIG_SERIAL_SAMSUNG_UARTS > 4
> + ? ? ? [4] = {
> + ? ? ? ? ? ? ? .hwport ? ? ? ? = 4,
> + ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? ? ? ? ? .ucon ? ? ? ? ? = SMDK6450_UCON_DEFAULT,
> + ? ? ? ? ? ? ? .ulcon ? ? ? ? ?= SMDK6450_ULCON_DEFAULT,
> + ? ? ? ? ? ? ? .ufcon ? ? ? ? ?= SMDK6450_UFCON_DEFAULT,
> + ? ? ? },
> +#endif
> +#if CONFIG_SERIAL_SAMSUNG_UARTS > 5
> + ? ? ? [5] = {
> + ? ? ? ? ? ? ? .hwport ? ? ? ? = 5,
> + ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? ? ? ? ? .ucon ? ? ? ? ? = SMDK6450_UCON_DEFAULT,
> + ? ? ? ? ? ? ? .ulcon ? ? ? ? ?= SMDK6450_ULCON_DEFAULT,
> + ? ? ? ? ? ? ? .ufcon ? ? ? ? ?= SMDK6450_UFCON_DEFAULT,
> + ? ? ? },
> +#endif
> +};
> +
> +static struct platform_device *smdk6450_devices[] __initdata = {
> + ? ? ? &s3c_device_adc,
> + ? ? ? &s3c_device_rtc,
> + ? ? ? &s3c_device_i2c0,
> + ? ? ? &s3c_device_i2c1,
> + ? ? ? &s3c_device_ts,
> + ? ? ? &s3c_device_wdt,
> + ? ? ? &s5p6450_device_iis0,
> + ? ? ? /* s5p6450_device_spi0 will be added */
> +};
> +
> +static struct s3c2410_platform_i2c s5p6450_i2c0_data __initdata = {
> + ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? .slave_addr ? ? = 0x10,
> + ? ? ? .frequency ? ? ?= 100*1000,
> + ? ? ? .sda_delay ? ? ?= 100,
> + ? ? ? .cfg_gpio ? ? ? = s5p6450_i2c0_cfg_gpio,
> +};
> +
> +static struct s3c2410_platform_i2c s5p6450_i2c1_data __initdata = {
> + ? ? ? .flags ? ? ? ? ?= 0,
> + ? ? ? .bus_num ? ? ? ?= 1,
> + ? ? ? .slave_addr ? ? = 0x10,
> + ? ? ? .frequency ? ? ?= 100*1000,
> + ? ? ? .sda_delay ? ? ?= 100,
> + ? ? ? .cfg_gpio ? ? ? = s5p6450_i2c1_cfg_gpio,
> +};
> +
> +static struct i2c_board_info smdk6450_i2c_devs0[] __initdata = {
> + ? ? ? { I2C_BOARD_INFO("24c08", 0x50), }, ? ? /* Samsung KS24C080C EEPROM */
> +};
> +
> +static struct i2c_board_info smdk6450_i2c_devs1[] __initdata = {
> + ? ? ? { I2C_BOARD_INFO("24c128", 0x57), },/* Samsung S524AD0XD1 EEPROM */
> +};
> +
> +static struct s3c2410_ts_mach_info s3c_ts_platform __initdata = {
> + ? ? ? .delay ? ? ? ? ? ? ? ? ?= 10000,
> + ? ? ? .presc ? ? ? ? ? ? ? ? ?= 49,
> + ? ? ? .oversampling_shift ? ? = 2,
> +};
> +
> +static void __init smdk6450_map_io(void)
> +{
> + ? ? ? s5p_init_io(NULL, 0, S5P64X0_SYS_ID);
> + ? ? ? s3c24xx_init_clocks(19200000);
> + ? ? ? s3c24xx_init_uarts(smdk6450_uartcfgs, ARRAY_SIZE(smdk6450_uartcfgs));
> +}
> +
> +static void __init smdk6450_machine_init(void)
> +{
> + ? ? ? s3c24xx_ts_set_platdata(&s3c_ts_platform);
> +
> + ? ? ? s3c_i2c0_set_platdata(&s5p6450_i2c0_data);
> + ? ? ? s3c_i2c1_set_platdata(&s5p6450_i2c1_data);
> + ? ? ? i2c_register_board_info(0, smdk6450_i2c_devs0,
> + ? ? ? ? ? ? ? ? ? ? ? ARRAY_SIZE(smdk6450_i2c_devs0));
> + ? ? ? i2c_register_board_info(1, smdk6450_i2c_devs1,
> + ? ? ? ? ? ? ? ? ? ? ? ARRAY_SIZE(smdk6450_i2c_devs1));
> +
> + ? ? ? platform_add_devices(smdk6450_devices, ARRAY_SIZE(smdk6450_devices));
> +}
> +
> +MACHINE_START(SMDK6450, "SMDK6450")
I think you can make a single SMDK file.
> + ? ? ? /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
> + ? ? ? .phys_io ? ? ? ?= S5P6450_PA_UART(0) & 0xfff00000,
> + ? ? ? .io_pg_offst ? ?= (((u32)S3C_VA_UART) >> 18) & 0xfffc,
> + ? ? ? .boot_params ? ?= S5P64X0_PA_SDRAM + 0x100,
> +
> + ? ? ? .init_irq ? ? ? = s5p6450_init_irq,
> + ? ? ? .map_io ? ? ? ? = smdk6450_map_io,
> + ? ? ? .init_machine ? = smdk6450_machine_init,
> + ? ? ? .timer ? ? ? ? ?= &s3c24xx_timer,
> +MACHINE_END
> --
> 1.6.2.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH 00/13] ARM: S5P64X0: Add new S5P6450 Support
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-01 11:45 ` Ben Dooks
-1 siblings, 0 replies; 52+ messages in thread
From: Ben Dooks @ 2010-09-01 11:45 UTC (permalink / raw)
To: Kukjin Kim; +Cc: linux-arm-kernel, linux-samsung-soc, ben-linux
On Wed, Sep 01, 2010 at 04:09:07PM +0900, Kukjin Kim wrote:
> This patches add basic support for Samsung S5P6450 SoC.
>
> Basically this patch moves mach-s5p6440 (ARCH_S5P6440) to mach-s5p64x0
> (ARCH_S5P64X0) to support Samsung's new S5P6450 SoC. The ARCH_S5P64X0
> can support S5P6440 and S5P6450 with one kernel image. It is tested on
> SMDK6440(S5P6440) and SMDK6450(S5P6450) with s5p64x0_defconfig. And
> this patch changes s5p6440_defconfig to s5p64x0_defconfig for S5P64X0.
What about the s5p6442?
--
Ben
Q: What's a light-year?
A: One-third less calories than a regular year.
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH 00/13] ARM: S5P64X0: Add new S5P6450 Support
@ 2010-09-01 11:45 ` Ben Dooks
0 siblings, 0 replies; 52+ messages in thread
From: Ben Dooks @ 2010-09-01 11:45 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 01, 2010 at 04:09:07PM +0900, Kukjin Kim wrote:
> This patches add basic support for Samsung S5P6450 SoC.
>
> Basically this patch moves mach-s5p6440 (ARCH_S5P6440) to mach-s5p64x0
> (ARCH_S5P64X0) to support Samsung's new S5P6450 SoC. The ARCH_S5P64X0
> can support S5P6440 and S5P6450 with one kernel image. It is tested on
> SMDK6440(S5P6440) and SMDK6450(S5P6450) with s5p64x0_defconfig. And
> this patch changes s5p6440_defconfig to s5p64x0_defconfig for S5P64X0.
What about the s5p6442?
--
Ben
Q: What's a light-year?
A: One-third less calories than a regular year.
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH 08/13] ARM: S5P64X0: Move DMA support for S5P64X0
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-02 1:08 ` Jassi Brar
-1 siblings, 0 replies; 52+ messages in thread
From: Jassi Brar @ 2010-09-02 1:08 UTC (permalink / raw)
To: Kukjin Kim; +Cc: linux-arm-kernel, linux-samsung-soc, Jassi Brar, ben-linux
On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> This patch moves DMA support files in the mach-s5p64x0
> for S5P6440 and S5P6450 SoCs.
>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Jassi Brar <jassi.brar@samsung.com>
> ---
> arch/arm/{mach-s5p6440 => mach-s5p64x0}/dma.c | 75 ++++++++++++++++---
> .../include/mach/dma.h | 0
> arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h | 28 +++++++
> 3 files changed, 91 insertions(+), 12 deletions(-)
> rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/dma.c (56%)
> rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/dma.h (100%)
>
> diff --git a/arch/arm/mach-s5p6440/dma.c b/arch/arm/mach-s5p64x0/dma.c
> similarity index 56%
> rename from arch/arm/mach-s5p6440/dma.c
> rename to arch/arm/mach-s5p64x0/dma.c
> index 07606ad..bc84678 100644
> --- a/arch/arm/mach-s5p6440/dma.c
> +++ b/arch/arm/mach-s5p64x0/dma.c
> @@ -1,4 +1,5 @@
> -/*
> +/* linux/arch/arm/mach-s5p64x0/dma.c
> + *
> * Copyright (C) 2010 Samsung Electronics Co. Ltd.
> * Jaswinder Singh <jassi.brar@samsung.com>
> *
> @@ -15,7 +16,7 @@
> * You should have received a copy of the GNU General Public License
> * along with this program; if not, write to the Free Software
> * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> - */
> +*/
>
> #include <linux/platform_device.h>
> #include <linux/dma-mapping.h>
> @@ -30,11 +31,11 @@
>
> static u64 dma_dmamask = DMA_BIT_MASK(32);
>
> -static struct resource s5p6440_pdma_resource[] = {
> +static struct resource s5p64x0_pdma_resource[] = {
> [0] = {
> - .start = S5P6440_PA_PDMA,
> - .end = S5P6440_PA_PDMA + SZ_4K,
> - .flags = IORESOURCE_MEM,
> + .start = S5P64X0_PA_PDMA,
> + .end = S5P64X0_PA_PDMA + SZ_4K,
> + .flags = IORESOURCE_MEM,
> },
> [1] = {
> .start = IRQ_DMA0,
> @@ -80,11 +81,48 @@ static struct s3c_pl330_platdata s5p6440_pdma_pdata = {
> },
> };
>
> +static struct s3c_pl330_platdata s5p6450_pdma_pdata = {
> + .peri = {
> + [0] = DMACH_UART0_RX,
> + [1] = DMACH_UART0_TX,
> + [2] = DMACH_UART1_RX,
> + [3] = DMACH_UART1_TX,
> + [4] = DMACH_UART2_RX,
> + [5] = DMACH_UART2_TX,
> + [6] = DMACH_UART3_RX,
> + [7] = DMACH_UART3_TX,
> + [8] = DMACH_UART4_RX,
> + [9] = DMACH_UART4_TX,
> + [10] = DMACH_PCM0_TX,
> + [11] = DMACH_PCM0_RX,
> + [12] = DMACH_I2S0_TX,
> + [13] = DMACH_I2S0_RX,
> + [14] = DMACH_SPI0_TX,
> + [15] = DMACH_SPI0_RX,
> + [16] = DMACH_PCM1_TX,
> + [17] = DMACH_PCM1_RX,
> + [18] = DMACH_PCM2_TX,
> + [19] = DMACH_PCM2_RX,
> + [20] = DMACH_SPI1_TX,
> + [21] = DMACH_SPI1_RX,
> + [22] = DMACH_USI_TX,
> + [23] = DMACH_USI_RX,
> + [24] = DMACH_MAX,
> + [25] = DMACH_I2S1_TX,
> + [26] = DMACH_I2S1_RX,
> + [27] = DMACH_I2S2_TX,
> + [28] = DMACH_I2S2_RX,
> + [29] = DMACH_PWM,
> + [30] = DMACH_UART5_RX,
> + [31] = DMACH_UART5_TX,
> + },
> +};
> +
> static struct platform_device s5p6440_device_pdma = {
> .name = "s3c-pl330",
> .id = 1,
While at it, please make id 0 as well.
> - .num_resources = ARRAY_SIZE(s5p6440_pdma_resource),
> - .resource = s5p6440_pdma_resource,
> + .num_resources = ARRAY_SIZE(s5p64x0_pdma_resource),
> + .resource = s5p64x0_pdma_resource,
> .dev = {
> .dma_mask = &dma_dmamask,
> .coherent_dma_mask = DMA_BIT_MASK(32),
> @@ -92,14 +130,27 @@ static struct platform_device s5p6440_device_pdma = {
> },
> };
>
> -static struct platform_device *s5p6440_dmacs[] __initdata = {
> +static struct platform_device s5p6450_device_pdma = {
> + .name = "s3c-pl330",
> + .id = 0,
> + .num_resources = ARRAY_SIZE(s5p64x0_pdma_resource),
> + .resource = s5p64x0_pdma_resource,
> + .dev = {
> + .dma_mask = &dma_dmamask,
> + .coherent_dma_mask = DMA_BIT_MASK(32),
> + .platform_data = &s5p6450_pdma_pdata,
> + },
> +};
> +
> +static struct platform_device *s5p64x0_dmacs[] __initdata = {
> &s5p6440_device_pdma,
> + /* &s5p6450_device_pdma will be added */
> };
Let us simply call the DMAC as s5p64x0_device_pdma and use some
CPU detection method in s5p64x0_dma_init to assign either of
s5p6440_pdma_pdata and s5p6450_pdma_pdata to the platform_data
........
> + DMACH_MTOM_0,
> + DMACH_MTOM_1,
> + DMACH_MTOM_2,
> + DMACH_MTOM_3,
> + DMACH_MTOM_4,
> + DMACH_MTOM_5,
> + DMACH_MTOM_6,
> + DMACH_MTOM_7,
oops ... Mainline s3c dma api doesn't yet support Mem->Mem transfers.
You need to drop it.
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH 08/13] ARM: S5P64X0: Move DMA support for S5P64X0
@ 2010-09-02 1:08 ` Jassi Brar
0 siblings, 0 replies; 52+ messages in thread
From: Jassi Brar @ 2010-09-02 1:08 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> This patch moves DMA support files in the mach-s5p64x0
> for S5P6440 and S5P6450 SoCs.
>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Jassi Brar <jassi.brar@samsung.com>
> ---
> ?arch/arm/{mach-s5p6440 => mach-s5p64x0}/dma.c ? ? ?| ? 75 ++++++++++++++++---
> ?.../include/mach/dma.h ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? ?0
> ?arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h | ? 28 +++++++
> ?3 files changed, 91 insertions(+), 12 deletions(-)
> ?rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/dma.c (56%)
> ?rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/dma.h (100%)
>
> diff --git a/arch/arm/mach-s5p6440/dma.c b/arch/arm/mach-s5p64x0/dma.c
> similarity index 56%
> rename from arch/arm/mach-s5p6440/dma.c
> rename to arch/arm/mach-s5p64x0/dma.c
> index 07606ad..bc84678 100644
> --- a/arch/arm/mach-s5p6440/dma.c
> +++ b/arch/arm/mach-s5p64x0/dma.c
> @@ -1,4 +1,5 @@
> -/*
> +/* linux/arch/arm/mach-s5p64x0/dma.c
> + *
> ?* Copyright (C) 2010 Samsung Electronics Co. Ltd.
> ?* ? ? Jaswinder Singh <jassi.brar@samsung.com>
> ?*
> @@ -15,7 +16,7 @@
> ?* You should have received a copy of the GNU General Public License
> ?* along with this program; if not, write to the Free Software
> ?* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
> - */
> +*/
>
> ?#include <linux/platform_device.h>
> ?#include <linux/dma-mapping.h>
> @@ -30,11 +31,11 @@
>
> ?static u64 dma_dmamask = DMA_BIT_MASK(32);
>
> -static struct resource s5p6440_pdma_resource[] = {
> +static struct resource s5p64x0_pdma_resource[] = {
> ? ? ? ?[0] = {
> - ? ? ? ? ? ? ? .start ?= S5P6440_PA_PDMA,
> - ? ? ? ? ? ? ? .end ? ?= S5P6440_PA_PDMA + SZ_4K,
> - ? ? ? ? ? ? ? .flags = IORESOURCE_MEM,
> + ? ? ? ? ? ? ? .start ?= S5P64X0_PA_PDMA,
> + ? ? ? ? ? ? ? .end ? ?= S5P64X0_PA_PDMA + SZ_4K,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_MEM,
> ? ? ? ?},
> ? ? ? ?[1] = {
> ? ? ? ? ? ? ? ?.start ?= IRQ_DMA0,
> @@ -80,11 +81,48 @@ static struct s3c_pl330_platdata s5p6440_pdma_pdata = {
> ? ? ? ?},
> ?};
>
> +static struct s3c_pl330_platdata s5p6450_pdma_pdata = {
> + ? ? ? .peri = {
> + ? ? ? ? ? ? ? [0] = DMACH_UART0_RX,
> + ? ? ? ? ? ? ? [1] = DMACH_UART0_TX,
> + ? ? ? ? ? ? ? [2] = DMACH_UART1_RX,
> + ? ? ? ? ? ? ? [3] = DMACH_UART1_TX,
> + ? ? ? ? ? ? ? [4] = DMACH_UART2_RX,
> + ? ? ? ? ? ? ? [5] = DMACH_UART2_TX,
> + ? ? ? ? ? ? ? [6] = DMACH_UART3_RX,
> + ? ? ? ? ? ? ? [7] = DMACH_UART3_TX,
> + ? ? ? ? ? ? ? [8] = DMACH_UART4_RX,
> + ? ? ? ? ? ? ? [9] = DMACH_UART4_TX,
> + ? ? ? ? ? ? ? [10] = DMACH_PCM0_TX,
> + ? ? ? ? ? ? ? [11] = DMACH_PCM0_RX,
> + ? ? ? ? ? ? ? [12] = DMACH_I2S0_TX,
> + ? ? ? ? ? ? ? [13] = DMACH_I2S0_RX,
> + ? ? ? ? ? ? ? [14] = DMACH_SPI0_TX,
> + ? ? ? ? ? ? ? [15] = DMACH_SPI0_RX,
> + ? ? ? ? ? ? ? [16] = DMACH_PCM1_TX,
> + ? ? ? ? ? ? ? [17] = DMACH_PCM1_RX,
> + ? ? ? ? ? ? ? [18] = DMACH_PCM2_TX,
> + ? ? ? ? ? ? ? [19] = DMACH_PCM2_RX,
> + ? ? ? ? ? ? ? [20] = DMACH_SPI1_TX,
> + ? ? ? ? ? ? ? [21] = DMACH_SPI1_RX,
> + ? ? ? ? ? ? ? [22] = DMACH_USI_TX,
> + ? ? ? ? ? ? ? [23] = DMACH_USI_RX,
> + ? ? ? ? ? ? ? [24] = DMACH_MAX,
> + ? ? ? ? ? ? ? [25] = DMACH_I2S1_TX,
> + ? ? ? ? ? ? ? [26] = DMACH_I2S1_RX,
> + ? ? ? ? ? ? ? [27] = DMACH_I2S2_TX,
> + ? ? ? ? ? ? ? [28] = DMACH_I2S2_RX,
> + ? ? ? ? ? ? ? [29] = DMACH_PWM,
> + ? ? ? ? ? ? ? [30] = DMACH_UART5_RX,
> + ? ? ? ? ? ? ? [31] = DMACH_UART5_TX,
> + ? ? ? },
> +};
> +
> ?static struct platform_device s5p6440_device_pdma = {
> ? ? ? ?.name ? ? ? ? ? = "s3c-pl330",
> ? ? ? ?.id ? ? ? ? ? ? = 1,
While at it, please make id 0 as well.
> - ? ? ? .num_resources ?= ARRAY_SIZE(s5p6440_pdma_resource),
> - ? ? ? .resource ? ? ? = s5p6440_pdma_resource,
> + ? ? ? .num_resources ?= ARRAY_SIZE(s5p64x0_pdma_resource),
> + ? ? ? .resource ? ? ? = s5p64x0_pdma_resource,
> ? ? ? ?.dev ? ? ? ? ? ?= {
> ? ? ? ? ? ? ? ?.dma_mask = &dma_dmamask,
> ? ? ? ? ? ? ? ?.coherent_dma_mask = DMA_BIT_MASK(32),
> @@ -92,14 +130,27 @@ static struct platform_device s5p6440_device_pdma = {
> ? ? ? ?},
> ?};
>
> -static struct platform_device *s5p6440_dmacs[] __initdata = {
> +static struct platform_device s5p6450_device_pdma = {
> + ? ? ? .name ? ? ? ? ? = "s3c-pl330",
> + ? ? ? .id ? ? ? ? ? ? = 0,
> + ? ? ? .num_resources ?= ARRAY_SIZE(s5p64x0_pdma_resource),
> + ? ? ? .resource ? ? ? = s5p64x0_pdma_resource,
> + ? ? ? .dev ? ? ? ? ? ?= {
> + ? ? ? ? ? ? ? .dma_mask = &dma_dmamask,
> + ? ? ? ? ? ? ? .coherent_dma_mask = DMA_BIT_MASK(32),
> + ? ? ? ? ? ? ? .platform_data = &s5p6450_pdma_pdata,
> + ? ? ? },
> +};
> +
> +static struct platform_device *s5p64x0_dmacs[] __initdata = {
> ? ? ? ?&s5p6440_device_pdma,
> + ? ? ? /* &s5p6450_device_pdma will be added */
> ?};
Let us simply call the DMAC as s5p64x0_device_pdma and use some
CPU detection method in s5p64x0_dma_init to assign either of
s5p6440_pdma_pdata and s5p6450_pdma_pdata to the platform_data
........
> + ? ? ? DMACH_MTOM_0,
> + ? ? ? DMACH_MTOM_1,
> + ? ? ? DMACH_MTOM_2,
> + ? ? ? DMACH_MTOM_3,
> + ? ? ? DMACH_MTOM_4,
> + ? ? ? DMACH_MTOM_5,
> + ? ? ? DMACH_MTOM_6,
> + ? ? ? DMACH_MTOM_7,
oops ... Mainline s3c dma api doesn't yet support Mem->Mem transfers.
You need to drop it.
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH 12/13] ARM: S5P64X0: Add UART serial support for S5P6450
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-02 1:43 ` Kyungmin Park
-1 siblings, 0 replies; 52+ messages in thread
From: Kyungmin Park @ 2010-09-02 1:43 UTC (permalink / raw)
To: Kukjin Kim; +Cc: linux-arm-kernel, linux-samsung-soc, ben-linux
On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> This patch adds UART serial port support for S5P6450 SoC.
> The S5P6450 has 6 UARTs, so adds resource of UART4 and UART5.
> And to fix membase which is in serial/samsung.c is from Ben Dooks.
>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Ben Dooks <ben-linux@fluff.org>
> ---
> arch/arm/plat-s5p/dev-uart.c | 58 ++++++++++++++++++++++++++++++++++++++++++
> drivers/serial/Kconfig | 7 +++--
> drivers/serial/samsung.c | 2 +-
> 3 files changed, 63 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-s5p/dev-uart.c
> index a89331e..6a73428 100644
> --- a/arch/arm/plat-s5p/dev-uart.c
> +++ b/arch/arm/plat-s5p/dev-uart.c
> @@ -119,6 +119,56 @@ static struct resource s5p_uart3_resource[] = {
> #endif
> };
>
> +static struct resource s5p_uart4_resource[] = {
> +#if CONFIG_SERIAL_SAMSUNG_UARTS > 4
> + [0] = {
> + .start = S5P_PA_UART4,
> + .end = S5P_PA_UART4 + S5P_SZ_UART,
> + .flags = IORESOURCE_MEM,
> + },
> + [1] = {
> + .start = IRQ_S5P_UART_RX4,
> + .end = IRQ_S5P_UART_RX4,
> + .flags = IORESOURCE_IRQ,
> + },
> + [2] = {
> + .start = IRQ_S5P_UART_TX4,
> + .end = IRQ_S5P_UART_TX4,
> + .flags = IORESOURCE_IRQ,
> + },
> + [3] = {
> + .start = IRQ_S5P_UART_ERR4,
> + .end = IRQ_S5P_UART_ERR4,
> + .flags = IORESOURCE_IRQ,
> + },
> +#endif
> +};
> +
> +static struct resource s5p_uart5_resource[] = {
> +#if CONFIG_SERIAL_SAMSUNG_UARTS > 5
> + [0] = {
> + .start = S5P_PA_UART5,
> + .end = S5P_PA_UART5 + S5P_SZ_UART,
> + .flags = IORESOURCE_MEM,
> + },
> + [1] = {
> + .start = IRQ_S5P_UART_RX5,
> + .end = IRQ_S5P_UART_RX5,
> + .flags = IORESOURCE_IRQ,
> + },
> + [2] = {
> + .start = IRQ_S5P_UART_TX5,
> + .end = IRQ_S5P_UART_TX5,
> + .flags = IORESOURCE_IRQ,
> + },
> + [3] = {
> + .start = IRQ_S5P_UART_ERR5,
> + .end = IRQ_S5P_UART_ERR5,
> + .flags = IORESOURCE_IRQ,
> + },
> +#endif
> +};
> +
> struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = {
> [0] = {
> .resources = s5p_uart0_resource,
> @@ -136,4 +186,12 @@ struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = {
> .resources = s5p_uart3_resource,
> .nr_resources = ARRAY_SIZE(s5p_uart3_resource),
> },
> + [4] = {
> + .resources = s5p_uart4_resource,
> + .nr_resources = ARRAY_SIZE(s5p_uart4_resource),
> + },
> + [5] = {
> + .resources = s5p_uart5_resource,
> + .nr_resources = ARRAY_SIZE(s5p_uart5_resource),
> + },
> };
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index 12900f7..3198c53 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -458,6 +458,7 @@ config SERIAL_SAMSUNG_UARTS
> int
> depends on ARM && PLAT_SAMSUNG
> default 2 if ARCH_S3C2400
> + default 6 if ARCH_S5P6450
> default 4 if SERIAL_SAMSUNG_UARTS_4
> default 3
> help
How about to remove SERIAL_SAMSUNG_UARTS_4 and use the
SERIAL_SAMSUNG_UARTS only?
> @@ -526,12 +527,12 @@ config SERIAL_S3C24A0
> Serial port support for the Samsung S3C24A0 SoC
>
> config SERIAL_S3C6400
> - tristate "Samsung S3C6400/S3C6410/S5P6440/S5PC100 Serial port support"
> - depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5PC100)
> + tristate "Samsung S3C6400/S3C6410/S5P6440/S5P6450/S5PC100 Serial port support"
> + depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5P6450 || CPU_S5PC100)
> select SERIAL_SAMSUNG_UARTS_4
> default y
> help
> - Serial port support for the Samsung S3C6400, S3C6410, S5P6440
> + Serial port support for the Samsung S3C6400, S3C6410, S5P6440, S5P6450
> and S5PC100 SoCs
>
> config SERIAL_S5PV210
> diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c
> index b1156ba..7ac2bf5 100644
> --- a/drivers/serial/samsung.c
> +++ b/drivers/serial/samsung.c
> @@ -1101,7 +1101,7 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
> dbg("resource %p (%lx..%lx)\n", res, res->start, res->end);
>
> port->mapbase = res->start;
> - port->membase = S3C_VA_UART + res->start - (S3C_PA_UART & 0xfff00000);
> + port->membase = S3C_VA_UART + (res->start & 0xfffff);
> ret = platform_get_irq(platdev, 0);
> if (ret < 0)
> port->irq = 0;
> --
> 1.6.2.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH 12/13] ARM: S5P64X0: Add UART serial support for S5P6450
@ 2010-09-02 1:43 ` Kyungmin Park
0 siblings, 0 replies; 52+ messages in thread
From: Kyungmin Park @ 2010-09-02 1:43 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> This patch adds UART serial port support for S5P6450 SoC.
> The S5P6450 has 6 UARTs, so adds resource of UART4 and UART5.
> And to fix membase which is in serial/samsung.c is from Ben Dooks.
>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Ben Dooks <ben-linux@fluff.org>
> ---
> ?arch/arm/plat-s5p/dev-uart.c | ? 58 ++++++++++++++++++++++++++++++++++++++++++
> ?drivers/serial/Kconfig ? ? ? | ? ?7 +++--
> ?drivers/serial/samsung.c ? ? | ? ?2 +-
> ?3 files changed, 63 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/plat-s5p/dev-uart.c b/arch/arm/plat-s5p/dev-uart.c
> index a89331e..6a73428 100644
> --- a/arch/arm/plat-s5p/dev-uart.c
> +++ b/arch/arm/plat-s5p/dev-uart.c
> @@ -119,6 +119,56 @@ static struct resource s5p_uart3_resource[] = {
> ?#endif
> ?};
>
> +static struct resource s5p_uart4_resource[] = {
> +#if CONFIG_SERIAL_SAMSUNG_UARTS > 4
> + ? ? ? [0] = {
> + ? ? ? ? ? ? ? .start ?= S5P_PA_UART4,
> + ? ? ? ? ? ? ? .end ? ?= S5P_PA_UART4 + S5P_SZ_UART,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_MEM,
> + ? ? ? },
> + ? ? ? [1] = {
> + ? ? ? ? ? ? ? .start ?= IRQ_S5P_UART_RX4,
> + ? ? ? ? ? ? ? .end ? ?= IRQ_S5P_UART_RX4,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_IRQ,
> + ? ? ? },
> + ? ? ? [2] = {
> + ? ? ? ? ? ? ? .start ?= IRQ_S5P_UART_TX4,
> + ? ? ? ? ? ? ? .end ? ?= IRQ_S5P_UART_TX4,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_IRQ,
> + ? ? ? },
> + ? ? ? [3] = {
> + ? ? ? ? ? ? ? .start ?= IRQ_S5P_UART_ERR4,
> + ? ? ? ? ? ? ? .end ? ?= IRQ_S5P_UART_ERR4,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_IRQ,
> + ? ? ? },
> +#endif
> +};
> +
> +static struct resource s5p_uart5_resource[] = {
> +#if CONFIG_SERIAL_SAMSUNG_UARTS > 5
> + ? ? ? [0] = {
> + ? ? ? ? ? ? ? .start ?= S5P_PA_UART5,
> + ? ? ? ? ? ? ? .end ? ?= S5P_PA_UART5 + S5P_SZ_UART,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_MEM,
> + ? ? ? },
> + ? ? ? [1] = {
> + ? ? ? ? ? ? ? .start ?= IRQ_S5P_UART_RX5,
> + ? ? ? ? ? ? ? .end ? ?= IRQ_S5P_UART_RX5,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_IRQ,
> + ? ? ? },
> + ? ? ? [2] = {
> + ? ? ? ? ? ? ? .start ?= IRQ_S5P_UART_TX5,
> + ? ? ? ? ? ? ? .end ? ?= IRQ_S5P_UART_TX5,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_IRQ,
> + ? ? ? },
> + ? ? ? [3] = {
> + ? ? ? ? ? ? ? .start ?= IRQ_S5P_UART_ERR5,
> + ? ? ? ? ? ? ? .end ? ?= IRQ_S5P_UART_ERR5,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_IRQ,
> + ? ? ? },
> +#endif
> +};
> +
> ?struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = {
> ? ? ? ?[0] = {
> ? ? ? ? ? ? ? ?.resources ? ? ?= s5p_uart0_resource,
> @@ -136,4 +186,12 @@ struct s3c24xx_uart_resources s5p_uart_resources[] __initdata = {
> ? ? ? ? ? ? ? ?.resources ? ? ?= s5p_uart3_resource,
> ? ? ? ? ? ? ? ?.nr_resources ? = ARRAY_SIZE(s5p_uart3_resource),
> ? ? ? ?},
> + ? ? ? [4] = {
> + ? ? ? ? ? ? ? .resources ? ? ?= s5p_uart4_resource,
> + ? ? ? ? ? ? ? .nr_resources ? = ARRAY_SIZE(s5p_uart4_resource),
> + ? ? ? },
> + ? ? ? [5] = {
> + ? ? ? ? ? ? ? .resources ? ? ?= s5p_uart5_resource,
> + ? ? ? ? ? ? ? .nr_resources ? = ARRAY_SIZE(s5p_uart5_resource),
> + ? ? ? },
> ?};
> diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
> index 12900f7..3198c53 100644
> --- a/drivers/serial/Kconfig
> +++ b/drivers/serial/Kconfig
> @@ -458,6 +458,7 @@ config SERIAL_SAMSUNG_UARTS
> ? ? ? ?int
> ? ? ? ?depends on ARM && PLAT_SAMSUNG
> ? ? ? ?default 2 if ARCH_S3C2400
> + ? ? ? default 6 if ARCH_S5P6450
> ? ? ? ?default 4 if SERIAL_SAMSUNG_UARTS_4
> ? ? ? ?default 3
> ? ? ? ?help
How about to remove SERIAL_SAMSUNG_UARTS_4 and use the
SERIAL_SAMSUNG_UARTS only?
> @@ -526,12 +527,12 @@ config SERIAL_S3C24A0
> ? ? ? ? ?Serial port support for the Samsung S3C24A0 SoC
>
> ?config SERIAL_S3C6400
> - ? ? ? tristate "Samsung S3C6400/S3C6410/S5P6440/S5PC100 Serial port support"
> - ? ? ? depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5PC100)
> + ? ? ? tristate "Samsung S3C6400/S3C6410/S5P6440/S5P6450/S5PC100 Serial port support"
> + ? ? ? depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440 || CPU_S5P6450 || CPU_S5PC100)
> ? ? ? ?select SERIAL_SAMSUNG_UARTS_4
> ? ? ? ?default y
> ? ? ? ?help
> - ? ? ? ? Serial port support for the Samsung S3C6400, S3C6410, S5P6440
> + ? ? ? ? Serial port support for the Samsung S3C6400, S3C6410, S5P6440, S5P6450
> ? ? ? ? ?and S5PC100 SoCs
>
> ?config SERIAL_S5PV210
> diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c
> index b1156ba..7ac2bf5 100644
> --- a/drivers/serial/samsung.c
> +++ b/drivers/serial/samsung.c
> @@ -1101,7 +1101,7 @@ static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport,
> ? ? ? ?dbg("resource %p (%lx..%lx)\n", res, res->start, res->end);
>
> ? ? ? ?port->mapbase = res->start;
> - ? ? ? port->membase = S3C_VA_UART + res->start - (S3C_PA_UART & 0xfff00000);
> + ? ? ? port->membase = S3C_VA_UART + (res->start & 0xfffff);
> ? ? ? ?ret = platform_get_irq(platdev, 0);
> ? ? ? ?if (ret < 0)
> ? ? ? ? ? ? ? ?port->irq = 0;
> --
> 1.6.2.5
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in
> the body of a message to majordomo at vger.kernel.org
> More majordomo info at ?http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply [flat|nested] 52+ messages in thread
* Re: [PATCH 07/13] ARM: S5P64X0: Update Audio support
2010-09-01 7:09 ` Kukjin Kim
@ 2010-09-02 1:44 ` Jassi Brar
-1 siblings, 0 replies; 52+ messages in thread
From: Jassi Brar @ 2010-09-02 1:44 UTC (permalink / raw)
To: Kukjin Kim; +Cc: linux-arm-kernel, linux-samsung-soc, Jassi Brar, ben-linux
On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> This patch updates Audio and SPI for S5P6440 and S5P6450 SoCs.
>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Jassi Brar <jassi.brar@samsung.com>
> ---
> arch/arm/mach-s5p6440/dev-audio.c | 127 -----------
> arch/arm/mach-s5p6440/dev-spi.c | 176 ---------------
> arch/arm/mach-s5p6440/include/mach/spi-clocks.h | 17 --
> arch/arm/mach-s5p64x0/dev-audio.c | 164 ++++++++++++++
> arch/arm/mach-s5p64x0/dev-spi.c | 275 +++++++++++++++++++++++
> arch/arm/mach-s5p64x0/include/mach/spi-clocks.h | 20 ++
> arch/arm/plat-samsung/include/plat/devs.h | 5 +
> 7 files changed, 464 insertions(+), 320 deletions(-)
> delete mode 100644 arch/arm/mach-s5p6440/dev-audio.c
> delete mode 100644 arch/arm/mach-s5p6440/dev-spi.c
> delete mode 100644 arch/arm/mach-s5p6440/include/mach/spi-clocks.h
> create mode 100644 arch/arm/mach-s5p64x0/dev-audio.c
> create mode 100644 arch/arm/mach-s5p64x0/dev-spi.c
> create mode 100644 arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
>
> diff --git a/arch/arm/mach-s5p6440/dev-audio.c b/arch/arm/mach-s5p6440/dev-audio.c
> deleted file mode 100644
> index 3ca0d2b..0000000
> --- a/arch/arm/mach-s5p6440/dev-audio.c
> +++ /dev/null
> @@ -1,127 +0,0 @@
> -/* linux/arch/arm/mach-s5p6440/dev-audio.c
> - *
> - * Copyright (c) 2010 Samsung Electronics Co. Ltd
> - * Jaswinder Singh <jassi.brar@samsung.com>
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> - */
> -
> -#include <linux/platform_device.h>
> -#include <linux/dma-mapping.h>
> -#include <linux/gpio.h>
> -
> -#include <plat/gpio-cfg.h>
> -#include <plat/audio.h>
> -
> -#include <mach/map.h>
> -#include <mach/dma.h>
> -#include <mach/irqs.h>
> -
> -static int s5p6440_cfg_i2s(struct platform_device *pdev)
> -{
> - /* configure GPIO for i2s port */
> - switch (pdev->id) {
> - case -1:
> - s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5));
> - s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5));
> - s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5));
> - s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5));
> - s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5));
> - s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5));
> - s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5));
> - break;
> -
> - default:
> - printk(KERN_ERR "Invalid Device %d\n", pdev->id);
> - return -EINVAL;
> - }
> -
> - return 0;
> -}
> -
> -static struct s3c_audio_pdata s3c_i2s_pdata = {
> - .cfg_gpio = s5p6440_cfg_i2s,
> -};
> -
> -static struct resource s5p6440_iis0_resource[] = {
> - [0] = {
> - .start = S5P6440_PA_I2S,
> - .end = S5P6440_PA_I2S + 0x100 - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = DMACH_I2S0_TX,
> - .end = DMACH_I2S0_TX,
> - .flags = IORESOURCE_DMA,
> - },
> - [2] = {
> - .start = DMACH_I2S0_RX,
> - .end = DMACH_I2S0_RX,
> - .flags = IORESOURCE_DMA,
> - },
> -};
> -
> -struct platform_device s5p6440_device_iis = {
> - .name = "s3c64xx-iis-v4",
> - .id = -1,
> - .num_resources = ARRAY_SIZE(s5p6440_iis0_resource),
> - .resource = s5p6440_iis0_resource,
> - .dev = {
> - .platform_data = &s3c_i2s_pdata,
> - },
> -};
> -
> -/* PCM Controller platform_devices */
> -
> -static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev)
> -{
> - switch (pdev->id) {
> - case 0:
> - s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2));
> - s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2));
> - s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2));
> - s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2));
> - s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2));
> - break;
> -
> - default:
> - printk(KERN_DEBUG "Invalid PCM Controller number!");
> - return -EINVAL;
> - }
> -
> - return 0;
> -}
> -
> -static struct s3c_audio_pdata s3c_pcm_pdata = {
> - .cfg_gpio = s5p6440_pcm_cfg_gpio,
> -};
> -
> -static struct resource s5p6440_pcm0_resource[] = {
> - [0] = {
> - .start = S5P6440_PA_PCM,
> - .end = S5P6440_PA_PCM + 0x100 - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = DMACH_PCM0_TX,
> - .end = DMACH_PCM0_TX,
> - .flags = IORESOURCE_DMA,
> - },
> - [2] = {
> - .start = DMACH_PCM0_RX,
> - .end = DMACH_PCM0_RX,
> - .flags = IORESOURCE_DMA,
> - },
> -};
> -
> -struct platform_device s5p6440_device_pcm = {
> - .name = "samsung-pcm",
> - .id = 0,
> - .num_resources = ARRAY_SIZE(s5p6440_pcm0_resource),
> - .resource = s5p6440_pcm0_resource,
> - .dev = {
> - .platform_data = &s3c_pcm_pdata,
> - },
> -};
> diff --git a/arch/arm/mach-s5p6440/dev-spi.c b/arch/arm/mach-s5p6440/dev-spi.c
> deleted file mode 100644
> index 510af44..0000000
> --- a/arch/arm/mach-s5p6440/dev-spi.c
> +++ /dev/null
> @@ -1,176 +0,0 @@
> -/* linux/arch/arm/mach-s5p6440/dev-spi.c
> - *
> - * Copyright (C) 2010 Samsung Electronics Co. Ltd.
> - * Jaswinder Singh <jassi.brar@samsung.com>
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> - */
> -
> -#include <linux/platform_device.h>
> -#include <linux/dma-mapping.h>
> -#include <linux/gpio.h>
> -
> -#include <mach/dma.h>
> -#include <mach/map.h>
> -#include <mach/irqs.h>
> -#include <mach/spi-clocks.h>
> -
> -#include <plat/s3c64xx-spi.h>
> -#include <plat/gpio-cfg.h>
> -
> -static char *spi_src_clks[] = {
> - [S5P6440_SPI_SRCCLK_PCLK] = "pclk",
> - [S5P6440_SPI_SRCCLK_SCLK] = "spi_epll",
> -};
> -
> -/* SPI Controller platform_devices */
> -
> -/* Since we emulate multi-cs capability, we do not touch the CS.
> - * The emulated CS is toggled by board specific mechanism, as it can
> - * be either some immediate GPIO or some signal out of some other
> - * chip in between ... or some yet another way.
> - * We simply do not assume anything about CS.
> - */
> -static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
> -{
> - switch (pdev->id) {
> - case 0:
> - s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2));
> - s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2));
> - s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2));
> - s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP);
> - s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP);
> - s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP);
> - break;
> -
> - case 1:
> - s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2));
> - s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2));
> - s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2));
> - s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP);
> - s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP);
> - s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP);
> - break;
> -
> - default:
> - dev_err(&pdev->dev, "Invalid SPI Controller number!");
> - return -EINVAL;
> - }
> -
> - return 0;
> -}
> -
> -static struct resource s5p6440_spi0_resource[] = {
> - [0] = {
> - .start = S5P6440_PA_SPI0,
> - .end = S5P6440_PA_SPI0 + 0x100 - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = DMACH_SPI0_TX,
> - .end = DMACH_SPI0_TX,
> - .flags = IORESOURCE_DMA,
> - },
> - [2] = {
> - .start = DMACH_SPI0_RX,
> - .end = DMACH_SPI0_RX,
> - .flags = IORESOURCE_DMA,
> - },
> - [3] = {
> - .start = IRQ_SPI0,
> - .end = IRQ_SPI0,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct s3c64xx_spi_info s5p6440_spi0_pdata = {
> - .cfg_gpio = s5p6440_spi_cfg_gpio,
> - .fifo_lvl_mask = 0x1ff,
> - .rx_lvl_offset = 15,
> -};
> -
> -static u64 spi_dmamask = DMA_BIT_MASK(32);
> -
> -struct platform_device s5p6440_device_spi0 = {
> - .name = "s3c64xx-spi",
> - .id = 0,
> - .num_resources = ARRAY_SIZE(s5p6440_spi0_resource),
> - .resource = s5p6440_spi0_resource,
> - .dev = {
> - .dma_mask = &spi_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - .platform_data = &s5p6440_spi0_pdata,
> - },
> -};
> -
> -static struct resource s5p6440_spi1_resource[] = {
> - [0] = {
> - .start = S5P6440_PA_SPI1,
> - .end = S5P6440_PA_SPI1 + 0x100 - 1,
> - .flags = IORESOURCE_MEM,
> - },
> - [1] = {
> - .start = DMACH_SPI1_TX,
> - .end = DMACH_SPI1_TX,
> - .flags = IORESOURCE_DMA,
> - },
> - [2] = {
> - .start = DMACH_SPI1_RX,
> - .end = DMACH_SPI1_RX,
> - .flags = IORESOURCE_DMA,
> - },
> - [3] = {
> - .start = IRQ_SPI1,
> - .end = IRQ_SPI1,
> - .flags = IORESOURCE_IRQ,
> - },
> -};
> -
> -static struct s3c64xx_spi_info s5p6440_spi1_pdata = {
> - .cfg_gpio = s5p6440_spi_cfg_gpio,
> - .fifo_lvl_mask = 0x7f,
> - .rx_lvl_offset = 15,
> -};
> -
> -struct platform_device s5p6440_device_spi1 = {
> - .name = "s3c64xx-spi",
> - .id = 1,
> - .num_resources = ARRAY_SIZE(s5p6440_spi1_resource),
> - .resource = s5p6440_spi1_resource,
> - .dev = {
> - .dma_mask = &spi_dmamask,
> - .coherent_dma_mask = DMA_BIT_MASK(32),
> - .platform_data = &s5p6440_spi1_pdata,
> - },
> -};
> -
> -void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
> -{
> - struct s3c64xx_spi_info *pd;
> -
> - /* Reject invalid configuration */
> - if (!num_cs || src_clk_nr < 0
> - || src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) {
> - printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
> - return;
> - }
> -
> - switch (cntrlr) {
> - case 0:
> - pd = &s5p6440_spi0_pdata;
> - break;
> - case 1:
> - pd = &s5p6440_spi1_pdata;
> - break;
> - default:
> - printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
> - __func__, cntrlr);
> - return;
> - }
> -
> - pd->num_cs = num_cs;
> - pd->src_clk_nr = src_clk_nr;
> - pd->src_clk_name = spi_src_clks[src_clk_nr];
> -}
> diff --git a/arch/arm/mach-s5p6440/include/mach/spi-clocks.h b/arch/arm/mach-s5p6440/include/mach/spi-clocks.h
> deleted file mode 100644
> index 5fbca50..0000000
> --- a/arch/arm/mach-s5p6440/include/mach/spi-clocks.h
> +++ /dev/null
> @@ -1,17 +0,0 @@
> -/* linux/arch/arm/mach-s5p6440/include/mach/spi-clocks.h
> - *
> - * Copyright (C) 2010 Samsung Electronics Co. Ltd.
> - * Jaswinder Singh <jassi.brar@samsung.com>
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> - */
> -
> -#ifndef __S5P6440_PLAT_SPI_CLKS_H
> -#define __S5P6440_PLAT_SPI_CLKS_H __FILE__
> -
> -#define S5P6440_SPI_SRCCLK_PCLK 0
> -#define S5P6440_SPI_SRCCLK_SCLK 1
> -
> -#endif /* __S5P6440_PLAT_SPI_CLKS_H */
> diff --git a/arch/arm/mach-s5p64x0/dev-audio.c b/arch/arm/mach-s5p64x0/dev-audio.c
> new file mode 100644
> index 0000000..ac7cfce
> --- /dev/null
> +++ b/arch/arm/mach-s5p64x0/dev-audio.c
> @@ -0,0 +1,164 @@
> +/* linux/arch/arm/mach-s5p64x0/dev-audio.c
> + *
> + * Copyright (c) 2010 Samsung Electronics Co. Ltd
> + * Jaswinder Singh <jassi.brar@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#include <linux/platform_device.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/gpio.h>
> +
> +#include <plat/gpio-cfg.h>
> +#include <plat/audio.h>
> +
> +#include <mach/map.h>
> +#include <mach/dma.h>
> +#include <mach/irqs.h>
> +
> +static int s5p6440_cfg_i2s(struct platform_device *pdev)
> +{
> + /* configure GPIO for i2s port */
> + switch (pdev->id) {
> + case -1:
> + s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5));
> + s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5));
> + s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5));
> + s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5));
> + s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5));
> + s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5));
> + s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5));
> + break;
> +
> + default:
> + printk(KERN_ERR "Invalid Device %d\n", pdev->id);
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static int s5p6450_cfg_i2s(struct platform_device *pdev)
> +{
> + /* configure GPIO for i2s port */
> + switch (pdev->id) {
> + case -1:
> + s3c_gpio_cfgpin(S5P6450_GPB(4), S3C_GPIO_SFN(5));
> + s3c_gpio_cfgpin(S5P6450_GPR(4), S3C_GPIO_SFN(5));
> + s3c_gpio_cfgpin(S5P6450_GPR(5), S3C_GPIO_SFN(5));
> + s3c_gpio_cfgpin(S5P6450_GPR(6), S3C_GPIO_SFN(5));
> + s3c_gpio_cfgpin(S5P6450_GPR(7), S3C_GPIO_SFN(5));
> + s3c_gpio_cfgpin(S5P6450_GPR(8), S3C_GPIO_SFN(5));
> + s3c_gpio_cfgpin(S5P6450_GPR(13), S3C_GPIO_SFN(5));
> + s3c_gpio_cfgpin(S5P6450_GPR(14), S3C_GPIO_SFN(5));
> + break;
> +
> + default:
> + printk(KERN_ERR "Invalid Device %d\n", pdev->id);
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
S5P6450 has 2 I2S_v2 and 1 I2S_v4, the first two are missing.
Also missing are 3 PCM device definitions.
> +
> +static struct s3c_audio_pdata s5p6440_i2s_pdata = {
> + .cfg_gpio = s5p6440_cfg_i2s,
> +};
> +
> +static struct s3c_audio_pdata s5p6450_i2s_pdata = {
> + .cfg_gpio = s5p6450_cfg_i2s,
> +};
> +
> +static struct resource s5p64x0_iis0_resource[] = {
> + [0] = {
> + .start = S5P64X0_PA_I2S,
> + .end = S5P64X0_PA_I2S + 0x100 - 1,
> + .flags = IORESOURCE_MEM,
> + },
> + [1] = {
> + .start = DMACH_I2S0_TX,
> + .end = DMACH_I2S0_TX,
> + .flags = IORESOURCE_DMA,
> + },
> + [2] = {
> + .start = DMACH_I2S0_RX,
> + .end = DMACH_I2S0_RX,
> + .flags = IORESOURCE_DMA,
> + },
> +};
> +
> +struct platform_device s5p6440_device_iis = {
> + .name = "s3c64x0-iis-v4",
The assigned name is wrong. It should be "s3c64xx-iis-v4"
> + .id = -1,
> + .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource),
> + .resource = s5p64x0_iis0_resource,
> + .dev = {
> + .platform_data = &s5p6440_i2s_pdata,
> + },
> +};
> +
> +struct platform_device s5p6450_device_iis0 = {
> + .name = "s3c64x0-iis-v4",
The assigned name is wrong. It should be "s3c64xx-iis-v4"
> + .id = -1,
> + .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource),
> + .resource = s5p64x0_iis0_resource,
> + .dev = {
> + .platform_data = &s5p6450_i2s_pdata,
> + },
> +};
> +
> +/* PCM Controller platform_devices */
> +
> +static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev)
> +{
> + switch (pdev->id) {
> + case 0:
> + s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2));
> + s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2));
> + s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2));
> + s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2));
> + s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2));
> + break;
> +
> + default:
> + printk(KERN_DEBUG "Invalid PCM Controller number!");
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static struct s3c_audio_pdata s5p6440_pcm_pdata = {
> + .cfg_gpio = s5p6440_pcm_cfg_gpio,
> +};
> +
> +static struct resource s5p6440_pcm0_resource[] = {
> + [0] = {
> + .start = S5P64X0_PA_PCM,
> + .end = S5P64X0_PA_PCM + 0x100 - 1,
> + .flags = IORESOURCE_MEM,
> + },
> + [1] = {
> + .start = DMACH_PCM0_TX,
> + .end = DMACH_PCM0_TX,
> + .flags = IORESOURCE_DMA,
> + },
> + [2] = {
> + .start = DMACH_PCM0_RX,
> + .end = DMACH_PCM0_RX,
> + .flags = IORESOURCE_DMA,
> + },
> +};
> +
> +struct platform_device s5p6440_device_pcm = {
> + .name = "samsung-pcm",
> + .id = 0,
> + .num_resources = ARRAY_SIZE(s5p6440_pcm0_resource),
> + .resource = s5p6440_pcm0_resource,
> + .dev = {
> + .platform_data = &s5p6440_pcm_pdata,
> + },
> +};
> diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c
> new file mode 100644
> index 0000000..7303d3a
> --- /dev/null
> +++ b/arch/arm/mach-s5p64x0/dev-spi.c
> @@ -0,0 +1,275 @@
> +/* linux/arch/arm/mach-s5p64x0/dev-spi.c
> + *
> + * Copyright (C) 2010 Samsung Electronics Co. Ltd.
> + * Jaswinder Singh <jassi.brar@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#include <linux/platform_device.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/gpio.h>
> +
> +#include <mach/dma.h>
> +#include <mach/map.h>
> +#include <mach/irqs.h>
> +#include <mach/spi-clocks.h>
> +
> +#include <plat/s3c64x0-spi.h>
> +#include <plat/gpio-cfg.h>
> +
> +static char *s5p6440_spi_src_clks[] = {
> + [S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
> + [S5P64X0_SPI_SRCCLK_SCLK] = "spi_epll",
> +};
> +
> +static char *s5p6450_spi_src_clks[] = {
> + [S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
> + [S5P64X0_SPI_SRCCLK_SCLK] = "sclk_spi",
> +};
Maybe we can drop one and call the other s5p64x0_spi_src_clks
The second clock is the same but only named differently.
> +
> +/* SPI Controller platform_devices */
> +
> +/* Since we emulate multi-cs capability, we do not touch the CS.
> + * The emulated CS is toggled by board specific mechanism, as it can
> + * be either some immediate GPIO or some signal out of some other
> + * chip in between ... or some yet another way.
> + * We simply do not assume anything about CS.
> + */
> +static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
> +{
> + switch (pdev->id) {
> + case 0:
> + s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2));
> + s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2));
> + s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2));
> + s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP);
> + s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP);
> + s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP);
> + break;
> +
> + case 1:
> + s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2));
> + s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2));
> + s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2));
> + s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP);
> + s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP);
> + s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP);
> + break;
> +
> + default:
> + dev_err(&pdev->dev, "Invalid SPI Controller number!");
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static int s5p6450_spi_cfg_gpio(struct platform_device *pdev)
> +{
> + switch (pdev->id) {
> + case 0:
> + s3c_gpio_cfgpin(S5P6450_GPC(0), S3C_GPIO_SFN(2));
> + s3c_gpio_cfgpin(S5P6450_GPC(1), S3C_GPIO_SFN(2));
> + s3c_gpio_cfgpin(S5P6450_GPC(2), S3C_GPIO_SFN(2));
> + s3c_gpio_setpull(S5P6450_GPC(0), S3C_GPIO_PULL_UP);
> + s3c_gpio_setpull(S5P6450_GPC(1), S3C_GPIO_PULL_UP);
> + s3c_gpio_setpull(S5P6450_GPC(2), S3C_GPIO_PULL_UP);
> + break;
> +
> + case 1:
> + s3c_gpio_cfgpin(S5P6450_GPC(4), S3C_GPIO_SFN(2));
> + s3c_gpio_cfgpin(S5P6450_GPC(5), S3C_GPIO_SFN(2));
> + s3c_gpio_cfgpin(S5P6450_GPC(6), S3C_GPIO_SFN(2));
> + s3c_gpio_setpull(S5P6450_GPC(4), S3C_GPIO_PULL_UP);
> + s3c_gpio_setpull(S5P6450_GPC(5), S3C_GPIO_PULL_UP);
> + s3c_gpio_setpull(S5P6450_GPC(6), S3C_GPIO_PULL_UP);
> + break;
> +
> + default:
> + dev_err(&pdev->dev, "Invalid SPI Controller number!");
> + return -EINVAL;
> + }
> +
> + return 0;
> +}
> +
> +static struct resource s5p64x0_spi0_resource[] = {
> + [0] = {
> + .start = S5P64X0_PA_SPI0,
> + .end = S5P64X0_PA_SPI0 + 0x100 - 1,
> + .flags = IORESOURCE_MEM,
> + },
> + [1] = {
> + .start = DMACH_SPI0_TX,
> + .end = DMACH_SPI0_TX,
> + .flags = IORESOURCE_DMA,
> + },
> + [2] = {
> + .start = DMACH_SPI0_RX,
> + .end = DMACH_SPI0_RX,
> + .flags = IORESOURCE_DMA,
> + },
> + [3] = {
> + .start = IRQ_SPI0,
> + .end = IRQ_SPI0,
> + .flags = IORESOURCE_IRQ,
> + },
> +};
> +
> +static struct s3c64x0_spi_info s5p6440_spi0_pdata = {
> + .cfg_gpio = s5p6440_spi_cfg_gpio,
> + .fifo_lvl_mask = 0x1ff,
> + .rx_lvl_offset = 15,
> +};
I think you forgot to compile check in hurry ?
There is no s3c64x0_spi_info, but only s3c64xx_spi_info
> +
> +static struct s3c64x0_spi_info s5p6450_spi0_pdata = {
> + .cfg_gpio = s5p6450_spi_cfg_gpio,
> + .fifo_lvl_mask = 0x1ff,
> + .rx_lvl_offset = 15,
> +};
> +
> +static u64 spi_dmamask = DMA_BIT_MASK(32);
> +
> +struct platform_device s5p6440_device_spi0 = {
> + .name = "s3c64x0-spi",
%s/64xx/64x0 ? :)
The device name should be kept same "s3c64xx-spi"
> + .id = 0,
> + .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource),
> + .resource = s5p64x0_spi0_resource,
> + .dev = {
> + .dma_mask = &spi_dmamask,
> + .coherent_dma_mask = DMA_BIT_MASK(32),
> + .platform_data = &s5p6440_spi0_pdata,
> + },
> +};
> +
> +struct platform_device s5p6450_device_spi0 = {
> + .name = "s3c64x0-spi",
same here
> + .id = 0,
> + .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource),
> + .resource = s5p64x0_spi0_resource,
> + .dev = {
> + .dma_mask = &spi_dmamask,
> + .coherent_dma_mask = DMA_BIT_MASK(32),
> + .platform_data = &s5p6450_spi0_pdata,
> + },
> +};
> +
> +static struct resource s5p64x0_spi1_resource[] = {
> + [0] = {
> + .start = S5P64X0_PA_SPI1,
> + .end = S5P64X0_PA_SPI1 + 0x100 - 1,
> + .flags = IORESOURCE_MEM,
> + },
> + [1] = {
> + .start = DMACH_SPI1_TX,
> + .end = DMACH_SPI1_TX,
> + .flags = IORESOURCE_DMA,
> + },
> + [2] = {
> + .start = DMACH_SPI1_RX,
> + .end = DMACH_SPI1_RX,
> + .flags = IORESOURCE_DMA,
> + },
> + [3] = {
> + .start = IRQ_SPI1,
> + .end = IRQ_SPI1,
> + .flags = IORESOURCE_IRQ,
> + },
> +};
> +
> +static struct s3c64x0_spi_info s5p6440_spi1_pdata = {
> + .cfg_gpio = s5p6440_spi_cfg_gpio,
> + .fifo_lvl_mask = 0x7f,
> + .rx_lvl_offset = 15,
> +};
> +
> +static struct s3c64x0_spi_info s5p6450_spi1_pdata = {
> + .cfg_gpio = s5p6450_spi_cfg_gpio,
> + .fifo_lvl_mask = 0x7f,
> + .rx_lvl_offset = 15,
> +};
> +
> +struct platform_device s5p6440_device_spi1 = {
> + .name = "s3c64x0-spi",
same here...
> + .id = 1,
> + .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource),
> + .resource = s5p64x0_spi1_resource,
> + .dev = {
> + .dma_mask = &spi_dmamask,
> + .coherent_dma_mask = DMA_BIT_MASK(32),
> + .platform_data = &s5p6440_spi1_pdata,
> + },
> +};
> +
> +struct platform_device s5p6450_device_spi1 = {
> + .name = "s3c64x0-spi",
same here ....
> + .id = 1,
> + .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource),
> + .resource = s5p64x0_spi1_resource,
> + .dev = {
> + .dma_mask = &spi_dmamask,
> + .coherent_dma_mask = DMA_BIT_MASK(32),
> + .platform_data = &s5p6450_spi1_pdata,
> + },
> +};
> +
> +void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
maybe we could call it s5p64x0_spi_set_info, and remove other other one ?
> +{
> + struct s3c64x0_spi_info *pd;
> +
> + /* Reject invalid configuration */
> + if (!num_cs || src_clk_nr < 0
> + || src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) {
you need to change all references to S5P6440_SPI_SRCCLK_..... as well.
> + printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
> + return;
> + }
> +
> + switch (cntrlr) {
> + case 0:
> + pd = &s5p6440_spi0_pdata;
> + break;
> + case 1:
> + pd = &s5p6440_spi1_pdata;
> + break;
> + default:
> + printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
> + __func__, cntrlr);
> + return;
> + }
> +
> + pd->num_cs = num_cs;
> + pd->src_clk_nr = src_clk_nr;
> + pd->src_clk_name = s5p6440_spi_src_clks[src_clk_nr];
> +}
> +
> +void __init s5p6450_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
> +{
> + struct s3c64x0_spi_info *pd;
> +
> + /* Reject invalid configuration */
> + if (!num_cs || src_clk_nr < 0
> + || src_clk_nr > S5P6450_SPI_SRCCLK_SCLK) {
> + printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
> + return;
> + }
> +
> + switch (cntrlr) {
> + case 0:
> + pd = &s5p6450_spi0_pdata;
> + break;
> + case 1:
> + pd = &s5p6450_spi1_pdata;
> + break;
> + default:
> + printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
> + __func__, cntrlr);
> + return;
> + }
> +
> + pd->num_cs = num_cs;
> + pd->src_clk_nr = src_clk_nr;
> + pd->src_clk_name = s5p6450_spi_src_clks[src_clk_nr];
> +}
> diff --git a/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
> new file mode 100644
> index 0000000..170a20a
> --- /dev/null
> +++ b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
> @@ -0,0 +1,20 @@
> +/* linux/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
> + *
> + * Copyright (c) 2010 Samsung Electronics Co., Ltd.
> + * http://www.samsung.com
^^^ This notice is redundant
> + *
> + * Copyright (C) 2010 Samsung Electronics Co. Ltd.
> + * Jaswinder Singh <jassi.brar@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#ifndef __ASM_ARCH_SPI_CLKS_H
> +#define __ASM_ARCH_SPI_CLKS_H __FILE__
> +
> +#define S5P64X0_SPI_SRCCLK_PCLK 0
> +#define S5P64X0_SPI_SRCCLK_SCLK 1
> +
> +#endif /* __ASM_ARCH_SPI_CLKS_H */
> diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
> index 85f6f23..10d0d3c 100644
> --- a/arch/arm/plat-samsung/include/plat/devs.h
> +++ b/arch/arm/plat-samsung/include/plat/devs.h
> @@ -67,6 +67,8 @@ extern struct platform_device s5pv210_device_spi0;
> extern struct platform_device s5pv210_device_spi1;
> extern struct platform_device s5p6440_device_spi0;
> extern struct platform_device s5p6440_device_spi1;
> +extern struct platform_device s5p6450_device_spi0;
> +extern struct platform_device s5p6450_device_spi1;
>
> extern struct platform_device s3c_device_hwmon;
>
> @@ -95,6 +97,9 @@ extern struct platform_device s5p6442_device_spi;
> extern struct platform_device s5p6440_device_pcm;
> extern struct platform_device s5p6440_device_iis;
>
> +extern struct platform_device s5p6450_device_iis0;
> +extern struct platform_device s5p6450_device_pcm0;
> +
> extern struct platform_device s5pc100_device_ac97;
> extern struct platform_device s5pc100_device_pcm0;
> extern struct platform_device s5pc100_device_pcm1;
> --
> 1.6.2.5
just to say the least.
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH 07/13] ARM: S5P64X0: Update Audio support
@ 2010-09-02 1:44 ` Jassi Brar
0 siblings, 0 replies; 52+ messages in thread
From: Jassi Brar @ 2010-09-02 1:44 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> This patch updates Audio and SPI for S5P6440 and S5P6450 SoCs.
>
> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> Cc: Jassi Brar <jassi.brar@samsung.com>
> ---
> ?arch/arm/mach-s5p6440/dev-audio.c ? ? ? ? ? ? ? | ?127 -----------
> ?arch/arm/mach-s5p6440/dev-spi.c ? ? ? ? ? ? ? ? | ?176 ---------------
> ?arch/arm/mach-s5p6440/include/mach/spi-clocks.h | ? 17 --
> ?arch/arm/mach-s5p64x0/dev-audio.c ? ? ? ? ? ? ? | ?164 ++++++++++++++
> ?arch/arm/mach-s5p64x0/dev-spi.c ? ? ? ? ? ? ? ? | ?275 +++++++++++++++++++++++
> ?arch/arm/mach-s5p64x0/include/mach/spi-clocks.h | ? 20 ++
> ?arch/arm/plat-samsung/include/plat/devs.h ? ? ? | ? ?5 +
> ?7 files changed, 464 insertions(+), 320 deletions(-)
> ?delete mode 100644 arch/arm/mach-s5p6440/dev-audio.c
> ?delete mode 100644 arch/arm/mach-s5p6440/dev-spi.c
> ?delete mode 100644 arch/arm/mach-s5p6440/include/mach/spi-clocks.h
> ?create mode 100644 arch/arm/mach-s5p64x0/dev-audio.c
> ?create mode 100644 arch/arm/mach-s5p64x0/dev-spi.c
> ?create mode 100644 arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
>
> diff --git a/arch/arm/mach-s5p6440/dev-audio.c b/arch/arm/mach-s5p6440/dev-audio.c
> deleted file mode 100644
> index 3ca0d2b..0000000
> --- a/arch/arm/mach-s5p6440/dev-audio.c
> +++ /dev/null
> @@ -1,127 +0,0 @@
> -/* linux/arch/arm/mach-s5p6440/dev-audio.c
> - *
> - * Copyright (c) 2010 Samsung Electronics Co. Ltd
> - * ? ? Jaswinder Singh <jassi.brar@samsung.com>
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> - */
> -
> -#include <linux/platform_device.h>
> -#include <linux/dma-mapping.h>
> -#include <linux/gpio.h>
> -
> -#include <plat/gpio-cfg.h>
> -#include <plat/audio.h>
> -
> -#include <mach/map.h>
> -#include <mach/dma.h>
> -#include <mach/irqs.h>
> -
> -static int s5p6440_cfg_i2s(struct platform_device *pdev)
> -{
> - ? ? ? /* configure GPIO for i2s port */
> - ? ? ? switch (pdev->id) {
> - ? ? ? case -1:
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5));
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5));
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5));
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5));
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5));
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5));
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5));
> - ? ? ? ? ? ? ? break;
> -
> - ? ? ? default:
> - ? ? ? ? ? ? ? printk(KERN_ERR "Invalid Device %d\n", pdev->id);
> - ? ? ? ? ? ? ? return -EINVAL;
> - ? ? ? }
> -
> - ? ? ? return 0;
> -}
> -
> -static struct s3c_audio_pdata s3c_i2s_pdata = {
> - ? ? ? .cfg_gpio = s5p6440_cfg_i2s,
> -};
> -
> -static struct resource s5p6440_iis0_resource[] = {
> - ? ? ? [0] = {
> - ? ? ? ? ? ? ? .start = S5P6440_PA_I2S,
> - ? ? ? ? ? ? ? .end ? = S5P6440_PA_I2S + 0x100 - 1,
> - ? ? ? ? ? ? ? .flags = IORESOURCE_MEM,
> - ? ? ? },
> - ? ? ? [1] = {
> - ? ? ? ? ? ? ? .start = DMACH_I2S0_TX,
> - ? ? ? ? ? ? ? .end ? = DMACH_I2S0_TX,
> - ? ? ? ? ? ? ? .flags = IORESOURCE_DMA,
> - ? ? ? },
> - ? ? ? [2] = {
> - ? ? ? ? ? ? ? .start = DMACH_I2S0_RX,
> - ? ? ? ? ? ? ? .end ? = DMACH_I2S0_RX,
> - ? ? ? ? ? ? ? .flags = IORESOURCE_DMA,
> - ? ? ? },
> -};
> -
> -struct platform_device s5p6440_device_iis = {
> - ? ? ? .name ? ? ? ? ? ? = "s3c64xx-iis-v4",
> - ? ? ? .id ? ? ? ? ? ? ? = -1,
> - ? ? ? .num_resources ? ?= ARRAY_SIZE(s5p6440_iis0_resource),
> - ? ? ? .resource ? ? ? ? = s5p6440_iis0_resource,
> - ? ? ? .dev = {
> - ? ? ? ? ? ? ? .platform_data = &s3c_i2s_pdata,
> - ? ? ? },
> -};
> -
> -/* PCM Controller platform_devices */
> -
> -static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev)
> -{
> - ? ? ? switch (pdev->id) {
> - ? ? ? case 0:
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2));
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2));
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2));
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2));
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2));
> - ? ? ? ? ? ? ? break;
> -
> - ? ? ? default:
> - ? ? ? ? ? ? ? printk(KERN_DEBUG "Invalid PCM Controller number!");
> - ? ? ? ? ? ? ? return -EINVAL;
> - ? ? ? }
> -
> - ? ? ? return 0;
> -}
> -
> -static struct s3c_audio_pdata s3c_pcm_pdata = {
> - ? ? ? .cfg_gpio = s5p6440_pcm_cfg_gpio,
> -};
> -
> -static struct resource s5p6440_pcm0_resource[] = {
> - ? ? ? [0] = {
> - ? ? ? ? ? ? ? .start = S5P6440_PA_PCM,
> - ? ? ? ? ? ? ? .end ? = S5P6440_PA_PCM + 0x100 - 1,
> - ? ? ? ? ? ? ? .flags = IORESOURCE_MEM,
> - ? ? ? },
> - ? ? ? [1] = {
> - ? ? ? ? ? ? ? .start = DMACH_PCM0_TX,
> - ? ? ? ? ? ? ? .end ? = DMACH_PCM0_TX,
> - ? ? ? ? ? ? ? .flags = IORESOURCE_DMA,
> - ? ? ? },
> - ? ? ? [2] = {
> - ? ? ? ? ? ? ? .start = DMACH_PCM0_RX,
> - ? ? ? ? ? ? ? .end ? = DMACH_PCM0_RX,
> - ? ? ? ? ? ? ? .flags = IORESOURCE_DMA,
> - ? ? ? },
> -};
> -
> -struct platform_device s5p6440_device_pcm = {
> - ? ? ? .name ? ? ? ? ? ? = "samsung-pcm",
> - ? ? ? .id ? ? ? ? ? ? ? = 0,
> - ? ? ? .num_resources ? ?= ARRAY_SIZE(s5p6440_pcm0_resource),
> - ? ? ? .resource ? ? ? ? = s5p6440_pcm0_resource,
> - ? ? ? .dev = {
> - ? ? ? ? ? ? ? .platform_data = &s3c_pcm_pdata,
> - ? ? ? },
> -};
> diff --git a/arch/arm/mach-s5p6440/dev-spi.c b/arch/arm/mach-s5p6440/dev-spi.c
> deleted file mode 100644
> index 510af44..0000000
> --- a/arch/arm/mach-s5p6440/dev-spi.c
> +++ /dev/null
> @@ -1,176 +0,0 @@
> -/* linux/arch/arm/mach-s5p6440/dev-spi.c
> - *
> - * Copyright (C) 2010 Samsung Electronics Co. Ltd.
> - * ? ? Jaswinder Singh <jassi.brar@samsung.com>
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> - */
> -
> -#include <linux/platform_device.h>
> -#include <linux/dma-mapping.h>
> -#include <linux/gpio.h>
> -
> -#include <mach/dma.h>
> -#include <mach/map.h>
> -#include <mach/irqs.h>
> -#include <mach/spi-clocks.h>
> -
> -#include <plat/s3c64xx-spi.h>
> -#include <plat/gpio-cfg.h>
> -
> -static char *spi_src_clks[] = {
> - ? ? ? [S5P6440_SPI_SRCCLK_PCLK] = "pclk",
> - ? ? ? [S5P6440_SPI_SRCCLK_SCLK] = "spi_epll",
> -};
> -
> -/* SPI Controller platform_devices */
> -
> -/* Since we emulate multi-cs capability, we do not touch the CS.
> - * The emulated CS is toggled by board specific mechanism, as it can
> - * be either some immediate GPIO or some signal out of some other
> - * chip in between ... or some yet another way.
> - * We simply do not assume anything about CS.
> - */
> -static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
> -{
> - ? ? ? switch (pdev->id) {
> - ? ? ? case 0:
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2));
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2));
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2));
> - ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP);
> - ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP);
> - ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP);
> - ? ? ? ? ? ? ? break;
> -
> - ? ? ? case 1:
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2));
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2));
> - ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2));
> - ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP);
> - ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP);
> - ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP);
> - ? ? ? ? ? ? ? break;
> -
> - ? ? ? default:
> - ? ? ? ? ? ? ? dev_err(&pdev->dev, "Invalid SPI Controller number!");
> - ? ? ? ? ? ? ? return -EINVAL;
> - ? ? ? }
> -
> - ? ? ? return 0;
> -}
> -
> -static struct resource s5p6440_spi0_resource[] = {
> - ? ? ? [0] = {
> - ? ? ? ? ? ? ? .start = S5P6440_PA_SPI0,
> - ? ? ? ? ? ? ? .end ? = S5P6440_PA_SPI0 + 0x100 - 1,
> - ? ? ? ? ? ? ? .flags = IORESOURCE_MEM,
> - ? ? ? },
> - ? ? ? [1] = {
> - ? ? ? ? ? ? ? .start = DMACH_SPI0_TX,
> - ? ? ? ? ? ? ? .end ? = DMACH_SPI0_TX,
> - ? ? ? ? ? ? ? .flags = IORESOURCE_DMA,
> - ? ? ? },
> - ? ? ? [2] = {
> - ? ? ? ? ? ? ? .start = DMACH_SPI0_RX,
> - ? ? ? ? ? ? ? .end ? = DMACH_SPI0_RX,
> - ? ? ? ? ? ? ? .flags = IORESOURCE_DMA,
> - ? ? ? },
> - ? ? ? [3] = {
> - ? ? ? ? ? ? ? .start = IRQ_SPI0,
> - ? ? ? ? ? ? ? .end ? = IRQ_SPI0,
> - ? ? ? ? ? ? ? .flags = IORESOURCE_IRQ,
> - ? ? ? },
> -};
> -
> -static struct s3c64xx_spi_info s5p6440_spi0_pdata = {
> - ? ? ? .cfg_gpio = s5p6440_spi_cfg_gpio,
> - ? ? ? .fifo_lvl_mask = 0x1ff,
> - ? ? ? .rx_lvl_offset = 15,
> -};
> -
> -static u64 spi_dmamask = DMA_BIT_MASK(32);
> -
> -struct platform_device s5p6440_device_spi0 = {
> - ? ? ? .name ? ? ? ? ? ? = "s3c64xx-spi",
> - ? ? ? .id ? ? ? ? ? ? ? = 0,
> - ? ? ? .num_resources ? ?= ARRAY_SIZE(s5p6440_spi0_resource),
> - ? ? ? .resource ? ? ? ? = s5p6440_spi0_resource,
> - ? ? ? .dev = {
> - ? ? ? ? ? ? ? .dma_mask ? ? ? ? ? ? ? = &spi_dmamask,
> - ? ? ? ? ? ? ? .coherent_dma_mask ? ? ?= DMA_BIT_MASK(32),
> - ? ? ? ? ? ? ? .platform_data = &s5p6440_spi0_pdata,
> - ? ? ? },
> -};
> -
> -static struct resource s5p6440_spi1_resource[] = {
> - ? ? ? [0] = {
> - ? ? ? ? ? ? ? .start = S5P6440_PA_SPI1,
> - ? ? ? ? ? ? ? .end ? = S5P6440_PA_SPI1 + 0x100 - 1,
> - ? ? ? ? ? ? ? .flags = IORESOURCE_MEM,
> - ? ? ? },
> - ? ? ? [1] = {
> - ? ? ? ? ? ? ? .start = DMACH_SPI1_TX,
> - ? ? ? ? ? ? ? .end ? = DMACH_SPI1_TX,
> - ? ? ? ? ? ? ? .flags = IORESOURCE_DMA,
> - ? ? ? },
> - ? ? ? [2] = {
> - ? ? ? ? ? ? ? .start = DMACH_SPI1_RX,
> - ? ? ? ? ? ? ? .end ? = DMACH_SPI1_RX,
> - ? ? ? ? ? ? ? .flags = IORESOURCE_DMA,
> - ? ? ? },
> - ? ? ? [3] = {
> - ? ? ? ? ? ? ? .start = IRQ_SPI1,
> - ? ? ? ? ? ? ? .end ? = IRQ_SPI1,
> - ? ? ? ? ? ? ? .flags = IORESOURCE_IRQ,
> - ? ? ? },
> -};
> -
> -static struct s3c64xx_spi_info s5p6440_spi1_pdata = {
> - ? ? ? .cfg_gpio = s5p6440_spi_cfg_gpio,
> - ? ? ? .fifo_lvl_mask = 0x7f,
> - ? ? ? .rx_lvl_offset = 15,
> -};
> -
> -struct platform_device s5p6440_device_spi1 = {
> - ? ? ? .name ? ? ? ? ? ? = "s3c64xx-spi",
> - ? ? ? .id ? ? ? ? ? ? ? = 1,
> - ? ? ? .num_resources ? ?= ARRAY_SIZE(s5p6440_spi1_resource),
> - ? ? ? .resource ? ? ? ? = s5p6440_spi1_resource,
> - ? ? ? .dev = {
> - ? ? ? ? ? ? ? .dma_mask ? ? ? ? ? ? ? = &spi_dmamask,
> - ? ? ? ? ? ? ? .coherent_dma_mask ? ? ?= DMA_BIT_MASK(32),
> - ? ? ? ? ? ? ? .platform_data = &s5p6440_spi1_pdata,
> - ? ? ? },
> -};
> -
> -void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
> -{
> - ? ? ? struct s3c64xx_spi_info *pd;
> -
> - ? ? ? /* Reject invalid configuration */
> - ? ? ? if (!num_cs || src_clk_nr < 0
> - ? ? ? ? ? ? ? ? ? ? ? || src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) {
> - ? ? ? ? ? ? ? printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
> - ? ? ? ? ? ? ? return;
> - ? ? ? }
> -
> - ? ? ? switch (cntrlr) {
> - ? ? ? case 0:
> - ? ? ? ? ? ? ? pd = &s5p6440_spi0_pdata;
> - ? ? ? ? ? ? ? break;
> - ? ? ? case 1:
> - ? ? ? ? ? ? ? pd = &s5p6440_spi1_pdata;
> - ? ? ? ? ? ? ? break;
> - ? ? ? default:
> - ? ? ? ? ? ? ? printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
> - ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? __func__, cntrlr);
> - ? ? ? ? ? ? ? return;
> - ? ? ? }
> -
> - ? ? ? pd->num_cs = num_cs;
> - ? ? ? pd->src_clk_nr = src_clk_nr;
> - ? ? ? pd->src_clk_name = spi_src_clks[src_clk_nr];
> -}
> diff --git a/arch/arm/mach-s5p6440/include/mach/spi-clocks.h b/arch/arm/mach-s5p6440/include/mach/spi-clocks.h
> deleted file mode 100644
> index 5fbca50..0000000
> --- a/arch/arm/mach-s5p6440/include/mach/spi-clocks.h
> +++ /dev/null
> @@ -1,17 +0,0 @@
> -/* linux/arch/arm/mach-s5p6440/include/mach/spi-clocks.h
> - *
> - * Copyright (C) 2010 Samsung Electronics Co. Ltd.
> - * ? ? Jaswinder Singh <jassi.brar@samsung.com>
> - *
> - * This program is free software; you can redistribute it and/or modify
> - * it under the terms of the GNU General Public License version 2 as
> - * published by the Free Software Foundation.
> - */
> -
> -#ifndef __S5P6440_PLAT_SPI_CLKS_H
> -#define __S5P6440_PLAT_SPI_CLKS_H __FILE__
> -
> -#define S5P6440_SPI_SRCCLK_PCLK ? ? ? ? ? ? ? ?0
> -#define S5P6440_SPI_SRCCLK_SCLK ? ? ? ? ? ? ? ?1
> -
> -#endif /* __S5P6440_PLAT_SPI_CLKS_H */
> diff --git a/arch/arm/mach-s5p64x0/dev-audio.c b/arch/arm/mach-s5p64x0/dev-audio.c
> new file mode 100644
> index 0000000..ac7cfce
> --- /dev/null
> +++ b/arch/arm/mach-s5p64x0/dev-audio.c
> @@ -0,0 +1,164 @@
> +/* linux/arch/arm/mach-s5p64x0/dev-audio.c
> + *
> + * Copyright (c) 2010 Samsung Electronics Co. Ltd
> + * ? ? Jaswinder Singh <jassi.brar@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#include <linux/platform_device.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/gpio.h>
> +
> +#include <plat/gpio-cfg.h>
> +#include <plat/audio.h>
> +
> +#include <mach/map.h>
> +#include <mach/dma.h>
> +#include <mach/irqs.h>
> +
> +static int s5p6440_cfg_i2s(struct platform_device *pdev)
> +{
> + ? ? ? /* configure GPIO for i2s port */
> + ? ? ? switch (pdev->id) {
> + ? ? ? case -1:
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(4), S3C_GPIO_SFN(5));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(5), S3C_GPIO_SFN(5));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(5));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(5));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(5));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(5));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(5));
> + ? ? ? ? ? ? ? break;
> +
> + ? ? ? default:
> + ? ? ? ? ? ? ? printk(KERN_ERR "Invalid Device %d\n", pdev->id);
> + ? ? ? ? ? ? ? return -EINVAL;
> + ? ? ? }
> +
> + ? ? ? return 0;
> +}
> +
> +static int s5p6450_cfg_i2s(struct platform_device *pdev)
> +{
> + ? ? ? /* configure GPIO for i2s port */
> + ? ? ? switch (pdev->id) {
> + ? ? ? case -1:
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6450_GPB(4), S3C_GPIO_SFN(5));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6450_GPR(4), S3C_GPIO_SFN(5));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6450_GPR(5), S3C_GPIO_SFN(5));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6450_GPR(6), S3C_GPIO_SFN(5));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6450_GPR(7), S3C_GPIO_SFN(5));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6450_GPR(8), S3C_GPIO_SFN(5));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6450_GPR(13), S3C_GPIO_SFN(5));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6450_GPR(14), S3C_GPIO_SFN(5));
> + ? ? ? ? ? ? ? break;
> +
> + ? ? ? default:
> + ? ? ? ? ? ? ? printk(KERN_ERR "Invalid Device %d\n", pdev->id);
> + ? ? ? ? ? ? ? return -EINVAL;
> + ? ? ? }
> +
> + ? ? ? return 0;
> +}
S5P6450 has 2 I2S_v2 and 1 I2S_v4, the first two are missing.
Also missing are 3 PCM device definitions.
> +
> +static struct s3c_audio_pdata s5p6440_i2s_pdata = {
> + ? ? ? .cfg_gpio = s5p6440_cfg_i2s,
> +};
> +
> +static struct s3c_audio_pdata s5p6450_i2s_pdata = {
> + ? ? ? .cfg_gpio = s5p6450_cfg_i2s,
> +};
> +
> +static struct resource s5p64x0_iis0_resource[] = {
> + ? ? ? [0] = {
> + ? ? ? ? ? ? ? .start ?= S5P64X0_PA_I2S,
> + ? ? ? ? ? ? ? .end ? ?= S5P64X0_PA_I2S + 0x100 - 1,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_MEM,
> + ? ? ? },
> + ? ? ? [1] = {
> + ? ? ? ? ? ? ? .start ?= DMACH_I2S0_TX,
> + ? ? ? ? ? ? ? .end ? ?= DMACH_I2S0_TX,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_DMA,
> + ? ? ? },
> + ? ? ? [2] = {
> + ? ? ? ? ? ? ? .start ?= DMACH_I2S0_RX,
> + ? ? ? ? ? ? ? .end ? ?= DMACH_I2S0_RX,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_DMA,
> + ? ? ? },
> +};
> +
> +struct platform_device s5p6440_device_iis = {
> + ? ? ? .name ? ? ? ? ? = "s3c64x0-iis-v4",
The assigned name is wrong. It should be "s3c64xx-iis-v4"
> + ? ? ? .id ? ? ? ? ? ? = -1,
> + ? ? ? .num_resources ?= ARRAY_SIZE(s5p64x0_iis0_resource),
> + ? ? ? .resource ? ? ? = s5p64x0_iis0_resource,
> + ? ? ? .dev = {
> + ? ? ? ? ? ? ? .platform_data = &s5p6440_i2s_pdata,
> + ? ? ? },
> +};
> +
> +struct platform_device s5p6450_device_iis0 = {
> + ? ? ? .name ? ? ? ? ? = "s3c64x0-iis-v4",
The assigned name is wrong. It should be "s3c64xx-iis-v4"
> + ? ? ? .id ? ? ? ? ? ? = -1,
> + ? ? ? .num_resources ?= ARRAY_SIZE(s5p64x0_iis0_resource),
> + ? ? ? .resource ? ? ? = s5p64x0_iis0_resource,
> + ? ? ? .dev = {
> + ? ? ? ? ? ? ? .platform_data = &s5p6450_i2s_pdata,
> + ? ? ? },
> +};
> +
> +/* PCM Controller platform_devices */
> +
> +static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev)
> +{
> + ? ? ? switch (pdev->id) {
> + ? ? ? case 0:
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(7), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(13), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(14), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(8), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPR(6), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? break;
> +
> + ? ? ? default:
> + ? ? ? ? ? ? ? printk(KERN_DEBUG "Invalid PCM Controller number!");
> + ? ? ? ? ? ? ? return -EINVAL;
> + ? ? ? }
> +
> + ? ? ? return 0;
> +}
> +
> +static struct s3c_audio_pdata s5p6440_pcm_pdata = {
> + ? ? ? .cfg_gpio = s5p6440_pcm_cfg_gpio,
> +};
> +
> +static struct resource s5p6440_pcm0_resource[] = {
> + ? ? ? [0] = {
> + ? ? ? ? ? ? ? .start ?= S5P64X0_PA_PCM,
> + ? ? ? ? ? ? ? .end ? ?= S5P64X0_PA_PCM + 0x100 - 1,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_MEM,
> + ? ? ? },
> + ? ? ? [1] = {
> + ? ? ? ? ? ? ? .start ?= DMACH_PCM0_TX,
> + ? ? ? ? ? ? ? .end ? ?= DMACH_PCM0_TX,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_DMA,
> + ? ? ? },
> + ? ? ? [2] = {
> + ? ? ? ? ? ? ? .start ?= DMACH_PCM0_RX,
> + ? ? ? ? ? ? ? .end ? ?= DMACH_PCM0_RX,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_DMA,
> + ? ? ? },
> +};
> +
> +struct platform_device s5p6440_device_pcm = {
> + ? ? ? .name ? ? ? ? ? = "samsung-pcm",
> + ? ? ? .id ? ? ? ? ? ? = 0,
> + ? ? ? .num_resources ?= ARRAY_SIZE(s5p6440_pcm0_resource),
> + ? ? ? .resource ? ? ? = s5p6440_pcm0_resource,
> + ? ? ? .dev = {
> + ? ? ? ? ? ? ? .platform_data = &s5p6440_pcm_pdata,
> + ? ? ? },
> +};
> diff --git a/arch/arm/mach-s5p64x0/dev-spi.c b/arch/arm/mach-s5p64x0/dev-spi.c
> new file mode 100644
> index 0000000..7303d3a
> --- /dev/null
> +++ b/arch/arm/mach-s5p64x0/dev-spi.c
> @@ -0,0 +1,275 @@
> +/* linux/arch/arm/mach-s5p64x0/dev-spi.c
> + *
> + * Copyright (C) 2010 Samsung Electronics Co. Ltd.
> + * ? ? Jaswinder Singh <jassi.brar@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#include <linux/platform_device.h>
> +#include <linux/dma-mapping.h>
> +#include <linux/gpio.h>
> +
> +#include <mach/dma.h>
> +#include <mach/map.h>
> +#include <mach/irqs.h>
> +#include <mach/spi-clocks.h>
> +
> +#include <plat/s3c64x0-spi.h>
> +#include <plat/gpio-cfg.h>
> +
> +static char *s5p6440_spi_src_clks[] = {
> + ? ? ? [S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
> + ? ? ? [S5P64X0_SPI_SRCCLK_SCLK] = "spi_epll",
> +};
> +
> +static char *s5p6450_spi_src_clks[] = {
> + ? ? ? [S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
> + ? ? ? [S5P64X0_SPI_SRCCLK_SCLK] = "sclk_spi",
> +};
Maybe we can drop one and call the other s5p64x0_spi_src_clks
The second clock is the same but only named differently.
> +
> +/* SPI Controller platform_devices */
> +
> +/* Since we emulate multi-cs capability, we do not touch the CS.
> + * The emulated CS is toggled by board specific mechanism, as it can
> + * be either some immediate GPIO or some signal out of some other
> + * chip in between ... or some yet another way.
> + * We simply do not assume anything about CS.
> + */
> +static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
> +{
> + ? ? ? switch (pdev->id) {
> + ? ? ? case 0:
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPC(0), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPC(1), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPC(2), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6440_GPC(0), S3C_GPIO_PULL_UP);
> + ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6440_GPC(1), S3C_GPIO_PULL_UP);
> + ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6440_GPC(2), S3C_GPIO_PULL_UP);
> + ? ? ? ? ? ? ? break;
> +
> + ? ? ? case 1:
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPC(4), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPC(5), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6440_GPC(6), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6440_GPC(4), S3C_GPIO_PULL_UP);
> + ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6440_GPC(5), S3C_GPIO_PULL_UP);
> + ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6440_GPC(6), S3C_GPIO_PULL_UP);
> + ? ? ? ? ? ? ? break;
> +
> + ? ? ? default:
> + ? ? ? ? ? ? ? dev_err(&pdev->dev, "Invalid SPI Controller number!");
> + ? ? ? ? ? ? ? return -EINVAL;
> + ? ? ? }
> +
> + ? ? ? return 0;
> +}
> +
> +static int s5p6450_spi_cfg_gpio(struct platform_device *pdev)
> +{
> + ? ? ? switch (pdev->id) {
> + ? ? ? case 0:
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6450_GPC(0), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6450_GPC(1), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6450_GPC(2), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6450_GPC(0), S3C_GPIO_PULL_UP);
> + ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6450_GPC(1), S3C_GPIO_PULL_UP);
> + ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6450_GPC(2), S3C_GPIO_PULL_UP);
> + ? ? ? ? ? ? ? break;
> +
> + ? ? ? case 1:
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6450_GPC(4), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6450_GPC(5), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? s3c_gpio_cfgpin(S5P6450_GPC(6), S3C_GPIO_SFN(2));
> + ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6450_GPC(4), S3C_GPIO_PULL_UP);
> + ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6450_GPC(5), S3C_GPIO_PULL_UP);
> + ? ? ? ? ? ? ? s3c_gpio_setpull(S5P6450_GPC(6), S3C_GPIO_PULL_UP);
> + ? ? ? ? ? ? ? break;
> +
> + ? ? ? default:
> + ? ? ? ? ? ? ? dev_err(&pdev->dev, "Invalid SPI Controller number!");
> + ? ? ? ? ? ? ? return -EINVAL;
> + ? ? ? }
> +
> + ? ? ? return 0;
> +}
> +
> +static struct resource s5p64x0_spi0_resource[] = {
> + ? ? ? [0] = {
> + ? ? ? ? ? ? ? .start ?= S5P64X0_PA_SPI0,
> + ? ? ? ? ? ? ? .end ? ?= S5P64X0_PA_SPI0 + 0x100 - 1,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_MEM,
> + ? ? ? },
> + ? ? ? [1] = {
> + ? ? ? ? ? ? ? .start ?= DMACH_SPI0_TX,
> + ? ? ? ? ? ? ? .end ? ?= DMACH_SPI0_TX,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_DMA,
> + ? ? ? },
> + ? ? ? [2] = {
> + ? ? ? ? ? ? ? .start ?= DMACH_SPI0_RX,
> + ? ? ? ? ? ? ? .end ? ?= DMACH_SPI0_RX,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_DMA,
> + ? ? ? },
> + ? ? ? [3] = {
> + ? ? ? ? ? ? ? .start ?= IRQ_SPI0,
> + ? ? ? ? ? ? ? .end ? ?= IRQ_SPI0,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_IRQ,
> + ? ? ? },
> +};
> +
> +static struct s3c64x0_spi_info s5p6440_spi0_pdata = {
> + ? ? ? .cfg_gpio ? ? ? = s5p6440_spi_cfg_gpio,
> + ? ? ? .fifo_lvl_mask ?= 0x1ff,
> + ? ? ? .rx_lvl_offset ?= 15,
> +};
I think you forgot to compile check in hurry ?
There is no s3c64x0_spi_info, but only s3c64xx_spi_info
> +
> +static struct s3c64x0_spi_info s5p6450_spi0_pdata = {
> + ? ? ? .cfg_gpio ? ? ? = s5p6450_spi_cfg_gpio,
> + ? ? ? .fifo_lvl_mask ?= 0x1ff,
> + ? ? ? .rx_lvl_offset ?= 15,
> +};
> +
> +static u64 spi_dmamask = DMA_BIT_MASK(32);
> +
> +struct platform_device s5p6440_device_spi0 = {
> + ? ? ? .name ? ? ? ? ? = "s3c64x0-spi",
%s/64xx/64x0 ? :)
The device name should be kept same "s3c64xx-spi"
> + ? ? ? .id ? ? ? ? ? ? = 0,
> + ? ? ? .num_resources ?= ARRAY_SIZE(s5p64x0_spi0_resource),
> + ? ? ? .resource ? ? ? = s5p64x0_spi0_resource,
> + ? ? ? .dev = {
> + ? ? ? ? ? ? ? .dma_mask ? ? ? ? ? ? ? = &spi_dmamask,
> + ? ? ? ? ? ? ? .coherent_dma_mask ? ? ?= DMA_BIT_MASK(32),
> + ? ? ? ? ? ? ? .platform_data = &s5p6440_spi0_pdata,
> + ? ? ? },
> +};
> +
> +struct platform_device s5p6450_device_spi0 = {
> + ? ? ? .name ? ? ? ? ? = "s3c64x0-spi",
same here
> + ? ? ? .id ? ? ? ? ? ? = 0,
> + ? ? ? .num_resources ?= ARRAY_SIZE(s5p64x0_spi0_resource),
> + ? ? ? .resource ? ? ? = s5p64x0_spi0_resource,
> + ? ? ? .dev = {
> + ? ? ? ? ? ? ? .dma_mask ? ? ? ? ? ? ? = &spi_dmamask,
> + ? ? ? ? ? ? ? .coherent_dma_mask ? ? ?= DMA_BIT_MASK(32),
> + ? ? ? ? ? ? ? .platform_data = &s5p6450_spi0_pdata,
> + ? ? ? },
> +};
> +
> +static struct resource s5p64x0_spi1_resource[] = {
> + ? ? ? [0] = {
> + ? ? ? ? ? ? ? .start ?= S5P64X0_PA_SPI1,
> + ? ? ? ? ? ? ? .end ? ?= S5P64X0_PA_SPI1 + 0x100 - 1,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_MEM,
> + ? ? ? },
> + ? ? ? [1] = {
> + ? ? ? ? ? ? ? .start ?= DMACH_SPI1_TX,
> + ? ? ? ? ? ? ? .end ? ?= DMACH_SPI1_TX,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_DMA,
> + ? ? ? },
> + ? ? ? [2] = {
> + ? ? ? ? ? ? ? .start ?= DMACH_SPI1_RX,
> + ? ? ? ? ? ? ? .end ? ?= DMACH_SPI1_RX,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_DMA,
> + ? ? ? },
> + ? ? ? [3] = {
> + ? ? ? ? ? ? ? .start ?= IRQ_SPI1,
> + ? ? ? ? ? ? ? .end ? ?= IRQ_SPI1,
> + ? ? ? ? ? ? ? .flags ?= IORESOURCE_IRQ,
> + ? ? ? },
> +};
> +
> +static struct s3c64x0_spi_info s5p6440_spi1_pdata = {
> + ? ? ? .cfg_gpio ? ? ? = s5p6440_spi_cfg_gpio,
> + ? ? ? .fifo_lvl_mask ?= 0x7f,
> + ? ? ? .rx_lvl_offset ?= 15,
> +};
> +
> +static struct s3c64x0_spi_info s5p6450_spi1_pdata = {
> + ? ? ? .cfg_gpio ? ? ? = s5p6450_spi_cfg_gpio,
> + ? ? ? .fifo_lvl_mask ?= 0x7f,
> + ? ? ? .rx_lvl_offset ?= 15,
> +};
> +
> +struct platform_device s5p6440_device_spi1 = {
> + ? ? ? .name ? ? ? ? ? = "s3c64x0-spi",
same here...
> + ? ? ? .id ? ? ? ? ? ? = 1,
> + ? ? ? .num_resources ?= ARRAY_SIZE(s5p64x0_spi1_resource),
> + ? ? ? .resource ? ? ? = s5p64x0_spi1_resource,
> + ? ? ? .dev = {
> + ? ? ? ? ? ? ? .dma_mask ? ? ? ? ? ? ? = &spi_dmamask,
> + ? ? ? ? ? ? ? .coherent_dma_mask ? ? ?= DMA_BIT_MASK(32),
> + ? ? ? ? ? ? ? .platform_data = &s5p6440_spi1_pdata,
> + ? ? ? },
> +};
> +
> +struct platform_device s5p6450_device_spi1 = {
> + ? ? ? .name ? ? ? ? ? = "s3c64x0-spi",
same here ....
> + ? ? ? .id ? ? ? ? ? ? = 1,
> + ? ? ? .num_resources ?= ARRAY_SIZE(s5p64x0_spi1_resource),
> + ? ? ? .resource ? ? ? = s5p64x0_spi1_resource,
> + ? ? ? .dev = {
> + ? ? ? ? ? ? ? .dma_mask ? ? ? ? ? ? ? = &spi_dmamask,
> + ? ? ? ? ? ? ? .coherent_dma_mask ? ? ?= DMA_BIT_MASK(32),
> + ? ? ? ? ? ? ? .platform_data = &s5p6450_spi1_pdata,
> + ? ? ? },
> +};
> +
> +void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
maybe we could call it s5p64x0_spi_set_info, and remove other other one ?
> +{
> + ? ? ? struct s3c64x0_spi_info *pd;
> +
> + ? ? ? /* Reject invalid configuration */
> + ? ? ? if (!num_cs || src_clk_nr < 0
> + ? ? ? ? ? ? ? ? ? ? ? || src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) {
you need to change all references to S5P6440_SPI_SRCCLK_..... as well.
> + ? ? ? ? ? ? ? printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
> + ? ? ? ? ? ? ? return;
> + ? ? ? }
> +
> + ? ? ? switch (cntrlr) {
> + ? ? ? case 0:
> + ? ? ? ? ? ? ? pd = &s5p6440_spi0_pdata;
> + ? ? ? ? ? ? ? break;
> + ? ? ? case 1:
> + ? ? ? ? ? ? ? pd = &s5p6440_spi1_pdata;
> + ? ? ? ? ? ? ? break;
> + ? ? ? default:
> + ? ? ? ? ? ? ? printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? __func__, cntrlr);
> + ? ? ? ? ? ? ? return;
> + ? ? ? }
> +
> + ? ? ? pd->num_cs = num_cs;
> + ? ? ? pd->src_clk_nr = src_clk_nr;
> + ? ? ? pd->src_clk_name = s5p6440_spi_src_clks[src_clk_nr];
> +}
> +
> +void __init s5p6450_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
> +{
> + ? ? ? struct s3c64x0_spi_info *pd;
> +
> + ? ? ? /* Reject invalid configuration */
> + ? ? ? if (!num_cs || src_clk_nr < 0
> + ? ? ? ? ? ? ? ? ? ? ? || src_clk_nr > S5P6450_SPI_SRCCLK_SCLK) {
> + ? ? ? ? ? ? ? printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
> + ? ? ? ? ? ? ? return;
> + ? ? ? }
> +
> + ? ? ? switch (cntrlr) {
> + ? ? ? case 0:
> + ? ? ? ? ? ? ? pd = &s5p6450_spi0_pdata;
> + ? ? ? ? ? ? ? break;
> + ? ? ? case 1:
> + ? ? ? ? ? ? ? pd = &s5p6450_spi1_pdata;
> + ? ? ? ? ? ? ? break;
> + ? ? ? default:
> + ? ? ? ? ? ? ? printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
> + ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? __func__, cntrlr);
> + ? ? ? ? ? ? ? return;
> + ? ? ? }
> +
> + ? ? ? pd->num_cs = num_cs;
> + ? ? ? pd->src_clk_nr = src_clk_nr;
> + ? ? ? pd->src_clk_name = s5p6450_spi_src_clks[src_clk_nr];
> +}
> diff --git a/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
> new file mode 100644
> index 0000000..170a20a
> --- /dev/null
> +++ b/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
> @@ -0,0 +1,20 @@
> +/* linux/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
> + *
> + * Copyright (c) 2010 Samsung Electronics Co., Ltd.
> + * ? ? ? ? ? ? http://www.samsung.com
^^^ This notice is redundant
> + *
> + * Copyright (C) 2010 Samsung Electronics Co. Ltd.
> + * ? ? Jaswinder Singh <jassi.brar@samsung.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> +*/
> +
> +#ifndef __ASM_ARCH_SPI_CLKS_H
> +#define __ASM_ARCH_SPI_CLKS_H __FILE__
> +
> +#define S5P64X0_SPI_SRCCLK_PCLK ? ? ? ? ? ? ? ?0
> +#define S5P64X0_SPI_SRCCLK_SCLK ? ? ? ? ? ? ? ?1
> +
> +#endif /* __ASM_ARCH_SPI_CLKS_H */
> diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h
> index 85f6f23..10d0d3c 100644
> --- a/arch/arm/plat-samsung/include/plat/devs.h
> +++ b/arch/arm/plat-samsung/include/plat/devs.h
> @@ -67,6 +67,8 @@ extern struct platform_device s5pv210_device_spi0;
> ?extern struct platform_device s5pv210_device_spi1;
> ?extern struct platform_device s5p6440_device_spi0;
> ?extern struct platform_device s5p6440_device_spi1;
> +extern struct platform_device s5p6450_device_spi0;
> +extern struct platform_device s5p6450_device_spi1;
>
> ?extern struct platform_device s3c_device_hwmon;
>
> @@ -95,6 +97,9 @@ extern struct platform_device s5p6442_device_spi;
> ?extern struct platform_device s5p6440_device_pcm;
> ?extern struct platform_device s5p6440_device_iis;
>
> +extern struct platform_device s5p6450_device_iis0;
> +extern struct platform_device s5p6450_device_pcm0;
> +
> ?extern struct platform_device s5pc100_device_ac97;
> ?extern struct platform_device s5pc100_device_pcm0;
> ?extern struct platform_device s5pc100_device_pcm1;
> --
> 1.6.2.5
just to say the least.
^ permalink raw reply [flat|nested] 52+ messages in thread
* RE: [PATCH 07/13] ARM: S5P64X0: Update Audio support
2010-09-02 1:44 ` Jassi Brar
@ 2010-09-02 7:30 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-02 7:30 UTC (permalink / raw)
To: 'Jassi Brar'
Cc: linux-arm-kernel, linux-samsung-soc, 'Jassi Brar', ben-linux
Jassi Brar wrote:
>
Hi Jassi :-)
Thanks for your review.
> On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> > This patch updates Audio and SPI for S5P6440 and S5P6450 SoCs.
> >
> > Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> > Cc: Jassi Brar <jassi.brar@samsung.com>
> > ---
> > arch/arm/mach-s5p6440/dev-audio.c | 127 -----------
> > arch/arm/mach-s5p6440/dev-spi.c | 176 ---------------
> > arch/arm/mach-s5p6440/include/mach/spi-clocks.h | 17 --
> > arch/arm/mach-s5p64x0/dev-audio.c | 164 ++++++++++++++
> > arch/arm/mach-s5p64x0/dev-spi.c | 275
> +++++++++++++++++++++++
> > arch/arm/mach-s5p64x0/include/mach/spi-clocks.h | 20 ++
> > arch/arm/plat-samsung/include/plat/devs.h | 5 +
> > 7 files changed, 464 insertions(+), 320 deletions(-)
> > delete mode 100644 arch/arm/mach-s5p6440/dev-audio.c
> > delete mode 100644 arch/arm/mach-s5p6440/dev-spi.c
> > delete mode 100644 arch/arm/mach-s5p6440/include/mach/spi-clocks.h
> > create mode 100644 arch/arm/mach-s5p64x0/dev-audio.c
> > create mode 100644 arch/arm/mach-s5p64x0/dev-spi.c
> > create mode 100644 arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
> >
(snip)
>
> S5P6450 has 2 I2S_v2 and 1 I2S_v4, the first two are missing.
> Also missing are 3 PCM device definitions.
>
Yeah, I know. But the remaining items will be added later.
Maybe Mr. Youn will do it ;-)
(snip)
> > +struct platform_device s5p6440_device_iis = {
> > + .name = "s3c64x0-iis-v4",
>
> The assigned name is wrong. It should be "s3c64xx-iis-v4"
>
You're right..will fix it.
>
> > + .id = -1,
> > + .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource),
> > + .resource = s5p64x0_iis0_resource,
> > + .dev = {
> > + .platform_data = &s5p6440_i2s_pdata,
> > + },
> > +};
> > +
> > +struct platform_device s5p6450_device_iis0 = {
> > + .name = "s3c64x0-iis-v4",
>
> The assigned name is wrong. It should be "s3c64xx-iis-v4"
>
ok..
> > + .id = -1,
> > + .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource),
> > + .resource = s5p64x0_iis0_resource,
> > + .dev = {
> > + .platform_data = &s5p6450_i2s_pdata,
> > + },
> > +};
> > +
(snip)
> > +
> > +static char *s5p6440_spi_src_clks[] = {
> > + [S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
> > + [S5P64X0_SPI_SRCCLK_SCLK] = "spi_epll",
> > +};
> > +
> > +static char *s5p6450_spi_src_clks[] = {
> > + [S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
> > + [S5P64X0_SPI_SRCCLK_SCLK] = "sclk_spi",
> > +};
>
> Maybe we can drop one and call the other s5p64x0_spi_src_clks
> The second clock is the same but only named differently.
>
As you know, we use the clock name as there is in data sheet.
Anyway...will sort out.
(snip)
> > +
> > +static struct s3c64x0_spi_info s5p6440_spi0_pdata = {
> > + .cfg_gpio = s5p6440_spi_cfg_gpio,
> > + .fifo_lvl_mask = 0x1ff,
> > + .rx_lvl_offset = 15,
> > +};
>
> I think you forgot to compile check in hurry ?
hahaha, I'm always remembering it :-) about all of s3c and s5p defconfigs.
Actually, there is no build error...and kernel booting works well on the board.
But I didn't audio test...just moved your original code into the new machine directory.
...And now, not selected S3C64XX_DEV_SPI...so not compiled dev-spi.c.
Anyway, I will check all files ;-)
Thanks.
> There is no s3c64x0_spi_info, but only s3c64xx_spi_info
>
Yeah, you're right...will fix it.
> > +
> > +static struct s3c64x0_spi_info s5p6450_spi0_pdata = {
> > + .cfg_gpio = s5p6450_spi_cfg_gpio,
> > + .fifo_lvl_mask = 0x1ff,
> > + .rx_lvl_offset = 15,
> > +};
> > +
> > +static u64 spi_dmamask = DMA_BIT_MASK(32);
> > +
> > +struct platform_device s5p6440_device_spi0 = {
> > + .name = "s3c64x0-spi",
>
> %s/64xx/64x0 ? :)
Maybe...yes? ;-)
> The device name should be kept same "s3c64xx-spi"
>
It's my mistake...will fix it.
> > + .id = 0,
> > + .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource),
> > + .resource = s5p64x0_spi0_resource,
> > + .dev = {
> > + .dma_mask = &spi_dmamask,
> > + .coherent_dma_mask = DMA_BIT_MASK(32),
> > + .platform_data = &s5p6440_spi0_pdata,
> > + },
> > +};
> > +
> > +struct platform_device s5p6450_device_spi0 = {
> > + .name = "s3c64x0-spi",
>
> same here
>
ok...
> > + .id = 0,
> > + .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource),
> > + .resource = s5p64x0_spi0_resource,
> > + .dev = {
> > + .dma_mask = &spi_dmamask,
> > + .coherent_dma_mask = DMA_BIT_MASK(32),
> > + .platform_data = &s5p6450_spi0_pdata,
> > + },
> > +};
(snip)
> > +
> > +struct platform_device s5p6440_device_spi1 = {
> > + .name = "s3c64x0-spi",
>
> same here...
>
ok...
> > + .id = 1,
> > + .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource),
> > + .resource = s5p64x0_spi1_resource,
> > + .dev = {
> > + .dma_mask = &spi_dmamask,
> > + .coherent_dma_mask = DMA_BIT_MASK(32),
> > + .platform_data = &s5p6440_spi1_pdata,
> > + },
> > +};
> > +
> > +struct platform_device s5p6450_device_spi1 = {
> > + .name = "s3c64x0-spi",
>
> same here ....
>
ok...
> > + .id = 1,
> > + .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource),
> > + .resource = s5p64x0_spi1_resource,
> > + .dev = {
> > + .dma_mask = &spi_dmamask,
> > + .coherent_dma_mask = DMA_BIT_MASK(32),
> > + .platform_data = &s5p6450_spi1_pdata,
> > + },
> > +};
> > +
> > +void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
>
> maybe we could call it s5p64x0_spi_set_info, and remove other other one ?
>
mm...will sort out.
> > +{
> > + struct s3c64x0_spi_info *pd;
> > +
> > + /* Reject invalid configuration */
> > + if (!num_cs || src_clk_nr < 0
> > + || src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) {
> you need to change all references to S5P6440_SPI_SRCCLK_..... as well.
>
Yeah, ok.
> > + printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
> > + return;
> > + }
> > +
(snip)
>
> just to say the least.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH 07/13] ARM: S5P64X0: Update Audio support
@ 2010-09-02 7:30 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-02 7:30 UTC (permalink / raw)
To: linux-arm-kernel
Jassi Brar wrote:
>
Hi Jassi :-)
Thanks for your review.
> On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> > This patch updates Audio and SPI for S5P6440 and S5P6450 SoCs.
> >
> > Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> > Cc: Jassi Brar <jassi.brar@samsung.com>
> > ---
> > arch/arm/mach-s5p6440/dev-audio.c | 127 -----------
> > arch/arm/mach-s5p6440/dev-spi.c | 176 ---------------
> > arch/arm/mach-s5p6440/include/mach/spi-clocks.h | 17 --
> > arch/arm/mach-s5p64x0/dev-audio.c | 164 ++++++++++++++
> > arch/arm/mach-s5p64x0/dev-spi.c | 275
> +++++++++++++++++++++++
> > arch/arm/mach-s5p64x0/include/mach/spi-clocks.h | 20 ++
> > arch/arm/plat-samsung/include/plat/devs.h | 5 +
> > 7 files changed, 464 insertions(+), 320 deletions(-)
> > delete mode 100644 arch/arm/mach-s5p6440/dev-audio.c
> > delete mode 100644 arch/arm/mach-s5p6440/dev-spi.c
> > delete mode 100644 arch/arm/mach-s5p6440/include/mach/spi-clocks.h
> > create mode 100644 arch/arm/mach-s5p64x0/dev-audio.c
> > create mode 100644 arch/arm/mach-s5p64x0/dev-spi.c
> > create mode 100644 arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
> >
(snip)
>
> S5P6450 has 2 I2S_v2 and 1 I2S_v4, the first two are missing.
> Also missing are 3 PCM device definitions.
>
Yeah, I know. But the remaining items will be added later.
Maybe Mr. Youn will do it ;-)
(snip)
> > +struct platform_device s5p6440_device_iis = {
> > + .name = "s3c64x0-iis-v4",
>
> The assigned name is wrong. It should be "s3c64xx-iis-v4"
>
You're right..will fix it.
>
> > + .id = -1,
> > + .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource),
> > + .resource = s5p64x0_iis0_resource,
> > + .dev = {
> > + .platform_data = &s5p6440_i2s_pdata,
> > + },
> > +};
> > +
> > +struct platform_device s5p6450_device_iis0 = {
> > + .name = "s3c64x0-iis-v4",
>
> The assigned name is wrong. It should be "s3c64xx-iis-v4"
>
ok..
> > + .id = -1,
> > + .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource),
> > + .resource = s5p64x0_iis0_resource,
> > + .dev = {
> > + .platform_data = &s5p6450_i2s_pdata,
> > + },
> > +};
> > +
(snip)
> > +
> > +static char *s5p6440_spi_src_clks[] = {
> > + [S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
> > + [S5P64X0_SPI_SRCCLK_SCLK] = "spi_epll",
> > +};
> > +
> > +static char *s5p6450_spi_src_clks[] = {
> > + [S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
> > + [S5P64X0_SPI_SRCCLK_SCLK] = "sclk_spi",
> > +};
>
> Maybe we can drop one and call the other s5p64x0_spi_src_clks
> The second clock is the same but only named differently.
>
As you know, we use the clock name as there is in data sheet.
Anyway...will sort out.
(snip)
> > +
> > +static struct s3c64x0_spi_info s5p6440_spi0_pdata = {
> > + .cfg_gpio = s5p6440_spi_cfg_gpio,
> > + .fifo_lvl_mask = 0x1ff,
> > + .rx_lvl_offset = 15,
> > +};
>
> I think you forgot to compile check in hurry ?
hahaha, I'm always remembering it :-) about all of s3c and s5p defconfigs.
Actually, there is no build error...and kernel booting works well on the board.
But I didn't audio test...just moved your original code into the new machine directory.
...And now, not selected S3C64XX_DEV_SPI...so not compiled dev-spi.c.
Anyway, I will check all files ;-)
Thanks.
> There is no s3c64x0_spi_info, but only s3c64xx_spi_info
>
Yeah, you're right...will fix it.
> > +
> > +static struct s3c64x0_spi_info s5p6450_spi0_pdata = {
> > + .cfg_gpio = s5p6450_spi_cfg_gpio,
> > + .fifo_lvl_mask = 0x1ff,
> > + .rx_lvl_offset = 15,
> > +};
> > +
> > +static u64 spi_dmamask = DMA_BIT_MASK(32);
> > +
> > +struct platform_device s5p6440_device_spi0 = {
> > + .name = "s3c64x0-spi",
>
> %s/64xx/64x0 ? :)
Maybe...yes? ;-)
> The device name should be kept same "s3c64xx-spi"
>
It's my mistake...will fix it.
> > + .id = 0,
> > + .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource),
> > + .resource = s5p64x0_spi0_resource,
> > + .dev = {
> > + .dma_mask = &spi_dmamask,
> > + .coherent_dma_mask = DMA_BIT_MASK(32),
> > + .platform_data = &s5p6440_spi0_pdata,
> > + },
> > +};
> > +
> > +struct platform_device s5p6450_device_spi0 = {
> > + .name = "s3c64x0-spi",
>
> same here
>
ok...
> > + .id = 0,
> > + .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource),
> > + .resource = s5p64x0_spi0_resource,
> > + .dev = {
> > + .dma_mask = &spi_dmamask,
> > + .coherent_dma_mask = DMA_BIT_MASK(32),
> > + .platform_data = &s5p6450_spi0_pdata,
> > + },
> > +};
(snip)
> > +
> > +struct platform_device s5p6440_device_spi1 = {
> > + .name = "s3c64x0-spi",
>
> same here...
>
ok...
> > + .id = 1,
> > + .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource),
> > + .resource = s5p64x0_spi1_resource,
> > + .dev = {
> > + .dma_mask = &spi_dmamask,
> > + .coherent_dma_mask = DMA_BIT_MASK(32),
> > + .platform_data = &s5p6440_spi1_pdata,
> > + },
> > +};
> > +
> > +struct platform_device s5p6450_device_spi1 = {
> > + .name = "s3c64x0-spi",
>
> same here ....
>
ok...
> > + .id = 1,
> > + .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource),
> > + .resource = s5p64x0_spi1_resource,
> > + .dev = {
> > + .dma_mask = &spi_dmamask,
> > + .coherent_dma_mask = DMA_BIT_MASK(32),
> > + .platform_data = &s5p6450_spi1_pdata,
> > + },
> > +};
> > +
> > +void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
>
> maybe we could call it s5p64x0_spi_set_info, and remove other other one ?
>
mm...will sort out.
> > +{
> > + struct s3c64x0_spi_info *pd;
> > +
> > + /* Reject invalid configuration */
> > + if (!num_cs || src_clk_nr < 0
> > + || src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) {
> you need to change all references to S5P6440_SPI_SRCCLK_..... as well.
>
Yeah, ok.
> > + printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
> > + return;
> > + }
> > +
(snip)
>
> just to say the least.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 52+ messages in thread
* RE: [PATCH 08/13] ARM: S5P64X0: Move DMA support for S5P64X0
2010-09-02 1:08 ` Jassi Brar
@ 2010-09-02 7:32 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-02 7:32 UTC (permalink / raw)
To: 'Jassi Brar'
Cc: linux-arm-kernel, linux-samsung-soc, 'Jassi Brar', ben-linux
Jassi Brar wrote:
>
> On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> > This patch moves DMA support files in the mach-s5p64x0
> > for S5P6440 and S5P6450 SoCs.
> >
> > Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> > Cc: Jassi Brar <jassi.brar@samsung.com>
> > ---
> > arch/arm/{mach-s5p6440 => mach-s5p64x0}/dma.c | 75
> ++++++++++++++++---
> > .../include/mach/dma.h | 0
> > arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h | 28 +++++++
> > 3 files changed, 91 insertions(+), 12 deletions(-)
> > rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/dma.c (56%)
> > rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/dma.h (100%)
> >
(snip)
> > +
> > static struct platform_device s5p6440_device_pdma = {
> > .name = "s3c-pl330",
> > .id = 1,
>
> While at it, please make id 0 as well.
>
Ok..will fix it.
>
> > - .num_resources = ARRAY_SIZE(s5p6440_pdma_resource),
> > - .resource = s5p6440_pdma_resource,
> > + .num_resources = ARRAY_SIZE(s5p64x0_pdma_resource),
> > + .resource = s5p64x0_pdma_resource,
> > .dev = {
> > .dma_mask = &dma_dmamask,
> > .coherent_dma_mask = DMA_BIT_MASK(32),
> > @@ -92,14 +130,27 @@ static struct platform_device s5p6440_device_pdma = {
> > },
> > };
> >
> > -static struct platform_device *s5p6440_dmacs[] __initdata = {
> > +static struct platform_device s5p6450_device_pdma = {
> > + .name = "s3c-pl330",
> > + .id = 0,
> > + .num_resources = ARRAY_SIZE(s5p64x0_pdma_resource),
> > + .resource = s5p64x0_pdma_resource,
> > + .dev = {
> > + .dma_mask = &dma_dmamask,
> > + .coherent_dma_mask = DMA_BIT_MASK(32),
> > + .platform_data = &s5p6450_pdma_pdata,
> > + },
> > +};
> > +
> > +static struct platform_device *s5p64x0_dmacs[] __initdata = {
> > &s5p6440_device_pdma,
> > + /* &s5p6450_device_pdma will be added */
> > };
> Let us simply call the DMAC as s5p64x0_device_pdma and use some
> CPU detection method in s5p64x0_dma_init to assign either of
> s5p6440_pdma_pdata and s5p6450_pdma_pdata to the platform_data
>
Ok.
> ........
>
> > + DMACH_MTOM_0,
> > + DMACH_MTOM_1,
> > + DMACH_MTOM_2,
> > + DMACH_MTOM_3,
> > + DMACH_MTOM_4,
> > + DMACH_MTOM_5,
> > + DMACH_MTOM_6,
> > + DMACH_MTOM_7,
>
> oops ... Mainline s3c dma api doesn't yet support Mem->Mem transfers.
> You need to drop it.
Oh, you're right. it's my mistake.
Will fix it. :-)
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH 08/13] ARM: S5P64X0: Move DMA support for S5P64X0
@ 2010-09-02 7:32 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-02 7:32 UTC (permalink / raw)
To: linux-arm-kernel
Jassi Brar wrote:
>
> On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> > This patch moves DMA support files in the mach-s5p64x0
> > for S5P6440 and S5P6450 SoCs.
> >
> > Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> > Cc: Jassi Brar <jassi.brar@samsung.com>
> > ---
> > arch/arm/{mach-s5p6440 => mach-s5p64x0}/dma.c | 75
> ++++++++++++++++---
> > .../include/mach/dma.h | 0
> > arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h | 28 +++++++
> > 3 files changed, 91 insertions(+), 12 deletions(-)
> > rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/dma.c (56%)
> > rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/include/mach/dma.h (100%)
> >
(snip)
> > +
> > static struct platform_device s5p6440_device_pdma = {
> > .name = "s3c-pl330",
> > .id = 1,
>
> While at it, please make id 0 as well.
>
Ok..will fix it.
>
> > - .num_resources = ARRAY_SIZE(s5p6440_pdma_resource),
> > - .resource = s5p6440_pdma_resource,
> > + .num_resources = ARRAY_SIZE(s5p64x0_pdma_resource),
> > + .resource = s5p64x0_pdma_resource,
> > .dev = {
> > .dma_mask = &dma_dmamask,
> > .coherent_dma_mask = DMA_BIT_MASK(32),
> > @@ -92,14 +130,27 @@ static struct platform_device s5p6440_device_pdma = {
> > },
> > };
> >
> > -static struct platform_device *s5p6440_dmacs[] __initdata = {
> > +static struct platform_device s5p6450_device_pdma = {
> > + .name = "s3c-pl330",
> > + .id = 0,
> > + .num_resources = ARRAY_SIZE(s5p64x0_pdma_resource),
> > + .resource = s5p64x0_pdma_resource,
> > + .dev = {
> > + .dma_mask = &dma_dmamask,
> > + .coherent_dma_mask = DMA_BIT_MASK(32),
> > + .platform_data = &s5p6450_pdma_pdata,
> > + },
> > +};
> > +
> > +static struct platform_device *s5p64x0_dmacs[] __initdata = {
> > &s5p6440_device_pdma,
> > + /* &s5p6450_device_pdma will be added */
> > };
> Let us simply call the DMAC as s5p64x0_device_pdma and use some
> CPU detection method in s5p64x0_dma_init to assign either of
> s5p6440_pdma_pdata and s5p6450_pdma_pdata to the platform_data
>
Ok.
> ........
>
> > + DMACH_MTOM_0,
> > + DMACH_MTOM_1,
> > + DMACH_MTOM_2,
> > + DMACH_MTOM_3,
> > + DMACH_MTOM_4,
> > + DMACH_MTOM_5,
> > + DMACH_MTOM_6,
> > + DMACH_MTOM_7,
>
> oops ... Mainline s3c dma api doesn't yet support Mem->Mem transfers.
> You need to drop it.
Oh, you're right. it's my mistake.
Will fix it. :-)
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 52+ messages in thread
* RE: [PATCH 11/13] ARM: S5P64X0: Move SMDK6440 board file and Add SMDK6450 board file
2010-09-01 10:00 ` Kyungmin Park
@ 2010-09-02 8:02 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-02 8:02 UTC (permalink / raw)
To: 'Kyungmin Park'; +Cc: linux-arm-kernel, linux-samsung-soc, ben-linux
Kyungmin Park wrote:
>
> On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> > This patch moves smdk6440 board file from mach-s5p6440 into the new
> > mach-s5p64x0 directory and adds smdk6450 board file.
> >
> > Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> > ---
> > .../{mach-s5p6440 => mach-s5p64x0}/mach-smdk6440.c | 87 ++++++----
> > arch/arm/mach-s5p64x0/mach-smdk6450.c | 182
> ++++++++++++++++++++
> > 2 files changed, 234 insertions(+), 35 deletions(-)
> > rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/mach-smdk6440.c (66%)
> > create mode 100644 arch/arm/mach-s5p64x0/mach-smdk6450.c
> >
> > diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-
> s5p64x0/mach-smdk6440.c
> > similarity index 66%
> > rename from arch/arm/mach-s5p6440/mach-smdk6440.c
> > rename to arch/arm/mach-s5p64x0/mach-smdk6440.c
> > index 9202aaa..28de0a5 100644
> > --- a/arch/arm/mach-s5p6440/mach-smdk6440.c
> > +++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
(snip)
> > @@ -58,43 +59,60 @@
> >
> > static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
> > [0] = {
> > - .hwport = 0,
> > - .flags = 0,
> > - .ucon = SMDK6440_UCON_DEFAULT,
> > - .ulcon = SMDK6440_ULCON_DEFAULT,
> > - .ufcon = SMDK6440_UFCON_DEFAULT,
> > + .hwport = 0,
> > + .flags = 0,
> There's no place to use this flags, it's posted for long time. but you
> don't listen it.
> I hope delete it if not used.
Will be removed flags member after merging it in the mainline.
> > + .ucon = SMDK6440_UCON_DEFAULT,
> > + .ulcon = SMDK6440_ULCON_DEFAULT,
> > + .ufcon = SMDK6440_UFCON_DEFAULT,
> > },
(snip)
> > +
> > +MACHINE_START(SMDK6450, "SMDK6450")
>
> I think you can make a single SMDK file.
Because the components on the board are different,
SMDK6440 and SMDK6450 need each machine file.
(snip)
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH 11/13] ARM: S5P64X0: Move SMDK6440 board file and Add SMDK6450 board file
@ 2010-09-02 8:02 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-02 8:02 UTC (permalink / raw)
To: linux-arm-kernel
Kyungmin Park wrote:
>
> On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> > This patch moves smdk6440 board file from mach-s5p6440 into the new
> > mach-s5p64x0 directory and adds smdk6450 board file.
> >
> > Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> > ---
> > ?.../{mach-s5p6440 => mach-s5p64x0}/mach-smdk6440.c | ? 87 ++++++----
> > ?arch/arm/mach-s5p64x0/mach-smdk6450.c ? ? ? ? ? ? ?| ?182
> ++++++++++++++++++++
> > ?2 files changed, 234 insertions(+), 35 deletions(-)
> > ?rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/mach-smdk6440.c (66%)
> > ?create mode 100644 arch/arm/mach-s5p64x0/mach-smdk6450.c
> >
> > diff --git a/arch/arm/mach-s5p6440/mach-smdk6440.c b/arch/arm/mach-
> s5p64x0/mach-smdk6440.c
> > similarity index 66%
> > rename from arch/arm/mach-s5p6440/mach-smdk6440.c
> > rename to arch/arm/mach-s5p64x0/mach-smdk6440.c
> > index 9202aaa..28de0a5 100644
> > --- a/arch/arm/mach-s5p6440/mach-smdk6440.c
> > +++ b/arch/arm/mach-s5p64x0/mach-smdk6440.c
(snip)
> > @@ -58,43 +59,60 @@
> >
> > ?static struct s3c2410_uartcfg smdk6440_uartcfgs[] __initdata = {
> > ? ? ? ?[0] = {
> > - ? ? ? ? ? ? ? .hwport ? ? ?= 0,
> > - ? ? ? ? ? ? ? .flags ? ? ? = 0,
> > - ? ? ? ? ? ? ? .ucon ? ? ? ?= SMDK6440_UCON_DEFAULT,
> > - ? ? ? ? ? ? ? .ulcon ? ? ? = SMDK6440_ULCON_DEFAULT,
> > - ? ? ? ? ? ? ? .ufcon ? ? ? = SMDK6440_UFCON_DEFAULT,
> > + ? ? ? ? ? ? ? .hwport ? ? ? ? = 0,
> > + ? ? ? ? ? ? ? .flags ? ? ? ? ?= 0,
> There's no place to use this flags, it's posted for long time. but you
> don't listen it.
> I hope delete it if not used.
Will be removed flags member after merging it in the mainline.
> > + ? ? ? ? ? ? ? .ucon ? ? ? ? ? = SMDK6440_UCON_DEFAULT,
> > + ? ? ? ? ? ? ? .ulcon ? ? ? ? ?= SMDK6440_ULCON_DEFAULT,
> > + ? ? ? ? ? ? ? .ufcon ? ? ? ? ?= SMDK6440_UFCON_DEFAULT,
> > ? ? ? ?},
(snip)
> > +
> > +MACHINE_START(SMDK6450, "SMDK6450")
>
> I think you can make a single SMDK file.
Because the components on the board are different,
SMDK6440 and SMDK6450 need each machine file.
(snip)
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 52+ messages in thread
* RE: [PATCH 02/13] ARM: S5P64X0: Update Kconfig and Makefile
2010-09-01 9:47 ` Kyungmin Park
@ 2010-09-02 8:25 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-02 8:25 UTC (permalink / raw)
To: 'Kyungmin Park'; +Cc: linux-arm-kernel, linux-samsung-soc, ben-linux
Kyungmin Park wrote:
>
> On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> > This patch updates the Kconfig and Makefile for the S5P6440 and S5P6450
> > machines. It also updates arch/arm/ Kconfig and Makefile to include for
> > support ARCH_S5P64X0 with one kernel image.
> >
> > Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> > ---
> > arch/arm/Kconfig | 16 +++---
> > arch/arm/Makefile | 2 +-
> > arch/arm/mach-s5p6440/Kconfig | 33 ------------
> > arch/arm/mach-s5p6440/Makefile | 25 ---------
> > arch/arm/mach-s5p64x0/Kconfig | 55
> ++++++++++++++++++++
> > arch/arm/mach-s5p64x0/Makefile | 30 +++++++++++
> > .../{mach-s5p6440 => mach-s5p64x0}/Makefile.boot | 0
> > arch/arm/plat-s5p/Kconfig | 4 +-
> > 8 files changed, 95 insertions(+), 70 deletions(-)
> > delete mode 100644 arch/arm/mach-s5p6440/Kconfig
> > delete mode 100644 arch/arm/mach-s5p6440/Makefile
> > create mode 100644 arch/arm/mach-s5p64x0/Kconfig
> > create mode 100644 arch/arm/mach-s5p64x0/Makefile
> > rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/Makefile.boot (100%)
> >
> > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > index a7ed21f..40e75b3 100644
> > --- a/arch/arm/Kconfig
> > +++ b/arch/arm/Kconfig
> > @@ -679,17 +679,15 @@ config ARCH_S3C64XX
> > help
> > Samsung S3C64XX series based systems
> >
> > -config ARCH_S5P6440
> > - bool "Samsung S5P6440"
> > +config ARCH_S5P64X0
> > + bool "Samsung S5P6440 S5P6450"
> > select CPU_V6
> > select GENERIC_GPIO
> > select HAVE_CLK
> > - select HAVE_S3C2410_WATCHDOG
> > select ARCH_USES_GETTIMEOFFSET
> > - select HAVE_S3C2410_I2C
> > - select HAVE_S3C_RTC
>
> Why HAVE_* is deleted?
>
Ok...will add it.
> > help
> > - Samsung S5P6440 CPU based systems
> > + Samsung S5P64X0 CPU based systems, such as the Samsung
> SMDK6440,
> > + SMDK6450.
> >
(snip)
> > +
> > +config MACH_SMDK6440
> > + bool "SMDK6440"
> > + select CPU_S5P6440
> > + select S3C_DEV_I2C1
> > + select S3C_DEV_RTC
> > + select S3C_DEV_WDT
> > + select SAMSUNG_DEV_ADC
> > + select SAMSUNG_DEV_TS
> > + select S5P64X0_SETUP_I2C1
> > + help
> > + Machine support for the Samsung SMDK6440
> > +
> > +config MACH_SMDK6450
> > + bool "SMDK6450"
> > + select CPU_S5P6450
> > + select S3C_DEV_I2C1
> > + select S3C_DEV_RTC
> > + select S3C_DEV_WDT
> > + select SAMSUNG_DEV_ADC
> > + select SAMSUNG_DEV_TS
> > + select S5P64X0_SETUP_I2C1
> > + help
> > + Machine support for the Samsung SMDK6450
>
> In most case SMDK has almost same functionality. make a common select
> e.g., SMDK_COMMON and each board just select it.
If required, will sort out next time with other architectures.
(snip)
> > +
> > +obj-$(CONFIG_MACH_SMDK6440) += mach-smdk6440.o
> > +obj-$(CONFIG_MACH_SMDK6450) += mach-smdk6450.o
> Are there difference between smdk6440 and smdk6450 except the SOC?
> If no, how about to make a single file as pxa or omap does?
>
Because each components on the board are different,
SMDK6440 and SMDK6450 need each machine file...
(snip)
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH 02/13] ARM: S5P64X0: Update Kconfig and Makefile
@ 2010-09-02 8:25 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-02 8:25 UTC (permalink / raw)
To: linux-arm-kernel
Kyungmin Park wrote:
>
> On Wed, Sep 1, 2010 at 4:09 PM, Kukjin Kim <kgene.kim@samsung.com> wrote:
> > This patch updates the Kconfig and Makefile for the S5P6440 and S5P6450
> > machines. It also updates arch/arm/ Kconfig and Makefile to include for
> > support ARCH_S5P64X0 with one kernel image.
> >
> > Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
> > ---
> > ?arch/arm/Kconfig ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? | ? 16 +++---
> > ?arch/arm/Makefile ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?2 +-
> > ?arch/arm/mach-s5p6440/Kconfig ? ? ? ? ? ? ? ? ? ? ?| ? 33 ------------
> > ?arch/arm/mach-s5p6440/Makefile ? ? ? ? ? ? ? ? ? ? | ? 25 ---------
> > ?arch/arm/mach-s5p64x0/Kconfig ? ? ? ? ? ? ? ? ? ? ?| ? 55
> ++++++++++++++++++++
> > ?arch/arm/mach-s5p64x0/Makefile ? ? ? ? ? ? ? ? ? ? | ? 30 +++++++++++
> > ?.../{mach-s5p6440 => mach-s5p64x0}/Makefile.boot ? | ? ?0
> > ?arch/arm/plat-s5p/Kconfig ? ? ? ? ? ? ? ? ? ? ? ? ?| ? ?4 +-
> > ?8 files changed, 95 insertions(+), 70 deletions(-)
> > ?delete mode 100644 arch/arm/mach-s5p6440/Kconfig
> > ?delete mode 100644 arch/arm/mach-s5p6440/Makefile
> > ?create mode 100644 arch/arm/mach-s5p64x0/Kconfig
> > ?create mode 100644 arch/arm/mach-s5p64x0/Makefile
> > ?rename arch/arm/{mach-s5p6440 => mach-s5p64x0}/Makefile.boot (100%)
> >
> > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> > index a7ed21f..40e75b3 100644
> > --- a/arch/arm/Kconfig
> > +++ b/arch/arm/Kconfig
> > @@ -679,17 +679,15 @@ config ARCH_S3C64XX
> > ? ? ? ?help
> > ? ? ? ? ?Samsung S3C64XX series based systems
> >
> > -config ARCH_S5P6440
> > - ? ? ? bool "Samsung S5P6440"
> > +config ARCH_S5P64X0
> > + ? ? ? bool "Samsung S5P6440 S5P6450"
> > ? ? ? ?select CPU_V6
> > ? ? ? ?select GENERIC_GPIO
> > ? ? ? ?select HAVE_CLK
> > - ? ? ? select HAVE_S3C2410_WATCHDOG
> > ? ? ? ?select ARCH_USES_GETTIMEOFFSET
> > - ? ? ? select HAVE_S3C2410_I2C
> > - ? ? ? select HAVE_S3C_RTC
>
> Why HAVE_* is deleted?
>
Ok...will add it.
> > ? ? ? ?help
> > - ? ? ? ? Samsung S5P6440 CPU based systems
> > + ? ? ? ? Samsung S5P64X0 CPU based systems, such as the Samsung
> SMDK6440,
> > + ? ? ? ? SMDK6450.
> >
(snip)
> > +
> > +config MACH_SMDK6440
> > + ? ? ? bool "SMDK6440"
> > + ? ? ? select CPU_S5P6440
> > + ? ? ? select S3C_DEV_I2C1
> > + ? ? ? select S3C_DEV_RTC
> > + ? ? ? select S3C_DEV_WDT
> > + ? ? ? select SAMSUNG_DEV_ADC
> > + ? ? ? select SAMSUNG_DEV_TS
> > + ? ? ? select S5P64X0_SETUP_I2C1
> > + ? ? ? help
> > + ? ? ? ? Machine support for the Samsung SMDK6440
> > +
> > +config MACH_SMDK6450
> > + ? ? ? bool "SMDK6450"
> > + ? ? ? select CPU_S5P6450
> > + ? ? ? select S3C_DEV_I2C1
> > + ? ? ? select S3C_DEV_RTC
> > + ? ? ? select S3C_DEV_WDT
> > + ? ? ? select SAMSUNG_DEV_ADC
> > + ? ? ? select SAMSUNG_DEV_TS
> > + ? ? ? select S5P64X0_SETUP_I2C1
> > + ? ? ? help
> > + ? ? ? ? Machine support for the Samsung SMDK6450
>
> In most case SMDK has almost same functionality. make a common select
> e.g., SMDK_COMMON and each board just select it.
If required, will sort out next time with other architectures.
(snip)
> > +
> > +obj-$(CONFIG_MACH_SMDK6440) ? ?+= mach-smdk6440.o
> > +obj-$(CONFIG_MACH_SMDK6450) ? ?+= mach-smdk6450.o
> Are there difference between smdk6440 and smdk6450 except the SOC?
> If no, how about to make a single file as pxa or omap does?
>
Because each components on the board are different,
SMDK6440 and SMDK6450 need each machine file...
(snip)
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 52+ messages in thread
* RE: [PATCH 00/13] ARM: S5P64X0: Add new S5P6450 Support
2010-09-01 11:45 ` Ben Dooks
@ 2010-09-02 10:21 ` Kukjin Kim
-1 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-02 10:21 UTC (permalink / raw)
To: 'Ben Dooks'; +Cc: linux-arm-kernel, linux-samsung-soc
Ben Dooks wrote:
>
Hi ;-)
> On Wed, Sep 01, 2010 at 04:09:07PM +0900, Kukjin Kim wrote:
> > This patches add basic support for Samsung S5P6450 SoC.
> >
> > Basically this patch moves mach-s5p6440 (ARCH_S5P6440) to mach-s5p64x0
> > (ARCH_S5P64X0) to support Samsung's new S5P6450 SoC. The
> ARCH_S5P64X0
> > can support S5P6440 and S5P6450 with one kernel image. It is tested on
> > SMDK6440(S5P6440) and SMDK6450(S5P6450) with s5p64x0_defconfig. And
> > this patch changes s5p6440_defconfig to s5p64x0_defconfig for S5P64X0.
>
> What about the s5p6442?
>
S5P6440 and S5P6450 are each other similar, but S5P6442 differs much with
it.
,,,so remains some issues for it now.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 52+ messages in thread
* [PATCH 00/13] ARM: S5P64X0: Add new S5P6450 Support
@ 2010-09-02 10:21 ` Kukjin Kim
0 siblings, 0 replies; 52+ messages in thread
From: Kukjin Kim @ 2010-09-02 10:21 UTC (permalink / raw)
To: linux-arm-kernel
Ben Dooks wrote:
>
Hi ;-)
> On Wed, Sep 01, 2010 at 04:09:07PM +0900, Kukjin Kim wrote:
> > This patches add basic support for Samsung S5P6450 SoC.
> >
> > Basically this patch moves mach-s5p6440 (ARCH_S5P6440) to mach-s5p64x0
> > (ARCH_S5P64X0) to support Samsung's new S5P6450 SoC. The
> ARCH_S5P64X0
> > can support S5P6440 and S5P6450 with one kernel image. It is tested on
> > SMDK6440(S5P6440) and SMDK6450(S5P6450) with s5p64x0_defconfig. And
> > this patch changes s5p6440_defconfig to s5p64x0_defconfig for S5P64X0.
>
> What about the s5p6442?
>
S5P6440 and S5P6450 are each other similar, but S5P6442 differs much with
it.
,,,so remains some issues for it now.
Thanks.
Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.
^ permalink raw reply [flat|nested] 52+ messages in thread
end of thread, other threads:[~2010-09-02 10:21 UTC | newest]
Thread overview: 52+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2010-09-01 7:09 [PATCH 00/13] ARM: S5P64X0: Add new S5P6450 Support Kukjin Kim
2010-09-01 7:09 ` Kukjin Kim
2010-09-01 7:09 ` [PATCH 01/13] ARM: S5P: Moves initial map for merging S5P64X0 Kukjin Kim
2010-09-01 7:09 ` Kukjin Kim
2010-09-01 9:42 ` Kyungmin Park
2010-09-01 9:42 ` Kyungmin Park
2010-09-01 7:09 ` [PATCH 02/13] ARM: S5P64X0: Update Kconfig and Makefile Kukjin Kim
2010-09-01 7:09 ` Kukjin Kim
2010-09-01 9:47 ` Kyungmin Park
2010-09-01 9:47 ` Kyungmin Park
2010-09-02 8:25 ` Kukjin Kim
2010-09-02 8:25 ` Kukjin Kim
2010-09-01 7:09 ` [PATCH 03/13] ARM: S5P64X0: Add S5P64X0(S5P6440 and S5P6450) initialization support Kukjin Kim
2010-09-01 7:09 ` Kukjin Kim
2010-09-01 7:09 ` [PATCH 04/13] ARM: S5P64X0: Update Clock for S5P6440 and S5P6450 Kukjin Kim
2010-09-01 7:09 ` Kukjin Kim
2010-09-01 7:09 ` [PATCH 05/13] ARM: S5P64X0: Update IRQ support Kukjin Kim
2010-09-01 7:09 ` Kukjin Kim
2010-09-01 7:09 ` [PATCH 06/13] ARM: S5P64X0: Update Timer support Kukjin Kim
2010-09-01 7:09 ` Kukjin Kim
2010-09-01 7:09 ` [PATCH 07/13] ARM: S5P64X0: Update Audio support Kukjin Kim
2010-09-01 7:09 ` Kukjin Kim
2010-09-02 1:44 ` Jassi Brar
2010-09-02 1:44 ` Jassi Brar
2010-09-02 7:30 ` Kukjin Kim
2010-09-02 7:30 ` Kukjin Kim
2010-09-01 7:09 ` [PATCH 08/13] ARM: S5P64X0: Move DMA support for S5P64X0 Kukjin Kim
2010-09-01 7:09 ` Kukjin Kim
2010-09-02 1:08 ` Jassi Brar
2010-09-02 1:08 ` Jassi Brar
2010-09-02 7:32 ` Kukjin Kim
2010-09-02 7:32 ` Kukjin Kim
2010-09-01 7:09 ` [PATCH 09/13] ARM: S5P64X0: Add S5P6450 I2C support Kukjin Kim
2010-09-01 7:09 ` Kukjin Kim
2010-09-01 7:09 ` [PATCH 10/13] ARM: S5P64X0: Move GPIO support files for merge S5P64X0 Kukjin Kim
2010-09-01 7:09 ` Kukjin Kim
2010-09-01 7:09 ` [PATCH 11/13] ARM: S5P64X0: Move SMDK6440 board file and Add SMDK6450 board file Kukjin Kim
2010-09-01 7:09 ` Kukjin Kim
2010-09-01 10:00 ` Kyungmin Park
2010-09-01 10:00 ` Kyungmin Park
2010-09-02 8:02 ` Kukjin Kim
2010-09-02 8:02 ` Kukjin Kim
2010-09-01 7:09 ` [PATCH 12/13] ARM: S5P64X0: Add UART serial support for S5P6450 Kukjin Kim
2010-09-01 7:09 ` Kukjin Kim
2010-09-02 1:43 ` Kyungmin Park
2010-09-02 1:43 ` Kyungmin Park
2010-09-01 7:09 ` [PATCH 13/13] ARM: s5p64x0_defconfig: Update for support S5P6440 and S5P6450 Kukjin Kim
2010-09-01 7:09 ` Kukjin Kim
2010-09-01 11:45 ` [PATCH 00/13] ARM: S5P64X0: Add new S5P6450 Support Ben Dooks
2010-09-01 11:45 ` Ben Dooks
2010-09-02 10:21 ` Kukjin Kim
2010-09-02 10:21 ` Kukjin Kim
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.