[PATCH v2 0/4] S3C2416: Enable IIS and HSSPI clocks

[PATCH v2 0/4] S3C2416: Enable IIS and HSSPI clocks

[Heiko Stübner]

S3C2416/2450 (probably S3C2443 too) can use the newer style
kernel-drivers made for S3C64xx and above for their I2S and
HS-SPI controllers.

So as a first step in this direction, these patches add their
respective clocks.

The I2S clocks were simply moved from S3C2443 to s3c2443-clock.c
as they are identical on all 3 platforms.

The same is true for the HSSPI pclk which is added to s3c2443-clock.c,
as it was not defined at all yet.

The HSSPI sclk is different between 2443 and 2416 and is therefore
added to mach-s3c2416/clock.c

Changes since v1:
 fix missing static
 cleanup hsspi clk-sources
 remove collision between hsspi pclk and sclk on s3c2443

Heiko Stuebner (4):
  S3C2443: Move i2s clock definitions to common code
  S3C2443: Define constant for HSSPI pclk
  S3C2416: Add HSSPI clock sourced from EPLL
  S3C2443: Add hsspi-clock from pclk and rename unused S3C2443 hsspi
    sclk

 .../mach-s3c2410/include/mach/regs-s3c2443-clock.h |    1 +
 arch/arm/mach-s3c2416/clock.c                      |   28 ++++++++++
 arch/arm/mach-s3c2443/clock.c                      |   55 +------------------
 arch/arm/plat-s3c24xx/s3c2443-clock.c              |   58 ++++++++++++++++++++
 4 files changed, 88 insertions(+), 54 deletions(-)

-- 
1.7.2.3

[PATCH v2 0/4] S3C2416: Enable IIS and HSSPI clocks

[Heiko Stübner]

S3C2416/2450 (probably S3C2443 too) can use the newer style
kernel-drivers made for S3C64xx and above for their I2S and
HS-SPI controllers.

So as a first step in this direction, these patches add their
respective clocks.

The I2S clocks were simply moved from S3C2443 to s3c2443-clock.c
as they are identical on all 3 platforms.

The same is true for the HSSPI pclk which is added to s3c2443-clock.c,
as it was not defined at all yet.

The HSSPI sclk is different between 2443 and 2416 and is therefore
added to mach-s3c2416/clock.c

Changes since v1:
 fix missing static
 cleanup hsspi clk-sources
 remove collision between hsspi pclk and sclk on s3c2443

Heiko Stuebner (4):
  S3C2443: Move i2s clock definitions to common code
  S3C2443: Define constant for HSSPI pclk
  S3C2416: Add HSSPI clock sourced from EPLL
  S3C2443: Add hsspi-clock from pclk and rename unused S3C2443 hsspi
    sclk

 .../mach-s3c2410/include/mach/regs-s3c2443-clock.h |    1 +
 arch/arm/mach-s3c2416/clock.c                      |   28 ++++++++++
 arch/arm/mach-s3c2443/clock.c                      |   55 +------------------
 arch/arm/plat-s3c24xx/s3c2443-clock.c              |   58 ++++++++++++++++++++
 4 files changed, 88 insertions(+), 54 deletions(-)

-- 
1.7.2.3

[PATCH v2 1/4] S3C2443: Move i2s clock definitions to common code

[Heiko Stübner]

S3C2416/S3C2450 use the same clocks for their i2s blocks and can therefore
reuse the existing ones.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 Changes since v1: added missing static
 arch/arm/mach-s3c2443/clock.c         |   53 ---------------------------------
 arch/arm/plat-s3c24xx/s3c2443-clock.c |   53 +++++++++++++++++++++++++++++++++
 2 files changed, 53 insertions(+), 53 deletions(-)

diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index a1a7176..966bde5 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -57,10 +57,6 @@
 
 /* clock selections */
 
-static struct clk clk_i2s_ext = {
-	.name		= "i2s-ext",
-};
-
 /* armdiv
  *
  * this clock is sourced from msysclk and can have a number of
@@ -235,48 +231,6 @@ static struct clk clk_hsmmc = {
 	},
 };
 
-/* i2s_eplldiv
- *
- * This clock is the output from the I2S divisor of ESYSCLK, and is separate
- * from the mux that comes after it (cannot merge into one single clock)
-*/
-
-static struct clksrc_clk clk_i2s_eplldiv = {
-	.clk	= {
-		.name		= "i2s-eplldiv",
-		.parent		= &clk_esysclk.clk,
-	},
-	.reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 12, },
-};
-
-/* i2s-ref
- *
- * i2s bus reference clock, selectable from external, esysclk or epllref
- *
- * Note, this used to be two clocks, but was compressed into one.
-*/
-
-struct clk *clk_i2s_srclist[] = {
-	[0] = &clk_i2s_eplldiv.clk,
-	[1] = &clk_i2s_ext,
-	[2] = &clk_epllref.clk,
-	[3] = &clk_epllref.clk,
-};
-
-static struct clksrc_clk clk_i2s = {
-	.clk	= {
-		.name		= "i2s-if",
-		.ctrlbit	= S3C2443_SCLKCON_I2SCLK,
-		.enable		= s3c2443_clkcon_enable_s,
-
-	},
-	.sources = &(struct clksrc_sources) {
-		.sources = clk_i2s_srclist,
-		.nr_sources = ARRAY_SIZE(clk_i2s_srclist),
-	},
-	.reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 14 },
-};
-
 /* standard clock definitions */
 
 static struct clk init_clocks_off[] = {
@@ -286,11 +240,6 @@ static struct clk init_clocks_off[] = {
 		.enable		= s3c2443_clkcon_enable_p,
 		.ctrlbit	= S3C2443_PCLKCON_SDI,
 	}, {
-		.name		= "iis",
-		.parent		= &clk_p,
-		.enable		= s3c2443_clkcon_enable_p,
-		.ctrlbit	= S3C2443_PCLKCON_IIS,
-	}, {
 		.name		= "spi",
 		.devname	= "s3c2410-spi.0",
 		.parent		= &clk_p,
@@ -312,8 +261,6 @@ static struct clk init_clocks[] = {
 
 static struct clksrc_clk *clksrcs[] __initdata = {
 	&clk_arm,
-	&clk_i2s_eplldiv,
-	&clk_i2s,
 	&clk_hsspi,
 	&clk_hsmmc_div,
 };
diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c
index 59552c0..8132939 100644
--- a/arch/arm/plat-s3c24xx/s3c2443-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c
@@ -205,9 +205,60 @@ static struct clksrc_clk clksrc_clks[] = {
 	},
 };
 
+static struct clk clk_i2s_ext = {
+	.name		= "i2s-ext",
+};
+
+/* i2s_eplldiv
+ *
+ * This clock is the output from the I2S divisor of ESYSCLK, and is separate
+ * from the mux that comes after it (cannot merge into one single clock)
+*/
+
+static struct clksrc_clk clk_i2s_eplldiv = {
+	.clk	= {
+		.name		= "i2s-eplldiv",
+		.parent		= &clk_esysclk.clk,
+	},
+	.reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 12, },
+};
+
+/* i2s-ref
+ *
+ * i2s bus reference clock, selectable from external, esysclk or epllref
+ *
+ * Note, this used to be two clocks, but was compressed into one.
+*/
+
+static struct clk *clk_i2s_srclist[] = {
+	[0] = &clk_i2s_eplldiv.clk,
+	[1] = &clk_i2s_ext,
+	[2] = &clk_epllref.clk,
+	[3] = &clk_epllref.clk,
+};
+
+
+static struct clksrc_clk clk_i2s = {
+	.clk	= {
+		.name		= "i2s-if",
+		.ctrlbit	= S3C2443_SCLKCON_I2SCLK,
+		.enable		= s3c2443_clkcon_enable_s,
+
+	},
+	.sources = &(struct clksrc_sources) {
+		.sources = clk_i2s_srclist,
+		.nr_sources = ARRAY_SIZE(clk_i2s_srclist),
+	},
+	.reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 14 },
+};
 
 static struct clk init_clocks_off[] = {
 	{
+		.name		= "iis",
+		.parent		= &clk_p,
+		.enable		= s3c2443_clkcon_enable_p,
+		.ctrlbit	= S3C2443_PCLKCON_IIS,
+	}, {
 		.name		= "adc",
 		.parent		= &clk_p,
 		.enable		= s3c2443_clkcon_enable_p,
@@ -406,6 +457,8 @@ static struct clk *clks[] __initdata = {
 };
 
 static struct clksrc_clk *clksrcs[] __initdata = {
+	&clk_i2s_eplldiv,
+	&clk_i2s,
 	&clk_usb_bus_host,
 	&clk_epllref,
 	&clk_esysclk,
-- 
1.7.2.3

[PATCH v2 1/4] S3C2443: Move i2s clock definitions to common code

[Heiko Stübner]

S3C2416/S3C2450 use the same clocks for their i2s blocks and can therefore
reuse the existing ones.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 Changes since v1: added missing static
 arch/arm/mach-s3c2443/clock.c         |   53 ---------------------------------
 arch/arm/plat-s3c24xx/s3c2443-clock.c |   53 +++++++++++++++++++++++++++++++++
 2 files changed, 53 insertions(+), 53 deletions(-)

diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index a1a7176..966bde5 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -57,10 +57,6 @@
 
 /* clock selections */
 
-static struct clk clk_i2s_ext = {
-	.name		= "i2s-ext",
-};
-
 /* armdiv
  *
  * this clock is sourced from msysclk and can have a number of
@@ -235,48 +231,6 @@ static struct clk clk_hsmmc = {
 	},
 };
 
-/* i2s_eplldiv
- *
- * This clock is the output from the I2S divisor of ESYSCLK, and is separate
- * from the mux that comes after it (cannot merge into one single clock)
-*/
-
-static struct clksrc_clk clk_i2s_eplldiv = {
-	.clk	= {
-		.name		= "i2s-eplldiv",
-		.parent		= &clk_esysclk.clk,
-	},
-	.reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 12, },
-};
-
-/* i2s-ref
- *
- * i2s bus reference clock, selectable from external, esysclk or epllref
- *
- * Note, this used to be two clocks, but was compressed into one.
-*/
-
-struct clk *clk_i2s_srclist[] = {
-	[0] = &clk_i2s_eplldiv.clk,
-	[1] = &clk_i2s_ext,
-	[2] = &clk_epllref.clk,
-	[3] = &clk_epllref.clk,
-};
-
-static struct clksrc_clk clk_i2s = {
-	.clk	= {
-		.name		= "i2s-if",
-		.ctrlbit	= S3C2443_SCLKCON_I2SCLK,
-		.enable		= s3c2443_clkcon_enable_s,
-
-	},
-	.sources = &(struct clksrc_sources) {
-		.sources = clk_i2s_srclist,
-		.nr_sources = ARRAY_SIZE(clk_i2s_srclist),
-	},
-	.reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 14 },
-};
-
 /* standard clock definitions */
 
 static struct clk init_clocks_off[] = {
@@ -286,11 +240,6 @@ static struct clk init_clocks_off[] = {
 		.enable		= s3c2443_clkcon_enable_p,
 		.ctrlbit	= S3C2443_PCLKCON_SDI,
 	}, {
-		.name		= "iis",
-		.parent		= &clk_p,
-		.enable		= s3c2443_clkcon_enable_p,
-		.ctrlbit	= S3C2443_PCLKCON_IIS,
-	}, {
 		.name		= "spi",
 		.devname	= "s3c2410-spi.0",
 		.parent		= &clk_p,
@@ -312,8 +261,6 @@ static struct clk init_clocks[] = {
 
 static struct clksrc_clk *clksrcs[] __initdata = {
 	&clk_arm,
-	&clk_i2s_eplldiv,
-	&clk_i2s,
 	&clk_hsspi,
 	&clk_hsmmc_div,
 };
diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c
index 59552c0..8132939 100644
--- a/arch/arm/plat-s3c24xx/s3c2443-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c
@@ -205,9 +205,60 @@ static struct clksrc_clk clksrc_clks[] = {
 	},
 };
 
+static struct clk clk_i2s_ext = {
+	.name		= "i2s-ext",
+};
+
+/* i2s_eplldiv
+ *
+ * This clock is the output from the I2S divisor of ESYSCLK, and is separate
+ * from the mux that comes after it (cannot merge into one single clock)
+*/
+
+static struct clksrc_clk clk_i2s_eplldiv = {
+	.clk	= {
+		.name		= "i2s-eplldiv",
+		.parent		= &clk_esysclk.clk,
+	},
+	.reg_div = { .reg = S3C2443_CLKDIV1, .size = 4, .shift = 12, },
+};
+
+/* i2s-ref
+ *
+ * i2s bus reference clock, selectable from external, esysclk or epllref
+ *
+ * Note, this used to be two clocks, but was compressed into one.
+*/
+
+static struct clk *clk_i2s_srclist[] = {
+	[0] = &clk_i2s_eplldiv.clk,
+	[1] = &clk_i2s_ext,
+	[2] = &clk_epllref.clk,
+	[3] = &clk_epllref.clk,
+};
+
+
+static struct clksrc_clk clk_i2s = {
+	.clk	= {
+		.name		= "i2s-if",
+		.ctrlbit	= S3C2443_SCLKCON_I2SCLK,
+		.enable		= s3c2443_clkcon_enable_s,
+
+	},
+	.sources = &(struct clksrc_sources) {
+		.sources = clk_i2s_srclist,
+		.nr_sources = ARRAY_SIZE(clk_i2s_srclist),
+	},
+	.reg_src = { .reg = S3C2443_CLKSRC, .size = 2, .shift = 14 },
+};
 
 static struct clk init_clocks_off[] = {
 	{
+		.name		= "iis",
+		.parent		= &clk_p,
+		.enable		= s3c2443_clkcon_enable_p,
+		.ctrlbit	= S3C2443_PCLKCON_IIS,
+	}, {
 		.name		= "adc",
 		.parent		= &clk_p,
 		.enable		= s3c2443_clkcon_enable_p,
@@ -406,6 +457,8 @@ static struct clk *clks[] __initdata = {
 };
 
 static struct clksrc_clk *clksrcs[] __initdata = {
+	&clk_i2s_eplldiv,
+	&clk_i2s,
 	&clk_usb_bus_host,
 	&clk_epllref,
 	&clk_esysclk,
-- 
1.7.2.3

[PATCH 2/4] S3C2443: Define constant for HSSPI pclk

[Heiko Stübner]

It's the same clock for 2443/2416/2450.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 .../mach-s3c2410/include/mach/regs-s3c2443-clock.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
index 5e06c72..df6434f 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
@@ -102,6 +102,7 @@
 #define S3C2443_PCLKCON_UART3		(1<<3)
 #define S3C2443_PCLKCON_IIC		(1<<4)
 #define S3C2443_PCLKCON_SDI		(1<<5)
+#define S3C2443_PCLKCON_HSSPI		(1<<6)
 #define S3C2443_PCLKCON_ADC		(1<<7)
 #define S3C2443_PCLKCON_AC97		(1<<8)
 #define S3C2443_PCLKCON_IIS		(1<<9)
-- 
1.7.2.3

[PATCH 2/4] S3C2443: Define constant for HSSPI pclk

[Heiko Stübner]

It's the same clock for 2443/2416/2450.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 .../mach-s3c2410/include/mach/regs-s3c2443-clock.h |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
index 5e06c72..df6434f 100644
--- a/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
+++ b/arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
@@ -102,6 +102,7 @@
 #define S3C2443_PCLKCON_UART3		(1<<3)
 #define S3C2443_PCLKCON_IIC		(1<<4)
 #define S3C2443_PCLKCON_SDI		(1<<5)
+#define S3C2443_PCLKCON_HSSPI		(1<<6)
 #define S3C2443_PCLKCON_ADC		(1<<7)
 #define S3C2443_PCLKCON_AC97		(1<<8)
 #define S3C2443_PCLKCON_IIS		(1<<9)
-- 
1.7.2.3

[PATCH v2 3/4] S3C2416: Add HSSPI clock sourced from EPLL

[Heiko Stübner]

This clock is special to the S3C2416/2450 SoCs.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 Changes since v1: move hsspi sources array
 arch/arm/mach-s3c2416/clock.c |   28 ++++++++++++++++++++++++++++
 1 files changed, 28 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c
index 21a5e81..196fb37 100644
--- a/arch/arm/mach-s3c2416/clock.c
+++ b/arch/arm/mach-s3c2416/clock.c
@@ -38,6 +38,32 @@ static unsigned int armdiv[8] = {
 	[7] = 8,
 };
 
+static struct clksrc_clk hsspi_eplldiv = {
+	.clk = {
+		.name	= "hsspi-eplldiv",
+		.parent	= &clk_esysclk.clk,
+		.ctrlbit = (1 << 14),
+		.enable = s3c2443_clkcon_enable_s,
+	},
+	.reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 24 },
+};
+
+static struct clk *hsspi_sources[] = {
+	[0] = &hsspi_eplldiv.clk,
+	[1] = NULL, /* to fix */
+};
+
+static struct clksrc_clk hsspi_mux = {
+	.clk	= {
+		.name	= "hsspi-if",
+	},
+	.sources = &(struct clksrc_sources) {
+		.sources = hsspi_sources,
+		.nr_sources = ARRAY_SIZE(hsspi_sources),
+	},
+	.reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 18 },
+};
+
 static struct clksrc_clk hsmmc_div[] = {
 	[0] = {
 		.clk = {
@@ -114,6 +140,8 @@ void __init_or_cpufreq s3c2416_setup_clocks(void)
 
 
 static struct clksrc_clk *clksrcs[] __initdata = {
+	&hsspi_eplldiv,
+	&hsspi_mux,
 	&hsmmc_div[0],
 	&hsmmc_div[1],
 	&hsmmc_mux[0],
-- 
1.7.2.3

[PATCH v2 3/4] S3C2416: Add HSSPI clock sourced from EPLL

[Heiko Stübner]

This clock is special to the S3C2416/2450 SoCs.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 Changes since v1: move hsspi sources array
 arch/arm/mach-s3c2416/clock.c |   28 ++++++++++++++++++++++++++++
 1 files changed, 28 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-s3c2416/clock.c b/arch/arm/mach-s3c2416/clock.c
index 21a5e81..196fb37 100644
--- a/arch/arm/mach-s3c2416/clock.c
+++ b/arch/arm/mach-s3c2416/clock.c
@@ -38,6 +38,32 @@ static unsigned int armdiv[8] = {
 	[7] = 8,
 };
 
+static struct clksrc_clk hsspi_eplldiv = {
+	.clk = {
+		.name	= "hsspi-eplldiv",
+		.parent	= &clk_esysclk.clk,
+		.ctrlbit = (1 << 14),
+		.enable = s3c2443_clkcon_enable_s,
+	},
+	.reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 24 },
+};
+
+static struct clk *hsspi_sources[] = {
+	[0] = &hsspi_eplldiv.clk,
+	[1] = NULL, /* to fix */
+};
+
+static struct clksrc_clk hsspi_mux = {
+	.clk	= {
+		.name	= "hsspi-if",
+	},
+	.sources = &(struct clksrc_sources) {
+		.sources = hsspi_sources,
+		.nr_sources = ARRAY_SIZE(hsspi_sources),
+	},
+	.reg_src = { .reg = S3C2443_CLKSRC, .size = 1, .shift = 18 },
+};
+
 static struct clksrc_clk hsmmc_div[] = {
 	[0] = {
 		.clk = {
@@ -114,6 +140,8 @@ void __init_or_cpufreq s3c2416_setup_clocks(void)
 
 
 static struct clksrc_clk *clksrcs[] __initdata = {
+	&hsspi_eplldiv,
+	&hsspi_mux,
 	&hsmmc_div[0],
 	&hsmmc_div[1],
 	&hsmmc_mux[0],
-- 
1.7.2.3

[PATCH v2 4/4] S3C2443: Add hsspi-clock from pclk and rename unused S3C2443 hsspi sclk

[Heiko Stübner]

This clock is common to S3C2443/2416/2450.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 Changes since v1: rename s3c2443 hsspi sclk (until now unused)
 arch/arm/mach-s3c2443/clock.c         |    2 +-
 arch/arm/plat-s3c24xx/s3c2443-clock.c |    5 +++++
 2 files changed, 6 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index 966bde5..6b9ae46 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -169,7 +169,7 @@ static struct clksrc_clk clk_arm = {
 
 static struct clksrc_clk clk_hsspi = {
 	.clk	= {
-		.name		= "hsspi",
+		.name		= "hsspi-if",
 		.parent		= &clk_esysclk.clk,
 		.ctrlbit	= S3C2443_SCLKCON_HSSPICLK,
 		.enable		= s3c2443_clkcon_enable_s,
diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c
index 8132939..2e8492c 100644
--- a/arch/arm/plat-s3c24xx/s3c2443-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c
@@ -259,6 +259,11 @@ static struct clk init_clocks_off[] = {
 		.enable		= s3c2443_clkcon_enable_p,
 		.ctrlbit	= S3C2443_PCLKCON_IIS,
 	}, {
+		.name		= "hsspi",
+		.parent		= &clk_p,
+		.enable		= s3c2443_clkcon_enable_p,
+		.ctrlbit	= S3C2443_PCLKCON_HSSPI,
+	}, {
 		.name		= "adc",
 		.parent		= &clk_p,
 		.enable		= s3c2443_clkcon_enable_p,
-- 
1.7.2.3

[PATCH v2 4/4] S3C2443: Add hsspi-clock from pclk and rename unused S3C2443 hsspi sclk

[Heiko Stübner]

This clock is common to S3C2443/2416/2450.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
 Changes since v1: rename s3c2443 hsspi sclk (until now unused)
 arch/arm/mach-s3c2443/clock.c         |    2 +-
 arch/arm/plat-s3c24xx/s3c2443-clock.c |    5 +++++
 2 files changed, 6 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c
index 966bde5..6b9ae46 100644
--- a/arch/arm/mach-s3c2443/clock.c
+++ b/arch/arm/mach-s3c2443/clock.c
@@ -169,7 +169,7 @@ static struct clksrc_clk clk_arm = {
 
 static struct clksrc_clk clk_hsspi = {
 	.clk	= {
-		.name		= "hsspi",
+		.name		= "hsspi-if",
 		.parent		= &clk_esysclk.clk,
 		.ctrlbit	= S3C2443_SCLKCON_HSSPICLK,
 		.enable		= s3c2443_clkcon_enable_s,
diff --git a/arch/arm/plat-s3c24xx/s3c2443-clock.c b/arch/arm/plat-s3c24xx/s3c2443-clock.c
index 8132939..2e8492c 100644
--- a/arch/arm/plat-s3c24xx/s3c2443-clock.c
+++ b/arch/arm/plat-s3c24xx/s3c2443-clock.c
@@ -259,6 +259,11 @@ static struct clk init_clocks_off[] = {
 		.enable		= s3c2443_clkcon_enable_p,
 		.ctrlbit	= S3C2443_PCLKCON_IIS,
 	}, {
+		.name		= "hsspi",
+		.parent		= &clk_p,
+		.enable		= s3c2443_clkcon_enable_p,
+		.ctrlbit	= S3C2443_PCLKCON_HSSPI,
+	}, {
 		.name		= "adc",
 		.parent		= &clk_p,
 		.enable		= s3c2443_clkcon_enable_p,
-- 
1.7.2.3

Re: [PATCH v2 0/4] S3C2416: Enable IIS and HSSPI clocks

[Heiko Stübner]

Am Sonntag, 28. August 2011, 20:06:31 schrieb Heiko Stübner:
> S3C2416/2450 (probably S3C2443 too) can use the newer style
> kernel-drivers made for S3C64xx and above for their I2S and
> HS-SPI controllers.
> 
> So as a first step in this direction, these patches add their
> respective clocks.
ping? Any comments?

Thanks
Heiko

[PATCH v2 0/4] S3C2416: Enable IIS and HSSPI clocks

[Heiko Stübner]

Am Sonntag, 28. August 2011, 20:06:31 schrieb Heiko St?bner:
> S3C2416/2450 (probably S3C2443 too) can use the newer style
> kernel-drivers made for S3C64xx and above for their I2S and
> HS-SPI controllers.
> 
> So as a first step in this direction, these patches add their
> respective clocks.
ping? Any comments?

Thanks
Heiko

RE: [PATCH v2 0/4] S3C2416: Enable IIS and HSSPI clocks

[Kukjin Kim]

Heiko Stübner wrote:
> 
> Am Sonntag, 28. August 2011, 20:06:31 schrieb Heiko Stübner:
> > S3C2416/2450 (probably S3C2443 too) can use the newer style
> > kernel-drivers made for S3C64xx and above for their I2S and
> > HS-SPI controllers.
> >
> > So as a first step in this direction, these patches add their
> > respective clocks.
> ping? Any comments?
> 
Hi Heiko,

Sorry for late response...came back from Korean traditional holiday :)
I will be back on this in this weekend.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

[PATCH v2 0/4] S3C2416: Enable IIS and HSSPI clocks

[Kukjin Kim]

Heiko St?bner wrote:
> 
> Am Sonntag, 28. August 2011, 20:06:31 schrieb Heiko St?bner:
> > S3C2416/2450 (probably S3C2443 too) can use the newer style
> > kernel-drivers made for S3C64xx and above for their I2S and
> > HS-SPI controllers.
> >
> > So as a first step in this direction, these patches add their
> > respective clocks.
> ping? Any comments?
> 
Hi Heiko,

Sorry for late response...came back from Korean traditional holiday :)
I will be back on this in this weekend.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

Re: [PATCH v2 0/4] S3C2416: Enable IIS and HSSPI clocks

[Heiko Stübner]

Am Donnerstag 15 September 2011, 10:49:15 schrieben Sie:
> Heiko Stübner wrote:
> > Am Sonntag, 28. August 2011, 20:06:31 schrieb Heiko Stübner:
> > > S3C2416/2450 (probably S3C2443 too) can use the newer style
> > > kernel-drivers made for S3C64xx and above for their I2S and
> > > HS-SPI controllers.
> > > 
> > > So as a first step in this direction, these patches add their
> > > respective clocks.
> > 
> > ping? Any comments?
> 
> Hi Heiko,
> 
> Sorry for late response...came back from Korean traditional holiday :)
> I will be back on this in this weekend.

Hi Kgene,

another ping, as I'd really like to get this off my back :-)

Thanks
Heiko

[PATCH v2 0/4] S3C2416: Enable IIS and HSSPI clocks

[Heiko Stübner]

Am Donnerstag 15 September 2011, 10:49:15 schrieben Sie:
> Heiko St?bner wrote:
> > Am Sonntag, 28. August 2011, 20:06:31 schrieb Heiko St?bner:
> > > S3C2416/2450 (probably S3C2443 too) can use the newer style
> > > kernel-drivers made for S3C64xx and above for their I2S and
> > > HS-SPI controllers.
> > > 
> > > So as a first step in this direction, these patches add their
> > > respective clocks.
> > 
> > ping? Any comments?
> 
> Hi Heiko,
> 
> Sorry for late response...came back from Korean traditional holiday :)
> I will be back on this in this weekend.

Hi Kgene,

another ping, as I'd really like to get this off my back :-)

Thanks
Heiko