* [PATCH net-next 0/2] PCI: add two more values for PCIe Max_Read_Request_Size and initially use them in r8169 network driver
@ 2018-04-16 19:35 Heiner Kallweit
2018-04-16 19:37 ` [PATCH net-next 1/2] PCI: Add two more values for PCIe Max_Read_Request_Size Heiner Kallweit
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Heiner Kallweit @ 2018-04-16 19:35 UTC (permalink / raw)
To: Bjorn Helgaas, David Miller, Bjorn Helgaas,
Realtek linux nic maintainers
Cc: linux-pci, netdev
In r8169 network driver I stumbled across a magic number translating
to PCI MRRS size 4K. The PCI core is still missing constants for
values 2K and 4K (as defined in PCI standard).
So let's add these two constants and use the 4K constant in r8169.
Second patch depends on the first one, therefore both patches
preferrably should go through either PCI or netdev tree.
Heiner Kallweit (2):
PCI: add two more values for PCIe Max_Read_Request_Size
r8169: replace magic numbers with PCI MRRS constant
drivers/net/ethernet/realtek/r8169.c | 39 ++++++++++++++--------------
include/uapi/linux/pci_regs.h | 2 ++
2 files changed, 21 insertions(+), 20 deletions(-)
--
2.17.0
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH net-next 1/2] PCI: Add two more values for PCIe Max_Read_Request_Size
2018-04-16 19:35 [PATCH net-next 0/2] PCI: add two more values for PCIe Max_Read_Request_Size and initially use them in r8169 network driver Heiner Kallweit
@ 2018-04-16 19:37 ` Heiner Kallweit
2018-04-16 21:42 ` Bjorn Helgaas
2018-04-16 19:38 ` [PATCH net-next 2/2] r8169: replace magic numbers with PCI MRRS constant Heiner Kallweit
2018-04-16 22:55 ` [PATCH net-next 0/2] PCI: add two more values for PCIe Max_Read_Request_Size and initially use them in r8169 network driver David Miller
2 siblings, 1 reply; 6+ messages in thread
From: Heiner Kallweit @ 2018-04-16 19:37 UTC (permalink / raw)
To: Bjorn Helgaas, David Miller, Bjorn Helgaas,
Realtek linux nic maintainers
Cc: linux-pci, netdev
This patch adds missing values for the max read request size.
E.g. network driver r8169 uses a value of 4K.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
---
include/uapi/linux/pci_regs.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 0c79eac5..699257fb 100644
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -506,6 +506,8 @@
#define PCI_EXP_DEVCTL_READRQ_256B 0x1000 /* 256 Bytes */
#define PCI_EXP_DEVCTL_READRQ_512B 0x2000 /* 512 Bytes */
#define PCI_EXP_DEVCTL_READRQ_1024B 0x3000 /* 1024 Bytes */
+#define PCI_EXP_DEVCTL_READRQ_2048B 0x4000 /* 2048 Bytes */
+#define PCI_EXP_DEVCTL_READRQ_4096B 0x5000 /* 4096 Bytes */
#define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */
#define PCI_EXP_DEVSTA 10 /* Device Status */
#define PCI_EXP_DEVSTA_CED 0x0001 /* Correctable Error Detected */
--
2.17.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH net-next 2/2] r8169: replace magic numbers with PCI MRRS constant
2018-04-16 19:35 [PATCH net-next 0/2] PCI: add two more values for PCIe Max_Read_Request_Size and initially use them in r8169 network driver Heiner Kallweit
2018-04-16 19:37 ` [PATCH net-next 1/2] PCI: Add two more values for PCIe Max_Read_Request_Size Heiner Kallweit
@ 2018-04-16 19:38 ` Heiner Kallweit
2018-04-16 22:55 ` [PATCH net-next 0/2] PCI: add two more values for PCIe Max_Read_Request_Size and initially use them in r8169 network driver David Miller
2 siblings, 0 replies; 6+ messages in thread
From: Heiner Kallweit @ 2018-04-16 19:38 UTC (permalink / raw)
To: Bjorn Helgaas, David Miller, Bjorn Helgaas,
Realtek linux nic maintainers
Cc: linux-pci, netdev
Replace magic number "0x5 << MAX_READ_REQUEST_SHIFT" with the
appropriate constant as defined in PCI core.
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
---
drivers/net/ethernet/realtek/r8169.c | 39 ++++++++++++++--------------
1 file changed, 19 insertions(+), 20 deletions(-)
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index 604ae783..7d4e6890 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -84,7 +84,6 @@
The RTL chips use a 64 element hash table based on the Ethernet CRC. */
static const int multicast_filter_limit = 32;
-#define MAX_READ_REQUEST_SHIFT 12
#define TX_DMA_BURST 7 /* Maximum PCI burst, '7' is unlimited */
#define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */
@@ -5125,7 +5124,7 @@ static void r8168c_hw_jumbo_disable(struct rtl8169_private *tp)
{
RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~Jumbo_En1);
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
}
static void r8168dp_hw_jumbo_enable(struct rtl8169_private *tp)
@@ -5151,7 +5150,7 @@ static void r8168e_hw_jumbo_disable(struct rtl8169_private *tp)
RTL_W8(tp, MaxTxPacketSize, 0x0c);
RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Jumbo_En0);
RTL_W8(tp, Config4, RTL_R8(tp, Config4) & ~0x01);
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
}
static void r8168b_0_hw_jumbo_enable(struct rtl8169_private *tp)
@@ -5163,7 +5162,7 @@ static void r8168b_0_hw_jumbo_enable(struct rtl8169_private *tp)
static void r8168b_0_hw_jumbo_disable(struct rtl8169_private *tp)
{
rtl_tx_performance_tweak(tp,
- (0x5 << MAX_READ_REQUEST_SHIFT) | PCI_EXP_DEVCTL_NOSNOOP_EN);
+ PCI_EXP_DEVCTL_READRQ_4096B | PCI_EXP_DEVCTL_NOSNOOP_EN);
}
static void r8168b_1_hw_jumbo_enable(struct rtl8169_private *tp)
@@ -5736,7 +5735,7 @@ static void rtl_hw_start_8168bb(struct rtl8169_private *tp)
RTL_W16(tp, CPlusCmd, RTL_R16(tp, CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
if (tp->dev->mtu <= ETH_DATA_LEN) {
- rtl_tx_performance_tweak(tp, (0x5 << MAX_READ_REQUEST_SHIFT) |
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B |
PCI_EXP_DEVCTL_NOSNOOP_EN);
}
}
@@ -5757,7 +5756,7 @@ static void __rtl_hw_start_8168cp(struct rtl8169_private *tp)
RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
if (tp->dev->mtu <= ETH_DATA_LEN)
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
rtl_disable_clock_request(tp);
@@ -5788,7 +5787,7 @@ static void rtl_hw_start_8168cp_2(struct rtl8169_private *tp)
RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
if (tp->dev->mtu <= ETH_DATA_LEN)
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
RTL_W16(tp, CPlusCmd, RTL_R16(tp, CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}
@@ -5805,7 +5804,7 @@ static void rtl_hw_start_8168cp_3(struct rtl8169_private *tp)
RTL_W8(tp, MaxTxPacketSize, TxPacketMax);
if (tp->dev->mtu <= ETH_DATA_LEN)
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
RTL_W16(tp, CPlusCmd, RTL_R16(tp, CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}
@@ -5862,7 +5861,7 @@ static void rtl_hw_start_8168d(struct rtl8169_private *tp)
RTL_W8(tp, MaxTxPacketSize, TxPacketMax);
if (tp->dev->mtu <= ETH_DATA_LEN)
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
RTL_W16(tp, CPlusCmd, RTL_R16(tp, CPlusCmd) & ~R8168_CPCMD_QUIRK_MASK);
}
@@ -5872,7 +5871,7 @@ static void rtl_hw_start_8168dp(struct rtl8169_private *tp)
rtl_csi_access_enable_1(tp);
if (tp->dev->mtu <= ETH_DATA_LEN)
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
RTL_W8(tp, MaxTxPacketSize, TxPacketMax);
@@ -5889,7 +5888,7 @@ static void rtl_hw_start_8168d_4(struct rtl8169_private *tp)
rtl_csi_access_enable_1(tp);
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
RTL_W8(tp, MaxTxPacketSize, TxPacketMax);
@@ -5921,7 +5920,7 @@ static void rtl_hw_start_8168e_1(struct rtl8169_private *tp)
rtl_ephy_init(tp, e_info_8168e_1, ARRAY_SIZE(e_info_8168e_1));
if (tp->dev->mtu <= ETH_DATA_LEN)
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
RTL_W8(tp, MaxTxPacketSize, TxPacketMax);
@@ -5946,7 +5945,7 @@ static void rtl_hw_start_8168e_2(struct rtl8169_private *tp)
rtl_ephy_init(tp, e_info_8168e_2, ARRAY_SIZE(e_info_8168e_2));
if (tp->dev->mtu <= ETH_DATA_LEN)
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
@@ -5976,7 +5975,7 @@ static void rtl_hw_start_8168f(struct rtl8169_private *tp)
{
rtl_csi_access_enable_2(tp);
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
rtl_eri_write(tp, 0xc0, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
rtl_eri_write(tp, 0xb8, ERIAR_MASK_0011, 0x0000, ERIAR_EXGMAC);
@@ -6047,7 +6046,7 @@ static void rtl_hw_start_8168g(struct rtl8169_private *tp)
rtl_csi_access_enable_1(tp);
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC);
rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC);
@@ -6147,7 +6146,7 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp)
rtl_csi_access_enable_1(tp);
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC);
rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC);
@@ -6229,7 +6228,7 @@ static void rtl_hw_start_8168ep(struct rtl8169_private *tp)
rtl_csi_access_enable_1(tp);
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x00, 0x01, ERIAR_EXGMAC);
rtl_w0w1_eri(tp, 0xdc, ERIAR_MASK_0001, 0x01, 0x00, ERIAR_EXGMAC);
@@ -6495,7 +6494,7 @@ static void rtl_hw_start_8102e_1(struct rtl8169_private *tp)
RTL_W8(tp, DBG_REG, FIX_NAK_1);
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
RTL_W8(tp, Config1,
LEDS1 | LEDS0 | Speed_down | MEMMAP | IOMAP | VPD | PMEnable);
@@ -6512,7 +6511,7 @@ static void rtl_hw_start_8102e_2(struct rtl8169_private *tp)
{
rtl_csi_access_enable_2(tp);
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
RTL_W8(tp, Config1, MEMMAP | IOMAP | VPD | PMEnable);
RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~Beacon_en);
@@ -6575,7 +6574,7 @@ static void rtl_hw_start_8402(struct rtl8169_private *tp)
rtl_ephy_init(tp, e_info_8402, ARRAY_SIZE(e_info_8402));
- rtl_tx_performance_tweak(tp, 0x5 << MAX_READ_REQUEST_SHIFT);
+ rtl_tx_performance_tweak(tp, PCI_EXP_DEVCTL_READRQ_4096B);
rtl_eri_write(tp, 0xc8, ERIAR_MASK_1111, 0x00000002, ERIAR_EXGMAC);
rtl_eri_write(tp, 0xe8, ERIAR_MASK_1111, 0x00000006, ERIAR_EXGMAC);
--
2.17.0
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH net-next 1/2] PCI: Add two more values for PCIe Max_Read_Request_Size
2018-04-16 19:37 ` [PATCH net-next 1/2] PCI: Add two more values for PCIe Max_Read_Request_Size Heiner Kallweit
@ 2018-04-16 21:42 ` Bjorn Helgaas
2018-04-16 22:06 ` David Miller
0 siblings, 1 reply; 6+ messages in thread
From: Bjorn Helgaas @ 2018-04-16 21:42 UTC (permalink / raw)
To: Heiner Kallweit
Cc: Bjorn Helgaas, David Miller, Realtek linux nic maintainers,
linux-pci, netdev
On Mon, Apr 16, 2018 at 09:37:13PM +0200, Heiner Kallweit wrote:
> This patch adds missing values for the max read request size.
> E.g. network driver r8169 uses a value of 4K.
>
> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
I'd prefer a subject line with more details, e.g.,
PCI: Add #defines for 2K and 4K Max Read Request Size
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
I suspect conflicts are more likely in r8169.c so it might make more
sense to route these through the netdev tree. I'd also be happy to
take them, so let me know if you want me to take them, David.
> ---
> include/uapi/linux/pci_regs.h | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
> index 0c79eac5..699257fb 100644
> --- a/include/uapi/linux/pci_regs.h
> +++ b/include/uapi/linux/pci_regs.h
> @@ -506,6 +506,8 @@
> #define PCI_EXP_DEVCTL_READRQ_256B 0x1000 /* 256 Bytes */
> #define PCI_EXP_DEVCTL_READRQ_512B 0x2000 /* 512 Bytes */
> #define PCI_EXP_DEVCTL_READRQ_1024B 0x3000 /* 1024 Bytes */
> +#define PCI_EXP_DEVCTL_READRQ_2048B 0x4000 /* 2048 Bytes */
> +#define PCI_EXP_DEVCTL_READRQ_4096B 0x5000 /* 4096 Bytes */
> #define PCI_EXP_DEVCTL_BCR_FLR 0x8000 /* Bridge Configuration Retry / FLR */
> #define PCI_EXP_DEVSTA 10 /* Device Status */
> #define PCI_EXP_DEVSTA_CED 0x0001 /* Correctable Error Detected */
> --
> 2.17.0
>
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH net-next 1/2] PCI: Add two more values for PCIe Max_Read_Request_Size
2018-04-16 21:42 ` Bjorn Helgaas
@ 2018-04-16 22:06 ` David Miller
0 siblings, 0 replies; 6+ messages in thread
From: David Miller @ 2018-04-16 22:06 UTC (permalink / raw)
To: helgaas; +Cc: hkallweit1, bhelgaas, nic_swsd, linux-pci, netdev
From: Bjorn Helgaas <helgaas@kernel.org>
Date: Mon, 16 Apr 2018 16:42:04 -0500
> On Mon, Apr 16, 2018 at 09:37:13PM +0200, Heiner Kallweit wrote:
>> This patch adds missing values for the max read request size.
>> E.g. network driver r8169 uses a value of 4K.
>>
>> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
>
> I'd prefer a subject line with more details, e.g.,
>
> PCI: Add #defines for 2K and 4K Max Read Request Size
>
> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
>
> I suspect conflicts are more likely in r8169.c so it might make more
> sense to route these through the netdev tree. I'd also be happy to
> take them, so let me know if you want me to take them, David.
I'll take them into net-next, thanks Bjorn.
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH net-next 0/2] PCI: add two more values for PCIe Max_Read_Request_Size and initially use them in r8169 network driver
2018-04-16 19:35 [PATCH net-next 0/2] PCI: add two more values for PCIe Max_Read_Request_Size and initially use them in r8169 network driver Heiner Kallweit
2018-04-16 19:37 ` [PATCH net-next 1/2] PCI: Add two more values for PCIe Max_Read_Request_Size Heiner Kallweit
2018-04-16 19:38 ` [PATCH net-next 2/2] r8169: replace magic numbers with PCI MRRS constant Heiner Kallweit
@ 2018-04-16 22:55 ` David Miller
2 siblings, 0 replies; 6+ messages in thread
From: David Miller @ 2018-04-16 22:55 UTC (permalink / raw)
To: hkallweit1; +Cc: bhelgaas, helgaas, nic_swsd, linux-pci, netdev
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 16 Apr 2018 21:35:42 +0200
> In r8169 network driver I stumbled across a magic number translating
> to PCI MRRS size 4K. The PCI core is still missing constants for
> values 2K and 4K (as defined in PCI standard).
>
> So let's add these two constants and use the 4K constant in r8169.
>
> Second patch depends on the first one, therefore both patches
> preferrably should go through either PCI or netdev tree.
Series applied, thank you.
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2018-04-16 22:55 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-04-16 19:35 [PATCH net-next 0/2] PCI: add two more values for PCIe Max_Read_Request_Size and initially use them in r8169 network driver Heiner Kallweit
2018-04-16 19:37 ` [PATCH net-next 1/2] PCI: Add two more values for PCIe Max_Read_Request_Size Heiner Kallweit
2018-04-16 21:42 ` Bjorn Helgaas
2018-04-16 22:06 ` David Miller
2018-04-16 19:38 ` [PATCH net-next 2/2] r8169: replace magic numbers with PCI MRRS constant Heiner Kallweit
2018-04-16 22:55 ` [PATCH net-next 0/2] PCI: add two more values for PCIe Max_Read_Request_Size and initially use them in r8169 network driver David Miller
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