[PATCH 1/8] drm/amdgpu: use the actual placement for pin accounting

[PATCH 1/8] drm/amdgpu: use the actual placement for pin accounting

[Christian König]

From: Christian König <christian.koenig@amd.com>

This allows us to specify multiple possible placements again.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index e527c16..76551cd 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -697,6 +697,8 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
 		}
 		*gpu_addr = amdgpu_bo_gpu_offset(bo);
 	}
+
+	domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
 	if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
 		adev->vram_pin_size += amdgpu_bo_size(bo);
 		if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
-- 
2.7.4

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[PATCH 2/8] drm/amdgpu: always bind pinned BOs

[Christian König]

From: Christian König <christian.koenig@amd.com>

We always need to bind pinned BOs, not just when the caller requested the
address.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 76551cd..0b76d83 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -688,15 +688,15 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
 		goto error;
 	}
 
+	r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem);
+	if (unlikely(r)) {
+		dev_err(adev->dev, "%p bind failed\n", bo);
+		goto error;
+	}
+
 	bo->pin_count = 1;
-	if (gpu_addr != NULL) {
-		r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem);
-		if (unlikely(r)) {
-			dev_err(adev->dev, "%p bind failed\n", bo);
-			goto error;
-		}
+	if (gpu_addr != NULL)
 		*gpu_addr = amdgpu_bo_gpu_offset(bo);
-	}
 
 	domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
 	if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
-- 
2.7.4

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[PATCH 3/8] drm/amdgpu: fix pin domain compatibility check

[Christian König]

From: Christian König <christian.koenig@amd.com>

We need to test if any domain fits, not all of them.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 0b76d83..65289de 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -647,7 +647,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
 	if (bo->pin_count) {
 		uint32_t mem_type = bo->tbo.mem.mem_type;
 
-		if (domain != amdgpu_mem_type_to_domain(mem_type))
+		if (!(domain & amdgpu_mem_type_to_domain(mem_type)))
 			return -EINVAL;
 
 		bo->pin_count++;
-- 
2.7.4

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[PATCH 4/8] drm/amdgpu: don't wait interruptible while binding GART space

[Christian König]

From: Christian König <christian.koenig@amd.com>

Display can't seem to handle this correctly.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index e5cab4b..3045701 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -913,7 +913,7 @@ int amdgpu_ttm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *bo_mem)
 	placements.flags = (bo->mem.placement & ~TTM_PL_MASK_MEM) |
 		TTM_PL_FLAG_TT;
 
-	r = ttm_bo_mem_space(bo, &placement, &tmp, true, false);
+	r = ttm_bo_mem_space(bo, &placement, &tmp, false, false);
 	if (unlikely(r))
 		return r;
 
-- 
2.7.4

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[PATCH 5/8] drm/amdgpu: don't use ttm_bo_move_ttm in amdgpu_ttm_bind

[Christian König]

From: Christian König <christian.koenig@amd.com>

Just unbind and rebind to force updates of the GART space.

This prevents forcing the BO to be idle.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 24 ++++++++++++++++++------
 1 file changed, 18 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 3045701..b40d2f3 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -917,14 +917,26 @@ int amdgpu_ttm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *bo_mem)
 	if (unlikely(r))
 		return r;
 
-	r = ttm_bo_move_ttm(bo, true, false, &tmp);
-	if (unlikely(r))
+	if (ttm->state == tt_bound) {
+		r = ttm->func->unbind(ttm);
+		if (unlikely(r))
+			return r;
+
+		ttm->state = tt_unbound;
+	}
+
+	r = ttm_tt_bind(ttm, &tmp);
+	if (unlikely(r)) {
 		ttm_bo_mem_put(bo, &tmp);
-	else
-		bo->offset = (bo->mem.start << PAGE_SHIFT) +
-			bo->bdev->man[bo->mem.mem_type].gpu_offset;
+		return r;
+	}
 
-	return r;
+	ttm_bo_mem_put(bo, bo_mem);
+	bo->mem = tmp;
+	bo->offset = (bo->mem.start << PAGE_SHIFT) +
+		bo->bdev->man[bo->mem.mem_type].gpu_offset;
+
+	return 0;
 }
 
 int amdgpu_ttm_recover_gart(struct amdgpu_device *adev)
-- 
2.7.4

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[PATCH 6/8] drm/amd/display: enable GPU VM support

[Christian König]

From: Christian König <christian.koenig@amd.com>

Just set the bit so that DC does the hardware programming.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 2188f20..ed4351a 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -417,6 +417,8 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
 
 	init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
 
+	init_data.flags.gpu_vm_support = true;
+
 	if (amdgpu_dc_log)
 		init_data.log_mask = DC_DEFAULT_LOG_MASK;
 	else
-- 
2.7.4

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[PATCH 7/8] drm/amdgpu: fix indentation in amdgpu_display.h

[Christian König]

From: Christian König <christian.koenig@amd.com>

That was somehow completely of.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
index 3cc0ef0..11ae4ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
@@ -25,9 +25,8 @@
 
 struct drm_framebuffer *
 amdgpu_user_framebuffer_create(struct drm_device *dev,
-						       struct drm_file *file_priv,
-							   const struct drm_mode_fb_cmd2 *mode_cmd);
-
+			       struct drm_file *file_priv,
+			       const struct drm_mode_fb_cmd2 *mode_cmd);
 void amdgpu_output_poll_changed(struct drm_device *dev);
 
 #endif
-- 
2.7.4

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[PATCH 8/8] drm/amdgpu: allow framebuffer in GART memory as well

[Christian König]

From: Christian König <christian.koenig@amd.com>

On CZ and newer APUs we can pin the fb into GART as well as VRAM.

Signed-off-by: Christian König <christian.koenig@amd.com>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.c       | 13 ++++++++++++-
 drivers/gpu/drm/amd/amdgpu/amdgpu_display.h       |  1 +
 drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c            | 10 ++++++----
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 13 ++++++++++---
 4 files changed, 29 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 6744e0c..71823f7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -29,6 +29,7 @@
 #include "amdgpu_i2c.h"
 #include "atom.h"
 #include "amdgpu_connectors.h"
+#include "amdgpu_display.h"
 #include <asm/div64.h>
 
 #include <linux/pm_runtime.h>
@@ -188,7 +189,7 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc *crtc,
 		goto cleanup;
 	}
 
-	r = amdgpu_bo_pin(new_abo, AMDGPU_GEM_DOMAIN_VRAM, &base);
+	r = amdgpu_bo_pin(new_abo, amdgpu_framebuffer_domains(adev), &base);
 	if (unlikely(r != 0)) {
 		DRM_ERROR("failed to pin new abo buffer before flip\n");
 		goto unreserve;
@@ -501,6 +502,16 @@ static const struct drm_framebuffer_funcs amdgpu_fb_funcs = {
 	.create_handle = amdgpu_user_framebuffer_create_handle,
 };
 
+uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev)
+{
+	uint32_t domain = AMDGPU_GEM_DOMAIN_VRAM;
+
+	if (adev->asic_type >= CHIP_CARRIZO && adev->flags & AMD_IS_APU)
+		domain |= AMDGPU_GEM_DOMAIN_GTT;
+
+	return domain;
+}
+
 int
 amdgpu_framebuffer_init(struct drm_device *dev,
 			struct amdgpu_framebuffer *rfb,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
index 11ae4ab..f241949 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
@@ -23,6 +23,7 @@
 #ifndef __AMDGPU_DISPLAY_H__
 #define __AMDGPU_DISPLAY_H__
 
+uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev);
 struct drm_framebuffer *
 amdgpu_user_framebuffer_create(struct drm_device *dev,
 			       struct drm_file *file_priv,
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
index 90fa8e8..9be3228 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
@@ -38,6 +38,8 @@
 
 #include <linux/vga_switcheroo.h>
 
+#include "amdgpu_display.h"
+
 /* object hierarchy -
    this contains a helper + a amdgpu fb
    the helper contains a pointer to amdgpu framebuffer baseclass.
@@ -124,7 +126,7 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
 	struct drm_gem_object *gobj = NULL;
 	struct amdgpu_bo *abo = NULL;
 	bool fb_tiled = false; /* useful for testing */
-	u32 tiling_flags = 0;
+	u32 tiling_flags = 0, domain;
 	int ret;
 	int aligned_size, size;
 	int height = mode_cmd->height;
@@ -135,12 +137,12 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
 	/* need to align pitch with crtc limits */
 	mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd->width, cpp,
 						  fb_tiled);
+	domain = amdgpu_framebuffer_domains(adev);
 
 	height = ALIGN(mode_cmd->height, 8);
 	size = mode_cmd->pitches[0] * height;
 	aligned_size = ALIGN(size, PAGE_SIZE);
-	ret = amdgpu_gem_object_create(adev, aligned_size, 0,
-				       AMDGPU_GEM_DOMAIN_VRAM,
+	ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain,
 				       AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
 				       AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
 				       AMDGPU_GEM_CREATE_VRAM_CLEARED,
@@ -166,7 +168,7 @@ static int amdgpufb_create_pinned_object(struct amdgpu_fbdev *rfbdev,
 	}
 
 
-	ret = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM, NULL);
+	ret = amdgpu_bo_pin(abo, domain, NULL);
 	if (ret) {
 		amdgpu_bo_unreserve(abo);
 		goto out_unref;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index ed4351a..f42804a 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2934,10 +2934,12 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane,
 {
 	struct amdgpu_framebuffer *afb;
 	struct drm_gem_object *obj;
+	struct amdgpu_device *adev;
 	struct amdgpu_bo *rbo;
-	int r;
 	struct dm_plane_state *dm_plane_state_new, *dm_plane_state_old;
 	unsigned int awidth;
+	uint32_t domain;
+	int r;
 
 	dm_plane_state_old = to_dm_plane_state(plane->state);
 	dm_plane_state_new = to_dm_plane_state(new_state);
@@ -2951,17 +2953,22 @@ static int dm_plane_helper_prepare_fb(struct drm_plane *plane,
 
 	obj = afb->obj;
 	rbo = gem_to_amdgpu_bo(obj);
+	adev = amdgpu_ttm_adev(rbo->tbo.bdev);
 	r = amdgpu_bo_reserve(rbo, false);
 	if (unlikely(r != 0))
 		return r;
 
-	r = amdgpu_bo_pin(rbo, AMDGPU_GEM_DOMAIN_VRAM, &afb->address);
 
+	if (plane->type != DRM_PLANE_TYPE_CURSOR)
+		domain = amdgpu_framebuffer_domains(adev);
+	else
+		domain = AMDGPU_GEM_DOMAIN_VRAM;
 
+	r = amdgpu_bo_pin(rbo, domain, &afb->address);
 	amdgpu_bo_unreserve(rbo);
 
 	if (unlikely(r != 0)) {
-		DRM_ERROR("Failed to pin framebuffer\n");
+		DRM_ERROR("Failed to pin framebuffer (%d)\n", r);
 		return r;
 	}
 
-- 
2.7.4

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RE: [PATCH 1/8] drm/amdgpu: use the actual placement for pin accounting

[Deucher, Alexander]

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 26, 2017 12:06 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 1/8] drm/amdgpu: use the actual placement for pin
> accounting
> 
> From: Christian König <christian.koenig@amd.com>
> 
> This allows us to specify multiple possible placements again.
> 
> Signed-off-by: Christian König <christian.koenig@amd.com>

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index e527c16..76551cd 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -697,6 +697,8 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo
> *bo, u32 domain,
>  		}
>  		*gpu_addr = amdgpu_bo_gpu_offset(bo);
>  	}
> +
> +	domain = amdgpu_mem_type_to_domain(bo-
> >tbo.mem.mem_type);
>  	if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
>  		adev->vram_pin_size += amdgpu_bo_size(bo);
>  		if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
> --
> 2.7.4
> 
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RE: [PATCH 2/8] drm/amdgpu: always bind pinned BOs

[Deucher, Alexander]

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 26, 2017 12:06 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 2/8] drm/amdgpu: always bind pinned BOs
> 
> From: Christian König <christian.koenig@amd.com>
> 
> We always need to bind pinned BOs, not just when the caller requested the
> address.
> 
> Signed-off-by: Christian König <christian.koenig@amd.com>

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

Should this go to stable as well?

Alex

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 14 +++++++-------
>  1 file changed, 7 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 76551cd..0b76d83 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -688,15 +688,15 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo
> *bo, u32 domain,
>  		goto error;
>  	}
> 
> +	r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem);
> +	if (unlikely(r)) {
> +		dev_err(adev->dev, "%p bind failed\n", bo);
> +		goto error;
> +	}
> +
>  	bo->pin_count = 1;
> -	if (gpu_addr != NULL) {
> -		r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem);
> -		if (unlikely(r)) {
> -			dev_err(adev->dev, "%p bind failed\n", bo);
> -			goto error;
> -		}
> +	if (gpu_addr != NULL)
>  		*gpu_addr = amdgpu_bo_gpu_offset(bo);
> -	}
> 
>  	domain = amdgpu_mem_type_to_domain(bo-
> >tbo.mem.mem_type);
>  	if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
> --
> 2.7.4
> 
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> amd-gfx@lists.freedesktop.org
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RE: [PATCH 3/8] drm/amdgpu: fix pin domain compatibility check

[Deucher, Alexander]

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 26, 2017 12:06 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 3/8] drm/amdgpu: fix pin domain compatibility check
> 
> From: Christian König <christian.koenig@amd.com>
> 
> We need to test if any domain fits, not all of them.
> 
> Signed-off-by: Christian König <christian.koenig@amd.com>

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> index 0b76d83..65289de 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
> @@ -647,7 +647,7 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo
> *bo, u32 domain,
>  	if (bo->pin_count) {
>  		uint32_t mem_type = bo->tbo.mem.mem_type;
> 
> -		if (domain != amdgpu_mem_type_to_domain(mem_type))
> +		if (!(domain &
> amdgpu_mem_type_to_domain(mem_type)))
>  			return -EINVAL;
> 
>  		bo->pin_count++;
> --
> 2.7.4
> 
> _______________________________________________
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> amd-gfx@lists.freedesktop.org
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RE: [PATCH 4/8] drm/amdgpu: don't wait interruptible while binding GART space

[Deucher, Alexander]

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 26, 2017 12:06 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 4/8] drm/amdgpu: don't wait interruptible while binding
> GART space
> 
> From: Christian König <christian.koenig@amd.com>
> 
> Display can't seem to handle this correctly.
> 
> Signed-off-by: Christian König <christian.koenig@amd.com>

Acked-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index e5cab4b..3045701 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -913,7 +913,7 @@ int amdgpu_ttm_bind(struct ttm_buffer_object *bo,
> struct ttm_mem_reg *bo_mem)
>  	placements.flags = (bo->mem.placement & ~TTM_PL_MASK_MEM)
> |
>  		TTM_PL_FLAG_TT;
> 
> -	r = ttm_bo_mem_space(bo, &placement, &tmp, true, false);
> +	r = ttm_bo_mem_space(bo, &placement, &tmp, false, false);
>  	if (unlikely(r))
>  		return r;
> 
> --
> 2.7.4
> 
> _______________________________________________
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RE: [PATCH 6/8] drm/amd/display: enable GPU VM support

[Deucher, Alexander]

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 26, 2017 12:06 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 6/8] drm/amd/display: enable GPU VM support
> 
> From: Christian König <christian.koenig@amd.com>
> 
> Just set the bit so that DC does the hardware programming.
> 
> Signed-off-by: Christian König <christian.koenig@amd.com>

Acked-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 2188f20..ed4351a 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -417,6 +417,8 @@ static int amdgpu_dm_init(struct amdgpu_device
> *adev)
> 
>  	init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
> 
> +	init_data.flags.gpu_vm_support = true;
> +
>  	if (amdgpu_dc_log)
>  		init_data.log_mask = DC_DEFAULT_LOG_MASK;
>  	else
> --
> 2.7.4
> 
> _______________________________________________
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> amd-gfx@lists.freedesktop.org
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RE: [PATCH 7/8] drm/amdgpu: fix indentation in amdgpu_display.h

[Deucher, Alexander]

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 26, 2017 12:06 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 7/8] drm/amdgpu: fix indentation in amdgpu_display.h
> 
> From: Christian König <christian.koenig@amd.com>
> 
> That was somehow completely of.
> 
> Signed-off-by: Christian König <christian.koenig@amd.com>

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_display.h | 5 ++---
>  1 file changed, 2 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
> index 3cc0ef0..11ae4ab 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
> @@ -25,9 +25,8 @@
> 
>  struct drm_framebuffer *
>  amdgpu_user_framebuffer_create(struct drm_device *dev,
> -						       struct drm_file *file_priv,
> -							   const struct
> drm_mode_fb_cmd2 *mode_cmd);
> -
> +			       struct drm_file *file_priv,
> +			       const struct drm_mode_fb_cmd2 *mode_cmd);
>  void amdgpu_output_poll_changed(struct drm_device *dev);
> 
>  #endif
> --
> 2.7.4
> 
> _______________________________________________
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RE: [PATCH 8/8] drm/amdgpu: allow framebuffer in GART memory as well

[Deucher, Alexander]

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 26, 2017 12:06 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 8/8] drm/amdgpu: allow framebuffer in GART memory as
> well
> 
> From: Christian König <christian.koenig@amd.com>
> 
> On CZ and newer APUs we can pin the fb into GART as well as VRAM.
> 
> Signed-off-by: Christian König <christian.koenig@amd.com>

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_display.c       | 13 ++++++++++++-
>  drivers/gpu/drm/amd/amdgpu/amdgpu_display.h       |  1 +
>  drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c            | 10 ++++++----
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 13
> ++++++++++---
>  4 files changed, 29 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> index 6744e0c..71823f7 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
> @@ -29,6 +29,7 @@
>  #include "amdgpu_i2c.h"
>  #include "atom.h"
>  #include "amdgpu_connectors.h"
> +#include "amdgpu_display.h"
>  #include <asm/div64.h>
> 
>  #include <linux/pm_runtime.h>
> @@ -188,7 +189,7 @@ int amdgpu_crtc_page_flip_target(struct drm_crtc
> *crtc,
>  		goto cleanup;
>  	}
> 
> -	r = amdgpu_bo_pin(new_abo, AMDGPU_GEM_DOMAIN_VRAM,
> &base);
> +	r = amdgpu_bo_pin(new_abo,
> amdgpu_framebuffer_domains(adev), &base);
>  	if (unlikely(r != 0)) {
>  		DRM_ERROR("failed to pin new abo buffer before flip\n");
>  		goto unreserve;
> @@ -501,6 +502,16 @@ static const struct drm_framebuffer_funcs
> amdgpu_fb_funcs = {
>  	.create_handle = amdgpu_user_framebuffer_create_handle,
>  };
> 
> +uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev)
> +{
> +	uint32_t domain = AMDGPU_GEM_DOMAIN_VRAM;
> +
> +	if (adev->asic_type >= CHIP_CARRIZO && adev->flags &
> AMD_IS_APU)
> +		domain |= AMDGPU_GEM_DOMAIN_GTT;
> +
> +	return domain;
> +}
> +
>  int
>  amdgpu_framebuffer_init(struct drm_device *dev,
>  			struct amdgpu_framebuffer *rfb,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
> index 11ae4ab..f241949 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.h
> @@ -23,6 +23,7 @@
>  #ifndef __AMDGPU_DISPLAY_H__
>  #define __AMDGPU_DISPLAY_H__
> 
> +uint32_t amdgpu_framebuffer_domains(struct amdgpu_device *adev);
>  struct drm_framebuffer *
>  amdgpu_user_framebuffer_create(struct drm_device *dev,
>  			       struct drm_file *file_priv,
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> index 90fa8e8..9be3228 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_fb.c
> @@ -38,6 +38,8 @@
> 
>  #include <linux/vga_switcheroo.h>
> 
> +#include "amdgpu_display.h"
> +
>  /* object hierarchy -
>     this contains a helper + a amdgpu fb
>     the helper contains a pointer to amdgpu framebuffer baseclass.
> @@ -124,7 +126,7 @@ static int amdgpufb_create_pinned_object(struct
> amdgpu_fbdev *rfbdev,
>  	struct drm_gem_object *gobj = NULL;
>  	struct amdgpu_bo *abo = NULL;
>  	bool fb_tiled = false; /* useful for testing */
> -	u32 tiling_flags = 0;
> +	u32 tiling_flags = 0, domain;
>  	int ret;
>  	int aligned_size, size;
>  	int height = mode_cmd->height;
> @@ -135,12 +137,12 @@ static int amdgpufb_create_pinned_object(struct
> amdgpu_fbdev *rfbdev,
>  	/* need to align pitch with crtc limits */
>  	mode_cmd->pitches[0] = amdgpu_align_pitch(adev, mode_cmd-
> >width, cpp,
>  						  fb_tiled);
> +	domain = amdgpu_framebuffer_domains(adev);
> 
>  	height = ALIGN(mode_cmd->height, 8);
>  	size = mode_cmd->pitches[0] * height;
>  	aligned_size = ALIGN(size, PAGE_SIZE);
> -	ret = amdgpu_gem_object_create(adev, aligned_size, 0,
> -				       AMDGPU_GEM_DOMAIN_VRAM,
> +	ret = amdgpu_gem_object_create(adev, aligned_size, 0, domain,
> 
> AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
> 
> AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS |
> 
> AMDGPU_GEM_CREATE_VRAM_CLEARED,
> @@ -166,7 +168,7 @@ static int amdgpufb_create_pinned_object(struct
> amdgpu_fbdev *rfbdev,
>  	}
> 
> 
> -	ret = amdgpu_bo_pin(abo, AMDGPU_GEM_DOMAIN_VRAM,
> NULL);
> +	ret = amdgpu_bo_pin(abo, domain, NULL);
>  	if (ret) {
>  		amdgpu_bo_unreserve(abo);
>  		goto out_unref;
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index ed4351a..f42804a 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -2934,10 +2934,12 @@ static int dm_plane_helper_prepare_fb(struct
> drm_plane *plane,
>  {
>  	struct amdgpu_framebuffer *afb;
>  	struct drm_gem_object *obj;
> +	struct amdgpu_device *adev;
>  	struct amdgpu_bo *rbo;
> -	int r;
>  	struct dm_plane_state *dm_plane_state_new,
> *dm_plane_state_old;
>  	unsigned int awidth;
> +	uint32_t domain;
> +	int r;
> 
>  	dm_plane_state_old = to_dm_plane_state(plane->state);
>  	dm_plane_state_new = to_dm_plane_state(new_state);
> @@ -2951,17 +2953,22 @@ static int dm_plane_helper_prepare_fb(struct
> drm_plane *plane,
> 
>  	obj = afb->obj;
>  	rbo = gem_to_amdgpu_bo(obj);
> +	adev = amdgpu_ttm_adev(rbo->tbo.bdev);
>  	r = amdgpu_bo_reserve(rbo, false);
>  	if (unlikely(r != 0))
>  		return r;
> 
> -	r = amdgpu_bo_pin(rbo, AMDGPU_GEM_DOMAIN_VRAM, &afb-
> >address);
> 
> +	if (plane->type != DRM_PLANE_TYPE_CURSOR)
> +		domain = amdgpu_framebuffer_domains(adev);
> +	else
> +		domain = AMDGPU_GEM_DOMAIN_VRAM;
> 
> +	r = amdgpu_bo_pin(rbo, domain, &afb->address);
>  	amdgpu_bo_unreserve(rbo);
> 
>  	if (unlikely(r != 0)) {
> -		DRM_ERROR("Failed to pin framebuffer\n");
> +		DRM_ERROR("Failed to pin framebuffer (%d)\n", r);
>  		return r;
>  	}
> 
> --
> 2.7.4
> 
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Re: [PATCH 6/8] drm/amd/display: enable GPU VM support

[Andrey Grodzovsky]

[-- Attachment #1.1: Type: text/plain, Size: 992 bytes --]

Reviewed-by: Andrey Grodzovsky<andrey.grodzovsky-5C7GfCeVMHo@public.gmane.org>


On 2017-10-26 12:06 PM, Christian König wrote:
> From: Christian König <christian.koenig-5C7GfCeVMHo@public.gmane.org>
>
> Just set the bit so that DC does the hardware programming.
>
> Signed-off-by: Christian König <christian.koenig-5C7GfCeVMHo@public.gmane.org>
> ---
>   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
>   1 file changed, 2 insertions(+)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 2188f20..ed4351a 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -417,6 +417,8 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
>   
>   	init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
>   
> +	init_data.flags.gpu_vm_support = true;
> +
>   	if (amdgpu_dc_log)
>   		init_data.log_mask = DC_DEFAULT_LOG_MASK;
>   	else


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[-- Attachment #2: Type: text/plain, Size: 154 bytes --]

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RE: [PATCH 5/8] drm/amdgpu: don't use ttm_bo_move_ttm in amdgpu_ttm_bind

[Deucher, Alexander]

> -----Original Message-----
> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
> Of Christian König
> Sent: Thursday, October 26, 2017 12:06 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH 5/8] drm/amdgpu: don't use ttm_bo_move_ttm in
> amdgpu_ttm_bind
> 
> From: Christian König <christian.koenig@amd.com>
> 
> Just unbind and rebind to force updates of the GART space.
> 
> This prevents forcing the BO to be idle.

Is there a chance something could change like the caching on a  rebind that we need to account for?

Alex

> 
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 24 ++++++++++++++++++-
> -----
>  1 file changed, 18 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> index 3045701..b40d2f3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> @@ -917,14 +917,26 @@ int amdgpu_ttm_bind(struct ttm_buffer_object
> *bo, struct ttm_mem_reg *bo_mem)
>  	if (unlikely(r))
>  		return r;
> 
> -	r = ttm_bo_move_ttm(bo, true, false, &tmp);
> -	if (unlikely(r))
> +	if (ttm->state == tt_bound) {
> +		r = ttm->func->unbind(ttm);
> +		if (unlikely(r))
> +			return r;
> +
> +		ttm->state = tt_unbound;
> +	}
> +
> +	r = ttm_tt_bind(ttm, &tmp);
> +	if (unlikely(r)) {
>  		ttm_bo_mem_put(bo, &tmp);
> -	else
> -		bo->offset = (bo->mem.start << PAGE_SHIFT) +
> -			bo->bdev->man[bo->mem.mem_type].gpu_offset;
> +		return r;
> +	}
> 
> -	return r;
> +	ttm_bo_mem_put(bo, bo_mem);
> +	bo->mem = tmp;
> +	bo->offset = (bo->mem.start << PAGE_SHIFT) +
> +		bo->bdev->man[bo->mem.mem_type].gpu_offset;
> +
> +	return 0;
>  }
> 
>  int amdgpu_ttm_recover_gart(struct amdgpu_device *adev)
> --
> 2.7.4
> 
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Re: [PATCH 5/8] drm/amdgpu: don't use ttm_bo_move_ttm in amdgpu_ttm_bind

[Christian König]

Am 26.10.2017 um 20:11 schrieb Deucher, Alexander:
>> -----Original Message-----
>> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
>> Of Christian König
>> Sent: Thursday, October 26, 2017 12:06 PM
>> To: amd-gfx@lists.freedesktop.org
>> Subject: [PATCH 5/8] drm/amdgpu: don't use ttm_bo_move_ttm in
>> amdgpu_ttm_bind
>>
>> From: Christian König <christian.koenig@amd.com>
>>
>> Just unbind and rebind to force updates of the GART space.
>>
>> This prevents forcing the BO to be idle.
> Is there a chance something could change like the caching on a  rebind that we need to account for?

Not that I could think of.

The new placement should have identical attributes to the old one, just 
with GART space allocated.

Christian.

>
> Alex
>
>> Signed-off-by: Christian König <christian.koenig@amd.com>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 24 ++++++++++++++++++-
>> -----
>>   1 file changed, 18 insertions(+), 6 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>> index 3045701..b40d2f3 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>> @@ -917,14 +917,26 @@ int amdgpu_ttm_bind(struct ttm_buffer_object
>> *bo, struct ttm_mem_reg *bo_mem)
>>   	if (unlikely(r))
>>   		return r;
>>
>> -	r = ttm_bo_move_ttm(bo, true, false, &tmp);
>> -	if (unlikely(r))
>> +	if (ttm->state == tt_bound) {
>> +		r = ttm->func->unbind(ttm);
>> +		if (unlikely(r))
>> +			return r;
>> +
>> +		ttm->state = tt_unbound;
>> +	}
>> +
>> +	r = ttm_tt_bind(ttm, &tmp);
>> +	if (unlikely(r)) {
>>   		ttm_bo_mem_put(bo, &tmp);
>> -	else
>> -		bo->offset = (bo->mem.start << PAGE_SHIFT) +
>> -			bo->bdev->man[bo->mem.mem_type].gpu_offset;
>> +		return r;
>> +	}
>>
>> -	return r;
>> +	ttm_bo_mem_put(bo, bo_mem);
>> +	bo->mem = tmp;
>> +	bo->offset = (bo->mem.start << PAGE_SHIFT) +
>> +		bo->bdev->man[bo->mem.mem_type].gpu_offset;
>> +
>> +	return 0;
>>   }
>>
>>   int amdgpu_ttm_recover_gart(struct amdgpu_device *adev)
>> --
>> 2.7.4
>>
>> _______________________________________________
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>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> _______________________________________________
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Re: [PATCH 2/8] drm/amdgpu: always bind pinned BOs

[Christian König]

Am 26.10.2017 um 19:55 schrieb Deucher, Alexander:
>> -----Original Message-----
>> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
>> Of Christian König
>> Sent: Thursday, October 26, 2017 12:06 PM
>> To: amd-gfx@lists.freedesktop.org
>> Subject: [PATCH 2/8] drm/amdgpu: always bind pinned BOs
>>
>> From: Christian König <christian.koenig@amd.com>
>>
>> We always need to bind pinned BOs, not just when the caller requested the
>> address.
>>
>> Signed-off-by: Christian König <christian.koenig@amd.com>
> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
>
> Should this go to stable as well?

Good question. As far as I can see it didn't made a difference so far 
cause all users of pinned GART BOs provided an address as well.

Just the framebuffer code doesn't do this and so I stumbled over it when 
allowing scanout from GART.

Christian.

>
> Alex
>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 14 +++++++-------
>>   1 file changed, 7 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> index 76551cd..0b76d83 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
>> @@ -688,15 +688,15 @@ int amdgpu_bo_pin_restricted(struct amdgpu_bo
>> *bo, u32 domain,
>>   		goto error;
>>   	}
>>
>> +	r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem);
>> +	if (unlikely(r)) {
>> +		dev_err(adev->dev, "%p bind failed\n", bo);
>> +		goto error;
>> +	}
>> +
>>   	bo->pin_count = 1;
>> -	if (gpu_addr != NULL) {
>> -		r = amdgpu_ttm_bind(&bo->tbo, &bo->tbo.mem);
>> -		if (unlikely(r)) {
>> -			dev_err(adev->dev, "%p bind failed\n", bo);
>> -			goto error;
>> -		}
>> +	if (gpu_addr != NULL)
>>   		*gpu_addr = amdgpu_bo_gpu_offset(bo);
>> -	}
>>
>>   	domain = amdgpu_mem_type_to_domain(bo-
>>> tbo.mem.mem_type);
>>   	if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
>> --
>> 2.7.4
>>
>> _______________________________________________
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>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> _______________________________________________
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Re: [PATCH 4/8] drm/amdgpu: don't wait interruptible while binding GART space

[Christian König]

Am 26.10.2017 um 19:56 schrieb Deucher, Alexander:
>> -----Original Message-----
>> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
>> Of Christian König
>> Sent: Thursday, October 26, 2017 12:06 PM
>> To: amd-gfx@lists.freedesktop.org
>> Subject: [PATCH 4/8] drm/amdgpu: don't wait interruptible while binding
>> GART space
>>
>> From: Christian König <christian.koenig@amd.com>
>>
>> Display can't seem to handle this correctly.
>>
>> Signed-off-by: Christian König <christian.koenig@amd.com>
> Acked-by: Alex Deucher <alexander.deucher@amd.com>

BTW: Harry & Andrey:

It is probably a good idea to actually wait interruptible here.

How problematic would it be for you guys to allow that?

The only negative effect I could find of hand is some error printing in 
the DC code.

Christian.

>
>> ---
>>   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>> index e5cab4b..3045701 100644
>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>> @@ -913,7 +913,7 @@ int amdgpu_ttm_bind(struct ttm_buffer_object *bo,
>> struct ttm_mem_reg *bo_mem)
>>   	placements.flags = (bo->mem.placement & ~TTM_PL_MASK_MEM)
>> |
>>   		TTM_PL_FLAG_TT;
>>
>> -	r = ttm_bo_mem_space(bo, &placement, &tmp, true, false);
>> +	r = ttm_bo_mem_space(bo, &placement, &tmp, false, false);
>>   	if (unlikely(r))
>>   		return r;
>>
>> --
>> 2.7.4
>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> _______________________________________________
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Re: [PATCH 4/8] drm/amdgpu: don't wait interruptible while binding GART space

[Andrey Grodzovsky]

On 2017-10-26 02:43 PM, Christian König wrote:
> Am 26.10.2017 um 19:56 schrieb Deucher, Alexander:
>>> -----Original Message-----
>>> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
>>> Of Christian König
>>> Sent: Thursday, October 26, 2017 12:06 PM
>>> To: amd-gfx@lists.freedesktop.org
>>> Subject: [PATCH 4/8] drm/amdgpu: don't wait interruptible while binding
>>> GART space
>>>
>>> From: Christian König <christian.koenig@amd.com>
>>>
>>> Display can't seem to handle this correctly.
>>>
>>> Signed-off-by: Christian König <christian.koenig@amd.com>
>> Acked-by: Alex Deucher <alexander.deucher@amd.com>
>
> BTW: Harry & Andrey:
>
> It is probably a good idea to actually wait interruptible here.
>
> How problematic would it be for you guys to allow that?
>
> The only negative effect I could find of hand is some error printing 
> in the DC code.

It shouldn't be an issue, as i trace this call i see it's gonna impact 
dm_plane_helper_prepare_fb through calling amdgpu_bo_pin,
so instead of treating any r != 0 as error we just should gracefully 
return for EINTR there w\o printing error.

Thanks,
Andrey

>
> Christian.
>
>>
>>> ---
>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +-
>>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>>
>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>> index e5cab4b..3045701 100644
>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>> @@ -913,7 +913,7 @@ int amdgpu_ttm_bind(struct ttm_buffer_object *bo,
>>> struct ttm_mem_reg *bo_mem)
>>>       placements.flags = (bo->mem.placement & ~TTM_PL_MASK_MEM)
>>> |
>>>           TTM_PL_FLAG_TT;
>>>
>>> -    r = ttm_bo_mem_space(bo, &placement, &tmp, true, false);
>>> +    r = ttm_bo_mem_space(bo, &placement, &tmp, false, false);
>>>       if (unlikely(r))
>>>           return r;
>>>
>>> -- 
>>> 2.7.4
>>>
>>> _______________________________________________
>>> amd-gfx mailing list
>>> amd-gfx@lists.freedesktop.org
>>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>
>

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Re: [PATCH 4/8] drm/amdgpu: don't wait interruptible while binding GART space

[Harry Wentland]

On 2017-10-26 02:56 PM, Andrey Grodzovsky wrote:
> 
> 
> On 2017-10-26 02:43 PM, Christian König wrote:
>> Am 26.10.2017 um 19:56 schrieb Deucher, Alexander:
>>>> -----Original Message-----
>>>> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On Behalf
>>>> Of Christian König
>>>> Sent: Thursday, October 26, 2017 12:06 PM
>>>> To: amd-gfx@lists.freedesktop.org
>>>> Subject: [PATCH 4/8] drm/amdgpu: don't wait interruptible while binding
>>>> GART space
>>>>
>>>> From: Christian König <christian.koenig@amd.com>
>>>>
>>>> Display can't seem to handle this correctly.
>>>>
>>>> Signed-off-by: Christian König <christian.koenig@amd.com>
>>> Acked-by: Alex Deucher <alexander.deucher@amd.com>
>>
>> BTW: Harry & Andrey:
>>
>> It is probably a good idea to actually wait interruptible here.
>>
>> How problematic would it be for you guys to allow that?
>>
>> The only negative effect I could find of hand is some error printing in the DC code.
> 
> It shouldn't be an issue, as i trace this call i see it's gonna impact dm_plane_helper_prepare_fb through calling amdgpu_bo_pin,
> so instead of treating any r != 0 as error we just should gracefully return for EINTR there w\o printing error.
> 

I tend to agree. It should already work. Just sent a patch, though, to not print an error on EINTR.

Harry

> Thanks,
> Andrey
> 
>>
>> Christian.
>>
>>>
>>>> ---
>>>>   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 2 +-
>>>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>>> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>>> index e5cab4b..3045701 100644
>>>> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>>> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
>>>> @@ -913,7 +913,7 @@ int amdgpu_ttm_bind(struct ttm_buffer_object *bo,
>>>> struct ttm_mem_reg *bo_mem)
>>>>       placements.flags = (bo->mem.placement & ~TTM_PL_MASK_MEM)
>>>> |
>>>>           TTM_PL_FLAG_TT;
>>>>
>>>> -    r = ttm_bo_mem_space(bo, &placement, &tmp, true, false);
>>>> +    r = ttm_bo_mem_space(bo, &placement, &tmp, false, false);
>>>>       if (unlikely(r))
>>>>           return r;
>>>>
>>>> -- 
>>>> 2.7.4
>>>>
>>>> _______________________________________________
>>>> amd-gfx mailing list
>>>> amd-gfx@lists.freedesktop.org
>>>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>>> _______________________________________________
>>> amd-gfx mailing list
>>> amd-gfx@lists.freedesktop.org
>>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>>
>>
> 
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RE: [PATCH 5/8] drm/amdgpu: don't use ttm_bo_move_ttm in amdgpu_ttm_bind

[Deucher, Alexander]

> -----Original Message-----
> From: Christian König [mailto:ckoenig.leichtzumerken@gmail.com]
> Sent: Thursday, October 26, 2017 2:39 PM
> To: Deucher, Alexander; 'Christian König'; amd-gfx@lists.freedesktop.org
> Subject: Re: [PATCH 5/8] drm/amdgpu: don't use ttm_bo_move_ttm in
> amdgpu_ttm_bind
> 
> Am 26.10.2017 um 20:11 schrieb Deucher, Alexander:
> >> -----Original Message-----
> >> From: amd-gfx [mailto:amd-gfx-bounces@lists.freedesktop.org] On
> Behalf
> >> Of Christian König
> >> Sent: Thursday, October 26, 2017 12:06 PM
> >> To: amd-gfx@lists.freedesktop.org
> >> Subject: [PATCH 5/8] drm/amdgpu: don't use ttm_bo_move_ttm in
> >> amdgpu_ttm_bind
> >>
> >> From: Christian König <christian.koenig@amd.com>
> >>
> >> Just unbind and rebind to force updates of the GART space.
> >>
> >> This prevents forcing the BO to be idle.
> > Is there a chance something could change like the caching on a  rebind that
> we need to account for?
> 
> Not that I could think of.
> 
> The new placement should have identical attributes to the old one, just
> with GART space allocated.

In that case,

Acked-by: Alex Deucher <alexander.deucher@amd.com>

> 
> Christian.
> 
> >
> > Alex
> >
> >> Signed-off-by: Christian König <christian.koenig@amd.com>
> >> ---
> >>   drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 24
> ++++++++++++++++++-
> >> -----
> >>   1 file changed, 18 insertions(+), 6 deletions(-)
> >>
> >> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> >> b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> >> index 3045701..b40d2f3 100644
> >> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> >> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
> >> @@ -917,14 +917,26 @@ int amdgpu_ttm_bind(struct ttm_buffer_object
> >> *bo, struct ttm_mem_reg *bo_mem)
> >>   	if (unlikely(r))
> >>   		return r;
> >>
> >> -	r = ttm_bo_move_ttm(bo, true, false, &tmp);
> >> -	if (unlikely(r))
> >> +	if (ttm->state == tt_bound) {
> >> +		r = ttm->func->unbind(ttm);
> >> +		if (unlikely(r))
> >> +			return r;
> >> +
> >> +		ttm->state = tt_unbound;
> >> +	}
> >> +
> >> +	r = ttm_tt_bind(ttm, &tmp);
> >> +	if (unlikely(r)) {
> >>   		ttm_bo_mem_put(bo, &tmp);
> >> -	else
> >> -		bo->offset = (bo->mem.start << PAGE_SHIFT) +
> >> -			bo->bdev->man[bo->mem.mem_type].gpu_offset;
> >> +		return r;
> >> +	}
> >>
> >> -	return r;
> >> +	ttm_bo_mem_put(bo, bo_mem);
> >> +	bo->mem = tmp;
> >> +	bo->offset = (bo->mem.start << PAGE_SHIFT) +
> >> +		bo->bdev->man[bo->mem.mem_type].gpu_offset;
> >> +
> >> +	return 0;
> >>   }
> >>
> >>   int amdgpu_ttm_recover_gart(struct amdgpu_device *adev)
> >> --
> >> 2.7.4
> >>
> >> _______________________________________________
> >> amd-gfx mailing list
> >> amd-gfx@lists.freedesktop.org
> >> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> > _______________________________________________
> > amd-gfx mailing list
> > amd-gfx@lists.freedesktop.org
> > https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> 

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Re: [PATCH 6/8] drm/amd/display: enable GPU VM support

[Harry Wentland]

On 2017-10-26 12:06 PM, Christian König wrote:
> From: Christian König <christian.koenig@amd.com>
> 
> Just set the bit so that DC does the hardware programming.
> 
> Signed-off-by: Christian König <christian.koenig@amd.com>
> ---
>  drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 2188f20..ed4351a 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -417,6 +417,8 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
>  
>  	init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
>  
> +	init_data.flags.gpu_vm_support = true;
> +

Hi Christian,

what ASIC has this been tested on?

I'm not sure that this won't break dGPU. dGPU doesn't have vm_support but I think DC will still try to write the same registers as for CZ on dGPU if we enable this. We at least need to make sure it doesn't blow up.

As for Raven we use this flag on Windows but only tested the case where VM is actually programmed. If VM isn't programmed it might still work but we'd need to give that a spin.

Harry

>  	if (amdgpu_dc_log)
>  		init_data.log_mask = DC_DEFAULT_LOG_MASK;
>  	else
> 
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Re: [PATCH 6/8] drm/amd/display: enable GPU VM support

[Christian König]

Am 27.10.2017 um 16:37 schrieb Harry Wentland:
> On 2017-10-26 12:06 PM, Christian König wrote:
>> From: Christian König <christian.koenig@amd.com>
>>
>> Just set the bit so that DC does the hardware programming.
>>
>> Signed-off-by: Christian König <christian.koenig@amd.com>
>> ---
>>   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
>>   1 file changed, 2 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> index 2188f20..ed4351a 100644
>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> @@ -417,6 +417,8 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
>>   
>>   	init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
>>   
>> +	init_data.flags.gpu_vm_support = true;
>> +
> Hi Christian,
>
> what ASIC has this been tested on?

Carizzo.

> I'm not sure that this won't break dGPU. dGPU doesn't have vm_support but I think DC will still try to write the same registers as for CZ on dGPU if we enable this. We at least need to make sure it doesn't blow up.

Yeah, as Tom already stumbled over as well it causes a warning on Tonga. 
Currently giving it a spin on Polaris.

> As for Raven we use this flag on Windows but only tested the case where VM is actually programmed. If VM isn't programmed it might still work but we'd need to give that a spin.

Without this flag tilling fails and only displays a quite unusual pattern.

I would actually prefer if we can completely remove this flag and 
instead always enable the VM programming on supported hardware.

Is there any downside on doing so?

Christian.

>
> Harry
>
>>   	if (amdgpu_dc_log)
>>   		init_data.log_mask = DC_DEFAULT_LOG_MASK;
>>   	else
>>
> _______________________________________________
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> amd-gfx@lists.freedesktop.org
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Re: [PATCH 6/8] drm/amd/display: enable GPU VM support

[Tom St Denis]

On 27/10/17 10:48 AM, Christian König wrote:
> Am 27.10.2017 um 16:37 schrieb Harry Wentland:
>> On 2017-10-26 12:06 PM, Christian König wrote:
>>> From: Christian König <christian.koenig@amd.com>
>>>
>>> Just set the bit so that DC does the hardware programming.
>>>
>>> Signed-off-by: Christian König <christian.koenig@amd.com>
>>> ---
>>>   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
>>>   1 file changed, 2 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c 
>>> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>> index 2188f20..ed4351a 100644
>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>> @@ -417,6 +417,8 @@ static int amdgpu_dm_init(struct amdgpu_device 
>>> *adev)
>>>       init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
>>> +    init_data.flags.gpu_vm_support = true;
>>> +
>> Hi Christian,
>>
>> what ASIC has this been tested on?
> 
> Carizzo.
> 
>> I'm not sure that this won't break dGPU. dGPU doesn't have vm_support 
>> but I think DC will still try to write the same registers as for CZ on 
>> dGPU if we enable this. We at least need to make sure it doesn't blow up.
> 
> Yeah, as Tom already stumbled over as well it causes a warning on Tonga. 
> Currently giving it a spin on Polaris.

I saw the warnings on my CZ+P10 setup but I didn't note which device was 
complaining.

And I'd like to think I journeyed into it on my meandering path of 
testing new commits on the hodgepodge of gear I have :-).

Tom

>> As for Raven we use this flag on Windows but only tested the case 
>> where VM is actually programmed. If VM isn't programmed it might still 
>> work but we'd need to give that a spin.
> 
> Without this flag tilling fails and only displays a quite unusual pattern.
> 
> I would actually prefer if we can completely remove this flag and 
> instead always enable the VM programming on supported hardware.
> 
> Is there any downside on doing so?
> 
> Christian.
> 
>>
>> Harry
>>
>>>       if (amdgpu_dc_log)
>>>           init_data.log_mask = DC_DEFAULT_LOG_MASK;
>>>       else
>>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> 
> 
> _______________________________________________
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> https://lists.freedesktop.org/mailman/listinfo/amd-gfx

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Re: [PATCH 6/8] drm/amd/display: enable GPU VM support

[Michel Dänzer]

On 27/10/17 04:48 PM, Christian König wrote:
> Am 27.10.2017 um 16:37 schrieb Harry Wentland:
>> On 2017-10-26 12:06 PM, Christian König wrote:
>>> From: Christian König <christian.koenig@amd.com>
>>>
>>> Just set the bit so that DC does the hardware programming.
>>>
>>> Signed-off-by: Christian König <christian.koenig@amd.com>
>>> ---
>>>   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
>>>   1 file changed, 2 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>> index 2188f20..ed4351a 100644
>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>> @@ -417,6 +417,8 @@ static int amdgpu_dm_init(struct amdgpu_device
>>> *adev)
>>>         init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
>>>   +    init_data.flags.gpu_vm_support = true;
>>> +
>> Hi Christian,
>>
>> what ASIC has this been tested on?
> 
> Carizzo.
> 
>> I'm not sure that this won't break dGPU. dGPU doesn't have vm_support
>> but I think DC will still try to write the same registers as for CZ on
>> dGPU if we enable this. We at least need to make sure it doesn't blow up.
> 
> Yeah, as Tom already stumbled over as well it causes a warning on Tonga.
> Currently giving it a spin on Polaris.
> 
>> As for Raven we use this flag on Windows but only tested the case
>> where VM is actually programmed. If VM isn't programmed it might still
>> work but we'd need to give that a spin.
> 
> Without this flag tilling fails and only displays a quite unusual pattern.
> 
> I would actually prefer if we can completely remove this flag and
> instead always enable the VM programming on supported hardware.
> 
> Is there any downside on doing so?

Is there a particular use-case for scanout from system memory with a
dGPU? Otherwise I suspect it's better not to bother, because the failure
mode might be pretty bad if the PCIe link can't keep up with scanout.


-- 
Earthling Michel Dänzer               |               http://www.amd.com
Libre software enthusiast             |             Mesa and X developer
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Re: [PATCH 6/8] drm/amd/display: enable GPU VM support

[Christian König]

Am 27.10.2017 um 16:58 schrieb Michel Dänzer:
> On 27/10/17 04:48 PM, Christian König wrote:
>> Am 27.10.2017 um 16:37 schrieb Harry Wentland:
>>> On 2017-10-26 12:06 PM, Christian König wrote:
>>>> From: Christian König <christian.koenig@amd.com>
>>>>
>>>> Just set the bit so that DC does the hardware programming.
>>>>
>>>> Signed-off-by: Christian König <christian.koenig@amd.com>
>>>> ---
>>>>    drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
>>>>    1 file changed, 2 insertions(+)
>>>>
>>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>>> b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>>> index 2188f20..ed4351a 100644
>>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>>> @@ -417,6 +417,8 @@ static int amdgpu_dm_init(struct amdgpu_device
>>>> *adev)
>>>>          init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
>>>>    +    init_data.flags.gpu_vm_support = true;
>>>> +
>>> Hi Christian,
>>>
>>> what ASIC has this been tested on?
>> Carizzo.
>>
>>> I'm not sure that this won't break dGPU. dGPU doesn't have vm_support
>>> but I think DC will still try to write the same registers as for CZ on
>>> dGPU if we enable this. We at least need to make sure it doesn't blow up.
>> Yeah, as Tom already stumbled over as well it causes a warning on Tonga.
>> Currently giving it a spin on Polaris.
>>
>>> As for Raven we use this flag on Windows but only tested the case
>>> where VM is actually programmed. If VM isn't programmed it might still
>>> work but we'd need to give that a spin.
>> Without this flag tilling fails and only displays a quite unusual pattern.
>>
>> I would actually prefer if we can completely remove this flag and
>> instead always enable the VM programming on supported hardware.
>>
>> Is there any downside on doing so?
> Is there a particular use-case for scanout from system memory with a
> dGPU? Otherwise I suspect it's better not to bother, because the failure
> mode might be pretty bad if the PCIe link can't keep up with scanout.

That's true and I actually didn't want to suggest that we scanout from 
system memory on dGPUs.

But setting up the tilling information in the DCE/DCN VM block anyway 
looks harmless to me.

And scanning out from scattered VRAM at some point still seems to make 
sense to me.

Regards,
Christian.
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Re: [PATCH 6/8] drm/amd/display: enable GPU VM support

[Harry Wentland]

On 2017-10-27 10:48 AM, Christian König wrote:
> Am 27.10.2017 um 16:37 schrieb Harry Wentland:
>> On 2017-10-26 12:06 PM, Christian König wrote:
>>> From: Christian König <christian.koenig@amd.com>
>>>
>>> Just set the bit so that DC does the hardware programming.
>>>
>>> Signed-off-by: Christian König <christian.koenig@amd.com>
>>> ---
>>>   drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
>>>   1 file changed, 2 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>> index 2188f20..ed4351a 100644
>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>> @@ -417,6 +417,8 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
>>>         init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
>>>   +    init_data.flags.gpu_vm_support = true;
>>> +
>> Hi Christian,
>>
>> what ASIC has this been tested on?
> 
> Carizzo.
> 
>> I'm not sure that this won't break dGPU. dGPU doesn't have vm_support but I think DC will still try to write the same registers as for CZ on dGPU if we enable this. We at least need to make sure it doesn't blow up.
> 
> Yeah, as Tom already stumbled over as well it causes a warning on Tonga. Currently giving it a spin on Polaris.
> 
>> As for Raven we use this flag on Windows but only tested the case where VM is actually programmed. If VM isn't programmed it might still work but we'd need to give that a spin.
> 
> Without this flag tilling fails and only displays a quite unusual pattern.
> 
> I would actually prefer if we can completely remove this flag and instead always enable the VM programming on supported hardware.
> 
> Is there any downside on doing so?
> 

The way this flag is currently used is for the base driver (amdgpu on Linux, kmd on Windows) to let us know whether VM is being used or not. The options are

1) amdgpu lets us know whether the framebuffer is in virtual memory or not
2) we assume amdgpu always uses virtual memory on ASICs that support it, set this flag to true (as in this patch) and make sure DC only programs it on ASICs that support it

I'd somewhat prefer option 2 as it's simpler from an amdgpu perspective and also keeps DC consistent.

Harry

> Christian.
> 
>>
>> Harry
>>
>>>       if (amdgpu_dc_log)
>>>           init_data.log_mask = DC_DEFAULT_LOG_MASK;
>>>       else
>>>
>> _______________________________________________
>> amd-gfx mailing list
>> amd-gfx@lists.freedesktop.org
>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
> 
> 
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Re: [PATCH 6/8] drm/amd/display: enable GPU VM support

[Christian König]

Am 27.10.2017 um 17:40 schrieb Harry Wentland:
> On 2017-10-27 10:48 AM, Christian König wrote:
>> Am 27.10.2017 um 16:37 schrieb Harry Wentland:
>>> On 2017-10-26 12:06 PM, Christian König wrote:
>>>> From: Christian König <christian.koenig@amd.com>
>>>>
>>>> Just set the bit so that DC does the hardware programming.
>>>>
>>>> Signed-off-by: Christian König <christian.koenig@amd.com>
>>>> ---
>>>>    drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 2 ++
>>>>    1 file changed, 2 insertions(+)
>>>>
>>>> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>>> index 2188f20..ed4351a 100644
>>>> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>>> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>>>> @@ -417,6 +417,8 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
>>>>          init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
>>>>    +    init_data.flags.gpu_vm_support = true;
>>>> +
>>> Hi Christian,
>>>
>>> what ASIC has this been tested on?
>> Carizzo.
>>
>>> I'm not sure that this won't break dGPU. dGPU doesn't have vm_support but I think DC will still try to write the same registers as for CZ on dGPU if we enable this. We at least need to make sure it doesn't blow up.
>> Yeah, as Tom already stumbled over as well it causes a warning on Tonga. Currently giving it a spin on Polaris.
>>
>>> As for Raven we use this flag on Windows but only tested the case where VM is actually programmed. If VM isn't programmed it might still work but we'd need to give that a spin.
>> Without this flag tilling fails and only displays a quite unusual pattern.
>>
>> I would actually prefer if we can completely remove this flag and instead always enable the VM programming on supported hardware.
>>
>> Is there any downside on doing so?
>>
> The way this flag is currently used is for the base driver (amdgpu on Linux, kmd on Windows) to let us know whether VM is being used or not. The options are
>
> 1) amdgpu lets us know whether the framebuffer is in virtual memory or not
> 2) we assume amdgpu always uses virtual memory on ASICs that support it, set this flag to true (as in this patch) and make sure DC only programs it on ASICs that support it
>
> I'd somewhat prefer option 2 as it's simpler from an amdgpu perspective and also keeps DC consistent.

I agree that option 2 sounds better. In this case please provide DC 
patches to fix the warning and clean things up.

BTW: I've also get a bunch of warning from the DRM core about things DC 
does. You're probably aware of those problem, but I just wanted to note 
once more that the backtraces in the log are kind of annoying.

Regards,
Christian.

>
> Harry
>
>> Christian.
>>
>>> Harry
>>>
>>>>        if (amdgpu_dc_log)
>>>>            init_data.log_mask = DC_DEFAULT_LOG_MASK;
>>>>        else
>>>>
>>> _______________________________________________
>>> amd-gfx mailing list
>>> amd-gfx@lists.freedesktop.org
>>> https://lists.freedesktop.org/mailman/listinfo/amd-gfx
>>
> _______________________________________________
> amd-gfx mailing list
> amd-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/amd-gfx


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