[igt-dev] [PATCH i-g-t 0/2] Add new test for Intermediate Link Rate feature

[igt-dev] [PATCH i-g-t 0/2] Add new test for Intermediate Link Rate feature

[Wayne Lin]

Create new tests for checking if ILR (Intermediate Link Rate) is working
on eDP displays. Tests validate ILR from 2 perspectives:

* Physically check if driver can successfully train link by the ILRs 
reported from DPCD of eDP panel

* Check if driver does use ILRs as the link rate options while doing 
link training. And also validate that the train result is bandwidth 
sufficient for the required resolution.

---

Wayne Lin (2):
  lib/igt_amd: correct the link_settings bug
  test/amdgpu: Add ilr test

 lib/igt_amd.c            | 114 +++++++++++++++-
 lib/igt_amd.h            |   8 ++
 tests/amdgpu/amd_ilr.c   | 275 +++++++++++++++++++++++++++++++++++++++
 tests/amdgpu/meson.build |   1 +
 4 files changed, 397 insertions(+), 1 deletion(-)
 create mode 100644 tests/amdgpu/amd_ilr.c

-- 
2.25.1

[igt-dev] [PATCH i-g-t 1/2] lib/igt_amd: correct the link_settings bug

[Wayne Lin]

[Why & How]
Link rate is shown as hexadecimal not decimal by the debugfs entry.
Correct the parameter from 10 to 16.

Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
---
 lib/igt_amd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/igt_amd.c b/lib/igt_amd.c
index 4bcfd594..92766a30 100644
--- a/lib/igt_amd.c
+++ b/lib/igt_amd.c
@@ -817,7 +817,7 @@ void igt_amd_read_link_settings(
 	{
 		strtok_r(token, ": ", &val_token);
 		lane_count[i] = strtol(val_token, &val_token, 10);
-		link_rate[i] = strtol(val_token, &val_token, 10);
+		link_rate[i] = strtol(val_token, &val_token, 16);
 		link_spread[i] = strtol(val_token, &val_token, 10);
 		i++;
 
-- 
2.25.1

[igt-dev] [PATCH i-g-t 2/2] test/amdgpu: Add ilr test

[Wayne Lin]

[Why & How]
Add new igt test amd_ilr for ilr fature

Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
---
 lib/igt_amd.c            | 112 ++++++++++++++++
 lib/igt_amd.h            |   8 ++
 tests/amdgpu/amd_ilr.c   | 275 +++++++++++++++++++++++++++++++++++++++
 tests/amdgpu/meson.build |   1 +
 4 files changed, 396 insertions(+)
 create mode 100644 tests/amdgpu/amd_ilr.c

diff --git a/lib/igt_amd.c b/lib/igt_amd.c
index 92766a30..b81fa948 100644
--- a/lib/igt_amd.c
+++ b/lib/igt_amd.c
@@ -892,3 +892,115 @@ bool igt_amd_output_has_link_settings(int drm_fd, char *connector_name)
 	close(fd);
 	return true;
 }
+
+/*
+ * igt_amd_read_ilr_setting:
+ * @drm_fd: DRM file descriptor
+ * @connector_name: The name of the connector to read the link_settings
+ * @supported_ilr: supported link rates
+ *
+ * The indices of @supported_ilr correspond to the supported customized
+ * link rates reported from DPCD 00010h ~ 0001Fh
+ */
+void igt_amd_read_ilr_setting(
+	int drm_fd, char *connector_name, int *supported_ilr)
+{
+	int fd, ret;
+	char buf[256] = {'\0'};
+	int i = 0;
+	char *token_end, *val_token, *tmp;
+
+	fd = igt_debugfs_connector_dir(drm_fd, connector_name, O_RDONLY);
+	if (fd < 0) {
+		igt_info("Could not open connector %s debugfs directory\n",
+			 connector_name);
+		return;
+	}
+	ret = igt_debugfs_simple_read(fd, DEBUGFS_DP_ILR_SETTING, buf, sizeof(buf));
+	igt_assert_f(ret >= 0, "Reading %s for connector %s failed.\n",
+		     DEBUGFS_DP_ILR_SETTING, connector_name);
+
+	close(fd);
+
+	tmp = strstr(buf, "not supported");
+	if (tmp) {
+		igt_info("Connector %s: eDP panel doesn't support ILR\n%s",
+			 connector_name, buf);
+		return;
+	}
+
+	/* Parse values read from file. */
+	for (char *token = strtok_r(buf, "\n", &token_end);
+	     token != NULL;
+	     token = strtok_r(NULL, "\n", &token_end))
+	{
+		strtok_r(token, "] ", &val_token);
+		supported_ilr[i] = strtol(val_token, &val_token, 10);
+		i++;
+
+		if (i > 7) return;
+	}
+}
+
+/*
+ * igt_amd_write_link_settings:
+ * @drm_fd: DRM file descriptor
+ * @connector_name: The name of the connector to write the link_settings
+ * @lane_count: Lane count
+ * @link_rate_set: Intermediate link rate
+ */
+void igt_amd_write_ilr_setting(
+	int drm_fd, char *connector_name, enum dc_lane_count lane_count,
+	uint8_t link_rate_set)
+{
+	int ls_fd, fd;
+	const int buf_len = 40;
+	char buf[buf_len];
+	int wr_len = 0;
+
+	memset(buf, '\0', sizeof(char) * buf_len);
+
+	fd = igt_debugfs_connector_dir(drm_fd, connector_name, O_RDONLY);
+	igt_assert(fd >= 0);
+	ls_fd = openat(fd, DEBUGFS_DP_ILR_SETTING, O_WRONLY);
+	close(fd);
+	igt_assert(ls_fd >= 0);
+
+	/* edp_ilr_write expects a \n at the end or else it will
+	 * dereference a null pointer.
+	 */
+	snprintf(buf, sizeof(buf), "%02x %02x \n", lane_count, link_rate_set);
+
+	wr_len = write(ls_fd, buf, strlen(buf));
+	igt_assert_eq(wr_len, strlen(buf));
+
+	close(ls_fd);
+}
+
+/**
+ * igt_amd_output_has_ilr_setting: check if connector has ilr_setting debugfs entry
+ * @drm_fd: DRM file descriptor
+ * @connector_name: The connector's name, on which we're reading the status
+ */
+bool igt_amd_output_has_ilr_setting(int drm_fd, char *connector_name)
+{
+	int fd;
+	int res;
+	struct stat stat;
+
+	fd = igt_debugfs_connector_dir(drm_fd, connector_name, O_RDONLY);
+	if (fd < 0) {
+		igt_info("output %s: debugfs not found\n", connector_name);
+		return false;
+	}
+
+	res = fstatat(fd, DEBUGFS_DP_ILR_SETTING, &stat, 0);
+	if (res != 0) {
+		igt_info("output %s: %s debugfs not supported\n", connector_name, DEBUGFS_DP_ILR_SETTING);
+		close(fd);
+		return false;
+	}
+
+	close(fd);
+	return true;
+}
diff --git a/lib/igt_amd.h b/lib/igt_amd.h
index 7a91cbff..1c99d331 100644
--- a/lib/igt_amd.h
+++ b/lib/igt_amd.h
@@ -42,6 +42,8 @@
 #define DEBUGFS_DP_LINK_SETTINGS "link_settings"
 #define DEBUGFS_HPD_TRIGGER "trigger_hotplug"
 
+#define DEBUGFS_DP_ILR_SETTING "ilr_setting"
+
 enum amd_dsc_clock_force {
 	DSC_AUTOMATIC = 0,
 	DSC_FORCE_ON,
@@ -126,5 +128,11 @@ void igt_amd_write_link_settings(
 	int drm_fd, char *connector_name, enum dc_lane_count lane_count,
 	enum dc_link_rate link_rate, enum dc_link_training_type training_type);
 bool igt_amd_output_has_link_settings(int drm_fd, char *connector_name);
+void igt_amd_read_ilr_setting(
+	int drm_fd, char *connector_name, int *supported_ilr);
+void igt_amd_write_ilr_setting(
+	int drm_fd, char *connector_name, enum dc_lane_count lane_count,
+	uint8_t link_rate_set);
+bool igt_amd_output_has_ilr_setting(int drm_fd, char *connector_name);
 
 #endif /* IGT_AMD_H */
diff --git a/tests/amdgpu/amd_ilr.c b/tests/amdgpu/amd_ilr.c
new file mode 100644
index 00000000..e3853254
--- /dev/null
+++ b/tests/amdgpu/amd_ilr.c
@@ -0,0 +1,275 @@
+/*
+ * Copyright 2022 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+#include "igt_amd.h"
+#include "igt_sysfs.h"
+#include <dirent.h>
+#include <fcntl.h>
+#include <limits.h>
+#include <sys/types.h>
+#include <sys/stat.h>
+
+typedef struct {
+	int drm_fd;
+	igt_display_t display;
+	igt_plane_t *primary;
+	igt_output_t *output;
+	igt_fb_t fb;
+	igt_pipe_t *pipe;
+	igt_pipe_crc_t *pipe_crc;
+	igt_crc_t crc_dprx;
+	enum pipe pipe_id;
+	int connector_type;
+	int supported_ilr[8];
+	int lane_count[4], link_rate[4], link_spread_spectrum[4];
+} data_t;
+
+enum sub_test {
+	ILR_LINK_TRAINING_CONFIGS,
+	ILR_POLICY
+};
+
+enum link_settings {
+	CURRENT,
+	VERIFIED,
+	REPORTED,
+	PREFERRED
+};
+
+static void test_fini(data_t *data)
+{
+	igt_pipe_crc_free(data->pipe_crc);
+	igt_display_reset(&data->display);
+}
+
+static void set_all_output_pipe_to_none(data_t *data)
+{
+	igt_output_t *output;
+
+	for_each_connected_output(&data->display, output) {
+		igt_output_set_pipe(output, PIPE_NONE);
+	}
+
+	igt_display_commit_atomic(&data->display, DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
+}
+
+static void test_init(data_t *data, igt_output_t *output)
+{
+	enum pipe pipe;
+
+	igt_require(output->config.connector->count_modes >= 1);
+
+	set_all_output_pipe_to_none(data);
+
+	for_each_pipe(&data->display, pipe) {
+		if (igt_pipe_connector_valid(pipe, output)) {
+			data->pipe_id = pipe;
+			break;
+		}
+	}
+
+	data->connector_type = output->config.connector->connector_type;
+
+	igt_require(data->pipe_id != PIPE_NONE);
+
+	data->pipe = &data->display.pipes[data->pipe_id];
+
+	data->pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe_id,
+					  AMDGPU_PIPE_CRC_SOURCE_DPRX);
+
+	igt_output_set_pipe(output, data->pipe_id);
+
+	data->primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
+}
+
+static void test_ilr_link_training_configs(data_t *data, igt_output_t *output)
+{
+	int reported_lc, idx;
+
+	reported_lc = data->lane_count[REPORTED];
+
+	/* If ILR is supported */
+	if (data->supported_ilr[0] != 0) {
+		for (idx = 0; idx < 8 && data->supported_ilr[idx] != 0; idx++) {
+			igt_amd_write_ilr_setting(data->drm_fd, output->name,
+				reported_lc, idx);
+			igt_info("Write training setting - lane count:%d, supported link rate idx:%d\n",
+				reported_lc, idx);
+
+			igt_amd_read_link_settings(data->drm_fd, output->name, data->lane_count,
+				   data->link_rate, data->link_spread_spectrum);
+			igt_info("Actual link result - lane count:%d, link rate:0x%02X\n",
+					data->lane_count[CURRENT], data->link_rate[CURRENT]);
+
+			/* Check lane count and link rate are trained at desired config*/
+			igt_assert(reported_lc == data->lane_count[CURRENT]);
+			igt_assert(data->supported_ilr[idx] == data->link_rate[CURRENT] * 270000);
+		}
+	}
+}
+
+static void test_ilr_policy(data_t *data, igt_output_t *output)
+{
+	drmModeConnector *connector;
+	drmModeModeInfo *mode;
+	int idx = 0, link_rate_set = 0;
+	int current_link_rate;
+	char *crc_str;
+
+	igt_info("Policy test on %s\n", output->name);
+
+	connector = output->config.connector;
+	for (idx = 0; idx < connector->count_modes; idx++) {
+		mode = &connector->modes[idx];
+		igt_info("[%d]: htotal:%d vtotal:%d vrefresh:%d clock:%d\n", idx, mode->hdisplay,
+		     mode->vdisplay, mode->vrefresh, mode->clock);
+
+		/* Set test pattern*/
+		igt_output_override_mode(output, mode);
+		igt_create_pattern_fb(data->drm_fd, mode->hdisplay,
+				      mode->vdisplay, DRM_FORMAT_XRGB8888,
+				      0, &data->fb);
+		igt_plane_set_fb(data->primary, &data->fb);
+		igt_display_commit_atomic(&data->display, DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
+
+		igt_amd_read_link_settings(data->drm_fd, output->name, data->lane_count,
+					   data->link_rate, data->link_spread_spectrum);
+
+		igt_info("link result - lane count:%d, link rate:0x%02X\n",
+					data->lane_count[CURRENT], data->link_rate[CURRENT]);
+
+		current_link_rate = data->link_rate[CURRENT] * 270000;
+
+		/* Get current link_rate_set index after link training*/
+		for (link_rate_set = 0; link_rate_set < sizeof(data->supported_ilr) &&
+		 data->supported_ilr[link_rate_set] != 0; link_rate_set++) {
+			if (data->supported_ilr[link_rate_set] == current_link_rate)
+				break;
+		}
+
+		/* Firstly check driver does use ILR link setting */
+		igt_assert(link_rate_set < sizeof(data->supported_ilr));
+		igt_assert(data->supported_ilr[link_rate_set] > 0);
+
+		/* Secondly check trained BW is sufficient.
+		 * If BW is insufficient, crc retrieving will timeout
+		 */
+		igt_wait_for_vblank_count(data->drm_fd,
+					data->pipe->crtc_offset, 10);
+
+		igt_pipe_crc_collect_crc(data->pipe_crc, &data->crc_dprx);
+		crc_str = igt_crc_to_string(&data->crc_dprx);
+		igt_info("DP_RX CRC: %s\n", crc_str);
+	}
+
+
+}
+
+static void test_flow(data_t *data, enum sub_test option)
+{
+	drmModeModeInfo *mode;
+	igt_output_t *output;
+
+	igt_enable_connectors(data->drm_fd);
+
+	for_each_connected_output(&data->display, output) {
+		if (!igt_amd_output_has_ilr_setting(data->drm_fd, output->name) ||
+			!igt_amd_output_has_link_settings(data->drm_fd, output->name)) {
+			igt_info("Skipping output: %s\n", output->name);
+			continue;
+		}
+
+		igt_info("Testing on output: %s\n", output->name);
+
+		/* Init only if display supports ilr link settings */
+		test_init(data, output);
+
+		mode = igt_output_get_mode(output);
+		igt_assert(mode);
+
+		/* Set test pattern*/
+		igt_create_pattern_fb(data->drm_fd, mode->hdisplay,
+				      mode->vdisplay, DRM_FORMAT_XRGB8888,
+				      0, &data->fb);
+		igt_plane_set_fb(data->primary, &data->fb);
+		igt_display_commit_atomic(&data->display, DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
+
+		/* Collect info of Reported Lane Count & ILR */
+		igt_amd_read_link_settings(data->drm_fd, output->name, data->lane_count,
+					   data->link_rate, data->link_spread_spectrum);
+		igt_amd_read_ilr_setting(data->drm_fd, output->name, data->supported_ilr);
+
+		switch (option) {
+			case ILR_LINK_TRAINING_CONFIGS:
+				test_ilr_link_training_configs(data, output);
+				break;
+			case ILR_POLICY:
+				test_ilr_policy(data, output);
+				break;
+			default:
+				break;
+		}
+
+		/* Reset preferred link settings*/
+		memset(data->supported_ilr, 0, sizeof(data->supported_ilr));
+		igt_amd_write_ilr_setting(data->drm_fd, output->name, 0, 0);
+
+		igt_remove_fb(data->drm_fd, &data->fb);
+
+		test_fini(data);
+	}
+
+}
+
+igt_main
+{
+	data_t data;
+	memset(&data, 0, sizeof(data));
+
+	igt_skip_on_simulation();
+
+	igt_fixture
+	{
+		data.drm_fd = drm_open_driver_master(DRIVER_AMDGPU);
+		if (data.drm_fd == -1)
+			igt_skip("Not an amdgpu driver.\n");
+
+		kmstest_set_vt_graphics_mode();
+
+		igt_display_require(&data.display, data.drm_fd);
+		igt_require(data.display.is_atomic);
+		igt_display_require_output(&data.display);
+	}
+
+	igt_describe("Test intermediate link rate (ILR) by phy and policy perspective");
+	igt_subtest("ilr-link-training-configs")
+		test_flow(&data, ILR_LINK_TRAINING_CONFIGS);
+	igt_subtest("ilr-policy")
+		test_flow(&data, ILR_POLICY);
+
+	igt_fixture
+	{
+		igt_display_fini(&data.display);
+	}
+}
+
diff --git a/tests/amdgpu/meson.build b/tests/amdgpu/meson.build
index 0ccbb36d..f4a0b9fd 100644
--- a/tests/amdgpu/meson.build
+++ b/tests/amdgpu/meson.build
@@ -20,6 +20,7 @@ if libdrm_amdgpu.found()
 			  'amd_dp_dsc',
 			  'amd_psr',
 			  'amd_plane',
+			  'amd_ilr',
 			]
 	amdgpu_deps += libdrm_amdgpu
 endif
-- 
2.25.1

[igt-dev] ✗ GitLab.Pipeline: warning for Add new test for Intermediate Link Rate feature

[Patchwork]

== Series Details ==

Series: Add new test for Intermediate Link Rate feature
URL   : https://patchwork.freedesktop.org/series/99084/
State : warning

== Summary ==

Pipeline status: FAILED.

see https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/488157 for the overview.

build:tests-debian-meson-armhf has failed (https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/jobs/17845364):
  section_start:1642669401:get_sources
  Getting source from Git repository
  $ eval "$CI_PRE_CLONE_SCRIPT"
  Fetching changes...
  Reinitialized existing Git repository in /builds/gfx-ci/igt-ci-tags/.git/
  Checking out 1c9586d8 as intel/IGTPW_6563...
  Removing build/
  Removing lib/i915/perf-configs/__pycache__/
  
  Skipping Git submodules setup
  section_end:1642669407:get_sources
  section_start:1642669407:step_script
  Executing "step_script" stage of the job script
  Using docker image sha256:4a4103f1a476d355d866b481ff96ac05a32a3a715cefcc1cbc1356a8959fb5f8 for registry.freedesktop.org/gfx-ci/igt-ci-tags/build-debian-armhf:commit-1c9586d8e94f09f322096f449ff7baa6042922a2 with digest registry.freedesktop.org/gfx-ci/igt-ci-tags/build-debian-armhf@sha256:3a0ffeb305cdc6ef081dde81d86afee76102e74f76c0f7bd5685fc2457ec707b ...
  section_end:1642669408:step_script
  section_start:1642669408:cleanup_file_variables
  Cleaning up file based variables
  section_end:1642669410:cleanup_file_variables
  ERROR: Job failed (system failure): Error response from daemon: layer does not exist (docker.go:647:1s)

== Logs ==

For more details see: https://gitlab.freedesktop.org/gfx-ci/igt-ci-tags/-/pipelines/488157

[igt-dev] ✓ Fi.CI.BAT: success for Add new test for Intermediate Link Rate feature

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 6598 bytes --]

== Series Details ==

Series: Add new test for Intermediate Link Rate feature
URL   : https://patchwork.freedesktop.org/series/99084/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11111 -> IGTPW_6563
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/index.html

Participating hosts (48 -> 40)
------------------------------

  Additional (1): fi-kbl-soraka 
  Missing    (9): shard-tglu bat-dg1-5 fi-icl-u2 fi-bsw-cyan fi-pnv-d510 fi-bsw-kefka shard-rkl shard-dg1 fi-bdw-samus 

Known issues
------------

  Here are the changes found in IGTPW_6563 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_cs_nop@sync-fork-compute0:
    - fi-snb-2600:        NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/fi-snb-2600/igt@amdgpu/amd_cs_nop@sync-fork-compute0.html

  * igt@gem_exec_fence@basic-busy@bcs0:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][2] ([fdo#109271]) +8 similar issues
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html

  * igt@gem_exec_suspend@basic-s3@smem:
    - fi-skl-6600u:       [PASS][3] -> [INCOMPLETE][4] ([i915#4547])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/fi-skl-6600u/igt@gem_exec_suspend@basic-s3@smem.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/fi-skl-6600u/igt@gem_exec_suspend@basic-s3@smem.html
    - fi-tgl-1115g4:      [PASS][5] -> [FAIL][6] ([i915#1888])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s3@smem.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/fi-tgl-1115g4/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@gem_huc_copy@huc-copy:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#2190])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@parallel-random-engines:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][8] ([fdo#109271] / [i915#4613]) +3 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/fi-kbl-soraka/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@i915_selftest@live@execlists:
    - fi-bsw-nick:        [PASS][9] -> [INCOMPLETE][10] ([i915#2940])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/fi-bsw-nick/igt@i915_selftest@live@execlists.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/fi-bsw-nick/igt@i915_selftest@live@execlists.html

  * igt@i915_selftest@live@gt_pm:
    - fi-kbl-soraka:      NOTRUN -> [DMESG-FAIL][11] ([i915#1886] / [i915#2291])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@hangcheck:
    - bat-dg1-6:          [PASS][12] -> [DMESG-FAIL][13] ([i915#4494])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/bat-dg1-6/igt@i915_selftest@live@hangcheck.html

  * igt@kms_chamelium@dp-edid-read:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][14] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/fi-kbl-soraka/igt@kms_chamelium@dp-edid-read.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][15] ([fdo#109271] / [i915#533])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@runner@aborted:
    - fi-bsw-nick:        NOTRUN -> [FAIL][16] ([fdo#109271] / [i915#1436] / [i915#3428] / [i915#4312])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/fi-bsw-nick/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@hangcheck:
    - fi-snb-2600:        [INCOMPLETE][17] ([i915#3921]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/fi-snb-2600/igt@i915_selftest@live@hangcheck.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-cml-u2:          [DMESG-WARN][19] ([i915#4269]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
  [i915#2940]: https://gitlab.freedesktop.org/drm/intel/issues/2940
  [i915#3428]: https://gitlab.freedesktop.org/drm/intel/issues/3428
  [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
  [i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
  [i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4897]: https://gitlab.freedesktop.org/drm/intel/issues/4897
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_6329 -> IGTPW_6563

  CI-20190529: 20190529
  CI_DRM_11111: fe44f8bdb12374a6168cb561834eb714097f5e5f @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_6563: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/index.html
  IGT_6329: 38f656fdd61119105ecfa2c4dac157cd7dcad204 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git



== Testlist changes ==

+igt@amdgpu/amd_ilr@ilr-link-training-configs
+igt@amdgpu/amd_ilr@ilr-policy

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/index.html

[-- Attachment #2: Type: text/html, Size: 7880 bytes --]

[igt-dev] ✗ Fi.CI.IGT: failure for Add new test for Intermediate Link Rate feature

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 30265 bytes --]

== Series Details ==

Series: Add new test for Intermediate Link Rate feature
URL   : https://patchwork.freedesktop.org/series/99084/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11111_full -> IGTPW_6563_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with IGTPW_6563_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in IGTPW_6563_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/index.html

Participating hosts (10 -> 7)
------------------------------

  Missing    (3): pig-skl-6260u pig-kbl-iris pig-glk-j5005 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_6563_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gen9_exec_parse@bb-large:
    - shard-apl:          [PASS][1] -> [TIMEOUT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-apl1/igt@gen9_exec_parse@bb-large.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-apl4/igt@gen9_exec_parse@bb-large.html

  
Known issues
------------

  Here are the changes found in IGTPW_6563_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_create@create-massive:
    - shard-tglb:         NOTRUN -> [DMESG-WARN][3] ([i915#3002] / [i915#4856])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb8/igt@gem_create@create-massive.html

  * igt@gem_ctx_persistence@process:
    - shard-snb:          NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#1099]) +2 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-snb2/igt@gem_ctx_persistence@process.html

  * igt@gem_eio@kms:
    - shard-tglb:         [PASS][5] -> [FAIL][6] ([i915#232])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-tglb6/igt@gem_eio@kms.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb5/igt@gem_eio@kms.html

  * igt@gem_exec_balancer@parallel-contexts:
    - shard-iclb:         [PASS][7] -> [SKIP][8] ([i915#4525])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-iclb4/igt@gem_exec_balancer@parallel-contexts.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb6/igt@gem_exec_balancer@parallel-contexts.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-kbl:          NOTRUN -> [FAIL][9] ([i915#2846])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl1/igt@gem_exec_fair@basic-deadline.html
    - shard-apl:          NOTRUN -> [FAIL][10] ([i915#2846])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-apl8/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-glk:          [PASS][11] -> [FAIL][12] ([i915#2842])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-glk6/igt@gem_exec_fair@basic-none-share@rcs0.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-glk7/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-kbl:          [PASS][13] -> [FAIL][14] ([i915#2842])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-kbl3/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl4/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-iclb:         NOTRUN -> [FAIL][15] ([i915#2842]) +1 similar issue
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb1/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_exec_params@secure-non-root:
    - shard-tglb:         NOTRUN -> [SKIP][16] ([fdo#112283])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb1/igt@gem_exec_params@secure-non-root.html
    - shard-iclb:         NOTRUN -> [SKIP][17] ([fdo#112283])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb8/igt@gem_exec_params@secure-non-root.html

  * igt@gem_exec_whisper@basic-fds-forked-all:
    - shard-glk:          [PASS][18] -> [DMESG-WARN][19] ([i915#118])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-glk4/igt@gem_exec_whisper@basic-fds-forked-all.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-glk1/igt@gem_exec_whisper@basic-fds-forked-all.html

  * igt@gem_lmem_swapping@parallel-random-engines:
    - shard-apl:          NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#4613]) +1 similar issue
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-apl8/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@gem_lmem_swapping@parallel-random-verify:
    - shard-kbl:          NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#4613]) +1 similar issue
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl4/igt@gem_lmem_swapping@parallel-random-verify.html

  * igt@gem_pxp@reject-modify-context-protection-off-3:
    - shard-iclb:         NOTRUN -> [SKIP][22] ([i915#4270])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb8/igt@gem_pxp@reject-modify-context-protection-off-3.html
    - shard-tglb:         NOTRUN -> [SKIP][23] ([i915#4270])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb3/igt@gem_pxp@reject-modify-context-protection-off-3.html

  * igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs:
    - shard-iclb:         NOTRUN -> [SKIP][24] ([i915#768])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb2/igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-apl:          [PASS][25] -> [DMESG-WARN][26] ([i915#1436] / [i915#716])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-apl2/igt@gen9_exec_parse@allowed-all.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-apl1/igt@gen9_exec_parse@allowed-all.html

  * igt@gen9_exec_parse@secure-batches:
    - shard-iclb:         NOTRUN -> [SKIP][27] ([i915#2856]) +1 similar issue
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb6/igt@gen9_exec_parse@secure-batches.html
    - shard-tglb:         NOTRUN -> [SKIP][28] ([i915#2527] / [i915#2856]) +1 similar issue
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb6/igt@gen9_exec_parse@secure-batches.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-tglb:         NOTRUN -> [FAIL][29] ([i915#454])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb1/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_query@query-topology-unsupported:
    - shard-iclb:         NOTRUN -> [SKIP][30] ([fdo#109302])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb3/igt@i915_query@query-topology-unsupported.html
    - shard-tglb:         NOTRUN -> [SKIP][31] ([fdo#109302])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb5/igt@i915_query@query-topology-unsupported.html

  * igt@kms_async_flips@alternate-sync-async-flip:
    - shard-snb:          [PASS][32] -> [FAIL][33] ([i915#2521])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-snb7/igt@kms_async_flips@alternate-sync-async-flip.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-snb7/igt@kms_async_flips@alternate-sync-async-flip.html

  * igt@kms_big_fb@linear-8bpp-rotate-90:
    - shard-glk:          NOTRUN -> [SKIP][34] ([fdo#109271]) +38 similar issues
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-glk5/igt@kms_big_fb@linear-8bpp-rotate-90.html
    - shard-tglb:         NOTRUN -> [SKIP][35] ([fdo#111614]) +3 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb1/igt@kms_big_fb@linear-8bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-kbl:          NOTRUN -> [SKIP][36] ([fdo#109271] / [i915#3777]) +3 similar issues
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl1/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@y-tiled-64bpp-rotate-90:
    - shard-iclb:         NOTRUN -> [SKIP][37] ([fdo#110725] / [fdo#111614]) +1 similar issue
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb8/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-apl:          NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3777]) +1 similar issue
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-apl1/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-180:
    - shard-tglb:         NOTRUN -> [SKIP][39] ([fdo#111615])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb3/igt@kms_big_fb@yf-tiled-8bpp-rotate-180.html
    - shard-iclb:         NOTRUN -> [SKIP][40] ([fdo#110723])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb8/igt@kms_big_fb@yf-tiled-8bpp-rotate-180.html

  * igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
    - shard-glk:          NOTRUN -> [SKIP][41] ([fdo#109271] / [i915#3886]) +2 similar issues
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-glk1/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs:
    - shard-iclb:         NOTRUN -> [SKIP][42] ([fdo#109278] / [i915#3886]) +3 similar issues
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb6/igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-bad-rotation-90-yf_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][43] ([fdo#111615] / [i915#3689]) +3 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb8/igt@kms_ccs@pipe-b-bad-rotation-90-yf_tiled_ccs.html

  * igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc:
    - shard-apl:          NOTRUN -> [SKIP][44] ([fdo#109271] / [i915#3886]) +6 similar issues
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-apl3/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
    - shard-kbl:          NOTRUN -> [SKIP][45] ([fdo#109271] / [i915#3886]) +12 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl6/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][46] ([i915#3689])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb1/igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_ccs.html

  * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][47] ([i915#3689] / [i915#3886]) +3 similar issues
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb1/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_chamelium@dp-mode-timings:
    - shard-apl:          NOTRUN -> [SKIP][48] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-apl4/igt@kms_chamelium@dp-mode-timings.html

  * igt@kms_color@pipe-d-ctm-blue-to-red:
    - shard-iclb:         NOTRUN -> [SKIP][49] ([fdo#109278] / [i915#1149])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb5/igt@kms_color@pipe-d-ctm-blue-to-red.html

  * igt@kms_color_chamelium@pipe-a-ctm-0-25:
    - shard-snb:          NOTRUN -> [SKIP][50] ([fdo#109271] / [fdo#111827]) +3 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-snb6/igt@kms_color_chamelium@pipe-a-ctm-0-25.html

  * igt@kms_color_chamelium@pipe-a-ctm-blue-to-red:
    - shard-kbl:          NOTRUN -> [SKIP][51] ([fdo#109271] / [fdo#111827]) +16 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl4/igt@kms_color_chamelium@pipe-a-ctm-blue-to-red.html

  * igt@kms_color_chamelium@pipe-a-ctm-red-to-blue:
    - shard-iclb:         NOTRUN -> [SKIP][52] ([fdo#109284] / [fdo#111827]) +6 similar issues
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb5/igt@kms_color_chamelium@pipe-a-ctm-red-to-blue.html

  * igt@kms_color_chamelium@pipe-d-ctm-limited-range:
    - shard-iclb:         NOTRUN -> [SKIP][53] ([fdo#109278] / [fdo#109284] / [fdo#111827])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb2/igt@kms_color_chamelium@pipe-d-ctm-limited-range.html

  * igt@kms_color_chamelium@pipe-d-degamma:
    - shard-glk:          NOTRUN -> [SKIP][54] ([fdo#109271] / [fdo#111827]) +3 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-glk5/igt@kms_color_chamelium@pipe-d-degamma.html
    - shard-tglb:         NOTRUN -> [SKIP][55] ([fdo#109284] / [fdo#111827]) +8 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb1/igt@kms_color_chamelium@pipe-d-degamma.html

  * igt@kms_content_protection@type1:
    - shard-iclb:         NOTRUN -> [SKIP][56] ([fdo#109300] / [fdo#111066])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb7/igt@kms_content_protection@type1.html

  * igt@kms_cursor_crc@pipe-a-cursor-512x512-random:
    - shard-iclb:         NOTRUN -> [SKIP][57] ([fdo#109278] / [fdo#109279])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb7/igt@kms_cursor_crc@pipe-a-cursor-512x512-random.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          NOTRUN -> [DMESG-WARN][58] ([i915#180]) +1 similar issue
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-c-cursor-max-size-offscreen:
    - shard-tglb:         NOTRUN -> [SKIP][59] ([i915#3359]) +2 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb7/igt@kms_cursor_crc@pipe-c-cursor-max-size-offscreen.html

  * igt@kms_cursor_crc@pipe-d-cursor-512x512-sliding:
    - shard-tglb:         NOTRUN -> [SKIP][60] ([fdo#109279] / [i915#3359]) +3 similar issues
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb3/igt@kms_cursor_crc@pipe-d-cursor-512x512-sliding.html

  * igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge:
    - shard-snb:          NOTRUN -> [SKIP][61] ([fdo#109271]) +90 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-snb4/igt@kms_cursor_edge_walk@pipe-d-128x128-right-edge.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic:
    - shard-iclb:         NOTRUN -> [SKIP][62] ([fdo#109274] / [fdo#109278])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb4/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-iclb:         [PASS][63] -> [FAIL][64] ([i915#2346])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-iclb1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@pipe-d-single-move:
    - shard-iclb:         NOTRUN -> [SKIP][65] ([fdo#109278]) +15 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb5/igt@kms_cursor_legacy@pipe-d-single-move.html

  * igt@kms_flip@2x-plain-flip-fb-recreate:
    - shard-tglb:         NOTRUN -> [SKIP][66] ([fdo#109274] / [fdo#111825]) +4 similar issues
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb6/igt@kms_flip@2x-plain-flip-fb-recreate.html
    - shard-iclb:         NOTRUN -> [SKIP][67] ([fdo#109274]) +1 similar issue
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb6/igt@kms_flip@2x-plain-flip-fb-recreate.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a1:
    - shard-glk:          [PASS][68] -> [FAIL][69] ([i915#79]) +1 similar issue
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-glk8/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a1.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-glk8/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
    - shard-kbl:          [PASS][70] -> [DMESG-WARN][71] ([i915#180]) +2 similar issues
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
    - shard-apl:          [PASS][72] -> [DMESG-WARN][73] ([i915#180]) +4 similar issues
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling:
    - shard-iclb:         NOTRUN -> [SKIP][74] ([i915#2587])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-downscaling.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render:
    - shard-tglb:         NOTRUN -> [SKIP][75] ([fdo#109280] / [fdo#111825]) +14 similar issues
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-iclb:         NOTRUN -> [SKIP][76] ([fdo#109280]) +10 similar issues
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb2/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc:
    - shard-kbl:          NOTRUN -> [SKIP][77] ([fdo#109271]) +223 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl7/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc.html

  * igt@kms_hdmi_inject@inject-audio:
    - shard-tglb:         [PASS][78] -> [SKIP][79] ([i915#433])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-tglb7/igt@kms_hdmi_inject@inject-audio.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb8/igt@kms_hdmi_inject@inject-audio.html

  * igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
    - shard-glk:          NOTRUN -> [FAIL][80] ([fdo#108145] / [i915#265])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-glk3/igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb.html
    - shard-kbl:          NOTRUN -> [FAIL][81] ([fdo#108145] / [i915#265])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl1/igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb:
    - shard-kbl:          NOTRUN -> [FAIL][82] ([i915#265])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl7/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
    - shard-apl:          NOTRUN -> [FAIL][83] ([fdo#108145] / [i915#265])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-apl1/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html

  * igt@kms_plane_lowres@pipe-d-tiling-yf:
    - shard-tglb:         NOTRUN -> [SKIP][84] ([fdo#111615] / [fdo#112054])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb5/igt@kms_plane_lowres@pipe-d-tiling-yf.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area:
    - shard-apl:          NOTRUN -> [SKIP][85] ([fdo#109271] / [i915#658])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-apl1/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
    - shard-iclb:         NOTRUN -> [SKIP][86] ([fdo#111068] / [i915#658])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb3/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
    - shard-tglb:         NOTRUN -> [SKIP][87] ([i915#2920])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb5/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
    - shard-glk:          NOTRUN -> [SKIP][88] ([fdo#109271] / [i915#658])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-glk1/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area:
    - shard-kbl:          NOTRUN -> [SKIP][89] ([fdo#109271] / [i915#658]) +1 similar issue
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl1/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html

  * igt@kms_psr@psr2_cursor_plane_move:
    - shard-iclb:         [PASS][90] -> [SKIP][91] ([fdo#109441]) +2 similar issues
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-iclb2/igt@kms_psr@psr2_cursor_plane_move.html
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb5/igt@kms_psr@psr2_cursor_plane_move.html

  * igt@kms_psr@psr2_dpms:
    - shard-iclb:         NOTRUN -> [SKIP][92] ([fdo#109441])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb4/igt@kms_psr@psr2_dpms.html

  * igt@kms_vblank@pipe-d-wait-idle:
    - shard-kbl:          NOTRUN -> [SKIP][93] ([fdo#109271] / [i915#533]) +1 similar issue
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl6/igt@kms_vblank@pipe-d-wait-idle.html

  * igt@kms_writeback@writeback-check-output:
    - shard-apl:          NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#2437]) +2 similar issues
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-apl3/igt@kms_writeback@writeback-check-output.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-glk:          NOTRUN -> [SKIP][95] ([fdo#109271] / [i915#2437])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-glk1/igt@kms_writeback@writeback-fb-id.html
    - shard-tglb:         NOTRUN -> [SKIP][96] ([i915#2437])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb8/igt@kms_writeback@writeback-fb-id.html
    - shard-iclb:         NOTRUN -> [SKIP][97] ([i915#2437])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb7/igt@kms_writeback@writeback-fb-id.html

  * igt@kms_writeback@writeback-pixel-formats:
    - shard-kbl:          NOTRUN -> [SKIP][98] ([fdo#109271] / [i915#2437]) +2 similar issues
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl6/igt@kms_writeback@writeback-pixel-formats.html

  * igt@nouveau_crc@pipe-c-source-outp-inactive:
    - shard-tglb:         NOTRUN -> [SKIP][99] ([i915#2530])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb7/igt@nouveau_crc@pipe-c-source-outp-inactive.html
    - shard-iclb:         NOTRUN -> [SKIP][100] ([i915#2530])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb2/igt@nouveau_crc@pipe-c-source-outp-inactive.html

  * igt@perf@gen12-unprivileged-single-ctx-counters:
    - shard-iclb:         NOTRUN -> [SKIP][101] ([fdo#109289])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb2/igt@perf@gen12-unprivileged-single-ctx-counters.html

  * igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name:
    - shard-apl:          NOTRUN -> [SKIP][102] ([fdo#109271]) +122 similar issues
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-apl8/igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name.html
    - shard-tglb:         NOTRUN -> [SKIP][103] ([fdo#109291])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb7/igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name.html
    - shard-iclb:         NOTRUN -> [SKIP][104] ([fdo#109291]) +1 similar issue
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb3/igt@prime_nv_api@i915_nv_reimport_twice_check_flink_name.html

  * igt@sysfs_clients@busy:
    - shard-apl:          NOTRUN -> [SKIP][105] ([fdo#109271] / [i915#2994]) +1 similar issue
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-apl1/igt@sysfs_clients@busy.html

  * igt@sysfs_clients@sema-25:
    - shard-iclb:         NOTRUN -> [SKIP][106] ([i915#2994])
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb5/igt@sysfs_clients@sema-25.html
    - shard-kbl:          NOTRUN -> [SKIP][107] ([fdo#109271] / [i915#2994]) +1 similar issue
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl6/igt@sysfs_clients@sema-25.html
    - shard-tglb:         NOTRUN -> [SKIP][108] ([i915#2994])
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb2/igt@sysfs_clients@sema-25.html
    - shard-glk:          NOTRUN -> [SKIP][109] ([fdo#109271] / [i915#2994])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-glk8/igt@sysfs_clients@sema-25.html

  
#### Possible fixes ####

  * igt@gem_eio@in-flight-contexts-immediate:
    - shard-tglb:         [TIMEOUT][110] ([i915#3063]) -> [PASS][111]
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-tglb1/igt@gem_eio@in-flight-contexts-immediate.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb2/igt@gem_eio@in-flight-contexts-immediate.html

  * igt@gem_eio@unwedge-stress:
    - shard-tglb:         [FAIL][112] ([i915#232]) -> [PASS][113]
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-tglb1/igt@gem_eio@unwedge-stress.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb6/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_balancer@parallel-out-fence:
    - shard-iclb:         [SKIP][114] ([i915#4525]) -> [PASS][115] +2 similar issues
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-iclb8/igt@gem_exec_balancer@parallel-out-fence.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb4/igt@gem_exec_balancer@parallel-out-fence.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          [FAIL][116] ([i915#2846]) -> [PASS][117]
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-glk4/igt@gem_exec_fair@basic-deadline.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-glk3/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-iclb:         [FAIL][118] ([i915#2842]) -> [PASS][119]
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb8/igt@gem_exec_fair@basic-none-share@rcs0.html
    - shard-tglb:         [FAIL][120] ([i915#2842]) -> [PASS][121]
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-tglb8/igt@gem_exec_fair@basic-none-share@rcs0.html
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb1/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
    - shard-apl:          [FAIL][122] ([i915#2842]) -> [PASS][123]
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-apl1/igt@gem_exec_fair@basic-none-solo@rcs0.html
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-apl8/igt@gem_exec_fair@basic-none-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@vecs0:
    - shard-kbl:          [FAIL][124] ([i915#2842]) -> [PASS][125]
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-kbl7/igt@gem_exec_fair@basic-pace@vecs0.html
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl6/igt@gem_exec_fair@basic-pace@vecs0.html
    - shard-glk:          [FAIL][126] ([i915#2842]) -> [PASS][127] +2 similar issues
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-glk5/igt@gem_exec_fair@basic-pace@vecs0.html
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-glk5/igt@gem_exec_fair@basic-pace@vecs0.html

  * igt@gem_exec_fair@basic-throttle@rcs0:
    - shard-iclb:         [FAIL][128] ([i915#2849]) -> [PASS][129]
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-iclb4/igt@gem_exec_fair@basic-throttle@rcs0.html
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb5/igt@gem_exec_fair@basic-throttle@rcs0.html

  * igt@gem_exec_whisper@basic-contexts-priority-all:
    - shard-glk:          [DMESG-WARN][130] ([i915#118]) -> [PASS][131]
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-glk3/igt@gem_exec_whisper@basic-contexts-priority-all.html
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-glk7/igt@gem_exec_whisper@basic-contexts-priority-all.html

  * igt@gem_huc_copy@huc-copy:
    - shard-tglb:         [SKIP][132] ([i915#2190]) -> [PASS][133]
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-tglb7/igt@gem_huc_copy@huc-copy.html
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-tglb8/igt@gem_huc_copy@huc-copy.html

  * igt@i915_pm_dc@dc9-dpms:
    - shard-iclb:         [SKIP][134] ([i915#4281]) -> [PASS][135]
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-iclb3/igt@i915_pm_dc@dc9-dpms.html
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-iclb2/igt@i915_pm_dc@dc9-dpms.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-kbl:          [INCOMPLETE][136] ([i915#180] / [i915#636]) -> [PASS][137]
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11111/shard-kbl7/igt@kms_fbcon_fbt@fbc-suspend.html
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/shard-kbl6/igt@k

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6563/index.html

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Re: [igt-dev] [PATCH i-g-t 2/2] test/amdgpu: Add ilr test

[Rodrigo Siqueira Jordao]

Hi Wayne,

Thanks a lot for this series; I added some inline comments.

On 2022-01-20 2:49 a.m., Wayne Lin wrote:
> [Why & How]
> Add new igt test amd_ilr for ilr fature

Could you add more details to the commit? I suggest that you briefly 
describe IRL and what kind of test you introduce.

Additionally, could you expand our Glossary in the kernel by adding IRL 
entry?

https://docs.kernel.org/gpu/amdgpu/display/dc-glossary.html

> Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
> ---
>   lib/igt_amd.c            | 112 ++++++++++++++++
>   lib/igt_amd.h            |   8 ++
>   tests/amdgpu/amd_ilr.c   | 275 +++++++++++++++++++++++++++++++++++++++
>   tests/amdgpu/meson.build |   1 +
>   4 files changed, 396 insertions(+)
>   create mode 100644 tests/amdgpu/amd_ilr.c
> 
> diff --git a/lib/igt_amd.c b/lib/igt_amd.c
> index 92766a30..b81fa948 100644
> --- a/lib/igt_amd.c
> +++ b/lib/igt_amd.c
> @@ -892,3 +892,115 @@ bool igt_amd_output_has_link_settings(int drm_fd, char *connector_name)
>   	close(fd);
>   	return true;
>   }
> +
> +/*
> + * igt_amd_read_ilr_setting:
> + * @drm_fd: DRM file descriptor
> + * @connector_name: The name of the connector to read the link_settings
> + * @supported_ilr: supported link rates
> + *
> + * The indices of @supported_ilr correspond to the supported customized
> + * link rates reported from DPCD 00010h ~ 0001Fh
> + */
> +void igt_amd_read_ilr_setting(
> +	int drm_fd, char *connector_name, int *supported_ilr)
> +{
> +	int fd, ret;
> +	char buf[256] = {'\0'};
> +	int i = 0;
> +	char *token_end, *val_token, *tmp;
> +
> +	fd = igt_debugfs_connector_dir(drm_fd, connector_name, O_RDONLY);
> +	if (fd < 0) {
> +		igt_info("Could not open connector %s debugfs directory\n",
> +			 connector_name);
> +		return;
> +	}
> +	ret = igt_debugfs_simple_read(fd, DEBUGFS_DP_ILR_SETTING, buf, sizeof(buf));
> +	igt_assert_f(ret >= 0, "Reading %s for connector %s failed.\n",
> +		     DEBUGFS_DP_ILR_SETTING, connector_name);
> +
> +	close(fd);
> +
> +	tmp = strstr(buf, "not supported");
> +	if (tmp) {
> +		igt_info("Connector %s: eDP panel doesn't support ILR\n%s",
> +			 connector_name, buf);
> +		return;
> +	}
> +
> +	/* Parse values read from file. */
> +	for (char *token = strtok_r(buf, "\n", &token_end);
> +	     token != NULL;
> +	     token = strtok_r(NULL, "\n", &token_end))
> +	{
> +		strtok_r(token, "] ", &val_token);
> +		supported_ilr[i] = strtol(val_token, &val_token, 10);
> +		i++;
> +
> +		if (i > 7) return;

Why did you decide to return when i > 7? What is the meaning of 7 here? 
How about adding a macro with a descriptive name for this value?

> +	}
> +}
> +
> +/*
> + * igt_amd_write_link_settings:
> + * @drm_fd: DRM file descriptor
> + * @connector_name: The name of the connector to write the link_settings
> + * @lane_count: Lane count
> + * @link_rate_set: Intermediate link rate
> + */
> +void igt_amd_write_ilr_setting(
> +	int drm_fd, char *connector_name, enum dc_lane_count lane_count,
> +	uint8_t link_rate_set)
> +{
> +	int ls_fd, fd;
> +	const int buf_len = 40;
> +	char buf[buf_len];
> +	int wr_len = 0;
> +
> +	memset(buf, '\0', sizeof(char) * buf_len);
> +
> +	fd = igt_debugfs_connector_dir(drm_fd, connector_name, O_RDONLY);
> +	igt_assert(fd >= 0);
> +	ls_fd = openat(fd, DEBUGFS_DP_ILR_SETTING, O_WRONLY);
> +	close(fd);
> +	igt_assert(ls_fd >= 0);
> +
> +	/* edp_ilr_write expects a \n at the end or else it will
> +	 * dereference a null pointer.
> +	 */
> +	snprintf(buf, sizeof(buf), "%02x %02x \n", lane_count, link_rate_set);
> +
> +	wr_len = write(ls_fd, buf, strlen(buf));
> +	igt_assert_eq(wr_len, strlen(buf));
> +
> +	close(ls_fd);
> +}
> +
> +/**
> + * igt_amd_output_has_ilr_setting: check if connector has ilr_setting debugfs entry
> + * @drm_fd: DRM file descriptor
> + * @connector_name: The connector's name, on which we're reading the status
> + */
> +bool igt_amd_output_has_ilr_setting(int drm_fd, char *connector_name)
> +{
> +	int fd;
> +	int res;
> +	struct stat stat;
> +
> +	fd = igt_debugfs_connector_dir(drm_fd, connector_name, O_RDONLY);
> +	if (fd < 0) {
> +		igt_info("output %s: debugfs not found\n", connector_name);
> +		return false;
> +	}
> +
> +	res = fstatat(fd, DEBUGFS_DP_ILR_SETTING, &stat, 0);
> +	if (res != 0) {
> +		igt_info("output %s: %s debugfs not supported\n", connector_name, DEBUGFS_DP_ILR_SETTING);
> +		close(fd);
> +		return false;
> +	}
> +
> +	close(fd);
> +	return true;
> +}
> diff --git a/lib/igt_amd.h b/lib/igt_amd.h
> index 7a91cbff..1c99d331 100644
> --- a/lib/igt_amd.h
> +++ b/lib/igt_amd.h
> @@ -42,6 +42,8 @@
>   #define DEBUGFS_DP_LINK_SETTINGS "link_settings"
>   #define DEBUGFS_HPD_TRIGGER "trigger_hotplug"
>   
> +#define DEBUGFS_DP_ILR_SETTING "ilr_setting"
> +
>   enum amd_dsc_clock_force {
>   	DSC_AUTOMATIC = 0,
>   	DSC_FORCE_ON,
> @@ -126,5 +128,11 @@ void igt_amd_write_link_settings(
>   	int drm_fd, char *connector_name, enum dc_lane_count lane_count,
>   	enum dc_link_rate link_rate, enum dc_link_training_type training_type);
>   bool igt_amd_output_has_link_settings(int drm_fd, char *connector_name);
> +void igt_amd_read_ilr_setting(
> +	int drm_fd, char *connector_name, int *supported_ilr);
> +void igt_amd_write_ilr_setting(
> +	int drm_fd, char *connector_name, enum dc_lane_count lane_count,
> +	uint8_t link_rate_set);
> +bool igt_amd_output_has_ilr_setting(int drm_fd, char *connector_name);
>   
>   #endif /* IGT_AMD_H */
> diff --git a/tests/amdgpu/amd_ilr.c b/tests/amdgpu/amd_ilr.c
> new file mode 100644
> index 00000000..e3853254
> --- /dev/null
> +++ b/tests/amdgpu/amd_ilr.c
> @@ -0,0 +1,275 @@
> +/*
> + * Copyright 2022 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include "igt.h"
> +#include "igt_amd.h"
> +#include "igt_sysfs.h"
> +#include <dirent.h>
> +#include <fcntl.h>
> +#include <limits.h>
> +#include <sys/types.h>
> +#include <sys/stat.h>
> +

Add an IGT_TEST_DESCRIPTION with as many descriptions as possible.


> +typedef struct {
> +	int drm_fd;
> +	igt_display_t display;
> +	igt_plane_t *primary;
> +	igt_output_t *output;
> +	igt_fb_t fb;
> +	igt_pipe_t *pipe;
> +	igt_pipe_crc_t *pipe_crc;
> +	igt_crc_t crc_dprx;
> +	enum pipe pipe_id;
> +	int connector_type;
> +	int supported_ilr[8];
> +	int lane_count[4], link_rate[4], link_spread_spectrum[4];
> +} data_t;
> +
> +enum sub_test {
> +	ILR_LINK_TRAINING_CONFIGS,
> +	ILR_POLICY
> +};
> +
> +enum link_settings {
> +	CURRENT,
> +	VERIFIED,
> +	REPORTED,
> +	PREFERRED
> +};
> +
> +static void test_fini(data_t *data)
> +{
> +	igt_pipe_crc_free(data->pipe_crc);
> +	igt_display_reset(&data->display);
> +}
> +
> +static void set_all_output_pipe_to_none(data_t *data)
> +{
> +	igt_output_t *output;
> +
> +	for_each_connected_output(&data->display, output) {
> +		igt_output_set_pipe(output, PIPE_NONE);
> +	}
> +
> +	igt_display_commit_atomic(&data->display, DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
> +}
> +
> +static void test_init(data_t *data, igt_output_t *output)
> +{
> +	enum pipe pipe;
> +
> +	igt_require(output->config.connector->count_modes >= 1);
> +
> +	set_all_output_pipe_to_none(data);
> +
> +	for_each_pipe(&data->display, pipe) {
> +		if (igt_pipe_connector_valid(pipe, output)) {
> +			data->pipe_id = pipe;
> +			break;
> +		}
> +	}
> +
> +	data->connector_type = output->config.connector->connector_type;
> +
> +	igt_require(data->pipe_id != PIPE_NONE);
> +
> +	data->pipe = &data->display.pipes[data->pipe_id];
> +
> +	data->pipe_crc = igt_pipe_crc_new(data->drm_fd, data->pipe_id,
> +					  AMDGPU_PIPE_CRC_SOURCE_DPRX);
> +
> +	igt_output_set_pipe(output, data->pipe_id);
> +
> +	data->primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
> +}
> +
> +static void test_ilr_link_training_configs(data_t *data, igt_output_t *output)
> +{
> +	int reported_lc, idx;
> +
> +	reported_lc = data->lane_count[REPORTED];
> +
> +	/* If ILR is supported */
> +	if (data->supported_ilr[0] != 0) {
> +		for (idx = 0; idx < 8 && data->supported_ilr[idx] != 0; idx++) {

Again, what is the meaning of this 8? Could you create a macro for that?

> +			igt_amd_write_ilr_setting(data->drm_fd, output->name,
> +				reported_lc, idx);
> +			igt_info("Write training setting - lane count:%d, supported link rate idx:%d\n",
> +				reported_lc, idx);
> +
> +			igt_amd_read_link_settings(data->drm_fd, output->name, data->lane_count,
> +				   data->link_rate, data->link_spread_spectrum);
> +			igt_info("Actual link result - lane count:%d, link rate:0x%02X\n",
> +					data->lane_count[CURRENT], data->link_rate[CURRENT]);
> +
> +			/* Check lane count and link rate are trained at desired config*/
> +			igt_assert(reported_lc == data->lane_count[CURRENT]);
> +			igt_assert(data->supported_ilr[idx] == data->link_rate[CURRENT] * 270000);

How about a macro for 270000?

> +		}
> +	}
> +}
> +
> +static void test_ilr_policy(data_t *data, igt_output_t *output)
> +{
> +	drmModeConnector *connector;
> +	drmModeModeInfo *mode;
> +	int idx = 0, link_rate_set = 0;
> +	int current_link_rate;
> +	char *crc_str;
> +
> +	igt_info("Policy test on %s\n", output->name);
> +
> +	connector = output->config.connector;
> +	for (idx = 0; idx < connector->count_modes; idx++) {
> +		mode = &connector->modes[idx];
> +		igt_info("[%d]: htotal:%d vtotal:%d vrefresh:%d clock:%d\n", idx, mode->hdisplay,
> +		     mode->vdisplay, mode->vrefresh, mode->clock);
> +
> +		/* Set test pattern*/
> +		igt_output_override_mode(output, mode);
> +		igt_create_pattern_fb(data->drm_fd, mode->hdisplay,
> +				      mode->vdisplay, DRM_FORMAT_XRGB8888,
> +				      0, &data->fb);
> +		igt_plane_set_fb(data->primary, &data->fb);
> +		igt_display_commit_atomic(&data->display, DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
> +
> +		igt_amd_read_link_settings(data->drm_fd, output->name, data->lane_count,
> +					   data->link_rate, data->link_spread_spectrum);
> +
> +		igt_info("link result - lane count:%d, link rate:0x%02X\n",
> +					data->lane_count[CURRENT], data->link_rate[CURRENT]);
> +
> +		current_link_rate = data->link_rate[CURRENT] * 270000;
> +
> +		/* Get current link_rate_set index after link training*/
> +		for (link_rate_set = 0; link_rate_set < sizeof(data->supported_ilr) &&
> +		 data->supported_ilr[link_rate_set] != 0; link_rate_set++) {
> +			if (data->supported_ilr[link_rate_set] == current_link_rate)
> +				break;
> +		}
> +
> +		/* Firstly check driver does use ILR link setting */
> +		igt_assert(link_rate_set < sizeof(data->supported_ilr));
> +		igt_assert(data->supported_ilr[link_rate_set] > 0);
> +
> +		/* Secondly check trained BW is sufficient.
> +		 * If BW is insufficient, crc retrieving will timeout
> +		 */
> +		igt_wait_for_vblank_count(data->drm_fd,
> +					data->pipe->crtc_offset, 10);
> +
> +		igt_pipe_crc_collect_crc(data->pipe_crc, &data->crc_dprx);
> +		crc_str = igt_crc_to_string(&data->crc_dprx);
> +		igt_info("DP_RX CRC: %s\n", crc_str);
> +	}
> +
> +
> +}
> +
> +static void test_flow(data_t *data, enum sub_test option)
> +{
> +	drmModeModeInfo *mode;
> +	igt_output_t *output;
> +
> +	igt_enable_connectors(data->drm_fd);
> +
> +	for_each_connected_output(&data->display, output) {
> +		if (!igt_amd_output_has_ilr_setting(data->drm_fd, output->name) ||
> +			!igt_amd_output_has_link_settings(data->drm_fd, output->name)) {
> +			igt_info("Skipping output: %s\n", output->name);
> +			continue;
> +		}
> +
> +		igt_info("Testing on output: %s\n", output->name);
> +
> +		/* Init only if display supports ilr link settings */
> +		test_init(data, output);
> +
> +		mode = igt_output_get_mode(output);
> +		igt_assert(mode);
> +
> +		/* Set test pattern*/
> +		igt_create_pattern_fb(data->drm_fd, mode->hdisplay,
> +				      mode->vdisplay, DRM_FORMAT_XRGB8888,
> +				      0, &data->fb);
> +		igt_plane_set_fb(data->primary, &data->fb);
> +		igt_display_commit_atomic(&data->display, DRM_MODE_ATOMIC_ALLOW_MODESET, NULL);
> +
> +		/* Collect info of Reported Lane Count & ILR */
> +		igt_amd_read_link_settings(data->drm_fd, output->name, data->lane_count,
> +					   data->link_rate, data->link_spread_spectrum);
> +		igt_amd_read_ilr_setting(data->drm_fd, output->name, data->supported_ilr);
> +
> +		switch (option) {
> +			case ILR_LINK_TRAINING_CONFIGS:
> +				test_ilr_link_training_configs(data, output);
> +				break;
> +			case ILR_POLICY:
> +				test_ilr_policy(data, output);
> +				break;
> +			default:
> +				break;
> +		}
> +
> +		/* Reset preferred link settings*/
> +		memset(data->supported_ilr, 0, sizeof(data->supported_ilr));
> +		igt_amd_write_ilr_setting(data->drm_fd, output->name, 0, 0);
> +
> +		igt_remove_fb(data->drm_fd, &data->fb);
> +
> +		test_fini(data);
> +	}
> +
> +}
> +
> +igt_main
> +{
> +	data_t data;
> +	memset(&data, 0, sizeof(data));
> +
> +	igt_skip_on_simulation();
> +
> +	igt_fixture
> +	{
> +		data.drm_fd = drm_open_driver_master(DRIVER_AMDGPU);
> +		if (data.drm_fd == -1)
> +			igt_skip("Not an amdgpu driver.\n");
> +
> +		kmstest_set_vt_graphics_mode();
> +
> +		igt_display_require(&data.display, data.drm_fd);
> +		igt_require(data.display.is_atomic);
> +		igt_display_require_output(&data.display);
> +	}
> +
> +	igt_describe("Test intermediate link rate (ILR) by phy and policy perspective");

Maybe add one igt_describe per subtest?

Thanks

> +	igt_subtest("ilr-link-training-configs")
> +		test_flow(&data, ILR_LINK_TRAINING_CONFIGS);
> +	igt_subtest("ilr-policy")
> +		test_flow(&data, ILR_POLICY);
> +
> +	igt_fixture
> +	{
> +		igt_display_fini(&data.display);
> +	}
> +}
> +
> diff --git a/tests/amdgpu/meson.build b/tests/amdgpu/meson.build
> index 0ccbb36d..f4a0b9fd 100644
> --- a/tests/amdgpu/meson.build
> +++ b/tests/amdgpu/meson.build
> @@ -20,6 +20,7 @@ if libdrm_amdgpu.found()
>   			  'amd_dp_dsc',
>   			  'amd_psr',
>   			  'amd_plane',
> +			  'amd_ilr',
>   			]
>   	amdgpu_deps += libdrm_amdgpu
>   endif
>