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From: Jani Nikula <jani.nikula@intel.com>
To: dri-devel@lists.freedesktop.org
Cc: jani.nikula@intel.com, intel-gfx@lists.freedesktop.org
Subject: [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs
Date: Mon, 28 Mar 2022 12:17:17 +0300	[thread overview]
Message-ID: <04c8140a780dc02155a16d8acc64dbce756739bb.1648458971.git.jani.nikula@intel.com> (raw)
In-Reply-To: <cover.1648458971.git.jani.nikula@intel.com>

The pixel clock is conceptually part of the detailed timings, while it's
just zero padding for display descriptors. Modify the structures to
reflect this. Rename struct detailed_non_pixel to
edid_display_descriptor to better reflect spec while at it. (Further
struct renames are left for follow-up work.)

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  6 +++---
 drivers/gpu/drm/drm_edid.c                        | 12 ++++++------
 include/drm/drm_edid.h                            |  9 +++++----
 3 files changed, 14 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index b30656959fd8..e477f4b42b6b 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -11537,7 +11537,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 {
 	int i = 0;
 	struct detailed_timing *timing;
-	struct detailed_non_pixel *data;
+	struct edid_display_descriptor *data;
 	struct detailed_data_monitor_range *range;
 	struct amdgpu_dm_connector *amdgpu_dm_connector =
 			to_amdgpu_dm_connector(connector);
@@ -11592,7 +11592,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 			for (i = 0; i < 4; i++) {
 
 				timing	= &edid->detailed_timings[i];
-				data	= &timing->data.other_data;
+				data	= &timing->data.descriptor;
 				range	= &data->data.range;
 				/*
 				 * Check if monitor has continuous frequency mode
@@ -11629,7 +11629,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 		i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info);
 		if (i >= 0 && vsdb_info.freesync_supported) {
 			timing  = &edid->detailed_timings[i];
-			data    = &timing->data.other_data;
+			data    = &timing->data.descriptor;
 
 			amdgpu_dm_connector->min_vfreq = vsdb_info.min_refresh_rate_hz;
 			amdgpu_dm_connector->max_vfreq = vsdb_info.max_refresh_rate_hz;
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 13d05062d68c..ac80681d64f6 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2742,7 +2742,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
 	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
 		mode->clock = 1088 * 10;
 	else
-		mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
+		mode->clock = le16_to_cpu(pt->pixel_clock) * 10;
 
 	mode->hdisplay = hactive;
 	mode->hsync_start = mode->hdisplay + hsync_offset;
@@ -2984,7 +2984,7 @@ static void
 do_inferred_modes(struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
-	struct detailed_non_pixel *data = &timing->data.other_data;
+	struct edid_display_descriptor *data = &timing->data.descriptor;
 	struct detailed_data_monitor_range *range = &data->data.range;
 
 	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
@@ -3117,7 +3117,7 @@ static void
 do_standard_modes(struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
-	struct detailed_non_pixel *data = &timing->data.other_data;
+	struct edid_display_descriptor *data = &timing->data.descriptor;
 	struct drm_connector *connector = closure->connector;
 	struct edid *edid = closure->edid;
 	int i;
@@ -3187,7 +3187,7 @@ static int drm_cvt_modes(struct drm_connector *connector,
 	for (i = 0; i < 4; i++) {
 		int width, height;
 
-		cvt = &(timing->data.other_data.data.cvt[i]);
+		cvt = &(timing->data.descriptor.data.cvt[i]);
 
 		if (!memcmp(cvt->code, empty, 3))
 			continue;
@@ -4494,7 +4494,7 @@ monitor_name(struct detailed_timing *t, void *data)
 	if (!is_display_descriptor((const u8 *)t, EDID_DETAIL_MONITOR_NAME))
 		return;
 
-	*(u8 **)data = t->data.other_data.data.str.str;
+	*(u8 **)data = t->data.descriptor.data.str.str;
 }
 
 static int get_monitor_name(struct edid *edid, char name[13])
@@ -5223,7 +5223,7 @@ void get_monitor_range(struct detailed_timing *timing,
 		       void *info_monitor_range)
 {
 	struct drm_monitor_range_info *monitor_range = info_monitor_range;
-	const struct detailed_non_pixel *data = &timing->data.other_data;
+	const struct edid_display_descriptor *data = &timing->data.descriptor;
 	const struct detailed_data_monitor_range *range = &data->data.range;
 
 	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 144c495b99c4..8e322ef173a8 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -68,6 +68,7 @@ struct std_timing {
 
 /* If detailed data is pixel timing */
 struct detailed_pixel_timing {
+	__le16 pixel_clock; /* non-zero, need to multiply by 10 KHz */
 	u8 hactive_lo;
 	u8 hblank_lo;
 	u8 hactive_hblank_hi;
@@ -142,8 +143,9 @@ struct cvt_timing {
 	u8 code[3];
 } __attribute__((packed));
 
-struct detailed_non_pixel {
-	u8 pad1;
+struct edid_display_descriptor {
+	u16 pad0; /* 0 for Display Descriptor */
+	u8 pad1; /* 0 for Display Descriptor */
 	u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name
 		    fb=color point data, fa=standard timing data,
 		    f9=undefined, f8=mfg. reserved */
@@ -168,10 +170,9 @@ struct detailed_non_pixel {
 #define EDID_DETAIL_MONITOR_SERIAL 0xff
 
 struct detailed_timing {
-	__le16 pixel_clock; /* need to multiply by 10 KHz */
 	union {
 		struct detailed_pixel_timing pixel_data;
-		struct detailed_non_pixel other_data;
+		struct edid_display_descriptor descriptor;
 	} data;
 } __attribute__((packed));
 
-- 
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: Jani Nikula <jani.nikula@intel.com>
To: dri-devel@lists.freedesktop.org
Cc: jani.nikula@intel.com, intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs
Date: Mon, 28 Mar 2022 12:17:17 +0300	[thread overview]
Message-ID: <04c8140a780dc02155a16d8acc64dbce756739bb.1648458971.git.jani.nikula@intel.com> (raw)
In-Reply-To: <cover.1648458971.git.jani.nikula@intel.com>

The pixel clock is conceptually part of the detailed timings, while it's
just zero padding for display descriptors. Modify the structures to
reflect this. Rename struct detailed_non_pixel to
edid_display_descriptor to better reflect spec while at it. (Further
struct renames are left for follow-up work.)

Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  6 +++---
 drivers/gpu/drm/drm_edid.c                        | 12 ++++++------
 include/drm/drm_edid.h                            |  9 +++++----
 3 files changed, 14 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index b30656959fd8..e477f4b42b6b 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -11537,7 +11537,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 {
 	int i = 0;
 	struct detailed_timing *timing;
-	struct detailed_non_pixel *data;
+	struct edid_display_descriptor *data;
 	struct detailed_data_monitor_range *range;
 	struct amdgpu_dm_connector *amdgpu_dm_connector =
 			to_amdgpu_dm_connector(connector);
@@ -11592,7 +11592,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 			for (i = 0; i < 4; i++) {
 
 				timing	= &edid->detailed_timings[i];
-				data	= &timing->data.other_data;
+				data	= &timing->data.descriptor;
 				range	= &data->data.range;
 				/*
 				 * Check if monitor has continuous frequency mode
@@ -11629,7 +11629,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector,
 		i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info);
 		if (i >= 0 && vsdb_info.freesync_supported) {
 			timing  = &edid->detailed_timings[i];
-			data    = &timing->data.other_data;
+			data    = &timing->data.descriptor;
 
 			amdgpu_dm_connector->min_vfreq = vsdb_info.min_refresh_rate_hz;
 			amdgpu_dm_connector->max_vfreq = vsdb_info.max_refresh_rate_hz;
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 13d05062d68c..ac80681d64f6 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -2742,7 +2742,7 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
 	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
 		mode->clock = 1088 * 10;
 	else
-		mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
+		mode->clock = le16_to_cpu(pt->pixel_clock) * 10;
 
 	mode->hdisplay = hactive;
 	mode->hsync_start = mode->hdisplay + hsync_offset;
@@ -2984,7 +2984,7 @@ static void
 do_inferred_modes(struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
-	struct detailed_non_pixel *data = &timing->data.other_data;
+	struct edid_display_descriptor *data = &timing->data.descriptor;
 	struct detailed_data_monitor_range *range = &data->data.range;
 
 	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
@@ -3117,7 +3117,7 @@ static void
 do_standard_modes(struct detailed_timing *timing, void *c)
 {
 	struct detailed_mode_closure *closure = c;
-	struct detailed_non_pixel *data = &timing->data.other_data;
+	struct edid_display_descriptor *data = &timing->data.descriptor;
 	struct drm_connector *connector = closure->connector;
 	struct edid *edid = closure->edid;
 	int i;
@@ -3187,7 +3187,7 @@ static int drm_cvt_modes(struct drm_connector *connector,
 	for (i = 0; i < 4; i++) {
 		int width, height;
 
-		cvt = &(timing->data.other_data.data.cvt[i]);
+		cvt = &(timing->data.descriptor.data.cvt[i]);
 
 		if (!memcmp(cvt->code, empty, 3))
 			continue;
@@ -4494,7 +4494,7 @@ monitor_name(struct detailed_timing *t, void *data)
 	if (!is_display_descriptor((const u8 *)t, EDID_DETAIL_MONITOR_NAME))
 		return;
 
-	*(u8 **)data = t->data.other_data.data.str.str;
+	*(u8 **)data = t->data.descriptor.data.str.str;
 }
 
 static int get_monitor_name(struct edid *edid, char name[13])
@@ -5223,7 +5223,7 @@ void get_monitor_range(struct detailed_timing *timing,
 		       void *info_monitor_range)
 {
 	struct drm_monitor_range_info *monitor_range = info_monitor_range;
-	const struct detailed_non_pixel *data = &timing->data.other_data;
+	const struct edid_display_descriptor *data = &timing->data.descriptor;
 	const struct detailed_data_monitor_range *range = &data->data.range;
 
 	if (!is_display_descriptor((const u8 *)timing, EDID_DETAIL_MONITOR_RANGE))
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 144c495b99c4..8e322ef173a8 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -68,6 +68,7 @@ struct std_timing {
 
 /* If detailed data is pixel timing */
 struct detailed_pixel_timing {
+	__le16 pixel_clock; /* non-zero, need to multiply by 10 KHz */
 	u8 hactive_lo;
 	u8 hblank_lo;
 	u8 hactive_hblank_hi;
@@ -142,8 +143,9 @@ struct cvt_timing {
 	u8 code[3];
 } __attribute__((packed));
 
-struct detailed_non_pixel {
-	u8 pad1;
+struct edid_display_descriptor {
+	u16 pad0; /* 0 for Display Descriptor */
+	u8 pad1; /* 0 for Display Descriptor */
 	u8 type; /* ff=serial, fe=string, fd=monitor range, fc=monitor name
 		    fb=color point data, fa=standard timing data,
 		    f9=undefined, f8=mfg. reserved */
@@ -168,10 +170,9 @@ struct detailed_non_pixel {
 #define EDID_DETAIL_MONITOR_SERIAL 0xff
 
 struct detailed_timing {
-	__le16 pixel_clock; /* need to multiply by 10 KHz */
 	union {
 		struct detailed_pixel_timing pixel_data;
-		struct detailed_non_pixel other_data;
+		struct edid_display_descriptor descriptor;
 	} data;
 } __attribute__((packed));
 
-- 
2.30.2


  parent reply	other threads:[~2022-03-28  9:17 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-03-28  9:17 [PATCH v2 00/11] drm/edid: constify EDID parsing, with some fixes Jani Nikula
2022-03-28  9:17 ` [Intel-gfx] " Jani Nikula
2022-03-28  9:17 ` [PATCH v2 01/11] drm/edid: don't modify EDID while parsing Jani Nikula
2022-03-28  9:17   ` [Intel-gfx] " Jani Nikula
2022-03-28  9:17 ` [PATCH v2 02/11] drm/edid: fix reduced blanking support check Jani Nikula
2022-03-28  9:17   ` [Intel-gfx] " Jani Nikula
2022-03-28 16:31   ` Ville Syrjälä
2022-03-28 16:31     ` [Intel-gfx] " Ville Syrjälä
2022-03-28  9:17 ` Jani Nikula [this message]
2022-03-28  9:17   ` [Intel-gfx] [PATCH v2 03/11] drm/edid: slightly restructure timing and non-timing descriptor structs Jani Nikula
2022-03-28  9:44   ` Jani Nikula
2022-03-28  9:44     ` Jani Nikula
2022-03-28  9:44     ` [Intel-gfx] " Jani Nikula
2022-03-28 11:45   ` kernel test robot
2022-03-28 13:20     ` Jani Nikula
2022-03-28 13:20       ` Jani Nikula
2022-03-28 13:20       ` Jani Nikula
2022-03-28 12:26   ` kernel test robot
2022-03-28 12:26     ` kernel test robot
2022-03-28 12:46   ` kernel test robot
2022-03-28  9:17 ` [PATCH v2 04/11] drm/edid: pass a timing pointer to is_display_descriptor() Jani Nikula
2022-03-28  9:17   ` [Intel-gfx] " Jani Nikula
2022-03-28  9:17 ` [PATCH v2 05/11] drm/edid: use struct detailed_timing member access in is_rb() Jani Nikula
2022-03-28  9:17   ` [Intel-gfx] " Jani Nikula
2022-03-28  9:17 ` [PATCH v2 06/11] drm/edid: use struct detailed_data_monitor_range member access in gtf2 functions Jani Nikula
2022-03-28  9:17   ` [Intel-gfx] " Jani Nikula
2022-03-28  9:17 ` [PATCH v2 07/11] drm/edid: constify struct detailed_timing in lower level parsing Jani Nikula
2022-03-28  9:17   ` [Intel-gfx] " Jani Nikula
2022-03-28  9:17 ` [PATCH v2 08/11] drm/edid: constify struct detailed_timing in parsing callbacks Jani Nikula
2022-03-28  9:17   ` [Intel-gfx] " Jani Nikula
2022-03-28  9:17 ` [PATCH v2 09/11] drm/edid: constify struct edid passed to detailed blocks Jani Nikula
2022-03-28  9:17   ` [Intel-gfx] " Jani Nikula
2022-03-28  9:17 ` [PATCH v2 10/11] drm/edid: constify struct edid passed around in callbacks and closure Jani Nikula
2022-03-28  9:17   ` [Intel-gfx] " Jani Nikula
2022-03-28  9:17 ` [PATCH v2 11/11] drm/edid: add more general struct edid constness in the interfaces Jani Nikula
2022-03-28  9:17   ` [Intel-gfx] " Jani Nikula
2022-03-28 13:26 ` [PATCH v2 00/11] drm/edid: constify EDID parsing, with some fixes Jani Nikula
2022-03-28 13:26   ` [Intel-gfx] " Jani Nikula
2022-03-28 14:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2022-03-28 14:53 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2022-03-28 15:13 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-03-28 17:47 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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