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* [PATCH] ARM: EXYNOS4: Fix wrong pll type for vpll
@ 2011-08-20  1:27 ` jhbird.choi at samsung.com
  0 siblings, 0 replies; 4+ messages in thread
From: jhbird.choi @ 2011-08-20  1:27 UTC (permalink / raw)
  To: linux-arm-kernel, linux-samsung-soc; +Cc: Kukjin Kim, Jonghwan Choi

From: Jonghwan Choi <jhbird.choi@samsung.com>

Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
---
 arch/arm/mach-exynos4/clock.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index 851dea0..0b39860 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -1160,7 +1160,7 @@ void __init_or_cpufreq exynos4_setup_clocks(void)
 
 	vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
 	vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
-				__raw_readl(S5P_VPLL_CON1), pll_4650);
+				__raw_readl(S5P_VPLL_CON1), pll_4650c);
 
 	clk_fout_apll.ops = &exynos4_fout_apll_ops;
 	clk_fout_mpll.rate = mpll;
-- 
1.7.0

^ permalink raw reply related	[flat|nested] 4+ messages in thread
* [PATCH] ARM: EXYNOS4: Fix wrong pll type for vpll
@ 2011-08-20  1:27 ` jhbird.choi at samsung.com
  0 siblings, 0 replies; 4+ messages in thread
From: jhbird.choi at samsung.com @ 2011-08-20  1:27 UTC (permalink / raw)
  To: linux-arm-kernel

From: Jonghwan Choi <jhbird.choi@samsung.com>

Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
---
 arch/arm/mach-exynos4/clock.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
index 851dea0..0b39860 100644
--- a/arch/arm/mach-exynos4/clock.c
+++ b/arch/arm/mach-exynos4/clock.c
@@ -1160,7 +1160,7 @@ void __init_or_cpufreq exynos4_setup_clocks(void)
 
 	vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
 	vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
-				__raw_readl(S5P_VPLL_CON1), pll_4650);
+				__raw_readl(S5P_VPLL_CON1), pll_4650c);
 
 	clk_fout_apll.ops = &exynos4_fout_apll_ops;
 	clk_fout_mpll.rate = mpll;
-- 
1.7.0

^ permalink raw reply related	[flat|nested] 4+ messages in thread
* RE: [PATCH] ARM: EXYNOS4: Fix wrong pll type for vpll
  2011-08-20  1:27 ` jhbird.choi at samsung.com
@ 2011-08-23  7:39   ` Kukjin Kim
  -1 siblings, 0 replies; 4+ messages in thread
From: Kukjin Kim @ 2011-08-23  7:39 UTC (permalink / raw)
  To: jhbird.choi, linux-arm-kernel, linux-samsung-soc

jhbird.choi@samsung.com wrote:
> 
> From: Jonghwan Choi <jhbird.choi@samsung.com>
> 
> Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
> ---
>  arch/arm/mach-exynos4/clock.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
> index 851dea0..0b39860 100644
> --- a/arch/arm/mach-exynos4/clock.c
> +++ b/arch/arm/mach-exynos4/clock.c
> @@ -1160,7 +1160,7 @@ void __init_or_cpufreq exynos4_setup_clocks(void)
> 
>  	vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
>  	vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
> -				__raw_readl(S5P_VPLL_CON1), pll_4650);
> +				__raw_readl(S5P_VPLL_CON1), pll_4650c);
> 
>  	clk_fout_apll.ops = &exynos4_fout_apll_ops;
>  	clk_fout_mpll.rate = mpll;
> --
> 1.7.0

Hi,

OK, will apply.

But would be helpful understanding if you could add git message in detail
like following...
"The PLL4650C is used for VPLL on EXYNOS4 so should be fixed"...I will add
this when apply.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

^ permalink raw reply	[flat|nested] 4+ messages in thread
* [PATCH] ARM: EXYNOS4: Fix wrong pll type for vpll
@ 2011-08-23  7:39   ` Kukjin Kim
  0 siblings, 0 replies; 4+ messages in thread
From: Kukjin Kim @ 2011-08-23  7:39 UTC (permalink / raw)
  To: linux-arm-kernel

jhbird.choi at samsung.com wrote:
> 
> From: Jonghwan Choi <jhbird.choi@samsung.com>
> 
> Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
> ---
>  arch/arm/mach-exynos4/clock.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-exynos4/clock.c b/arch/arm/mach-exynos4/clock.c
> index 851dea0..0b39860 100644
> --- a/arch/arm/mach-exynos4/clock.c
> +++ b/arch/arm/mach-exynos4/clock.c
> @@ -1160,7 +1160,7 @@ void __init_or_cpufreq exynos4_setup_clocks(void)
> 
>  	vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
>  	vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
> -				__raw_readl(S5P_VPLL_CON1), pll_4650);
> +				__raw_readl(S5P_VPLL_CON1), pll_4650c);
> 
>  	clk_fout_apll.ops = &exynos4_fout_apll_ops;
>  	clk_fout_mpll.rate = mpll;
> --
> 1.7.0

Hi,

OK, will apply.

But would be helpful understanding if you could add git message in detail
like following...
"The PLL4650C is used for VPLL on EXYNOS4 so should be fixed"...I will add
this when apply.

Thanks.

Best regards,
Kgene.
--
Kukjin Kim <kgene.kim@samsung.com>, Senior Engineer,
SW Solution Development Team, Samsung Electronics Co., Ltd.

^ permalink raw reply	[flat|nested] 4+ messages in thread
end of thread, other threads:[~2011-08-23  7:39 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-08-20  1:27 [PATCH] ARM: EXYNOS4: Fix wrong pll type for vpll jhbird.choi
2011-08-20  1:27 ` jhbird.choi at samsung.com
2011-08-23  7:39 ` Kukjin Kim
2011-08-23  7:39   ` Kukjin Kim

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