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From: Jan Beulich <jbeulich@suse.com>
To: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>
Cc: Paul Durrant <paul@xen.org>, Andrew Cooper <andrew.cooper3@citrix.com>
Subject: [PATCH v2 3/3] AMD/IOMMU: consider hidden devices when flushing device I/O TLBs
Date: Fri, 17 Sep 2021 13:00:55 +0200	[thread overview]
Message-ID: <09b6d94d-0116-c8ee-5daf-ddcc19d37029@suse.com> (raw)
In-Reply-To: <c0a460c0-9d7e-c015-37cf-4775bdef33a8@suse.com>

Hidden devices are associated with DomXEN but usable by the
hardware domain. Hence they need flushing as well when all devices are
to have flushes invoked.

While there drop a redundant ATS-enabled check and constify the first
parameter of the involved function.

Signed-off-by: Jan Beulich <jbeulich@suse.com>

--- a/xen/drivers/passthrough/amd/iommu_cmd.c
+++ b/xen/drivers/passthrough/amd/iommu_cmd.c
@@ -308,14 +308,11 @@ void amd_iommu_flush_iotlb(u8 devfn, con
     flush_command_buffer(iommu, iommu_dev_iotlb_timeout);
 }
 
-static void amd_iommu_flush_all_iotlbs(struct domain *d, daddr_t daddr,
+static void amd_iommu_flush_all_iotlbs(const struct domain *d, daddr_t daddr,
                                        unsigned int order)
 {
     struct pci_dev *pdev;
 
-    if ( !ats_enabled )
-        return;
-
     for_each_pdev( d, pdev )
     {
         u8 devfn = pdev->devfn;
@@ -343,7 +340,16 @@ static void _amd_iommu_flush_pages(struc
     }
 
     if ( ats_enabled )
+    {
         amd_iommu_flush_all_iotlbs(d, daddr, order);
+
+        /*
+         * Hidden devices are associated with DomXEN but usable by the
+         * hardware domain. Hence they need dealing with here as well.
+         */
+        if ( is_hardware_domain(d) )
+            amd_iommu_flush_all_iotlbs(dom_xen, daddr, order);
+    }
 }
 
 void amd_iommu_flush_all_pages(struct domain *d)



  parent reply	other threads:[~2021-09-17 11:01 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-17 10:58 [PATCH v2 0/3] IOMMU/PCI: respect device specifics Jan Beulich
2021-09-17 11:00 ` [PATCH v2 1/3] VT-d: consider hidden devices when unmapping Jan Beulich
2021-09-18  0:48   ` Tian, Kevin
2021-09-17 11:00 ` [PATCH v2 2/3] VT-d: PCI segments are up to 16 bits wide Jan Beulich
2021-09-18  0:49   ` Tian, Kevin
2021-09-17 11:00 ` Jan Beulich [this message]
2021-10-11  8:04   ` Ping: [PATCH v2 3/3] AMD/IOMMU: consider hidden devices when flushing device I/O TLBs Jan Beulich
2021-10-11  9:45     ` Durrant, Paul

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